Text preview for : 5991-4258EN W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet c20140820 [9].pdf part of Agilent 5991-4258EN W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet c20140820 [9] Agilent 5991-4258EN W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet c20140820 [9].pdf
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Keysight W4630A Series DDR4 BGA
Interposers for Logic Analyzers
Data Sheet
02 | Keysight | W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet
The W4630A series DDR4 BGA interposers enable probing of embedded memory DRAM
directly at the ball grid array with Keysight Technologies, Inc. logic analyzers.
The Keysight W4630A series DDR4 BGA interposers for logic analyzers enable viewing of data
traffic on industry standard DDR4 DRAMs with the Keysight U4154A logic analysis systems.
The DDR4 BGA Interposer Advantage
Features Benefits
Connects directly to the DDR4 BGA balls. Eliminates reflections from mid-bus probing methods. Also
eliminates design time, prototype builds, and trace routing
required to design in alternative probing methods.
Supports: Get complete signal access to the DDR4 signals critical to your
- Single die x4, x8 configuration debug and validation effort.
- Stacked/quad-die x4, x8 configuration
- Operating transfer rate of 2400 Mb/s (validated) Operate at full speed making measurements with a
- Designed to achieve higher data rates once DDR4 DRAM Keysight U4154B or U4154A logic analyzer.
technology achieves higher data rates (to be validated)
- Using U4154A with APS (Advanced Probe Settings*)
enables highest data rates
Supports either leaded or lead-free solder. Easily works with all solder finishes. Designed to tolerate
lead-free soldering temperature profiles.
Contract manufactures available for those without Eliminates the need to develop BGA soldering expertise.
the in-house expertise or facilities for soldering BGAs.
Flexible "wings" with ZIF connectors. Ensures reliable connection to the ZIF probes. Enables
placement of the probe cables around adjacent components.
Minimizes the torque to the balls of the BGA.
Attach to E5849A single-ended ZIF probes for connection to the Optimizes the use of logic analyzer channels by allowing
logic analyzer. assignment of channels to 4, 8 or 16 bits on each DRAM.
* To enable Advanced Probe Settings refer to Tech brief # 5991-0799EN. Maximum transfer rates are subject to variables in the signal
integrity of the system under test.
DDR4 BGA Interposer Connection to a Keysight Logic Analyzer
The W4633A DDR4 BGA interposer
connects to two E5849A cables to
provide connection to the logic
analyzer for the x4/x8 probe system.
Figure 1. E5849A 46-ch single-ended ZIF probe for
x4/x8 DRAM BGA interposer connects to 90-pin
logic analyzer cables
03 | Keysight | W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet
E5849A ZIF interposer
U4201A Logic analyzer cable
Flex wing
W4630A Series BGA
Figure 2. Interposer and cable connection to the logic analyzer
DDR EyeFinder and EyeScan Software
The DDR EyeFinder and EyeScan
software tool helps you position the
sampling points for accurate read
and write data capture. The software
qualifies scans of valid read and
write commands while your system
executes memory tests, random read
and write traffic, or stimulus program.
The software will then display read
and write data valid window as a
result of the scan.
Figure 3. DDR EyeFinder and Eyescan software shows read and write data valid windows
for accurate sampling position of data for protocol decode
04 | Keysight | W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet
Protocol Analysis
The W4630A series BGA interposer
along with the B4621B memory bus
decoder provides protocol decode of
memory transactions using a Keysight
logic analyzer as the analysis execu-
tion engine. Data is decoded and
displayed at any level of detail from
the protocol to binary.The B4621B
protocol-decode software translates
acquired signals into easily under-
stood bus transactions, at the full bus
speed. The Keysight logic analyzer
provides extensive triggering and
store qualification features. The DDR
protocol-decode software executes
in the logic analyzer and takes user
input on system attributes such
as Burst length, CAS and Additive
Latency, as well as Chip Selects to
decode the key DDR bus signals and
present a display that lists the trans-
action type, address, data and com-
mand conditions. The software also
supports user-defined symbols that
can be easily added to the state list-
ing display. The W4630 Series BGA
interposer along with the B4622B
compliance toolset provides memory
bus triggering, debug and compliance
verification measurements.
Figure 4. The B4622B compliance toolset used with the W4633A DDR4 interposer
05 | Keysight | W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet
Interposer Pin-Out to Logic Analyzer
The following signals are omitted from the Logic Analyzer connection for
the x4/x8 interposer system:
Address signal group
None
Control and other signals group
VREFCA,
TEN, ZQ
Data signal group
None
For additional installation information, refer to the installation guide at
http://literature.cdn.keysight.com/litweb/pdf/W4631-97000.pdf
06 | Keysight | W4630A Series DDR4 BGA Interposers for Logic Analyzers - Data Sheet
Technical Specification
Keysight Technologies Rigid/Flex
BGA interposers enable probing of
embedded DDR4 DRAM (x4 and x8)
directly at the ball grid array using
Keysight logic analyzers.
Key performance features