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HITACHI
49HK6T74U
49293DLB
MB120
SERVICE MANUAL
Table of Contents
1. INTRODUCTION .......................................................................................................................................................... 2
2. TUNER ........................................................................................................................................................................... 3
A. SI2151 Terrestrial and Cable TV Tuner: ..................................................................................................................... 3
B. M88TS2022 Satellite Tuner ........................................................................................................................................ 5
3. AUDIO AMPLIFIER STAGES...................................................................................................................................... 6
A. MAIN AMPLIFIER (U8) (10W/12W options) ............................................................................................................... 6
B. SUBWOOFER AMPLIFIER (U9) (12 W) ........................................................................................................................ 8
C. HEADPHONE AMPLIFIER (U59) ................................................................................................................................ 10
D. SUBWOOFER PREAMPLIFIER (U30) .......................................................................................................................... 12
E. SCART AUDIO AMPLIFIER (U31) ............................................................................................................................... 12
4. POWER STAGE ........................................................................................................................................................... 12
A. TPS54528 ................................................................................................................................................................. 13
B. TPS54628 ................................................................................................................................................................. 15
C. TPS54821 ................................................................................................................................................................. 17
D. FDS4685 ................................................................................................................................................................... 19
E. NTGS3446 ................................................................................................................................................................ 20
F. APL5910 ................................................................................................................................................................... 21
G. LM1117 .................................................................................................................................................................... 23
5. MICROCONTROLLER (MSTAR MSD95M0D) ........................................................................................................ 24
6. VIDEO BACK-END PROCESSOR (MSTAR) ........................................................................................................... 31
MST7410FE ................................................................................................................................................................... 31
7. 2Gb DDR3 SDRAM ..................................................................................................................................................... 34
Hynix H5TQ2G63GFR .................................................................................................................................................... 34
8. 4Gb DDR3L SDRAM ................................................................................................................................................... 35
Hynix H5TQ4G63GFR .................................................................................................................................................... 35
9. 32GBIT (4G X 8 BIT) NAND FLASH MEMORY ..................................................................................................... 37
MT29F4G08ABAEAWP .................................................................................................................................................. 37
10. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................................................ 39
A. MX25L1606E SPI Flash ............................................................................................................................................. 39
B. M25Q32FV SPI Flash ................................................................................................................................................ 41
11. DEMODULATOR STAGE .......................................................................................................................................... 43
12. LNB SUPPLY AND CONTROL IC ............................................................................................................................ 46
TPS65233 ...................................................................................................................................................................... 46
13. SOFTWARE UPDATE ................................................................................................................................................ 47
Main SW update ........................................................................................................................................................... 47
1
14. TROUBLESHOOTING ................................................................................................................................................ 48
A. No Backlight Problem .............................................................................................................................................. 48
B. CI Module Problem .................................................................................................................................................. 50
C. Staying in Stand-by Mode ........................................................................................................................................ 52
D. IR Problem................................................................................................................................................................ 54
E. Keypad Touchpad Problems .................................................................................................................................... 55
F. USB Problems ........................................................................................................................................................... 56
G. No Sound Problem ................................................................................................................................................... 57
H. Standby On/Off Problem ......................................................................................................................................... 58
. No Signal Problem .................................................................................................................................................... 58
15. GENERAL BLOCK DIAGRAM ................................................................................................................................. 59
1. INTRODUCTION
17MB120 main board is driven by MStar SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU. This IC also supports 4K2K (UHD).
Key features includes,
Combo Front-End Demodulator
A multi standart A/V format decoder
The MACEpro video processor
Home theatre sound processor
Internet and Variety of Connectivity Support
Dual-stream decoder for 3D contents
Multi-purpose CPU for OS and multimedia
Peripheral and power management
Supported peripherals are:
1 RF input VHF I, VHF III, UHF
1 Satellite input
1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 YPbPr / Back S-Video(Common)
1 PC input(Common)
4 HDMI input(Common)
1 Common interface(Common)
1 Optic S/PDIF output(Common)
1 Stereo audio input for PC(Common)
1 Subwoofer output(Common)
1 Headphone(Common)
1x USB3.0 and 2xUSB2.0(Common)
1 Ethernet-RJ45 (Common)
1 External Touchpad(Common)
2
2. TUNER
A. SI2151 TERRESTRAL AND CABLE TV TUNER:
Description:
The Si2151 is Silicon Labs' sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable
TV standards. Requiring no external balun, SAW filters, wirewound inductors or LNAs, the Si2151 offers the
lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option
for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very
high linearity and low noise to deliver superior picture quality and a higher number of received stations when
compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interference,
eliminating the need for external filtering. For the best performance with next-generation digital TV standards,
such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.
Features:
Worldwide hybrid TV tuner
o Analog TV: NTSC, PAL/SECAM
o Digital TV: ATSC/QAM, DVBT2/T/C2/C, ISDB-T/C, DTMB
1.7 MHz, 6 MHz, 7 MHz, 8 MHz, and 10 MHz channel bandwidths
42-1002 MHz frequency range
Industry-leading margin to A/74, NorDig, DTG, ARIB, EN55020, OpenCableTM,DTMB
Lowest BOM for a hybrid TV tuner
o No balun, SAW filters, or external inductors required
o Increased ESD protection on 4pins
Best-in-class real-world reception
o Lowest phase noise
o High Wi-Fi and LTE immunity
Low power consumption
o 3.3 V and 1.8 V power supplies
o Integrated 1.8 V LDO for 3.3 V singlesupply operation
Integrated power-on reset circuit
Standard CMOS process
3x3 mm, 24-pin QFN package
RoHS compliant
Figure 1.1 Si2151 Pin description
3
Table 1.1 Pin Functions
4
B. M88TS2022 SATELLTE TUNER
Features and General Description
Pin Assigment
5
Absolute Maximum Ratings and Recommended Operating Conditions
3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (U8) (10W/12W OPTONS)
Description
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4 ohm, 40W
speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D's input format selection, DRC (dynamic
range control), mute and volume control functions. AD82587D has many built-in protection circuits to
safeguard AD82587D from connection errors.
Features
16/18/20/24-bit input with I2S, Left-alignment and Right-alignment data format
PSNR & DR(A-weighting) Loudspeaker: 97dB (PSNR), 105dB (DR) @ 24V
Multiple sampling frequencies (Fs)
32kHz / 44.1kHz / 48kHz and
64kHz / 88.2kHz / 96kHz and
128kHz/176.4kHz/192kHz
System clock = 64x, 128x, 256x, 384x, 512x, 768x,1024x Fs
256x~1024x Fs for 32kHz / 44.1kHz / 48kHz
128x~512x Fs for 64kHz / 88.2kHz / 96kHz
64x~256x Fs for 128kHz /176.4kHz/192kHz
Supply voltage
3.3V for digital circuit
10V~26V for loudspeaker driver
6
Loudspeaker output power for Stereo@ 24V
10W x 2ch into 8_ @ 0.16% THD+N
15W x 2ch into 8_ @ 0.18% THD+N
20W x 2ch into 8_ @ 0.24% THD+N
Loudspeaker output power for Mono@ 24V
20W x 1ch into 4_ @ 0.17% THD+N
30W x 1ch into 4_ @ 0.2% THD+N
40W x 1ch into 4_ @ 0.24% THD+N
Sounds processing including:
Volume control (+24dB~-103dB, 0.125dB/step)
Dynamic range control
Power clipping
Channel mixing
User programmed noise gate with hysteresis window
DC-blocking high-pass filter
Anti-pop design
Short circuit and over-temperature protection
I2C control interface with selectable device address
Internal PLL
LV Under-voltage shutdown and HV Under-voltage
detection
Power saving mode
Dynamic temperature control
Figure 3.2: Pin description
7
Figure 3.3: Functional Block Diagram
Table3.1: Absolute Maximum Ratings
Table3.2: Recommended Operating Conditions
B. SUBWOOFER AMPLIFIER (U9) (12 W)
Description
AD82586C is a digital audio amplifier capable of driving a pair of 8 ohm, 20W operating at 24V supply
without external heat-sink or fan requirement with play music.
AD82586C has 20 bands EQ function and can operate 20W stereo or 40W mono optionally.
AD82586C can provide advanced audio processing capabilities, such as volume control, 20 bands speaker
EQ, audio mixing, 3D surround and DRC (dynamic range control). These functions are fully programmable via
a simple I2C control interface.
Robust protection circuits are provided to protect AD82586C from damage due to accidental erroneous
operating condition. AD82586C is more tolerant to noise and PVT (Process, Voltage, and Temperature)
variation than the analog Class-AB or Class-D audio amplifier counterpart implemented by analog circuit
design. AD82586C is pop free during instantaneous power switch because of its built-in, robust anti-pop circuit.
8
Features
16/18/20/24-bits input with I2S, Left-alingment and Right-alingment data format
PSNR & DR (A-weighting) Loudspeaker: 99dB (PSNR), 104dB (DR) @24V
Multiple sampling frequencies (Fs)
32kHz / 44.1kHz / 48kHz and
64kHz / 88.2kHz / 96kHz and
128kHz / 176.4kHz / 192kHz
System clock = 64x, 128x, 192x, 256x, 384x, 512x, 576x, 768x, 1024x Fs
64x~1024x Fs for 32kHz / 44.1kHz / 48kHz
64x~512x Fs for 64kHz / 88.2kHz / 96kHz
64x~256x Fs for 128kHz / 176.4kHz / 192kHz
Supply voltage
3.3V for digital circuit
10V~26V for loudspeaker driver
Loudspeaker output power at 24V
10W x 2CH into 8 ohm @0.17% THD+N for stereo
20W x 2CH into 8 ohm @0.26% THD+N for stereo
Sound processing including:
20 bands parametric speaker EQ
Volume control (+24dB~-103dB, 0.125dB/step)
Dynamic Range Control (DRC)
Dual band DRC
Power clipping
3D surround sound
Channel mixing
Noise gate with hysteresis window
Bass/Treble tone control
DC-blocking high-pass filter
Anti-pop design
Short circuit and over-temperature protection
I2C control interface with selectable device address
Support hardware and software reset
Internal PLL
LV Under-Voltage shutdown and HV Under-Voltage detection
Power saving mode
Figure 3.4: Pin description
9
Figure 3.5: Functional Block Diagram
Table 3.3: Absolute Maximum Ratings
Table 3.4: Recommended Operating Conditions
C. HEADPHONE AMPLIFIER (U59)
Description
The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain
settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to
prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop-
less device.
The AD22657B is available in a 10-pin MSOP package.
Features
Operation Voltage: 3V to 3.6V
Cap-less Output
Eliminates Output Capacitors
Improves Low Frequency Response
Reduces POP/Clicks
Low Noise and THD
10
Typical SNR 107dB
Typical Vn 7uVrms
Typical THD+N < 0.02%
Maximum Output Voltage Swing into 2.5k Load
2Vrms at 3.3V Supply Voltage
Single-ended Input
External Gain Setting from 1V/V to 10V/V
Fast Start-up Time: 0.5ms
Integrated De-Pop Control
External Under Voltage Protection
Thermal Protection
Less External Components Required
+/-8kV IEC ESD Protection at line outputs
Figure 3.6: Pin description
Table 3.5: Pin functions
Table3.6: Recommended operating conditions
11
D. SUBWOOFER PREAMPLIFIER (U30)
AD22657B is used for subwoofer out, as well.
E. SCART AUDIO AMPLIFIER (U31)
AD22657B is used for scart audio amplifier, as well.
4. POWER STAGE
Figure 4.1: Power socket and options.
Power socket is used for taking voltages which are 12V, 5V and VDD_Audio. These voltages are produced
in power board. Also socket is used for giving dimming, backlight and standby signals with power board. It is
shown at figure 4.1.
12
Figure 4.2: General illustration of voltage stages on main board.
VDD_Audio goes directly to the audio side, through power socket other incoming voltages from power card
are converted several voltages, shown in figure 8.
List of the components are:
TPS54528
TPS54628
TPS54821
FDS4685
NTGS3446
APL5910
LM1117
A. TPS54528
General Description
The TPS54528 is an adaptive on-time D-CAP2 mode synchronous buck converter.The TPS54528 enables
system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low
component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2
mode control that provides a fast transient response with no external compensation components. The adaptive
on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode
operation at light loads. Eco-mode allows the TSP54528 to maintain high efficiency during lighter load
conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent
series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 6 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA
package, and designed to operate from -40 C to 85 C.
13
Features
D-CAP2 Mode Enables Fast Transient Response
Low Output ripple and Allows Ceramic Output Capacitor
Wide VIN Input Voltage Range: 4.5 V to 18 V
Output Voltage Range: 0.76 V to 6 V
Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications- 65 mOhm (High Side)
and 36 mOhm (Low Side)
High Efficiency, less than 10 mikroAmper at shutdown
High Initial Bandgap Reference Accuracy
Adjustable Soft Start
Pre-Biased Soft Start
650-kHz Switching Frequency (fSW)
Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode for High Efficiency at Light Load
Applications
Wide Range of Applications for Low Voltage System
Digital TV Power Supply
High Definition Blu-ray Disc Players
Networking Home Terminal
Digital Set Top Box(STB)
Table 4.1: Recommended operating conditions
Figure 4.3: Pin Description
14
Table 4.2: Pin functions.
B. TPS54628
General Description
The TPS54628 is an adaptive on-time D-CAP2 mode synchronous buck converter.The TPS54628 enables
system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low
component count, low standby current solution. The main control loop for the TPS54628 uses the D-CAP2
mode control that provides a fast transient response with no external compensation components. The adaptive
on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode
operation at light loads. Eco-mode allows the TSP54628 to maintain high efficiency during lighter load
conditions. The TPS54628 also has a proprietary circuit that enables the device to adopt to both low equivalent
series resistance (ESR)output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 7 V. The device also features an adjustable soft start time. The TPS54628 is available in the 8-pin DDA and
10-pin DRC packages, and is designed to operate over the ambient temperature range of -40C to 85C.
Features
D-CAP2 Mode Enables Fast Transient Response
Low Output ripple and Allows Ceramic Output Capacitor
Wide VIN Input Voltage Range: 4.5 V to 18 V
Output Voltage Range: 0.76 V to 7 V
Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications- 36 mOhm (High Side)
and 28 mOhm (Low Side)
High Efficiency, less than 10 µA at shutdown
High Initial Bandgap Reference Accuracy
Adjustable Soft Start
Pre-Biased Soft Start
650-kHz Switching Frequency (fSW)
Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode for High Efficiency at Light Load
Applications
Wide Range of Applications for Low Voltage System
Digital TV Power Supply
High Definition Blu-ray Disc Players
Networking Home Terminal
Digital Set Top Box(STB)
15
Table 4.3: Recommended operating conditions
Figure 4.4: Pin Description
Table 4.4: Pin functions.
16
C. TPS54821
General Description
The TPS54821 in thermally enhanced 3.5 mm x 3.5 mm QFN package is a full featured 17 V, 8 A
synchronous step down converter which is optimized for small designs through high efficiency and integrating
the high-side and low-side MOSFETs. Further space savings are achieved through current mode control, which
reduces component count, and by selecting a high switching frequency, reducing the inductor's footprint. The
output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand alone power
supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and the
open drain power good pins. Cycle by cycle current limiting on the high-side FET protects the device in
overload situations and is enhanced by a low-side sourcing current limit which prevents current runaway. There
is also a low-side sinking current limit which turns off the low-side MOSFET to prevent excessive reverse
current. Hiccup protection will be triggered if the overcurrent condition has persisted for longer than the preset
time. Thermal hiccup protection disables the device when the die temperature exceeds the thermal shutdown
temperature and enables the part again after the built-in thermal shutdown hiccup time.
Features
Integrated 26 m / 19 m MOSFETs
Split Power Rail: 1.6 V to 17 V on PVIN
200 kHz to 1.6 MHz Switching Frequency
Synchronizes to External Clock
0.6V ±1% Voltage Reference Over Temperature
Low 2 A Shutdown Quiescent Current
Monotonic Start-Up into Pre-biased Outputs
40°C to 125°C Operating Junction Temperature Range
Adjustable Input Undervoltage Lockout
Adjustable Slow Start/Power Sequencing
Power Good Output Monitor for Undervoltage and Overvoltage
Adjustable Input Undervoltage Lockout
Applications
Digital TV Power Supplies
Set Top Boxes
Blu-ray DVDs
Home Terminals
17
Table 4.5: Recommended operating conditions
Figure 4.5: Pin Description
18
Table 4.6: Pin functions.
D. FDS4685
General Description
This P-Channel MOSFET is a rugged gate version of Fairchild Semiconductor's advanced PowerTrench
process. It has been optimized for power management applications requiring a wide range of gate drive voltage
ratings (4.5V 20V).
Features
8.2 A, 40 V RDS(ON) = 0.027 @ VGS = 10 V
RDS(ON) = 0.035 @ VGS = 4.5 V
Fast switching speed
High performance trench technology for extremely lowRDS(ON)
High power and current handling capability
Figure 4.6: Pins
19
Table 4.7: Absolute maximum ratings
E. NTGS3446
Features
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
IDSS Specified at Elevated Temperature
Pb-Free Package is Available
Applications
Power Management in portable and battery-powered products, i.e. computers, printers, PCMCIA cards,
cellular and cordless
Lithium Ion Battery Applications
Notebook PC
Figure 4.7: Pin description
20
Table 4.8: Maximum ratings
F. APL5910
General Description
The APL5910 is a 1A ultra low dropout linear regulator. The IC needs two supply voltages, one is a control
voltage (VCNTL) for the control circuitry, the other is a main supply voltage (VIN) for power conversion, to
reduce power dissipation and provide extremely low dropout voltage. The APL5910 integrates many functions.
A Power-On- Reset (POR) circuit monitors both supply voltages on VCNTL and VIN pins to prevent erroneous
operations. The functions of thermal shutdown and current-limit protect the device against thermal and current
over-loads. A POK indicates that the output voltage status with a delay time set internally. It can control other
converter for power sequence. The APL5910 can be enabled by other power systems. Pulling and holding the
EN voltage below 0.4V shuts off the output.
The APL5910 is available in a SOP-8P package which features small size as SOP-8 and an Exposed Pad to
reduce the junction-to-case resistance to extend power range of applications.
Features
Ultra Low Dropout
- 0.12V (Typical) at 1AOutput Current
0.8V Reference Voltage
High Output Accuracy
- ±1.5%over Line, Load, and Temperature Range
Fast Transient Response
Adjustable Output Voltage
Power-On-Reset Monitoring on Both VCNTL and VIN Pins
21
Internal Soft-Start
Current-Limit and ShortCurrent-Limit Protections
Thermal Shutdown with Hysteresis
Open-Drain VOUT Voltage Indicator (POK)
Low Shutdown Quiescent Current (< 30mA )
Shutdown/Enable Control Function
Simple SOP-8P Package with Exposed Pad
Lead Free and Green Devices Available (RoHS Compliant)
Applications
Motherboards, VGA Cards
Notebook PCs
Add-in Cards
Figure: Pin configuration.
Table 4.9: Recommended operating conditions.
22
Table 4.10: Pin description.
G. LM1117
General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current.
It has the same pin-out as National Semiconductor's industry standard LM317.
The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V
with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V,
and 5V.
The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to assure output voltage accuracy to within ±1%.
The LM1117 series is available in LLP, TO-263, SOT-223, TO-220, and TO-252 D-PAK packages. A
minimum of 10µF tantalum capacitor is required at the output to improve the transient response and stability.
Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 and LLP Packages
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range:
- LM1117 0°C to 125°C
- LM1117I -40°C to 125°C
Applications
2.85V Model for SCSI-2 Active Termination
Post Regulator for Switching DC/DC Converter
High Efficiency Linear Regulators
Battery Charger
Battery Powered Instrumentation
23
5. MICROCONTROLLER (MSTAR MSD95M0D)
General Description
24
Features
25
26
27
28
29
Table 5.1: Recommended operating conditions.
Table 5.2: Absolute Maximum Ratings
30
6. VIDEO BACK-END PROCESSOR (MSTAR)
MST7410FE
General Description
Table 6.1: Recommended operating conditions
31
Features
32
Block Diagram
Figure 6.1: Block diagram
33
7. 2GB DDR3 SDRAM
HYNX H5TQ2G63GFR
Description
The H5TQ2G83GFR-xxC, H5TQ2G63GFR-xxC, H5TQ2G83GFR-xxI, H5TQ2G63GFR-xxI,
H5TQ2G83GFRxxL, H5TQ2G63GFR-xxL, H5TQ2G83GFR-xxJ, H5TQ2G63GFR-xxJ are a 2, 147, 483, 648-
bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications
which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully
synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control
inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data
masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit
prefetched to achieve very high bandwidth.
Features
Table 7.1: Recommended operating conditions.
34
8. 4GB DDR3L SDRAM
HYNX H5TQ4G63GFR
Description
The H5TC4G83CFR-xxA(I,L,J),H5TQC4G63CFR-xxA(I,L,J) are a 4Gb low power Double Data Rate III
(DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory
density, high bandwidth and low power operation at 1.35V. SK Hynix DDR3L SDRAM provides backward
compatibility with the 1.5V DDR3 based environment without any changes. SK Hynix 4Gb DDR3L SDRAMs
offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses
and control inputs are latched on the rising edges of the clock (falling edges of the clock), data, data strobes and
write data masks inputs are sampled on both rising and falling edges of it. The datapaths are internally pipelined
and 8-bit prefetched to achieve very high bandwidth.
Features
35
Table 8.1: Absolute Maximum DC Ratings
Table 8.2: Recommended operating conditions.
36
9. 32GBIT (4G X 8 BIT) NAND FLASH MEMORY
MT29F4G08ABAEAWP
Key Features
Description
Micron NAND Flash devices include an asynchronous data interface for high-performance I/O operations.
These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer commands, address, and data. There are five
control signals used to implement the asynchronous data interface: CE#, CLE, ALE, WE#, and RE#. Additional
signals control hardware write protection and monitor device status (R/B#).
This hardware interface creates a low pin-count device with a standard pinout that remains the same from
one density to another, enabling future upgrades to higher densities with no board redesign. A target is the unit
of memory accessed by a chip enable signal.
A target contains one or more NAND Flash die. A NAND Flash die is the minimum unit that can
independently execute commands and report status. A NAND Flash die, in the ONFI specification, is referred
to as a logical unit (LUN). There is at least one NAND Flash die per chip enable signal. For further details, see
Device and Array Organization.
37
Figure 9.1:Functional block diagram
Table 9.1: DC Characteristics and Operating Conditions (3.3V)
38
10. 16M-BIT [16M X 1] CMOS SERIAL FLASH EEPROM
A. MX25L1606E SPI FLASH
Features
General
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
Serial Peripheral Interface compatible -- Mode 0 and Mode 3
8M: 8,388,608 x 1 bit structure or 4,194,304 x 2 bits (Dual Output mode) structure
16M: 16,777,216 x 1 bit structure or 8,388,608 x 2 bits (Dual Output mode) structure
256 Equal Sectors with 4K byte each (8Mb)
512 Equal Sectors with 4K byte each (16Mb)
Any Sector can be erased individually
16 Equal Blocks with 64K byte each (8Mb)
32 Equal Blocks with 64K byte each (16Mb)
Any Block can be erased individually
Program Capability
Byte base
Page base (256 bytes)
Latch-up protected to 100mA from -1V to Vcc +1V
Performance
High Performance
Fast access time: 86MHz serial clock
Serial clock of Dual Output mode : 80MHz
Fast program time: 1.4ms(typ.) and 5ms(max.)/page
Byte program time: 9us (typical)
Fast erase time: 60ms(typ.) /sector ; 0.7s(typ.) /block
Low Power Consumption
Low active read current: 16Mb: 25mA(max.) at 86MHz; 8Mb: 12mA(max.) at 86MHz
Low active programming current: 20mA (max.)
Low active erase current: 20mA (max.)
Low standby current: 25uA (max.)
Deep power-down mode 5uA (typical)
Typical 100,000 erase/program cycles
20 years of data retention
Software Features
Input Data Format
1-byte Command code
Advanced Security Features
Block lock protection
The BP3-BP0(16Mb) ; BP2-BP0(8Mb) status bit defines the size of the area to be software protection
against program and erase instructions
Additional 512 bit secured OTP for unique identifier
Auto Erase and Auto Program Algorithm
Automatically erases and verifies data at selected sector
Automatically programs and verifies data at selected page by an internal algorithm that automatically
times the program pulse widths (Any page to be programed should have page in the erased state first)6
P/N: PM1548 REV. 1.2, JUL. 02, 2010 MX25L8006E MX25L1606E
39
Status Register Feature
Electronic Identification
JEDEC 1-byte manufacturer ID and 2-byte device ID
RES command for 1-byte Device ID
REMS commands for 1-byte manufacturer ID and 1-byte device ID
Hardware Features
PACKAGE
16-pin SOP (300mil), MX25L1606E only
8-pin SOP (150mil)
8-pin SOP (200mil)
8-pin PDIP (300mil)
8-land WSON (6x5mm)
8-land USON (4x4mm)
All Pb-free devices are RoHS Compliant
General Description
The device feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire
bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO).
Serial access to the device is enabled by CS# input.
When it is in Dual Output read mode, the SI and SO pins become SIO0 and SIO1 pins for data output.
The device provides sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page
basis, or word basis for erase command is executes on sector, or block, or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase operation via WIP bit.
Advanced security features enhance the protection and security functions, please see security features
section for more details.
When the device is not in operation and CS# is high, it is put in standby mode.
The device utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after
typical 100,000 program and erase cycles.
Figure 10.1: Pin configuration.
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Table 10.1: Pin description.
B. M25Q32FV SPI FLASH
Key Features
New Family of SpiFlash Memories
- W25Q32FV: 32M-bit/ 4M-byte
- Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
- Dual SPI:CLK, /CS, IO0, IO1, /WP, /Hold
- Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
- QPI: CLK, /CS, IO0, IO1, IO2, IO3
- Software & Hardware Reset
Highest Performance Serial Flash
- 104MHz Single, Dual/Quad SPI clocks
- 208/416Mhz equivalent Dual/Quad SPI
- 50 MB/S continuous data transfer rate
- More than 100,000 erase/program cycles
- More than 20-year retention
Efficient "Continuous Read" and QPI Mode
- Continuous Read with 8/16/32/64-Byte Wrap
- As few as 8 clocks to address memory
- Quad Peripheral Interface (QPI) reduces instruction overhead
- Allows true XIP (execute in place) operation
- Outperforms X16 Parallel Flash
Low Power, Wide Temperature Range
- Single 2.7 to 3.6V supply
- 4mA active current, <1uA Power-down(typ.)
- -40C to +85C operating range
Flexible Architecture with 4KB sectors
- Uniform Sector/Block Erase (4K/32K/64K-Byte)
- Program 1 to 256 byte per programmable page
- Erase/Program Suspend&Resume
Advanced Security Features
- Software and Hardware Write-Protect
- Power Supply Lock-Down and OTP protection
- Top/Bottom, Complement array protection
- Individual Block/Sector array protection
- 64-Bit Unique ID for each device
- Discoverable Parameters (SFDP) Register
41
- 3x256-Bytes Security Registers with OTP locks
- Volatile & Non-volatile Status Register Bits
Space Efficient Packaging
- 8-pin SOIC 208-mil / VSOP 208-mil
- 8-pad WSON 6x5-mm / 8x6-mm
- 16-pin SOIC 300-mil (additional / RESET pin)
- 8-pin PDIP 300-mil
- 24-ball TFBGA 8x6-mm (6x4/5x5 ball array)
- Contact Winbond for KGB and other options
General Description
This W25Q32FV (32M-bit) Serial Flash memory provides a storage solution for systems with limited space,
pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices.
They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing
voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as
low as 4mA active and 1uA for power-down. All devices are offered in space-saving packages.
The W25Q32FV array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes can
be programmed at a time.Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block
erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32FV has 1,024 erasable
sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications
that require data and parameter storage.
The W25Q32FV support the standart Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-
clocks instruction cycle Quad Peripharel Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1
(D0), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Duad I/O and 416Mhz (104MHz x 4) for Quad I/O when
using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standart
Asynchronous 8 an 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory
Access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP(execute in
place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide
further control flexibility. Additionally, the device supports JEDEC standart manufacturer and device ID and
SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers.
Figure 10.2: Pin configuration.
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Table 10.2: Pin description.
11. DEMODULATOR STAGE
A. MSB1246 DVB-T2
Features
43
General Description
The MSB1246 is a single chip demodulator supporting DVB-T2, DVB-T, DVB-C, DVB-S2 and DVB-S
standards. The device integrates a house keeping microcontroller that takes care of all real time and algorithmic
tasks simplifying the host control interface.
For DVB-T2/T/C, the MSB1246 front end can accept tuners that provide IF or low IF output. For DVB-
S2/S, the MSB1246 front end can accept tuners that provide zero-IF output. A high rejection channel filter has
been included easing the channel filtering requirement of the tuner whilst still meeting the stringent
requirements for adjacent channel interference. The MSB1246 may be clocked directly using a crystal, typically
24MHz.
The MSB1246 is capable of blind acquisition of DVB-T/T2, DVB-C and DVB-S2/S signals. All parameters
may be detected in this mode enabling fast and accurate auto scanning. Its frequency recovery circuit is able to
compensate for all typical tuner and broadcast frequency errors.
44
Block Diagram
Pinning
45
Absolute Maximum Ratings and Recommended Operating Conditions
12. LNB SUPPLY AND CONTROL IC
TPS65233
General Description
Designed for analog and digital satellite receivers, the TPS65233 is a monolithic voltage regulator with I2C
interface, specifically to provide the 13-V/18-V power supply and the 22-kHz tone signaling to the LNB
downconverter in the antenna dish or to the multi-switch box. It offers a complete solution with very low
component count, low power dissipation together with simple design and I2C standard interfacing. TPS65233
features high power efficiency. The boost converter integrates a 120-m power MOSFET running at 500-kHz
switching frequency. Drop out voltage at the linear regulator is 0.8 V to minimize power loss. TPS65233
provides multiple ways to generate the 22-kHz signal. Integrated linear regulator with push-pull output stage
generates clean 22-kHz tone signal superimposed at the output even at zero loading. Current limit of linear
regulator can be programmed by external resistor with ±10% accuracy. Full range of diagnostic read by I2C is
available for system monitoring.
46
Features
Pinouts
13. SOFTWARE UPDATE
MAIN SW UPDATE
In MB120 project, please follow software update procedure:
1. mb120_en.bin, RomBoot.bin, PM51.bin and usb_auto_update_G6F.txt documents should be copied directly
inside of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button in remote control, power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.
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14. TROUBLESHOOTING
A. NO BACKLGHT PROBLEM
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R89 must be low when the backlight
is OFF. If it is a problem, please check Q10 and the panel cables. Also it can be tested in TP137 on main board
Dimming pin should be high or square wave in open position. If it is low, please check S97 for Mstar side
and panel or power cables, connectors.
48
Backlight power supply should be in panel specs. Please check Q44, shown below; also it can be checked
TP175.
STBY_ON/OFF_NOT should be low for tv on condition, please check Q23's collector.
49
B. CI MODULE PROBLEM
Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module pins.
50
51
C. STAYNG N STAND-BY MODE
Problem: Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation.
When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV
set and control voltage points with a multimeter to find the shorted voltage to ground.
52
53
D. IR PROBLEM
Problem: LED or IR not working
Check LED card supply on MB120 chasis.
54
E. KEYPAD TOUCHPAD PROBLEMS
Problem: Keypad or Touchpad is not working
Check keypad supply on MB120.
55
F. USB PROBLEMS
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
For USB 3.0 ports:
For Side USB 2.0 port:
56
For Back USB 2.0 port:
G. NO SOUND PROBLEM
Problem: No audio at main TV speaker outputs.
Check supply voltages of 24V_VCC, VDD_AUDIO_MAIN and 3.3V_AMP with a voltage-meter. There
may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers
are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
57
H. STANDBY ON/OFF PROBLEM
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be
a problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm. These printouts may give a clue about the problem. You can use mini scart for terraterm connection.
. NO SGNAL PROBLEM
Problem: No signal in TV mode.
Check tuner supply voltage 3V3_TUNER and. Check tuner options are correctly set in Service menu. Check
voltage at TUNER_SCL and TUNER_SDA pin of tuner.
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14. GENERAL BLOCK DIAGRAM
2x20W
5V_VCC 5V_VCC 5V_VCC
Small SubW Out
TPS2553 TPS2553 TPS2553
(256Mx16bit) Bathroom
Subwoofer USB Power USB Power USB Power
3840x2160
1920x1080
(1866 MT/s)
@120Hz
@120Hz
ESMT Amp. Supply Switch Supply Switch Supply Switch
(USB1) (USB2) (USB3)
AD82586C
1V5_VCC 1V5_VCC 1V5_VCC 1V5_VCC SC AUDIO_OUT
Audio Amp
ESMT AD82587D
Audio Amp AZ099-4S AZ099-4S AZ099-4S
12V_VCC or ESD ESD ESD
DDR3 DDR3 SUBW.
HP / LINEOUT
DDR3 DDR3 24V_VCC Protection Protection Protection
Pre Amp.
RAM RAM RAM RAM
16 Lane VbyONE Out DAC
I2S AUD_OUT
DSP_SUB_OUT
3V3_W_WOWL
SC_L/R_OUT
3V3_STBY
1V8_EMMC
SPDIF OUT
SPI
3D_SYNC_O
3V3_VCC
1V5_VCC RJ12 (16Mbit)
3V3_STBY 1V_G6F_CPU
.
1V_G6F_CORE
1920x1080@60Hz
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 INTERNAL