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5 4 3 2 1
CPU
DOTHAN
D 533MHZ D
PAGE 3,4
FSB
533MHz
LVDS
PAGE 25
Nvidia PCI-E MCH-M DDR2 DDR2
CRT NV44M-V Alviso SO-DIMM
PAGE 26
/ NV43M PAGE 22,23,24
TV OUT PAGE 6,7,8,9,10
PAGE 12,13,14,15,16
PAGE 26
,55,56,57,58
DMI interface PCMCIA
PAGE 36
C C
PCI R5C841 1394
33MHz PAGE 37
PAGE 35,36,37
LPC
FWH
PAGE 17
33MHz ICH6-M CARD READER
PAGE 28 PAGE 35
PRINTER PORT Azalia MINI-PCI 1
SUPER I/O WIRE LESS
SIR PAGE 32
LPC47N217 PAGE 18,19,20
PAGE 17
PAGE 17
IDE Giga LAN
88E8001 CLOCK
AUDIO DJ KEY GENERATOR
PAGE 33
PAGE 40 PAGE 21
KBC 38857 HDD
INSTANT KEY PAGE 38 FAN + SENSOR
PAGE 27
B PAGE 40 PAGE 5 B
Power On Sequence
CD ROM
AZALIA CODEC PAGE 42,43
PAGE 38
PAGE 29,30,31
MDC Header USB 2.0 USB
X4 USB CCD
PAGE 34
PAGE 39 PAGE 25
BLUE TOOTH
Module
PAGE 39
A A
Title : BLOCK DIAGRAM
Engineer: Mark Lin
Size Project Name Rev
Custom A6VC 2.0
Date: Tuesday, May 17, 2005 Sheet 1 of 58
5 4 3 2 1
5 4 3 2 1
P.51
P.51
A/D_DOCK_IN
L78L05 +5VCHG (20mA) +5VLCM
SWITCH
(Regulator)
+5VO (F02JK2E) LM4040BIM
+2.5VREF
(Regulator)
P.51
D D
P.45
+3VA +3VALWAYS +3VSUS
MIC5233BM5
AC_BAT_SYS
+5VA +5VALWAYS +5VSUS
TPS51020
P.52 +12V
SUSC#_PWR
(UMC4N)
+5V
P.45
+3V
SUSC#_PWR TPS51020
P.46
+1.8V
C
SUSC#_PWR MAX8743EEI C
P.52 +12VS
UMC4N
+5VS
+3VS
SI4800DY +1.8VS
SUSB#_PWR
+5VO P.47 +1.5VS
SUSB#_PWR MAX8578EUB
+3VS P.48 +1.8VS_PROC
B
SI9183DT B
CPU_F_SEL
P.46 +VCCP
+1.05VO P.48 +0.9VS
MAX8743EEI CM8562
CPU_VRON SUSB#_PWR
P.47 +ATI_VCORE +2.5VS
SUSC#_PWR P.53
MAX1844EEP +2.5VO
SUSB#_PWR LM358ADR &
SUSB#_PWR SI4800BDY
P.53
+1.2VSP
CPU_VRON SUSB#_PWR MIC49150BMM
+5MCH_OK
MAX1987 P.44 +VCORE
(27A)
(Controllor)
DELAY_VR_PWRGD,
CLK_PWR_GD#
A A
VR_VID0 - VR_VID5, STP_CPU#, PM_DPRSLPVR, PM_PSI#
Title : Power Block Diagram
Engineer: Mark Lin
Size Project Name Rev
Custom A6VC 2.0
Date: Tuesday, May 17, 2005 Sheet 2 of 58
5 4 3 2 1
5 4 3 2 1
H_D#[0..63] 6
U48B
6 H_A#[16..3]
H_A#16 AA2 N2 U48A
A[16]# ADS# H_ADS# 6
H_A#15 Y3 A10 TPC28t 1 T222 H_D#15 C25 Y25 H_D#47
H_A#14 A[15]# PRDY# R19 r0402 56Ohm H_D#14 D[15]# D[47]# H_D#46
D AA3 A[14]# PREQ# B10 +VCCP E23 D[14]# D[46]# AA26 D
H_A#13 U1 / H_D#13 B23 Y23 H_D#45
H_A#12 A[13]# H_D#12 D[13]# D[45]# H_D#44
Y1 A[12]# BNR# L1 H_BNR# 6 C26 D[12]# D[44]# V26
H_A#11 Y4 J3 H_D#11 E24 U25 H_D#43
H_BPRI# 6
ADDRESS GROUP 0
H_A#10 A[11]# BPRI# H_D#10 D[11]# D[43]# H_D#42
W2 A[10]# D24 D[10]# D[42]# V24
DATA GROUP 0
H_A#9 H_D#9 H_D#41
2
T4 A[9]# B24 D[9]# D[41]# U26
H_A#8 W1 A7 TPC28t 1 T214 H_D#8 C20 AA23 H_D#40
DATA GROUP
H_A#7 A[8]# DBR# H_D#7 D[8]# D[40]# H_D#39
V2 A[7]# B20 D[7]# D[39]# R23
H_A#6 R3 H_D#6 A21 R26 H_D#38
H_A#5 A[6]# H_D#5 D[6]# D[38]# H_D#37
V3 A[5]# B26 D[5]# D[37]# R24
H_A#4 U4 L4 H_D#4 A24 V23 H_D#36
A[4]# DEFER# H_DEFER# 6 D[4]# D[36]#
H_A#3 P4 H2 H_D#3 B21 U23 H_D#35
A[3]# DRDY# H_DRDY# 6 D[3]# D[35]#
U3 M2 H_D#2 A22 T25 H_D#34
6 H_ADSTB#0 ADSTB[0]# DBSY# H_DBSY# 6 D[2]# D[34]#
H_REQ#4 T1 H_D#1 A25 AA24 H_D#33
H_REQ#3 REQ[4]# H_D#0 D[1]# D[33]# H_D#32
P1 REQ[3]# A19 D[0]# D[32]# Y26
H_REQ#2 T2 D25 T24
REQ[2]# 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_REQ#1 P3 C23 W25
REQ[1]# 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#0 R2 C22 W24
REQ[0]# 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
N4 H_BR0# 6
CONTROL
BR0# H_D#31 H_D#63
6 H_REQ#[4..0] K25 D[31]# D[63]# AF26
H_D#30 N25 AF22 H_D#62
H_IERR# R44 r0402 56Ohm H_D#29 D[30]# D[62]# H_D#61
IERR# A4 +VCCP H26 D[29]# D[61]# AF25
H_D#28 M25 AD21 H_D#60
6 H_A#[31..17] D[28]# D[60]#
H_A#31 AF1 H_D#27 N24 AE21 H_D#59
H_A#30 A[31]# H_D#26 D[27]# D[59]# H_D#58
AE1 B5 H_INIT# 18 L26 AF20
3
A[30]# INIT# D[26]# D[58]#
DATA GROUP 1
H_A#29 AF3 H_D#25 J25 AD24 H_D#57
H_A#28 A[29]# H_D#24 D[25]# D[57]# H_D#56
DATA GROUP
AD6 M23 AF23
ADDRESS GROUP 1
H_A#27 A[28]# H_D#23 D[24]# D[56]# H_D#55
AE2 A[27]# LOCK# J2 H_LOCK# 6 J23 D[23]# D[55]# AE22
H_A#26 AD5 H_D#22 G24 AD23 H_D#54
H_A#25 A[26]# TPC28t T38 H_D#21 D[22]# D[54]# H_D#53
AC6 A[25]# 1 F25 D[21]# D[53]# AC25
H_A#24 AB4 H_D#20 H24 AC22 H_D#52
C
H_A#23 A[24]# R25 2 / 1 54.9Ohm 1% H_D#19 D[20]# D[52]# H_D#51 C
AD2 A[23]# +VCCP M26 D[19]# D[51]# AC20
H_A#22 AE4 H_D#18 L23 AB24 H_D#50
H_A#21 A[22]# H_D#17 D[18]# D[50]# H_D#49
AD3 A[21]# RESET# B11 H_CPURST# 6 G25 D[17]# D[49]# AC23
H_A#20 AC3 L2 H_RS#2 H_D#16 H23 AB25 H_D#48
H_A#19 A[20]# RS[2]# H_RS#1 D[16]# D[48]#
AC7 A[19]# RS[1]# K1 6 H_DINV#1 J26 DINV[1]# DINV[3]# AD20 H_DINV#3 6
H_A#18 AC4 H1 H_RS#0 K24 AE24
A[18]# RS[0]# 6 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 6
H_A#17 AF4 L24 AE25
A[17]# H_RS#[0..2] 6 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
6 H_ADSTB#1 AE5 ADSTB[1]# TRDY# M3 H_TRDY# 6
SOCKET479P
HIT# K3 H_HIT# 6
6 H_DPWR# C19 DPWR# HITM# K4 H_HITM# 6
SOCKET479P
Layout note:
U48C
COMP0 and COMP2 need to be Zo=27.4ohm traces.
21 CLK_CPU_BCLK B15 BCLK[0]
B14 Best estimate is 18mil wide trace for outer layers and
HOSTCLK
21 CLK_CPU_BCLK# BCLK[1]
R20 2 r0402 1 49.9Ohm 1% A16 AB1 H_COMP3 R39 2 1 54.9Ohm 1% 14mil if on internal layer. See RDDP of Banias.
R21 2 r0402 1 49.9Ohm 1% ITP_CLK[0] COMP[3] H_COMP2 R40 1 27.4Ohm
A15 AB2 2
ITP_CLK[1] COMP[2]
P26 H_COMP1 R5232 1 54.9Ohm 1% Traces should be shorter than 0.5". Refer to latest CS layout
COMP[1] H_COMP0 R524 27.4Ohm
18 H_A20M# C2 A20M# COMP[0] P25 1 2
GND D3 COMP1, COMP3 should be routed as Zo=55ohm
18 H_FERR# FERR#
LEGACY CPU
A3 GND
18 H_IGNNE# IGNNE# traces shorter than 0.5"
18 H_DPSLP# B7 DPSLP# BPM[3]# C9
6,18 H_CPUSLP# A6 SLP# BPM[2]# A9
D1 B8 +VCCP
18 H_INTR LINT0 BPM[1]#
18 H_NMI D4 LINT1 BPM[0]# C8
18 H_SMI# B4 SMI#
2
T28 1 TPC28t C6
18 H_STPCLK# STPCLK#
B R522 120mA / 20mil B
E4 AC1 1KOhm FSB 400MHz -> 1.8V
18 H_PWRGD PWRGOOD GTLREF[3] 1% +1.8VS_VCCA
GTLREF[2] G1 H_DPRSTP# 18 FSB 533MHz -> 1.5V
H_VID5 H4 E26 r0402
H_VID4 VID[5] GTLREF[1] GTL_REF0
1
G4 VID[4] GTLREF[0] AD26
H_VID3 G3 +1.8VS_VCCA
VID[3]
2
H_VID2 F3
H_VID1 VID[2] r0402 R521
F2 VID[1]
H_VID0 E2 C5 R45 1 / 2 1KOhm 2KOhm +1.8VS_PROC
VID[0] TEST1 R108 1 / 1% +1.8VS_PROC
TEST2 F23 2 1KOhm
+VCCP
MISC
r0402 r0402
1
1
1
1
1
1
1
1
+1.8VS_VCCA + + + +
1
AC26 VCCA[3]
N1 GND C656 C61 C662 C56
VCCA[2] R32 27.4Ohm 10uF/10V C652 10uF/10V C653 10uF/10V C68 10uF/10V C66
B1 VCCA[1] TCK A13 1 2 GND
+1.8VS_PROC R18 150Ohm c0805 0.01UF c0805 0.01UF c0805 0.01UF c0805 0.01UF
2
2
2
2
F26 VCCA[0] TDI C12 1 2
R24 / 1 54.9Ohm 1% c0402 c0402 c0402 c0402
2
2
2
2