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1 1




Compal Confidential
2 2




KALA0 Schematics Document
Intel Processor with MCP79



3 2008-11-25 3




REV:0.4




4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/14 Deciphered Date 2008/04/04 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4681
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401627
Date: Wednesday, December 10, 2008 Sheet 1 of 47
A B C D E
5 4 3 2 1




Compal confidential Sub-board
Model : KALA0
File Name : LA-4681P
LS-4681P- SW/B
page 29

Mobile Penryn Fan Control
D
Thermal Sensor page 33 LS-4682P-USB/B
D


uFCPGA-478 CPU
ADT7421 page 26
page 4

page 4-6 LS-4683P- FP/B

H_A#(3..35) FSB page 26
HDMI LCD Conn. CRT H_D#(0..63)
800/1066MHz
page 21 page 19 page 20

DDR3 1333Mhz DDR3-SO-DIMM X2
page 17,18
Dual Channel
nVIDIA
USB2.0
MCP79 3.3V 480MHz




C
(MX/MH) page 27

USB
page 26

USB/B
page 26

Mini2
page 26

Finger
page 26

BT
page 19


Camera
page 27

New
page 26


WLAN
C



connx1 connx2 reserve Printer conn Card
USB port 0 USB port 1 USB port 4 USB port 6 USB port 7 USB port 8 USB port 9 USB port 11
PCI-E BUS Gen2 USB port 3
FCBGA 1437
page 24 page 24 page 26 page 27 page 26 Azalia
Card Reader Giga LAN Mini-Card New Card Mini-Card
JMB380 Broadcom5764 WLAN
Reserve page 7-16
SATA2
MDC V1.5
page 30
3GHz
Port 0 Port 1 Port 2 Port 3 PE0
HD Audio Codec Amplifier
ALC888 Audio Jack
5in1 1394 RJ45 HP Amplifier
APA2051 page 32 Line in
page 25
LPC BUS & Int-Mic page 31 MIC
Slot Slot 3.3V 33 MHz
HP/SPDIF
page 23 page 23 page 32
B B

SATA 0
SATA HDD
page 22


RTC BAT.
ENE KB926 page 35


page 28
SATA 2
Power On/Off CKT.
SATA ODD page 30
page 22

DC/DC Interface CKT.
Touch Pad Int.KBD SPI BIOS page 34,35
conn
page 29 page 29 page 29
Charger
Page 38


A Power Circuit DC/DC A

Page 35~44




Security Classification
2007/10/25
Compal Secret Data
2008/10/25 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4681
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401627 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, December 10, 2008 Sheet 2 of 47
5 4 3 2 1
A B C D E



SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S0 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+MCP_CORE Core voltage for MCP79 ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.1Valways 1.1Valways switched power rail ON ON ON
+1.1VS 1.1Valways switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.5V 1.5V switched power rail ON ON OFF Vcc 3.3V +/- 5%
+1.5VS 1.5V power rail for DDR3 ON OFF OFF Ra 100K +/- 5%
+0.75VS 0.75VS switched power rail ON OFF OFF Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
+1.8VS 1.8VS switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+3VALW 3.3V always on power rail ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3V 3.3V power rail for SB ON ON X 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3V_LAN 3.3V power rail for LAN ON ON X 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+3VS 3.3V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5VALW 5V always on power rail ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VS 5V switched power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+VSB VSB always on power rail ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
2 2
+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table BTO Option Table
Board ID PCB Revision Default Item BOM Structure
0 0.1 A01@
1 0.2 , 0.3 mini2@
2 385@
3 V 1394@
4 Amic@
5 V Dmic@
6
7 1.0


EC SM Bus1 address EC SM Bus2 address
3 3
Device Address Device Address
Smart Battery 0001 011X b BMC1402 1001 100X b




MCP79 MCP79
SM Bus 0 address SM Bus 1 address
Device Address Device Address
DDR DIMM0 1010 0000
New card
DDR DIMM1 1010 0010
Lan

Minicard

Minicard



4 4




Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/14 Deciphered Date 2007/12/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A4681
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401627
Date: Wednesday, December 10, 2008 Sheet 3 of 47
A B C D E
5 4 3 2 1

+1.05VS +1.05VS
Place close to CPU within 500mil

H_IERR# R388 2 1 56_0402_5%




1
H_THERMTRIP# R379 2 1 49.9_0402_1% R375




1
@ 330_0402_5%
ITP_PREQ R402 2 1 49.9_0402_1%
R380 @




2 2
ITP_TDI R390 2 1 150_0402_1% 330_0402_5%




B
2
ITP_TDO R392 1 @ 2 51_0402_1%




E
H_THERMTRIP# 3 1 MAINPWON 36,37




C
ITP_TMS R391 2 1 39_0402_1% @ Q39
MMBT3904_SOT23
H_PROCHOT# R386 2 1 68_0402_5%
D D
H_BR0# R383 1 @ 2 62_0402_5%

H_FERR# R377 1 2 62_0402_5%

H_INTR R378 1 @ 2 150_0402_1%

H_NMI R376 1 @ 2 150_0402_1%

H_RESET# R382 1 @ 2 200_0402_1%


H_A#[3..35]
7 H_A#[3..35]
ITP_TCK R398 2 1 27_0402_1%

ITP_TRST# R397 2 1 649_0402_1%


JCPU1A
H_A#3 J4 H1
A[3]# ADS# H_ADS# 7




ADDR GROUP 0
H_A#4 L5 E2
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5
A[5]# BPRI# H_BPRI# 7
H_A#6 K5
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 A[12]#
XDP Connector

CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 7
H_A#15 P1
H_A#16 A[15]# JXDP1
R1 A[16]# LOCK# H4 H_LOCK# 7
7 H_ADSTB#0 M1 ITP_PREQ 1 2 XDP_BPM#4
ADSTB[0]# H_RESET# 1 2 XDP_BPM#3
RESET# C1 H_RESET# 7 3 3 4 4
K3 F3 H_RS#0 7 XDP_BPM#2 5 6
7 H_REQ#0 REQ[0]# RS[0]# 5 6
H2 F4 H_RS#1 7 XDP_BPM#1 7 8 XDP_BPM#0
7 H_REQ#1 REQ[1]# RS[1]# 7 8
C K2 G3 H_RS#2 7 9 10 XDP_BPM2#3 C
7 H_REQ#2 REQ[2]# RS[2]# 9 10
J3 G2 H_TRDY# 7 2 1 XDP_BPM2#2 11 12
7 H_REQ#3 REQ[3]# TRDY# 11 12
L1 C506 0.1U_0402_16V4Z XDP_BPM2#1 13 14 XDP_BPM2#0
7 H_REQ#4 REQ[4]# 13 14
G6 H_HIT# 7 15 16 H_PWRGOOD_R 1 R400 2 H_PWRGOOD 5,7
H_A#17 HIT# 15 16 ITP_TCK 1K_0402_5%
Y2 A[17]# HITM# E4 H_HITM# 7 +1.05VS 17 17 18 18
H_A#18 U5 7 CLK_XDP 19 20 CLK_XDP# 7
H_A#19 A[18]# XDP_BPM#0 19 20 H_RESET#_R 1
R3 A[19]# BPM[0]# AD4 21 21 22 22 2 H_RESET#
ADDR GROUP 1




H_A#20 W6 AD3 XDP_BPM#1 1 ITP_DBRESET# 23 24 ITP_TDO R396 1K_0402_5% 1
H_A#21 A[20]# BPM[1]# XDP_BPM#2 ITP_TRST# 23 24 ITP_TDI
U4 AD1 25 26
XDP/ITP SIGNALS




H_A#22 A[21]# BPM[2]# XDP_BPM#3 @ C540 ITP_TMS 25 26 XDP_PRE# @ C541
Y5 A[22]# BPM[3]# AC4 27 27 28 28
H_A#23 U1 AC2 XDP_BPM#4 29 30 15P_0402_50V8J
H_A#24 A[23]# PRDY# ITP_PREQ 15P_0402_50V8J 2 29 30 2
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 ITP_TCK 31 32
H_A#26 A[25]# TCK ITP_TDI GND GND
T3 A[26]# TDI AA6 33 GND GND 34
H_A#27 W2 AB3 ITP_TDO
H_A#28 A[27]# TDO ITP_TMS @P-TWO_196027-30041
W5 A[28]# TMS AB5
H_A#29 Y4 AB6 ITP_TRST#
H_A#30 U2
A[29]#
A[30]#
TRST#
DBR#