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SHEET
NO.

3 OF 6

MS-XXXX-3458-XX
LET REVISIONS CG MAN CK APP

DATE

VBR
13026

GW 11/01 10772 Delete I2S Circuitry R516-518,R539-541 and Ground Add C550-552 IC501 pins at 27-29 IC001

C022-C026

Connect

IC

GND

pins

23,37,47,49, to IC, ISLAND GND topside. not be

SW_DSP3.3VD

TP559

RDS_DATA/DAVN RDS_CLK

50,52,53,54,55,56,62 PLANE This directly GND under PLANE

ISLAND by

must

broken It is with

any and

signal to is not

traces. connected

LAYOUT: OSCILLATOR COMPONENTS X501,C527,C528 MUST BE KEPT VERY CLOSE TO THE I.C.
If a component on this it to is IC schematic is drawn

TP562

L503 C531 C554 C501 47U

L505
TP558 TP1 TP561

C529 100N

Q501 BCR133 Q504 BCR133

connected via's to IC

bottomside GND

directly Connect GND

topside pins

GENERAL GND. to GENERAL

10,76 and

100N X501 NR110010FA1AAA 11.2896MHZ 30PPM TP564

100N

TP557

PLANE by

on

top

bottom sides,

close to to place

IC, then it close

very important in PWB layout.
TP563 TP556

joined

via's.

R544 C527 C528 18P 18P R546
TP555

220 220 SP_MUTE/DSP_RESET

TP501

AF_SAMP
TP502 TP503

R519 C516 47N 10%
TP512

1K
TP504

AM

Fhp=20Hz

R504 100K AM_L, AM_R: Rin>1Meg Rin>1Meg R514 100K C532 180P OSC_OUT64 OSC_IN63 VSS_OSC62 SEL_FR61 RDS_DATA60 RDS_CLOCK59 SDA58 SCL57 A056 VSSS655 VSSS554 VSSS453 VSSS352 VDDD251 VSSS250 VSSS149 VDDD148

C575 180P

TP554

RDS_PAUSE
TP553

FM_PRESET Q502 BCR133 AF_HOLD TAPE_MUSIC

VSSQ347 VDDQ346

TSCAN45 SHTCB44

TAPE_R
INVERSE GAIN

R548
TARGET=1029/500

10K 1%

TP513

Flp=67kHz Fhp=10Hz

2

TAPE_RET

R549 12.4K 1% R550 12.4K 1%

C541 470P 5% 1

C510 100N 10%
TIE500

TP515

RTCB43 DSP_RESET42 DSP_IO441

TP544

TP543

TAPE_L

R547 10K
TP519

C540 470P 5% C511 100N 10%

R513 100K
TP516 Rin> 1Meg

R536 100K

Flp=14kHz

65VDD_OSC 66AM_R 67AM_L 68TAPE_R

DSP_IO340 DSP_IO239 DSP_IO138 VSSQ237

R521
TP552

1K
TP551

R520 C536 180P

1K
TP599 TP548

1%
TP518

C517 220P

CDDJR+

C507

1U 10%

TP520

R505 12.4K 1%

TP521

INVERSE GAIN TARGET=2.4Vrms/1.0Vrms (differential) Flp TARGET=67kHz Fhp TARGET=10Hz

Rin TARGET=40k diff. TP523

C513 220P 5%
TP568

TP522

CDDJRCDDJL+ C508
TP524

C548 1U 10%

1U 10%
TP525

R506 12.4K 1% R507 12.4K 1%

R531 10K 1% R532 10K 1% R526 10K 1% R525 10K 1% 20%

69TAPE_L 70CD_R
5%

IC501 DESC=SAA7709H P/D_NUM=N7500380FSCCWC PKG_TYPE=N7XXXXXBFXXCWC PV SYMBOL = eldic:i5scc003.1

Rin>1Meg

71CD_GNDR 72CD_L 73CD_GNDL 74VDDAAD 75VDACP 76VDACN 77VREFAD 78AUX_R 4PHONE_GND

VDDQ236 IIS_OUT235 IIS_OUT134 IIS_WS33 IIS_IN232 IIS_IN131 IIS_CLK30 CD_CL29 CD_DATA28 CD_WS27 DSP_IO526 SPDIF125 24SPDIF2 22VDDQ1 23VSSQ1
TP550

CD_SPDIF
TP546

Rin>1Meg

Q503 BCR133

SDA SCL AMP_EN
TP818

LAST_REV=6/19/00

TP526

C537 180P 10%

C514 220P 5%

SAA7709H
18WS_DAC 19DATA_DAC 6NAV_GND 14DSP_IO8 15FLV 16DSP_IO7 17256FS 20CLK_DAC 21DSP_IO6

AMP_MUTE
TP819

C505 10U

C506 100N

CDDJLPHONE+

C549
TP505

1U 10%

TP566

R508 1% 12.4K
TP567 TP507

79AUX_L 80FM_RDS 1FM_MPX 2LEVEL 3PHONE

SW_DSP3.3VD
TP549

L508
TP835

47N

10%

14K

1% R501 5.11K 1% R533

10VSSDA 11VDDDA

C518

TP506

R502

R560 TP539 100 16Hz 48k>Rin>72k C504 100U 10V

12VREFDA 13FRV

C543 100N C526 100N NC

C542 100N

C503 47U
TP836

5NAV

7POM

8RRV

INVERSE GAIN TARGET=4Vrms/0.5Vrms Rin TARGET=40k diff. Fhp=10Hz Flp=14kHz

9RLV

C515 1N
5%

IC800 C512 100P NEAR CONN 1 TAB 2 STBY 5V_SW TDA7562 3 PW_GND 4 OUT29 PW_GND 10 OUT1+ 11 SVR 16 IN3 17 AC_GND 18 OUT3+ 19 PW_GND 24 OUT425 PW_GND 5 CD 6 OUT2+ 7 VCC 8 OUT114 S_GND 15 IN4 20 OUT321 VCC 22 OUT4+ 23 CK 5V_SW 26 DATA 27 TAB

TP508

5.11K 1% C519 47N
TP509

NC Rin>1Meg C574 10N 10%
25kHz

C533 R524 4.7K 180P

R528 68

10%

TP527

14K

1%
TP529

TP510

12 IN1 13 IN2

PHONE-

R503

TMC+

C520 47N

TP528

10%

R538 1% 14K

CLPDET
TP565 TP801 TP802

R838 3.3K R837 3.3K

5.11K 1% R512 R534 5.11K 1%
TP532

Fhp=

Fhp<5Hz 48k>Rin>72k

Rin TARGET=40k diff. INVERSE GAIN TARGET=4Vrms/0.5Vrms Fhp=150Hz Flp=14kHz

C522 1N
5%

A+
Rin> 1Meg

CLPDET
A+ trace_width

R801 1K
=0.5 inch
LOCATE C809 CLOSE TO IC

R800 10K

TMCTP530

C521 47N

R515 1% 14K 10% TP531 SW_DSP3.3VD C545 100N

C523 100N
-

AUDIO
Minimum Each

OUTPUTS:
resistance requires > 210kHz @ 2.5 MHz). = 2k Ohms.

load

channel <

L504

TP533

100kHz

LPF

C809 100N 10% 50V
TP834

C544 100N

TP542

C573 10U
TP545

(>20dB -

attenuation

AMP_GND

trace_width

=0.5

inch

DAC output filters will be included on the Amplifier schematic.

C810 10U 20%

TRACE

WIDTH=

75M

LRLR+

TP833
TRACE WIDTH= 75M

TP803

TP804

AMP_IN_LF+ CD_L
INVERSE GAIN

R557
TARGET=1029/500

10K 1%

TP571

TP574

Flp=67kHz Fhp=10Hz

2

CD_RET

R561 12.4K 1% R562 12.4K 1%

C561 470P 5% 1

C555 100N 10%
TIE501

C509 10U 20%

AMP_IN_LF+

R832 100 C804 10N 10%
TP806

AMP_IN_RF+ AMP_RET_DSP
Run AMP_IN_LF+ to & LR+ INPUTS

C800 470N 20%

TP813 TP832
TRACE WIDTH= 75M

LFLF+

R555 100K
TP573

Parallel

AMP_RET_DSP

R833 10K R830 100 R831 10K C805 10N 10%

TP831
TRACE WIDTH= 75M

TP805

AMP_IN_LR+ R556 100K 10%
TP572

AMP_IN_LR+

CD_R

R558 10K 1%

C562 470P 5% C556 100N

C801 470N 20%

TP814

AMP_IN_RR+
TP540

Pair

right

and

left

channels
TP815 TP816

TP570

C524 100P

TIE800 2 AMP_RET_DSP R835 0 1

TP817

R834 24 C808 470N 20%

TP534

TP830
TRACE WIDTH= 75M

LPF

RDSMPX C547 47P
TP536

R522 1K

228kHz

LPF

TP535

RF+

C546 680P 5% 228kHz LPF
TP537

TP541

LPF C535 47P LPF

FM1MPX

R530 1K

C538 1U 10% C539 680P 5% AMP_IN_RR+

R829 10K

C806 10N 10% C802 470N 20%
TP811

TP829
TRACE WIDTH= 75M

RF-

TP828
TRACE WIDTH= 75M

TP807

RR+ RR-

R828 R827 10K 100
TP809

TP827
TRACE WIDTH= 75M

Run

AMP_IN_RF+ to

&

RR+

INPUTS

AM_FM_SS C525 100P

~1kHz R509 1%

LPF
TP538

Parallel

AMP_RET_DSP

C807 10N 10%

TP808

12.4K

C534 680P 5%

R510 20K 1%

1.5Meg>Rin>2.2Meg

AMP_IN_RF+

R826 100
TP810

C803 470N 20%
TP812

8.5_SW

R805 10K IC001 TDA3681J 9 SW3.3 10 SW8.5_5 11 SW16 5 IGNIN 6 IGNOUT TDA3681 Short Lead Version(7.7 mm) 12 WARN 13 PGND 14 STCP 15 VMEM 16 V16 17 BATT Filter 100KHz Maximum Set for to DSP Chip (SAA7706 & SAA7709)
TP821

Q800 MMBT3906 R803
TP823 TP824

250KHz > 2K Ohmms for maximum DSP load to to reduce noise power
TP825 TP822

A+
1 V8.5 2 V5 3 VP2 4 V3.3 TOROID-XERBY L001
TP001 TP002 TRACE_WIDTH=*_100M trace_width= 0.5 inch

load

7 RST 8 RDC

resistor min

divider required

R841 10K

R802 10K

D800 BAS21

47K

1% R804 47K 1% R844 10K
TP826

1.0Vrms 14V_SW
TP018 TRACE_WIDTH=*_25M

from

chip

achieve

rated

Place filter as close as possible to DSP chip
TP820

BATT C001 4.7M 20%

LOCATE

C005

CLOSE TO IC001

C005 220N 10%

C008 220N 10%

C009 47U 20%

C026 10% 10N

Max. Current = 1800mA Surge Current = 3000mA

Q802

R836 47K 1%

C811 10N 10%

Q801 MMBT3904 R843 10K

MMBT3904 R842 10K

CONNECT

AMP_GND

AT

C001

TP019 TP020 TP017
TRACE_WIDTH=*_8M

5V_MEM

TP003

3.3V_EN R003 47K 5% C019 1N 10% 50V

C006 220N 10%

C007 1M 20% R001 10K

C010 220N 10%

C011 47U 20%

C025 10% 10N

Max.

Current

=

300mA
PART MUST COMPLY WITH SPECIFICATION WSS-M99P9999-A1 TO HELP SAFEGUARD HEALTH, SAFETY AND THE ENVIRONMENT

Visteon
TP016

PRODUCT
MANUAL GRAPHIC

ENGINEERING

LVI * COMPUTER RESET
CG COLUMN =

"EP" SIZE
LEVEL ORIGINAL WHEN RED

REG_EN

TP005

DATA

R004 47K 5%

C020 1N 10% 50V

R002 100K
TP014

IGN SW_DSP3.3VD
TP013
TRACE_WIDTH=*_40M

ENGLISH METRIC 20

1
30 40

2
50 60 70

3
80 90

4
100 110 120

5

6

130 140 150 160

DO

NOT

SCALE

ABOVE

SCALE

FOR

REFERENCE ONLY

REF GWESSEL/FIAT-MPGWESSEL/PROJ/FIAT-MP3-VER2

TP008

RN/AC_A1

R005

TP009

R007 10K 5%

TP010

2.2K R006 5% 1K 5%

C021 1N 10% 50V

C017 220N 10%

C018 47U 20%

C024 10% 10N
TP012

R010 1K (OPT.)

Max.

Current

=

850mA

DRAWN

BY

DATE

CHECKED

SCALE

APPROVED

050308 5V_SW
TRACE_WIDTH=*_40M

NONE

UNLESS

OTHERWISE

SPECIFIED:

DIMENSIONS INCHES

ARE IN MILLIMETERS 3RD ANGLE PROJECTION DIM. +/STAMPED APP

C012 220N 10%

C013 47U 20%

C023 10% 10N
TP011

R008 1K (OPT.)

Max.

Current

=

1400mA

MACHINED DIM. +/ANGULAR DIM. +/MATERIAL

8.5_SW
TRACE_WIDTH=*_40M

DATE

NO.

MS-XXXX-3458-XX
PWB13026
PLANT CODE:

POWERVIEW

C014 220N 10%

C015 47U 20%

C022 10% 10N

C016 1M 20%

Max. R009 1K (OPT.)

Current

=

600mA
NAME

SKETCH - WIRING DIAGRAM FIAT MAIN MP3