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DIGITAL CAMERA

FinePix50i
SCHEMATICS
U/E/EG_Model

WARNING
THE COMPONENTS INDENTIFIED BY THE MARK ON THE SCHEMATHIC DIAGRAM AND
IN THE PARTS LIST ARE CRITICAL FOR SAFETY.
PLEASE REPLACE ONLY BY THE COMPORNENTS SPECIFIED ON THE SCHEMATHIC DIAGRAM
AND IN THE PARTS LIST.
IF YOU USE WITH PART NUMBER UN-SPECIFIED, IT MAY RESULT IN A FIRE AND AN
ELECTORICAL SHOCK.

Ref.No.:ZM00372-200
FUJI PHOTO FILM CO.,LTD. Printed in Japan 2001.07(M.A)
FinePix50i(U/E/EG) SCHEMATICS

SAFETY CHECK-OUT
After correcting the original problem, perform the following safety
check before return the product to the costomer.

1.Check the area of your repair for unsoldered or 6. Make leakage - current measurements to deter-
poorly soldered connections. Check the entire mine that exposed parts are acceptably insulated
board surface for solder splasher and bridges. from the supply circuit before returning the product
to the customer.
2. Check the interboard wiring to ensure that no
wires are "pinched" or contact high-wattage re- 7. CAUTION: FOR CONTINUED
sistors. PROTECTION AGAINST FIRE
HAZARD, REPLACE ONLY WITH
RISK OF FIRE- SAME TYPE 2.5 AMPERES 125V
3. Look for unauthorized replacement parts, par- 2.5A125V
REPLACE FUSE
FUSE.
ticularly transistors, that were installed during a AS MARKED
ATTENTION: AFIN D'ASSURER
2.5A125V
previous repair. Point them out to the customer UNE PROTECTION PERMANENTE
and recommend their replacement. CONTRE LES RISQUES
D'INCENDIE, REMPLACER
UNIQUEMENT PAR UN FUSIBLE
4. Look for parts which, though functioning, show
DE MEME, TYPE 2.5 AMPERES,
obvious signs of deterioration. Point them out to 125 VOLTS.
the customer and recommend their replacement.
8. WARNING:
5. Check the B + voltage to see it is at the values TO REDUCE THE ELECTRIC
WARNING! SHOCK, BE CAREFUL TO TOUCH
specified.
HIGH VOLTAGE THE PARTS.

2
FinePix50i(U/E/EG) SCHEMATICS TABLE OF CONTENTS

TABLE OF CONTENTS

page

1. Notes on Schematics ......................................... 4

2. Basic Block Diagram
2-1.Overview of Function of Each Circuit ................................. 4
2-2.Block Function ..................................................................... 5
2-3.Block Diagram...................................................................... 6

3.Schematics
3-1.Overall Connections ............................................................ 7
3-2.Main Board
3-2-1.Main Board Component Location(A) ........................... 8
3-2-2.Main Board Component Location(B) ........................... 9
3-2-3.Camera Block Schematics ......................................... 10
3-2-4.Process Block Schematics(U_MODEL) .................... 11
3-2-5.Process Block Schematics(E/EG_MODEL) ............. 12
3-2-6.Audio Block Schematics ............................................ 13
3-2-7.MP3 Block Schematics .............................................. 14
3-2-8.LCD Block Schematics ............................................... 15
3-3.DCST Board
3-3-1.DCST Board Component Location(A) ....................... 16
3-3-1.DCST Board Component Location(B) ....................... 17
3-3-2.DCST Block Schematics ............................................ 18
3-4.CCD Board
3-4-1.CCD Board Component Location .............................. 19
3-4-2.CCD Block Schematics .............................................. 20
3-5.KEY Board
3-5-1.KEY Board Component Location............................... 21
3-5-2.KEY Block Schematics ............................................... 22

3
1.Notes on Schematics Diagrams FinePix50i(U/E/EG) SCHEMATICS

1.Notes on Schematics Diagrams
Other neccessary notes are shown in each block.

1-1.Cautions
Caution when replaceing chip (leadless) parts.
Do not re-use the removed parts, but use new parts.
Be careful that the negativ side of the tantalum capacitors are susceptible to heat.
Voltage indications are omitted for capacitors other than chemical and tantalum capacitors with a
dielectric strength of 50 V or less.All units are F (p shows pF).
Chip resistors without indication are 1/10 W.
k =1000 , M =1000k
Variable resistors and semi-variable resistor are abbreviated the specification of B characteristic.

2.Basic Block

2-1.Overview of Functions of Each Circuit.

Board Name Circuit Diagram Name Circuit Functions
MAIN Board CAM Block Schematic A/D conversion of CCD output Signal circuit
CCD Driver circuit
Lens/Shutter/IRIS driving circuit
PROCESS Block Schematic System control circuit / Video Signal circuit
Image signal process /USB communication circuit
AUDIO Block Schematics Voice Signal circuit
MP3 Block Schematics MP3 circuit
LCD Block Schematic Control of LCD panel
DCST Board DCST Block Schematic Power Supply/LCD Back Light/Flash circuit
CCD Board CCD Block Schematic CCD circuit
KEY Board KEY Block Schematic Operation SW circuit

4
FinePix50i(U/E/EG) SCHEMATICS 2.Basic Block Diagram
2-2.Explanation of Block Functions

2-2-1.MAIN Board

(1)Photographic Circuit Block (CAM BLOCK)
The analpg image signal that is output from the CCD (1/1.7" honeycomb 2,400,000 pixels) can be modified in the
SCS3A_IC(IC106:CSP_IC) by enlargement, signal mixing, color correction, or reformatting. Then it is converted
into a 12 bit digital signal. The converted digital signal is sent to chip 1, SCS2D_IC(IC205:CSP_IC).
(CSP_IC=Chip Size Package)

(2)Image Signal Processing Circuit Block (PROCESS BLOCK)
Input Data from the CCD
The 12 bit digital image data (corresponding to 1H) that is output from the photographic circuit block (CAM block) is
sent to the SCS2D_IC, then undergoes buffer management in the internal buffer of this IC and is converted into 32 bit
(16 bit x 2) data. The converted 32 bit data passes through DMA unit in the SCS2D_IC and then by way of the internal
bus control unit to the SDRAM_IC (IC207:32Mbit) where it is stored. Image data correspondeing to one frame (2400pix
x 900 lines) is stored temporarily in the SDRAM_IC circuit.
At the same time, the AE is processed by the AUTO Calculator, using the 12 image data that was input into the
SCS2D_IC, and the data needed for AE/AWB/AF is sent to the internal DRAM. In the internal DRAM, the data is sent
to the SCS3A_IC serially so that the appropriate AE/AWB/AF can be obtained.
Processing to Recording to the SSFDC
The image data kept in the SDRAM_IC is converted 1 line at a time from 32 bits to 12 bits in the internal buffer of the
SCS2D_IC, and then sent to the signal processing unit. This 12 bit image data is then converted into Y,C signals of 8
bits each in this signal processing unit, and sent back to the internal buffer. The internal buffer converts these 8 bit Y,C
signals into Y,Y,Cb,Cr signals of 8 bits each and sends them to the SDRAM_IC. The image data kept in the SDRAM_IC
is compressed by the JPEG operation unit in the SCS2D_IC, and the returned to the SDRAM_IC unit. The image data
after compression passes throgh the media controller in the SCS2D_IC and is recorded to the SSFDC in an orderly
fashion.
From the SSFDC to Image Playback
The compressed image data is sent from the SSFDC to the SCS2D_IC, passes through the media controller and is
kept in the SDRAM_IC. The compressed image data kept in the SDRAM_IC is then expanded in the JPRG operation
unit and sent back to the SDRAM_IC. The image data after expansion is sent to the signal processing unit by way of
the internal buffer. In the signal processing unit, the 8 bit Y,Y,Cb,Cr signals are processed to convert them into
brightness signals and color signals, and pass through the VRAM controller to the encoder and D/A converter, where
digital to-analog conversion and character-generator stacking are performed and they become analog R/B/G signals.
At the same time, the VBS signal is incorporated into the blue signal of the R/B/G signals.
Movie mode
The 12 bit digital image data that is output from the photographic circuit block (CAM BLOCK) processed from the
internal buffer of the SCD2D_IC to the signal processing unit where the 12 bit image data is converted into Y,C signal
of 8 bit each, and then sent to the VRAM (1MB) of the VRAM controller. The image data kept in hte VRAM is sent to
the SDRAM_IC. The image data kept in the SDRAM_IC is compressed in the JPEG operation unit of the SCS2D_IC
and sent back to the SDRAM_IC. The image data after compression passes through the media controller in the
SCS2D_IC and is recorded to the SSFDC in an orderly fashion.
Image sensor adjustment data is stored in the EEPROM_IC (IC218).

(3)LCD Control Block (LCD Block)
The digital 6 bit signal processed in the image signal processing block integrated circuit (SCS2D_IC) is sent directly
to the LCD panel. The liquid monitor used (1.5 type 110,000 pixels) isequipped with a TFT LCD.

2-2-2.Power Supply Circuit Block (DCST Board)
The power supply circuit is made up of a 2.5V circuit (for the SCS2D_IC), a 3.3V circuit (for the SCS3A_IC, SCS2D_IC
SDRAM, ROM, USB, LED, and keys), a 5V circuit (for lens operation, flash, and LCD backlighting), a 16V/8V (for
CCD operation), a -30V (for LCD), and CPU_UNREG, etc.

5
FUJI PHOTO FILM CO., LTD.
26-30, Nishiazabu 2-chome, Minato-ku, Tokyo 106-8620, Japan.