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1 2 3 4 5 6 7 8
DC/DC
DRAM Power
1.8V, 0.9V
PG 43
TAHITI-INTEGRATED
+3V_SRC
A A
+5VSUS
1.5VSUS, 1.05V
PG 45
PG 44
CPU VR
AC/BATT
Dothan CLOCKS SYSTEM
PG 47 RESET CKT
PG 42 CONNECTOR
(478 Micro-FCPGA) PG 15 PG 39
BATT
RUN POWER PG 40
SELECTOR PG 3,4
SW
Panel Connector
PG 46 BATT PG 17
PG 41
CHARGER 4X133MHZ LVDS
B
POWER DC/DC sDVO SI1362
DVI
B
Alviso-GM PG 16
400/533 MHZ DDR II TVOUT S-Video
DDR2-SODIMM1
PG 18
PG 13,14
1257 PCBGA
400/533 MHZ DDR II VGA CRT
DDR2-SODIMM2 PG 5,6,7,8,9 PG 18
PG 13,14
USB2.0 (P5,P7)
2 Rear Ports PG 32
DMI interface
USB2.0 (P4,P6)
2 right Side PG 32
USB2.0 (P1)
PATA - HDD PATA 88SA8040 SATA
33MHz PCI DOCKING
PG 19 PG 19 CONNECTOR
ICH6-M
ATA 66/100 LAN (100/10) 1394 CONN CARDBUS PCMCIA MINI-PCI
Internal Media Bay 609 BGA Wireless LAN
PG 38
C
BCM4401 PCI4515 CON. C
CD-ROM PG 19 USB2.0 1 port(P0)
PG 22 PG 21 PG 21 PG 23
PG 35
AC97 PG 10,11,12
E-Switch I/O Board CONN
PI3L110Q
PG 32
LPC
PG 36
USB2.0 (P2) Bluetooth
PG 30
AUDIO MDC
PG 31,32 PG 24 SIO(Macallan 3)
256 Pins LBGA DOCK LPC
PG 25,26
S/PDIF to Audio RJ11 to Tip
X-Bus
DOCK Jacks DOCK Ring
D
PG 38 PG 34 PG 38 PG 24 D
PS/2 SWTICH & LED & FAN & THERMAL QUANTA
IO CONN
IrDA Keyboard Serial Parallel
Touchpad Flash Title
COMPUTER
PG 32 PG 31 Schematic Block Diagram1
PG 37 PG 26 PG 27 PG 28 PG 30 PG 29
Size Document Number R ev
Tahiti 1A
Date: , 29, 2005 Sheet 1 of 49
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
INDEX
Power & Ground
Pg# Description DNI LIST
Label Pg# Description Control Signal
1 Schematic Block Diagram 1
DC_IN+ AC ADAPTER (20V)
2 Front Page
PBATT+ MAIN BATTERY + (10~17V)
3-4 Dothan
A A
PWR_SRC MAIN POWER (10~20V)
5-9 Alviso
10-12 ICH6
13-14 DDRII SO-DIMM(200P)
VHCORE CPU CORE POWER (1.25/1.15V) RUNPWROK
15 Clock Generator
1.05V AGTL+ POWER (1.05V) I/O RUNPWROK
16 SI1362
17 LCD Conn. & SSP
+3VRUN SLP_S3# CTRLD POWER RUN_ON
18 CRT & TV Conn.
+3VSUS SLP_S5# CTRLD POWER SUS_ON
19 SATA & IDE Conn.
+5VALW 8051 POWER (5V)
20 PAD & Screw Hole
+5VRUN SLP_S3# CTRLD POWER RUN_ON
21 TI PIC4510
B B
+5VSUS SLP_S5# CTRLD POWER SUS_ON
22 CB/1394 CONN
+5VHDD HDD POWER (5V) HDDC_EN#
23 Mini PCI Conn.
+5VMOD MODULE POWER (5V) MODC_EN#
24 MDC Conn.
STRB#/5V EXTERNAL FDD POWER (5V) FDD/LPT#
25-26 SIO (LPC47N354)
+5VRUN FAN POWER (5V) FAN_OFF/ON#
27 Parallel Port
VDDA AUDIO ANALOG POWER (5V) RUN_ON
28 Serial Port
1_8VSUS RESUME WELL IN ICH
29 Flash ROM
1_8VRUN SLP_S3# CTRLD POWER
30 Touch Pad CONN.& Bluetooth CONN
+3VALW 8051 POWER (3V)
31 Switch Board Conn. & LED & IO Board
V1_5RUN ALVISO POWER Non-CPU I/O
C 32 FAN & Thermal C
33-34 Audio CODEC (STAC9751) & Phone Jack
GND ALL PAGES DIGITAL GROUND
35-36 LAN Interface
37 FIR COMBO CONN GND
38 MISCELLANEA
39 Docking Conn.
40 SYSTEM RESET/POWER GOOD
41-42 Battery Selector & Charger
43 CPU Power
44 1.8VSUS/0.9V
D 45 1.5V/1.05V D
46 D/D Power QUANTA
47 RUN Power Switch
Title
COMPUTER
Index, DNI, Power & Ground
48 RUN POWER SW
Size Document Number R ev
Tahiti(DM3L) 1A
Date: , 29, 2005 Sheet 2 of 49
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
VCCP
R29 27.4/F
R25 56 TCK 1 2
THERMTRIP# 1 2 TRST# 1 2
HD#[0..63]
U7A HD#[0..63] 5
R30 56 R28 680
HA#[3..31] IERR# 1 2
5 HA#[3..31]
HA#3 P4 A19 HD#0
HA#4 A3# D0# HD#1 R31 200
U4 A25
HA#5
HA#6
V3
A4#
A5#
Dothan D1#
D2# A22 HD#2
HD#3
CPUPWRGD 1 2
R3 A6# D3# B21
HA#7 V2 A24 HD#4
HA#8 A7# D4# HD#5
A
HA#9
W1
T4
A8# 1 OF 3 D5# B26
A21 HD#6 A
HA#10 A9# D6# HD#7 +3VRUN +3VALW
W2 A10# D7# B20
HA#11 Y4 C20 HD#8
HA#12 A11# D8# HD#9
Y1 A12# D9# B24
HA#13 U1 D24 HD#10
A13# D10#
2
2
HA#14 AA3 E24 HD#11
HA#15 A14# D11# HD#12 R22 R34
Y3 A15# D12# C26
HA#16 AA2 B23 HD#13 *1.5K_NC *330_NC
HA#17 A16# D13# HD#14 VCCP
AF4 A17# D14# E23
HA#18 AC4 C25 HD#15
1
1
HA#19 A18# D15# HD#16
AC7 A19# D16# H23 PROCHOT# 26
1
HA#20 AC3 G25 HD#17
A20# D17#
3
HA#21 AD3 L23 HD#18 R24
HA#22 A21# D18# HD#19
AE4 A22# D19# M26 56 2
HA#23 AD2 H24 HD#20
A23# D20#
3
HA#24 AB4 F25 HD#21 R23 Q12
2
1
HA#25 A24# REQUEST DATA D21# HD#22 CPU_PROCHOT# Q11 *RHU002N06_NC
AC6 A25# D22# G24 2 1 2
HA#26 AD5 PHASE PHASE J23 HD#23 *3904_NC
HA#27 A26# D23# HD#24 *330_NC
AE2 SIGNALS SIGNALS M23
1
HA#28 A27# D24# HD#25
AD6 A28# D25# J25
HA#29 AF3 L26 HD#26
HA#30 A29# D26# HD#27
AE1 A30# D27# N24
HA#31 HD#28
AF1 A31# D28# M25
H26 HD#29
Thermal Level Shift
D29# HD#30
D30# N25
K25 HD#31
D31# HD#32
5 HADSTB0# U3 ADSTB0# D32# Y26
HD#33
5 HADSTB1# AE5 ADSTB1# D33# AA24
T25 HD#34
ITP disable guidelines
D34# HD#35
B
D35# U23 Signal Resistor Value Connect To Resistor Placement B
R2 V23 HD#36
5 HREQ#0 REQ0# D36#
P3 R24 HD#37 TDI 150 ohm +/- 5% VTT Within 2.0" of the CPU
5 HREQ#1 REQ1# D37#
T2 R26 HD#38
5 HREQ#2 REQ2# D38#
P1 R23 HD#39 TMS 39 ohm +/- 5% VTT Within 2.0" of the CPU
5 HREQ#3 REQ3# D39#
T1 AA23 HD#40
5 HREQ#4 REQ4# D40#
U26 HD#41 TRST# 680 ohm +/- 5% GND Within 2.0" of the CPU
D41# HD#42
D42# V24
N2 ERROR U25 HD#43 TCK 27 ohm +/- 5% GND Within 2.0" of the CPU
5 ADS# ADS# D43#
SIGNALS V26 HD#44
D44# HD#45
D45# Y23 TDO Open VTT Within 2.0" of the CPU
AA26 HD#46
IERR# D46# HD#47
A4 IERR# D47# Y25 Note: Populate All NC component when
AB25 HD#48
N4
D48#
AC23 HD#49 ITP connector is populated.
5 HBREQ0# BREQ0# D49#
J3 ARBITRATION AB24 HD#50
5 BPRI# BPRI# D50#
L1 PHASE AC20 HD#51
5 BNR# BNR# D51#
J2 SIGNALS AC22 HD#52 VCCP VCCP
5 HLOCK# LOCK# D52#
AC25 HD#53
D53# HD#54
5 HIT# K3 HIT# D54# AD23
K4 SNOOP PHASE AE22 HD#55
5 HITM# HITM# D55#
1
1
1
1
L4 SIGNALS AF23 HD#56
5 DEFER# DEFER# D56#
AD24 HD#57 R236 R238 R239 R240
BPM0# D57# HD#58 54.9/F 54.9/F 39.2/F 150
C8 BPM0# D58# AF20
BPM1# B8 RESPONSE AE21 HD#59
BPM2# BPM1# PHASE D59# HD#60 JITP2 VCCP +3VSUS
A9 AD21
2
2
2
2
BPM3# BPM2# D60# HD#61
C9 SIGNALS AF25
BPM3# D61# HD#62
5 HTRDY# M3 TRDY# D62# AF22
H1 AF26 HD#63 TDI 1 27
5 RS#0 RS0# D63# TDI VTT0
1
K1 TMS 2 28
5 RS#1 RS1# TMS VTT1
2
C C
L2 TCK 5 26 C359 R234
5 RS#2 RS2# TCK VTAP
TDO 1 2 7 150
A20M# TRST# R237 *22.6/F_NC TDO *.1U_10V_NC
10 A20M# C2 C23 HDSTBN0# 5 3
1
FERR# A20M# PC DSTBN0# TRST#
10 FERR# D3 C22 HDSTBP0# 5
2
IGNNE# FERR# COMPATIBILITY DSTBP0#
10 IGNNE# A3 IGNNE# DSTBN1# K24 HDSTBN1# 5
CPUPWRGD E4 SIGNALS L24 CPURST# 1 2 12 25 DBR#
10 CPUPWRGD PWRGOOD DSTBP1# HDSTBP1# 5
SMI# B4 W25 R235 *22.6/F_NC RESET# DBR#
24
10 SMI# SMI# DSTBN2# HDSTBN2# 5 DBA#
DSTBP2# W24 HDSTBP2# 5
TCK A13 AE24 TCK 11
TCK DSTBN3# HDSTBN3# 5 FBO
TDO A12 DIAGNOSTIC AE25
TDO DSTBP3# HDSTBP3# 5
TDI C12 & TEST
TMS TDI BPM0#
C11 SIGNALS 15 HCLK_ITP# 8 23
TRST# TMS BCLKN BPM0# BPM1#
B13 TRST# DINV0# D25 HDBI0# 5 15 HCLK_ITP 9 BCLKP BPM1# 21
T11 PAD A16 J26 19 BPM2#
ITP_CLK0 DINV1# HDBI1# 5 BPM2#
T7 PAD A15 T24 10 17 BPM3#
ITP_CLK1 DINV2# HDBI2# 5 GND0 BPM3#
PREQ# B10 AD20 14 15 PR DY#
PREQ# DINV3# HDBI3# 5 GND1 BPM4#
PR DY# A10 16 13 PREQ#
DBR# PRDY# GND2 BPM5#
39 DBR# A7 DBR# DBSY# M2 DBSY# 5 18 GND3
DRDY# H2 DRDY# 5 20 GND4 NC0 4
10 INTR D1 LINT0 22 GND5 NC1 6
D4 EXECUTION
10 NMI LINT1
STPCLK# C6 CONTROL B14
10 STPCLK# STPCLK# BCLK1 HCLK_CPU# 15
CPUSLP# A6 SIGNALS B15
5,10 CPUSLP# SLP# BCLK0 HCLK_CPU 15
DPSLP# B7 *ITP700_NC
10 DPSLP# DPSLP#
G1
10 DPRSTP#
31 THERMDA
THERMDA B18
DPRSTP#
THERMDA INIT# B5 CPUINIT#
CPUINIT# 10
ITP DEBUG PORT
THERMDC A18
31 THERMDC THERMDC
G1: NC for B11 CPURST#
RESET# CPURST# 5
D Dothan and THERMTRIP# C17 D
31 THERMTRIP# THERMTRIP#
DPRSTP# for THERMAL DIODE C19
DPWR# DPWR# 5
CPU_PROCHOT# B17
Yonah PROCHOT#
QUANTA
Dothan Processor
Title
COMPUTER
Dothan Processor (HOST)
Size Document Number R ev
Tahiti(DM3L) 1A
Date: , 29, 2005 Sheet 3 of 49
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
COMP0 VCCP
COMP1