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VOLUME 13, NUMBER 3
MICROPROCESSOR
MARCH 8, 1999
T H E I N S I D E R S ' G U I D E T O M I C R O P R O C E S S O R
REPORT
H A R D W A R E
Pentium III = Pentium II + SSE
Internet SSE Architecture Boosts Multimedia Performance
by Keith Diefendorff ratios with techniques like 3D NURBS (nonuniform rational
B-splines), which are impractical on Pentium II.
The name, Pentium III, belies the processor's modest The only new feature--or misfeature, depending on
changes. Extrapolating from the differences between Pen- your view--in Katmai not related directly to multimedia is
tium and Pentium II--out-of-order execution, long the processor serial number (see MPR 2/15/99, p. 3). Con-
pipeline, backside L2 cache, and a split-transaction bus-- trary to some reports, Katmai does not implement a random-
one might have expected Pentium III to be a completely number generator, which would have been a far more useful
new microprocessor. But the reality is less meaty; Katmai, feature than the serial number.
the first member of the Pentium III family, is essentially a
Pentium II with an enhanced multimedia capability. Con- Streaming SIMD Increases Multimedia Capability
sumers, however, may not be so disappointed: Katmai's new The SSE architecture is likely to be more significant to
features will enable improvements in multimedia perfor- multimedia performance than MMX ever was. SSE repre-
mance large enough to spawn new applications that are sents a major improvement over MMX for processing video,
simply intractable on the current generation of Pentium II sound, speech, and 3D graphics. As we pointed out earlier
processors. (see MPR 10/5/98, p. 1), Intel did about as well as anyone
Katmai was announced at 450 and 500 MHz, an 11% could expect in defining the architecture, given the x86
frequency boost over the 450-MHz Deschutes processor, starting point (a hole).
the current top-of-the-line Pentium II. A 550-MHz version What is disappointing about Katmai, however, is that it
will come out in the second quarter and later this year the implements only half of SSE's 128-bit architectural width,
second Pentium III, Coppermine, will surface. That proces- double-cycling the existing 64-bit data paths. This approach
sor will be implemented in Intel's upcoming 0.18-micron limits Katmai to only half of the architecture's potential per-
P858 process (see MPR 1/25/99, p. 22), boosting its fre- formance, leaving it with little advantage over the K6 III's
quency to 600 MHz--and eventually to 733 MHz or
more--while also making space for at least 256K of on- Core Micro- SIMD-Integer Floating-Point Bus
architecture Architecture Architecture Architecture
chip L2 cache.
The new processor uses the same pipeline, same caches, Pentium III Memory
500+ MHz New SIMD W
Stream-
same bus, and same IC process as Deschutes. So, not surpris- 2/99 Media FP C
ing
+
ingly, it achieves the same per-cycle performance on existing
software. All of Katmai's new features, save one, are focused Pentium II
on multimedia, as Figure 1 shows. The new features, includ- 266