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5 4 3 2 1
A3F Block Diagram
FAN + SENSOR
PAGE 4
CLOCK GEN
ICS954310
D
CPU PAGE 5
D
DISCHARGER
YONAH-2M CIRCUIT
PAGE 36
PAGE 2,3
Power On Sequence
FSB PAGE 39
667MHz
DEBUG PORT
LVDS & INV MCH-M PAGE 41
DDR2-667 Dual Channel DDR2
PAGE 12 Calistoga SO-DIMM X 2
CPU VCORE
CRT & TV OUT 945GM PAGE 14,15,16
PAGE 50
B0:02G010009121 SYSTEM PWR
PAGE 13
C PAGE 6,7,8,9,10,11 C
DMI interface PAGE 51
BAT & CHARGER
PCIE *1 MINI CARD
SIR PAGE 57
WLAN
PAGE 25
PAGE 26
SUPER I/O LPC
COM PORT 33MHz
PAGE 25
SMSC
LN47N217
ICH7-M 10/100 LAN
RTL8100CL
PAGE 25 Azalia
KEYPAD PCI PAGE 33,34
PCMCIA
MATRIX 33MHz PAGE 31
B0:02G010008811
PAGE 37
EC IT8510E PAGE
17,18,19,20
CardBus 1394
INSTANT KEY R5C841
PAGE 28,29
IDE USB PAGE 32
PAGE 37 PAGE 30
B B
CARD READER
PAGE 32
LED Control
PAGE 37
HDD Mini PCI
USB 2.0 PAGE 38
PAGE 27 CON X4
PAGE 35
ISA
ODD
ROM Azalia Codec
ALC660 PAGE 27
Bluetooth
PAGE 24
PAGE 21,22,23
PAGE 26
MDC
A Connector Camera
A
PAGE 34
PAGE 12
Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC
Engineer: Ping-Yen Tsai
Size Project Name Rev
Custom A3F 2.0
Date: Wednesday, January 18, 2006 Sheet 1 of 63
5 4 3 2 1
5 4 3 2 1
6 H_A#[16..3]
6 H_REQ#[4..0]
6 H_A#[31..17]
T200
H_D#[0..63] 6
U200A
1
H_A#3 J4 H1 H_ADS#
H_A#4 A[3]# ADS# H_BNR# H_ADS# 6
D L4 E2 U200B D
H_A#5 A[4]# BNR# H_BPRI# H_BNR# 6 H_D#0 H_D#32
M3 A[5]# BPRI# G5 H_BPRI# 6 E22 D[0]# D[32]# AA23
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# 6 E26 D[2]# D[34]# V24
ADDR GROUP 0
H_A#8 N2 F21 H_DRDY# H_D#3 H22 V26 H_D#35
A[8]# DRDY# H_DRDY# 6 D[3]# D[35]#
DATA GRP 2
H_A#9 J1 E1 H_DBSY# H_D#4 F23 W25 H_D#36
A[9]# DBSY# H_DBSY# 6 D[4]# D[36]#
DATA GRP 0
H_A#10 N3 H_D#5 G25 U23 H_D#37
H_A#11 A[10]# H_BR0# R201 H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BR0# 6 E25 D[6]# D[38]# U25
H_A#12 P2 56Ohm H_D#7 E23 U22 H_D#39
H_A#13 A[12]# H_IERR# H_D#8 D[7]# D[39]# H_D#40
L1 D20 K24 AB25
CONTROL
H_A#14 A[13]# IERR# H_INIT# +VCCP_AGTL+ H_D#9 D[8]# D[40]# H_D#41
P4 A[14]# INIT# B3 H_INIT# 17 G24 D[9]# D[41]# W22
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_LOCK# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 6 J23 D[11]# D[43]# AA26
H_ADSTB#0 L2 2 1 H_D#12 H26 Y26 H_D#44
6 H_ADSTB#0 ADSTB[0]# H_CPURST# +VCCP_AGTL+ H_D#13 D[12]# D[44]# H_D#45
RESET# B1 H_CPURST# 6 F26 D[13]# D[45]# Y22
1
H_REQ#0 K3 F3 H_RS#0 R202 H_D#14 K22 AC26 H_D#46
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_RS#0 6 H_D#15 D[14]# D[46]# H_D#47
H2 F4 54.9Ohm / H25 AA24
H_REQ#2 REQ[1]# RS[1]# H_RS#2 H_RS#1 6 H_DSTBN#0 D[15]# D[47]# H_DSTBN#2
K2 REQ[2]# RS[2]# G3 H_RS#2 6 T201 6 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 6
H_REQ#3 J3 G2 H_TRDY# H_DSTBP#0 G22 Y25 H_DSTBP#2
H_REQ#4 REQ[3]# TRDY# H_TRDY# 6 6 H_DSTBP#0 H_DINV#0 DSTBP[0]# DSTBP[2]# H_DINV#2 H_DSTBP#2 6
L5 REQ[4]# 6 H_DINV#0 J26 DINV[0]# DINV[2]# V23 H_DINV#2 6
G6 H_HIT#
H_A#17 HIT# H_HITM# H_HIT# 6
Y2 A[17]# HITM# E4 H_HITM# 6
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# H_D#17 D[16]# D[48]# H_D#49
R3 AD4 K25 AC23 Layout Note:
A[19]# BPM[0]# D[17]# D[49]#
ADDR GROUP 1
H_A#20 W6 AD3 H_D#18 P26 AB22 H_D#50
A[20]# BPM[1]# D[18]# D[50]# Comp0,2 connect with Z0=27.4 ohm,
XDP/ITP SIGNALS
H_A#21 U4 AD1 H_D#19 R23 AA21 H_D#51
H_A#22 A[21]# BPM[2]# +VCCP_AGTL+ H_D#20 D[19]# D[51]# H_D#52 make trace length shorter than 0.5".
Y5 A[22]# BPM[3]# AC4 L25 D[20]# D[52]# AB21
DATA GRP 1
Comp1,3 connect with Z0=54.9 ohm,
DATA GRP 3
H_A#23 U2 AC2 PRDY# 1 T202 H_D#21 L22 AC25 H_D#53
H_A#24 A[23]# PRDY# PREQ# R203 56Ohm / H_D#22 D[21]# D[53]# H_D#54
R4 A[24]# PREQ# AC1 L23 D[22]# D[54]# AD20 make trace length shorter than 0.5".
H_A#25 T5 AC5 TCK 1 R204 2 56Ohm H_D#23 M23 AE22 H_D#55
H_A#26 A[25]# TCK TDI R205 H_D#24 D[23]# D[55]# H_D#56 Comp[3:0] at least 25 mils away from
C
T3 A[26]# TDI AA6 1 2 56Ohm P25 D[24]# D[56]# AF23 C
H_A#27 W3 AB3 TDO R217 56Ohm / H_D#25 P22 AD24 H_D#57 any other toggling signal.
H_A#28 A[27]# TDO TMS H_D#26 D[25]# D[57]# H_D#58
W5 AB5 1 R206 2 56Ohm GND P23 AE21 27.4 ohm connects with an ~18mil
H_A#29 A[28]# TMS TRST# R207 H_D#27 D[26]# D[58]# H_D#59
Y4 A[29]# TRST# AB6 1 2 56Ohm T24 D[27]# D[59]# AD21 wide trace to comp0.
H_A#30 W2 C20 CPU_DBR# 1 T204 +VCCP_AGTL+ H_D#28 R24 AE25 H_D#60
H_A#31 A[30]# DBR# TPC28T H_D#29 D[28]# D[60]# H_D#61 54.9 ohm connect with 5mil-wide
Y1 A[31]# L26 D[29]# D[61]# AF25
H_ADSTB#1 V4 D21 H_PROCHOT_S# H_D#30 T25 AF22 H_D#62 to comp1
6 H_ADSTB#1 ADSTB[1]# PROCHOT# D[30]# D[62]#
2
A24 CPU_THRM_DA H_D#31 N24 AF26 H_D#63
THERMDA CPU_THRM_DA 4 D[31]# D[63]#
THERM
H_A20M# A6 A25 CPU_THRM_DC R200 H_DSTBN#1 M24 AD23 H_DSTBN#3
17 H_A20M# H_FERR# A20M# THERMDC CPU_THRM_DC 4 6 H_DSTBN#1 H_DSTBP#1 DSTBN[1]# DSTBN[3]# H_DSTBP#3 H_DSTBN#3 6
A5 1KOhm N25 AE24
17 H_FERR# H_IGNNE# FERR# PM_THRMTRIP# 6 H_DSTBP#1 H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3 H_DSTBP#3 6
C4 C7 1% M26 AC20
17 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# 4,7,17 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
H_STPCLK# GTL_REF H_COMP0 R208 27.4Ohm 1%
1
17 H_STPCLK# D5 STPCLK# AD26 GTLREF COMP[0] R26 1 2
H_INTR <500 mil (55 Ohm) MISC H_COMP1 R209 54.9Ohm 1% GND
HCLK
17 H_INTR C6 LINT0 COMP[1] U26 1 2
2
H_NMI B4 A22 CLK_CPU_BCLK U1 H_COMP2 R210 1 2 27.4Ohm 1%
17 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 5 T/B trace 5.5 COMP[2]
1
H_SMI# A3 A21 CLK_CPU_BCLK# C200 R211 R212 1 2 TEST1 C26 V1 H_COMP3 R213 1 2 54.9Ohm 1%
17 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5 TEST1 COMP[3]
0.1UF/10V 2KOhm Space 25 1KOhm
AA1 RSVD[1]
/ 1% R214 1
/ 2 TEST2 D25 TEST2 DPRSTP# E5 H_DPRSTP#
H_DPRSTP# 17,50
51Ohm H_DPSLP#
2
AA4 RSVD[2] RSVD[12] T22 DPSLP# B5 H_DPSLP# 17
GND H_DPWR#
1
AB2 RSVD[3] RSVD[A2] A2 DPWR# D24 H_DPWR# 6
AA3 CPU_BSEL0 B22 D6 H_PWRGD
RSVD[4] 5 CPU_BSEL0 CPU_BSEL1 BSEL[0] PWRGOOD H_PWRGD 17
GND
RESERVED
M4 RSVD[5] RSVD[13] D2 GND 5 CPU_BSEL1 B23 BSEL[1] SLP# D7 1
N5 F6 CPU_BSEL2 C21 AE6 T205
RSVD[6] RSVD[14] 5 CPU_BSEL2 BSEL[2] PSI#
T2 D3 H_CPUSLP#
RSVD[7] RSVD[15] PM_PSI# H_CPUSLP# 6,17
V3 C1 SOCKET479P
RSVD[8] RSVD[16] PM_PSI# 50
B2 AF1 BCLK FSB BSEL2BSEL1BSEL0 12G04600479A
RSVD[9] RSVD[17]
C3 RSVD[10] RSVD[18] D22 12G04600479A
RSVD[19] C23 133 533 L L H
B25 RSVD[11] RSVD[20] C24
166 667 L H H
SOCKET479P
B B
12G04600479A 68