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CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

RF-BB Connection Diagram




GLOBAL SYMBOLS

VR1A

VR2

VR3

VR4

VR5

VR6

VR7

VBAT

IPA1 Not used

IPA2 Not used




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-1
CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

System Connector Diagram




FOR AEM SMPS FOR DispBckLight SMPS




Grounds are connected together near grip connector




Place C380 near connector
IPWM
Flex connector between grip and Calypso
ISD

BGND
BGND BTEMP
VBAT BSI
VBAT TO UPP_WD2 GENPIO13 (CPU)
BSI Col5
BTEMP
IPWM
ISD
BGND
VCHARIN VCHARIN
VCHARIN
CGND CGND
CGND
VIBRA VIBRA
Col5
KEYBLIGHT
col2
col3 FROM X130/19(GRIP)
VBAT
VBAT
BGND col2
BGND row2
row2 row4
row3 Col4
row4
row5
col4 col3
VBAT row3
VBAT row5
BGND
BGND




NOTE! : HOT BAR SOLDERING FIGURE




Note 1: These Are ScrewHoles




xx yy




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-2
CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

Accessories Interface Diagram




Components : 360 - 379




Components : 380 - 429




Components: 430 - 449




Components: 450 - 469




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-3
CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

AEM Diagram



VIO
TS_IF(3:0)

MMCIF(2:0)

I_MMCIF(4:0)

ADC(3:0)

C261 GENIO(28:0)
10n


GND




N260
AEM_1.2
B7 VDD VIOA E9 VIOA
VTOUCH VCoreA F9
D2 VCOREA
VANA C260
Sense G9 C282
J262 F3 RefEn C262 1u0
UEMRST
J9 3640117 L260 100u_10V 2u2 2310793
COIL
BGND GND GND
G3 TestA 22uH
G4 TestD VRef H6 C283
GND
PUSL(2:0) 1u0
GND
H8 Clk32 VAUX1 A2
0 2 C9 RSTInX VAUX2 D1
B8 E8 VAUX2
AEMSLEEP SleepX VAUX3
H7 A6 VAUX3
CBusData VMemA
F8 E1 VMEMA
CBusClk VMemB
1 0 2 G8 J7 VMEMB
CBusEn VTOUCH C284 C266
19 G7 AEMInt VTOUCH C268 1u0 2u2
CBUS(2:0)
VIO C285 C270 2u2
1u0 GND 2u2 GND GND GND GND
B9 VMemBStrt CurShDn H3
GPIO(37:0)
H2 CurPWM DACOut E4 2
C271 ANCTRL(4:0)
3
F5 AuIn1 AuOut1 G1
1 2 J3 AuIn2 AuOut2 J1 1 0

XAUDIO(6:0) 470n HF_AUDIO(1:0)
C272 B1 E2
AD1 PRXdrv
470n E3 F2
AD2 PRXin
D3 AD3
F4 AD4 PRXrec G6 1 2 0
GND
C280 C281 PRXIF(2:0)
22p 22p B3 TSMY CF2 H4
D4 TSPY CF1 G5
HFGND HFGND B4 H5 C273
TSMX COFF
A4 C274 220p
TSPX C275
GND 220p
100n
J270 G2 D6 PRXBGND PRXBGND PRXBGND
4 GenVBATIO PWMOut VBAT
A1 Gen28IO1
B2 Gen28IO2
C2 Gen28IO3




R262

47R
AEM<-IR C3 Gen28IO4 VBATVAux1 A3
AEM->IR C4 Gen28IO5 VBATVAux2 C1
1 0 2 IR SD C5 A5 VBAT
Gen28IO6 VBATMemA
B5 Gen28IO7 VBATMemB F1
IRIF(2:0) VBAT
D5 Gen28IO8 VBATHF J2
C6 J5 VBATHF
Gen28IO9 VBATANA
B6 Gen28IO10 VBATTouch J6 VBAT
F7 Gen18IO1 VBATVBB J8
2.8 V IO VBATVBB
D8 Gen18IO2 VBATMIX A8
E7 Gen18IO3 C276 C277 C278
D9 Gen18IO4 1u0 10n 1n0
F6 H1 2312401
Gen18IO5 GNDHF
GND GND GND
1 UPP_WD2<-IR E6 Gen18IO6 GNDANA J4
0 UPP_WD2->IR C8 Gen18IO7 GNDDIG A9 C287
2 IR SD D7 Gen18IO8 GNDMIX A7 10n
C7 Gen18IO9 GNDVBB H9 C279
10u 2312255
I_IRIF(2:0)
4370861 PRXBGND
GND BGND GND GND HFGND GND GND




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-4
CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

Baseband Diagram




Components : 360 - 469




Components: 310 - 329




Components: 190 - 309


Components: 100 - 129




Components:470-499
Components: 170 - 189




Components : 130 - 169




Components: 330 - 359




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-5
CCS Technical Documentation Schematics / Layouts LG4 NHL-2NA

BB-RF Interface Diagram


RFCONV/RFCONV_O: 0: RXIINP
1: RXIINN
2: RXQINP
3: RXQINN
4: TXIOUTP
5: TXIOUTN
6: TXQOUTP
7: TXQOUTN
8: VREFRF02
9: VREFRF01




GENIO/GENIO_O

5: TXP
6: RESET
7: TXA
8: TXL1
9: TXL2
10: EXTANT
11: BANDSEL
12: ADATA
13: RXGAIN




RFAUXCONV/RFAUXCONV_O 0: TXC
1: TXPWRDET
2: AFC




RFICCNTRL/RFICCNTR_O 0: RFBUSCLK
1: RFBUSDA
2: RFBUSEN1




SLOWAD/SLOWAD_O
6: PATEMP




Issue 2, Amendment 1 08/2003 Nokia Corporation Page A-6
LCD_CTRL(2:0)
CPU Diagram




I_MMCIF(4:0)




D100
UPP_WD2_V2.2

R11 TestMode LCDCamClk1 R21
RFCLK
GND LCDCSX V20
J100 B20 RFClk LCDCamTx-Da1 T20
PUSL(2:0)




Issue 2, Amendment 1 08/2003
J101 R12 SleepClk
0 1 2 J102 R14 SleepX LCDDa5 D17 9
J103 R13 PURX LCDDa4 D20 8
JTAG(6:0)
LCDDa3 D19 7
6 5 4 3 2 1 0 N18 JTClk LCDDa2 D18 6
L19 JTrst LCDDa1 E18 5
K19 JTDI LCDDa0 B19 4
L18 JTMS LCDDISPClk E20 3
M19 JTDO LCDLLClk B21 2
R18 EMU0 LCDFSP E19 1
N19 EMU1 LCDM C18 0
RFCONVDA(5:0)
CCS Technical Documentation




J116 W18 TxID MMCClk T2
LCD(9:0)
0 2 1 5 4 3 J117 Y21 TxQD MMCDa V3
J118 W21 AuxDa MMCCmd T3
J119 W19 RxID MMCDaDir U3
J120 GND
W20 RxQD MMCCmdDir R3
0 AA20 DBusClk
1 Y18 DBusDa GenIO0 W5 0
2 Y20 DBusEn1X GenIO1 W6 1
Y8 RFConvClk GenIO2 W7 2
GenIO3 W4 3
DBUS(2:0)
0 U1 CBusClk GenIO4 W9 4
1 U2 CBusDa GenIO5 W11 5
2 V2 CBusEnX GenIO6 W12 6
0 W10 EarData GenIO7 W15 7
1 Y10 MicData GenIO8 W16 8
CBUS(2:0)
J104 AA21 UEMInt GenIO9 W17 9
J105 H7 AEMSleepX GenIO10 Y4 10
AUDIODATA(1:0)
GenIO11 Y3 11
UEM_INT
0 AA7 RFBusClk GenIO12 V19 12
AEMSLEEP
1 Y6 RFBusDA GenIO13 V18 13
2 Y7 RFBusEn1x GenIO14 V17 14
GenIO15 V16 15
Y1 CIFDaP GenIO16 V15 16
RFICCNTRL(2:0) R100
W3 CIFDaN GenIO17 V13 17
W1 CIFClkP GenIO18 V11 18
100R R101
W2 CIFClkN GenIO19 V9 19
GenIO20 V7 20
0 1 2 3 100R 21
Y12 FBusRx GenIO21 V6
1 0 J121 AA11 FBusTx GenIO22 V5 22
CIF(3:0)
Y14 MBusRx GenIO23 U19 23
I_FBUS(1:0)
1 0 W13 MBusTx GenIO24 U18 24
GenIO25 AA1 25
I_MBUS(1:0)
Y15 SIMCLK GenIO26 T19 26
Y16 SIMIOCTRL GenIO27 T18 27
1 2 0 AA15 SIMIODa GenIO28 R4 28

I_SIMIF(3:0)
37 C13 GPIO37 SDRDa0 D5 J106 0
GENIO(28:0)
36 D13 GPIO36 SDRDa1 C5 1
35 J3 GPIO35 SDRDa2 C6 2
34 J4 GPIO34 SDRDa3 D6 3
33 G19 GPIO33 SDRDa4 C7 4
32 J15 GPIO32 SDRDa5 D7 5
31 K15 GPIO31 SDRDa6 D9 6
30 L15 GPIO30 SDRDa7 C9 7
29 M15 GPIO29 SDRDa8 A9 8
28 N15 GPIO28 SDRDa9 B9 9
27 J18 GPIO27 SDRDa10 B8 10
26 AA3 GPIO26 SDRDa11 A5 11
25 P15 GPIO25 SDRDa12 B6 12
24 R10 GPIO24 SDRDa13 B5 13
23 R9 GPIO23 SDRDa14 B4 14
22 R8 GPIO22 SDRDa15 A3 15
21 P7 GPIO21 SDRAd0 D15 J107 0
20 N7 GPIO20 SDRAd1 C16 1
SDRAMDATA(15:0)
Schematics / Layouts LG4




19 M7 GPIO19 SDRAd2 D16 2
18 L7 GPIO18 SDRAd3 C17 3
17 K7 GPIO17 SDRAd4 B18 4




Nokia Corporation
16 J7 GPIO16 SDRAd5 A17 5
15 H15 GPIO15 SDRAd6 B17 6
14 G8 GPIO14 SDRAd7 B16 7
13 G9 GPIO13 SDRAd8 B15 8
12 G10 GPIO12 SDRAd9 A15 9
11 G11 GPIO11 SDRAd10 C15 10
10 G12 GPIO10 SDRAd11 B14 11
9 G13 GPIO9 SDRAd12 A13 12
8 G14 GPIO8 SDRAd13 B13 13
7 G20 GPIO7 SDRCLK A11 J108
6 G21 GPIO6 SDRCKE B12
SDRAMADD(13:0)
5 H20 GPIO5 SDRRASX C12
4 F19 GPIO4 SDRCASX C11
3 G18 GPIO3 SDRWEX C10
2 0 1 2 F18 GPIO2 SDRDQML D11
1 T4 GPIO1 SDRDQMU B10
I_IRIF(2:0)
0 U4 GPIO0 7 6 5 4 3 2 1 0
SDRAMCTRL(7:0)
AA13 DSPVCC1 FLDa0 N3 J109 0
GPIO(37:0)
AA19 DSPVCC2 FLDa1 L4 1
DO NOT USE GPIO(0 ) RIP IS RESERVED ! VCOREA U21 DSPVCC3 FLDa2 K3 2
Y13 DSPGND1 FLDa3 G3 3
J110 Y19 DSPGND2 FLDa4 G4 4
AA13 U20 DSPGND3 FLDa5 E4 5
GND E3
AA19 U21 FLDa6 6
N21 C100 VCOREA E21 MCUVCC1 FLDa7 D4 7
1 /2 10n J21 MCUVCC2 FLDa8 M3 8
GND
N21 MCUVCC3 FLDa9 L3 9
F20 MCUGND1 FLDa10 J2 10
J20 MCUGND2 FLDa11 J1 11
VCOREA N20 MCUGND3 FLDa12 F3 12
GND F4
FLDa13 13
A2 COREVCC1 FLDa14 D3 14
R1 R1 COREVCC2 FLDa15 C3 15
AA2 AA9 COREVCC3 FLAd16 B1 16
AA9 U21 C21 E21 C21 COREVCC4 FLAd17 L1 17
A2 K20 K2
Y2 C101 K20 COREVCC5 FLAd18 18
1 /2 10n C102 C106 C106 J21 C104 B3 COREGND1 FLAd19 H2 19
1 /2 10n 2 /2 10n 2 /2 10n R2 COREGND2 FLAd20 D2 20
GND GND1 /2 10n GND GND GND
Y9 COREGND3 FLAd21 B2 21