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7. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
GUIDE HOLE
1V8_VCORE 2V8_VMEM 2V8_VEXT 2V8_VMEM 2V85_VSIM VUSB
1V8_VRTC
VBAT 2V85_SPWR VUSBIN
C100 C101 C102 C103 C104 C105 C106 C107
47n 0.1u 0.1u 0.1u 0.1u 0.1u 47n C108 C109
47n
47n
0.1u
M14
C12
D16
K11
R15
C11
N11
P14
F12
F14
T12
J11
M6
M3
H6
H1
A5
E3
V8
A8
2V75_VVCXO
F8
T3
T6
L9
C110 C111 C112
1V8_VCORE
2V75_VABB
A A
2V85_VSIM
2V5_VMIC
2V8_VMEM
1V8_VRTC
2V8_VEXT
VCC1 22u 22p 47n C113
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VINT
VMEM1
VMEM2
VMEM3
VMEM4
VMEM5
VEXT1-1
VEXT1-2
VEXT1-3
VEXT1-4
VEXT1-5
VEXT1-6
VEXT2-1
VSIM
VDDUSB
VDDRTC
VUSB
C1
VBAT
ADD00 ADD0 1u
E5
ADD01 ADD1
D3
G15
C15
H15
SPWR1 R10
SPWR2 T10
F15
ADD02 ADD2
A3
B3
R5
R4
N2
R2
R6
P2
F6 R100 10K
ADD03 ADD3 BACK_BATT
D1 L3
ADD04 ADD4 DATA0 DATA00
VBAT1
VBAT2-1
VBAT2-2
VBAT3-1
VBAT3-2
VBAT4
VBAT5
VCOREIN
VMEMIN1
VMEMIN2
VRTCIN
VUSBIN
F5 L6 A12 P1 C114 1u
ADD05 ADD5 DATA1 DATA01 IP IP VCORE1
G6 L1 A13 N1
ADD06 ADD6 DATA2 DATA02 IN IN VCORE2
E1 L8 A15 T3 C115 1u
ADD07 ADD7 DATA3 DATA03 QP QP VMEM1
G5 M1 A14 T2
ADD08 ADD8 DATA4 DATA04 QN QN VMEM2
F3 L5 B14 T7 C116 0.1u
ADD09 ADD9 DATA5 DATA05 AFC AFCDAC VRTC
H8 N3 B12 T6 C117 1u
ADD10 ADD10 DATA6 DATA06 TX_RAMP PA VSIM
ADD11
F1
ADD11 DATA7
N1
DATA07 VABB
H16 C118 2.2u(1608)
G3 P3 N16 C119 1u
ADD12 ADD12 DATA8 DATA08 C121 C122 VMIC
G1 N6 D16 C120 1u
ADD13 ADD13 DATA9 DATA09 47p 0.068u VVCXO
KDS121V H3 P1 E15 C123 1u
ADD14 ADD14 DATA10 DATA10 VUSB
J6 R3 A4 C124 1u
ONNOFF ADD15 ADD15 DATA11 DATA11 VEXT1
2 J8 R1 B4
RPWRON ADD16 ADD16 DATA12 DATA12 _RESET R101 VEXT2
R107
3 J3 N7 T1 T4
PWRON ADD17 ADD17 DATA13 DATA13 RESET VBACK
1 J5 P6 200 T13 E16
100K ADD18 ADD18 DATA14 DATA14 KEY_ROW0 KEYOUT VAPPGATE
D100 J1 T1 C125 C126 T14 F16
ADD19 ADD19 DATA15 DATA15 POWERKEY KEYON VAPP
K6 R7
ADD20 ADD20 RPWRON DBBON
K3 NA NA A2
B ADD21 ADD21 CLKON VCXOEN B
K1 T12 (1%)
ADD22 ADD22 LDOEN
K9 A4 ABB_IRQ D1 T15 R102 1.2M
ADD23 ADD23 GPIO_48_ABB_IRQ INT IBIAS 2V8_VEXT 3V3_MULTI_USB
H9 L1 R1 C127 1u
CLKOUT MCLK CRST VBAT
(FROM TCXO) _RAM_CS100
V5 E7 J2 VBAT 2V85_SPWR
_RAM_CS1 NRAMCS1 CLKOUT_GATE MCLKEN
P8 A6 M1 R3
13MHz NRAMCS2 GPO_29_ABBRESET ABBRESET VMEMSEL
_ROM_CS100
N8 T5
_ROM_CS1 NROMCS1 JTAGEN VBACKSEL R103
P9 T11 G16
R106
_ROM_CS2 GPIO_44_NROMCS2 JTAGEN TCK TMS NC_G16_VPLL_TE
_WR R4 L11 B2 (1%) U100 MIC2211-NSBML
ERROR01 _WR NWE GPIO_18_TCK TCK 0
NA
L100 _LBS V1 V12 B1 B7 R104 100 1 10
560p _LBS NLWR GPIO_19_TMS TMS CHGDACREF VIN VOUT1
270nH _UBS U1 P12 R105 NA A1 B5 C128 0.01u AMP_SD
_UBS NHWR GPIO_20_TDI TDI TDI CHGOSC
P5 V13 TDO_100 C1 2 9
_RD NRD GPIO_21_TDO TDO_0 TDO EN1 VOUT2
B8
TDO_1 VBATSENSE
T4 A5 3 8
_ADV NADV VCHG EN2 NC3
V2 C8 K1 A7
R108
_WAIT NWAIT GPO_0_RXON RXON ISENSE
V4 E8 K2 A6 4 7
0
BURSTCLK BURSTCLK GPO_1_TXON
GPO_5_ARSM
A7 J1
TXON
ASM
U101 GATEDRIVE TP100 BYP NC2
GND
6
T5 C7 5 11
AD6535ABCZ
2V5_VMIC
NGPCS1 GPO_6_ATSM USB_DET NC1 BGND
V6
_MIDI_CS NAUXCS1
N9