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System Block Diagram
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CPU
N.A.
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Audio
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VDA Signal
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HF Audio
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Power Control
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SIM
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Interconnections
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RF Connector
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Data Connector
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RF Block
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RF Main
AFC, 0.3 ... 2.3V
RFC, 0.8...1.2Vpp@13MHz
IF1, 71 MHz
RXin, -110... -15 dBm
n.a.
IF2, 50 mVpp @ 13MHz
IF2, 1.734 mVpp @ 13MHz
PAout, 5dBm ...39 dBm
n.a.
RXin, -110... -15 dBm
symm. I/Q, -3dBm @ 116 MHz
RFout, min 8dBm
n.a.
PAout, 8 ... 41 dBm
TXout, 5 dBm
UHF LO, 8dBm @ 1006...1031 MHz
UHF LO in,-8dBm @ 1006...1031MHz
n.a.
I/Q in, 1.022...1.18 V
COG
COG 0805 COG
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Power Amp
not used
Power Control,1...5V
n. a. = not assembled
Detected FWD pwr
RF, -12...+23 dBm
42 dBm
RF, 41 dBm @ 880...915 MHz
RF, 5 dBm @ 880...915 MHz
PA Supply, DC 4A
n. a.
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RS232 level Shifter
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Test Connectors
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Component Layout - Top
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Component Layout - Bottom
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Assembly Values - Top
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Assembly Values -Bottom
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