Text preview for : Apple Powerbook G4 A1095_MLB_PB15_051-6809_RevB.rar part of apple Powerbook G4 A1095 MLB PB15 051-6809 RevB apple Apple Powerbook G4 A1095_MLB_PB15_051-6809_RevB.rar



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8 7 6 5 4 3 2 1
DRAWING CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE DATE

B 397429 PRODUCTION RELEASED 08/30/05?




D PAGE CONTENTS PAGE CONTENTS D
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,
1 TITLE PAGE AND CONTENTS 22
2 SYSTEM BLOCK DIAGRAM 23
LVDS
KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR
SCHEM,MLB,PB15 Fri Aug 26 15:48:02 2005
INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,
3 POWER BLOCK DIAGRAM 24 OPTICAL DRIVE

4 PCB NOTES AND HOLES 25 FAN CONTROLLER, USB MODEM/SOFT MODEM,
SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG

5 MPC7447A MAXBUS INTERFACE 26 GIGABIT ETHERNET INTERFACE
BOM OPTIONS (IN COMMON PARTS)
6 MPC7447A DATA / NC PINS / BOOTBANGER 27 FIREWIRE PHY STUFF NO STUFF
1_8V_MAXBUS 1_5V_MAXBUS
7 CPU PLL AND CONFIGURATION STRAPS 28 FIREWIRE PORTS
NO_SSCG SSCG
C 8 INTREPID MAXBUS AND BOOT STRAPS 29 PMU 5V_HD_LOGIC 3V_HD_LOGIC C

9 INTREPID MEMORY INTERFACE / BOOT ROM 30 BATTERY CHARGER AND CONNECTOR
NO_BBANG BBANG
INT_2_5V_COLD INT_2_5V_HOT
10 DDR MEMORY MUXES 31 PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY ATI_MEMIO_HI ATI_MEMIO_LO

11 400PIN STACKED DDR SODIMM CONNECTOR 32 3.3V / 5V SYSTEM POWER SUPPLY
SOFT_MODEM USB_MODEM
EXT_TMDS
GPU_PWRMSR
12 INTREPID AGP 4X/PCI 33 CPU CORE VOLTAGE POWER SUPPLY
GPU_SS

13 INTREPID ENET/FW/UATA/EIDE INTERFACES 34 1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES VGA_BUFFER_RES
INT_TMDS
14 INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG 35 SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK

15 INTREPID POWER RAILS/1.5V LDO 36 SIGNAL CONSTRAINTS (2 OF 4) - CPU

B 16 INTREPID DECOUPLING 37 SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF B

17 USB 2.0 INTERFACE (uPD720101) 38 SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS

18 CARDBUS INTERFACE (PCI1510) 39 FUNCTIONAL TESTPOINTS

19 M11 AGP INTERFACE & SPREAD SPECTRUM SUPPORT
External TMDS (DVI Transmitter SIL1162) 40 REVISION HISTORY

20 M11 LVDS/TMDS/GPIO & GPU VCORE 41 SIGNAL LOCATIONS


21 M11 POWER 42 COMPONENT LOCATIONS (1 OF 2)

43 COMPONENT LOCATIONS (2 OF 2)
DIMENSIONS ARE IN MILLIMETERS

METRIC Apple Computer Inc.
XX


A TABLE_5_HEAD
X.XX
DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
X.XXX PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
TABLE_5_ITEM AGREES TO THE FOLLOWING
051-6809 1 SCHEM,MLB,PB15 SCH1 ENG APPD MFG APPD
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
TABLE_5_ITEM ANGLES II NOT TO REPRODUCE OR COPY IT
820-1600 1 PCBF,MLB,PB15 PCB1 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TABLE_5_ITEM


QA APPD DESIGNER TITLE
826-4393 1 LABEL,PCB,28MM X 6MM EEE:SQE LABEL_BTR
TABLE_5_ITEM
DO NOT SCALE DRAWING
826-4393

826-4393
1

1
LABEL,PCB,28MM x 6MM

LABEL,PCB,28MM x 6MM
EEE:SQF

EEE:SQG
LABEL_BST64

LABEL_BST128
TABLE_5_ITEM
RELEASE SCALE
NONE
SCHEM,MLB,PB15
SIZE DRAWING NUMBER
MATERIAL/FINISH
NOTED AS D 051-6809 REV.
B
THIRD ANGLE PROJECTION APPLICABLE SHT 1 OF 44

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
J24 J20 J2
J23
FW - B RUX Board
Ethernet FW - A Connector
Connector Connector Connector P.23
P.26 P.28 P.28 J19
J26 J27
LMU LUX Board
2 DATA PAIRS
2 DATA PAIRS
Connector Battery Power Supply DC-In
4 DATA PAIRS @ 200MHz
U36
@ 400MHZ P.23 Connector & Charger Connector
D U43 J13 P.30 P.30-34 P.30
D
FireWire OPTICAL DRIVE
Ethernet PHY Connector J3 J8
PHY P.27 LIO/Audio SLEEP SMBUS
P.26 P.24 Connector LED 3.3V
G/MII J12
P.25 P.23
3.3V 1394 OHCI ULTRA ATA/100 U28
10/100/1000 3.3V Connector
8BIT TX
8BIT RX
8BIT TX/RX
50MHZ P.24 EIDE
I2S I2C
U53/J1/J18
Fan
PMU
125MHZ I2C Circuit P.29 J5
UIDE P.25 SERIAL
5V CARDBUS
NOT USED J10 J11 Connector
ETHERNET FIREWIRE UATA 100 EIDE CARDSLOT I2S I2C TRACKPAD Keyboard P.18
10/100/1000 400 MB/S Connector Connector
P.13 P.13 P.13 P.14 P.13 J28
P.13 P.13 P.14 P.23 P.23 33MHZ
C Serial Debug 16/32 BITS C
NOT USED USBP.14
PORT A SCCA Connector 3.3V/5V
P.14
P.25 U8
NOT USED USBP.14
PORT B
U51 VIA/PMU
P.14 U11 J6
TI PCI1510
CardBus
NOT USED USBP.14
PORT C
J3
BlueTooth (LIO) NOT USED USB PORT D
P.14
INTREPID BOOTROM
P.12
BOOT ROM
1M X 8
P.9
AIRPORT
Connector
Controller
P.18
P.25 P.24
USB PORT E PCI
J15 P.14 64BITS PCI BUS
33MHZ 32BITS
Modem/SW Modem USB PORT F 33MHZ
P.14 P.12
Connector AGP BUS 3.3V
P.25 1.5V/3.3V U47
32BITS MEMORY MEMORY

B
MAXBUS
P.8 4X AGP
66MHZ ATI CH. A CH. C
U17
B
INTREPID NEC USB2.0
I2C MAXBUS DDR MEMORY
P.9
P.12
M10 (INTERNAL MEM)
(INTERNAL MEM)

MEMORY MEMORY
EHCI HC
1.8V
167MHZ
32BIT ADDRESS MEMORY BUS
64MB CH. B CH. D
P.17
J3
64BIT DATA 2.5V P.19-21 (INTERNAL MEM)
(INTERNAL MEM)
167MHZ J4 LEFT LIO)
USB




(VIA SIL1162)
COMPOSITE
64BITS (VIA
U56 U16/U18/U28/U27




EDID (I2C)
Inverter P.25




S-VIDEO
Connector




TMDS
CPU PLL
APOLLO Config
2:1 DDR MUXES J17




LVDS
P.22




RGB

DDC
P.10 RIGHT USB
CPU P.7
J14 J21 J22
(VIA STATLER)
P.25
(MPC7447) PMU
P.5-6 LCD Panel S-Video DVI-I
J25 Connector Connector Connector
DDR SDRAM DIMM 0 P.22 P.22 P.22 SYSTEM BLOCK DIAGRAM
A NOTICE OF PROPRIETARY PROPERTY
A
DDR SDRAM DIMM 1 THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

SO-DIMM Connector I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

P.11 III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.


APPLE COMPUTER INC.
D 051-6809 B
SCALE SHT OF
NONE 2 44
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

POWER SYSTEM ARCHITECTURE
+5V_MAIN
1V20_REF -

>~13.44V TURNS-ON
PG 31
+
BACKLIGHT VCC MAP31 DDR CORE DCDC_EN
<~13.44V SHUTS-OFF
INVERTER MAP31 DDR I/O SLEEP
MAIN 2.5V/1.5V DDR POWER
D AC RUN/SS D
DC/DC +2.5V_MAIN
BUCK




+PBUS
INRUSH MAXBUS
ADAPTER LIMITER +24V_PBUSVCC REGULATOR (MAX1715) SEQUENCING
IN +PBUS PG 34 PGOOD 1_5V_2_5V_OK
PG 30 (LTC1625)
PG 30 PG 31 SHUTDOWN: STOPPED
+1.5V_MAIN
14V_PBUS AC: 12.8V +5V_MAIN SLEEP: RUNNING
NO AC: BATTERY VOLTAGE RUN: RUNNING INTREPID CORE
1625 NOT RUNNING TURNS ON OUTPUT @ 2.4V AGP I/O +5V_MAIN
ON1/ON2
SHUTDOWN: RUNNING
SLEEP: RUNNING VCC SHDN
RUN: RUNNING
+5V_MAIN
DCDC_EN_L
AFTER PMU IS UP AND RUNNING
DCDC_EN_L WILL PULL ON1/ON2
DC/DC
+3V_PMU RC AT 1M*0.047UF @ 24V
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
LOW IN SHUTDOWN (MAX1717)
+5V_MAIN
+BATT LDO +3V_PMU SHUTDOWN: STOPPED
+4_6V_BU
RUN/SS - 5V
TURNS ON AT >1V +5V_MAIN +PBUS EXT_VCC SLEEP: STOPPED
RUN: RUNNING
C <100UA ALLOWED VCC C
PG 31 INTERNAL ZENER CLAMP TO 6V DC/DC PG 33
MAIN 3V/5VPGOOD 3V_5V_OK (LTC1778) GPU_VCORE
DC/DC SHUTDOWN: STOPPED +1.2V
(LTC3707) HOLDS BOTH RUN/SS AT GND DCDC_EN SLEEP: D3COLD CPU_VCORE
WHEN IT'S CONNECTED TO GND (+1.385V)
14V_PBUS
VCC
PG 32STBYMD TURNS CONTROL TO RUN/SS
WHEN IT'S OPEN
SLEEP
D3_COLD
RUN: RUNNING
TURNS ON AS LOW AS 0.8V/TYP 1.5V
INTERNAL 1.2UA CURRENT SOURCE
SHUTDOWN: STOPPED
SLEEP: RUNNING GPU_VCORE RUN/SS PG 20
RUN: RUNNING SEQUENCING 1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
BACKUP 14V CHARGES BACKUP BATTERY
INTERNAL ZENER CLAMP TO 6V
<100UA ALLOWED +3.3V_MAIN
+5V_MAIN TURNS ON
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
1M & 0.1UF @14V, IT TAKES DCDC_EN_L OR PMU_POWERUP_L
BATTERY TURNS ON AT >1V
RUN/SS - 3V
~5.88MS TO START SWITCHER 1_5V_2_5V_OK
D3_HOT
BECOMES '1'; MUCH LESS THAN THE
RC CHARGING AT INT_VCC (5V)

DCDC_EN_L
D3_HOT
24V IS OUTPUT ONLY FROM
BACKUP BATTERY
RC AT 1M*0.1UF @ 24V
CHARGER INPUT STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
SHUT-DOWN RUN SLEEP RUN SHUT-DOWN
& BOOST OUTPUT NO INRUSH PROTECTION
WHEN ONLY BATTERY IS CONNECTED SLEEP
B PG 31 +24V_PBUS SLEEP_L_LS5 B
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
DCDC_EN
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V DC/DC DCDC_EN_L
(UNTIL DRAINED)
(LTC3411) +5V_MAIN ~2.23MS
+1.8V_MAIN
BATTERY +5V_SLEEP
SHUTDOWN: STOPPED MAXBUS +3V_MAIN ~7.36MS
CHARGER SLEEP: STOPPED
RUN: RUNNING +3V_SLEEP
(MAX1772) PG 34 3V_5V_OK 2.4V - ??? MS

PG 30 +2_5V_MAIN ??? MS

+2_5V_SLEEP
+BATT +1_5V_MAIN ??? MS

NO INRUSH PROTECTION +1_5V_SLEEP
3S 2P 18650 CELLS WHEN ONLY BATTERY IS CONNECTED
1_5V_2_5V_OK
(MAX1715 OUTPUT)



A
BATTERY VOLTAGE 1_5V_2_5V_OK
(AT LTC1778 RUN/SS)
POWER BLOCK DIAGRAM
+PBUS GPU_VCORE ~8.2MS NOTICE OF PROPRIETARY PROPERTY
A
FEED-IN PATH (D3HOT)
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
GPU_VCORE PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING

PG 30 (D3COLD) I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

SIZE DRAWING NUMBER REV.


APPLE COMPUTER INC.
D 051-6809 B
SCALE SHT OF
NONE 3 44
8 7