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7. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
GUIDE HOLE
1V8_VCORE 2V8_VMEM 2V8_VEXT 2V8_VMEM 2V85_VSIM 2V8_VEXT
VBAT 1V8_VRTC
JTAG1
_F_WE _WR C100 C101 C102 C103 C104 C105 C106 C107
VBAT
TDO_0 TDO_0 47n 0.1u 0.1u 0.1u 0.1u 0.1u 47n C108
47n
TCK TCK
0.1u
TMS TMS
TDO_1 TDO_1
M14
C12
D16
K11
R15
C11
N11
P14
F12
F14
T12
RPWON RPWRON
J11
M6
M3
H6
H1
A5
E3
V8
A8
2V75_VVCXO
F8
T3
T6
L9
1V8_VCORE
R136
2V75_VABB
C110 C111
2V85_VSIM
VBAT 22u
2V5_VMIC
NA
2V8_VMEM
1V8_VRTC
2V8_VEXT
A TDI 22p 47n A
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VINT
VMEM1
VMEM2
VMEM3
VMEM4
VMEM5
VEXT1-1
VEXT1-2
VEXT1-3
VEXT1-4
VEXT1-5
VEXT1-6
VEXT2-1
VSIM
VDDUSB
VDDRTC
TDI C109
C1
VBAT
JTAGEN JTAGEN ADD00 ADD0
E5
GND ADD01 ADD1
D3
G15
C15
H15
SPWR1 R10
SPWR2 T10
F15
ADD02 ADD2
A3
B3
R5
R4
N2
R2
R6
P2
F6 R103 10K
ADD03 ADD3 BACK_BATT
D1 L3
JTAG ADD04 ADD4 DATA0 DATA00
VBAT1-1
VBAT2-1
VBAT2-2
VBAT3-1
VBAT3-2
VBAT4
VBAT5
VBAT1
VBAT2
VBAT3
NC_R6
GND_NET2
F5 L6 A12 P1 C113 1u
ADD05 ADD5 DATA1 DATA01 IP IP VCORE1
G6 L1 A13 N1
ADD06 ADD6 DATA2 DATA02 IN IN VCORE2
E1 L8 A15 T3 C114 1u
ADD07 ADD7 DATA3 DATA03 QP QP VMEM1
G5 M1 A14 T2
ADD08 ADD8 DATA4 DATA04 QN QN VMEM2
F3 L5 B14 T7 C115 0.1u
ADD09 ADD9 DATA5 DATA05 AFC AFCDAC VRTC
H8 N3 B12 T6 C116 1u
ADD10 ADD10 DATA6 DATA06 TX_RAMP PA VSIM
F1 N1 H16 C117 2.2u(1608)
ADD11 ADD11 DATA7 DATA07 VABB
G3 P3 N16 C118 1u
ADD12 ADD12 DATA8 DATA08 C119 C120 VMIC
G1 N6 D16 C121 1u
ADD13 ADD13 DATA9 DATA09 47p 0.068u VVCXO
H3 P1 E15
ADD14 ADD14 DATA10 DATA10 NC_E15
J6 R3 A4 C122 1u
ADD15 ADD15 DATA11 DATA11 VEXT1
J8 R1 B4
ADD16 ADD16 DATA12 DATA12 _RESET R104 VEXT2
J3 N7 T1 T4
ADD17 ADD17 DATA13 DATA13 RESET VBAT_NET
J5 P6 200 T13 E16
ADD18 ADD18 DATA14 DATA14 KEY_ROW0 KEYOUT NC_E16
J1 T1 C123 C124 T14 F16
ADD19 ADD19 DATA15 DATA15 POWERKEY KEYON NC_F16
K6 R7
ADD20 ADD20 RPWRON DBBON
K3 13MHz 47n 47n A2
ADD21 ADD21 CLKON VCXOEN
K1 T12
B ADD22 ADD22 NC_T12 B
K9 A4 ABB_IRQ ABB_IRQ D1 T15
ADD23 ADD23 GPIO_48_ABB_IRQ INT NC_T15
H9 L1 R1 VBAT
CLKOUT MCLK NC_R1
_RAM_CS1 V5 E7 MCLKEN J2
_RAM_CS1 NRAMCS1 CLKOUT_GATE MCLKEN
P8 A6 ABBRESET M1 R3
_RAM_CS2 NRAMCS2 GPO_29_ABBRESET ABBRESET VMEMSEL
_ROM_CS1 N8 T5 VCHARGE
_ROM_CS1 NROMCS1 JTAGEN GND_NET1
_ROM_CS2 P9 T11 G16
_ROM_CS2 GPIO_44_NROMCS2 JTAGEN TCK TMS NC_G16 4.7u
_WR R4 L11 B2
0.2
_WR NWE GPIO_18_TCK TCK C143
_LBS V1 V12 B1 B7
_LBS NLWR GPIO_19_TMS TMS NC_B7 C126
_UBS U1 P12 A1 B5 (1%) (2012)
_UBS NHWR GPIO_20_TDI TDI TDI NC_B5 1u
P5 V13 C1
R106
_RD NRD GPIO_21_TDO TDO_0 TDO D102
B8
TDO_1 VBATSENSE
T4 A5
_ADV
_WAIT
V2
NADV
NWAIT GPO_0_RXON
C8 RXON K1
RXON
U102 VCHG
ISENSE
A7
R108 330
CUS02
V4 E8 TXON K2 A6
BURSTCLK BURSTCLK GPO_1_TXON
GPO_5_ARSM
A7 ASM J1
TXON
ASM
AD6537BABC GATEDRIVE
Q100
T5 C7
26MHz NGPCS1 GPO_6_ATSM G S
V6 4 5
_MIDI_CS NAUXCS1 D3 D4
N9 3 6
_LCD_CS GPIO_42_NMAIN_LCD_CS D2 D5
V7 C6 H1 2 7
_SUB_CS GPIO_43_NSUB_LCD_CS CSDI CSDO D1 D6
E6 H2 1 8
CSDO CSDI
X101 C150 1000p N10 J9 L2 TPCF8102
CLKIN CSFS CSFS
P13 C5 G2
3 4
CLKON
C9
CLKON
OSCOUT