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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
OPERATION BLOCK DIAGRAM
For Test
D D
478 uFCBGA Type
CLOCK THERMAL THERMAL
GENERATOR CPU MONITOR MONITOR
CK-410M+ YONAH-ULV
CPU2_THERMDA/DC W83L771G W83L786NG
Refer to Page4 TFT_LCD Page 9 Page 9
Page 6 Page 7,8
12.1" WIDE
MMBT3906
533MHz FSB
VGA LVDS
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840 uFCBGA Type BGA Type
ON BOARD
X-Series DOCKING SYSTEM
CRT PI5V330QX
VGA GMCH 200P
DDR2-SODIMM 92P x 4
DDR2 533MHz
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Page 24 533 MHz MAX 1 GB
Page 16
Page 14,15
DVI DVO 945GMS Page 17
CALISTOGA-SFF USB (Left)
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SIL1362
TV_OUT TV OUT Page 10,11,12,13
P0
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C USB (Right) C
P4
Page 25 HDD BLUETOOTH
609 FCBGA Type 1.8inch SFF P1 MODULE
Page 28
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LPC LPC IDE DMB
P5 MODULE
LPC47N207
ICH
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DCK LAN PCIEX PCI_EXP4 USB2.0
ICH7-M P2 MINI CARD1
KBD, MOUSE PCI_ EXP PCI_ EXP2
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P/S2 82801 FBM Wireless LAN
Page 30
USB HUB USB2.0 P3 SPI
Page 18,19,20,21 P6 MINI CARD2 SIM CARD
LINE IN/OUT PCI_ EXP3 WIBRO CONN.
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MIC
AZALIA
Page 35
B B
JACK
AC'97 CODEC SPI ROM Page 27
RTC
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HP AD1986 rev0.2 PCI_ EXP1
COMBO JACK
LAN CONTROLLER LAN
RJ11 RJ45
Batt. BCM5751MKFBG Transformer
002257941
Page 28
Audio AMP
C
L R
LM4863 AZALIA MDC1.5
3711-000541
12P L:180mm 2P
SPEAKER Module Harness
2P Page 29
PCI BUS
CardBus Page 18 Power S/W
RICOH R5C843 Sub-B'D
LPC
1394 PORT1
MICOM SYNAPTICS
HD64F2111 P/S2 TOUCHPAD
1394 PORT0 Page 33
A 3in1 B'd A
CF CARD
Space bar
SAMSUNG
ELECTRONICS
KEYBOARD
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
POWER SEQUENCE BLOCK DIAGRAM
14-1) P3.3V 18-0) CLK3_PWRGD*
PAGE 18
CLOCK
1-0) PRTC_BAT RTC
D Battery CHIP PAGE 6
D
19-0) VRM3_CPU_PWRGD
2-1) MICOM_P3V P5V_AUX & P3V_AUX 2-0) VDC VDC
4-0) KBC3_LANPWRON 11.1V 18-0) CLK3_PWRGD*
POWER
4-2) P3.3_LAN
MAX1999 Battery Mode
1-1) CHP3_RTCRST 15-0) KBC3_VRON +3ms 19-0) VRM3_CPU_PWRGD
5-0) KBC3_SUSPWRON
(1) 16-0) VCCP_PWRGD 17-1) VCC_CORE
S/W PAGE 39
CPU VRM
PAGE 44
SC454
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PAGE 43
3-0) KBC3_CHKPWRSW*
20-0) KBC3_CPUPWRGD_D
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19-0) VRM3_CPU_PWRGD VRMPWRGD 25-0) INIT# 25-0) INIT#
3-0) DCK3_PWRSW*
24-0) A20M#/IGNNE#/INTR/NMI 24-0) A20M#/IGNNE#/INTR/NMI
LAN_RESET*
22-0) PLT3_RST* 21-0) CPU1_PWRGDCPU 21-0) CPU1_PWRGDCPU CPU
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23-0) KBC3_CPURST* 22-0) PLT3_RST* 14-2) P1.5V
RCIN* 26-0) CPU BIST
12-1) CHP3_SLPS5*/S3* 22-0) PCI3_RST* 15-2) VCCP
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C C
12-0) KBC3_PWRBTN*
ICH7-M
23-0) CPU1_CPURST*
KBC 8-1) P3.3V_AUX 14-1) P3.3V
13-0) KBC3_PWRON 15-1) P2.5V 15-1) P2.5V
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15-0) KBC3_PWRON_D 14-2) P1.5V 14-2) P1.5V
5-0) KBC3_SUSPWRON 23-0) PLT3_RST*
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15-0) KBC3_VRON
GMCH
8-3) P1.8V_AUX
8-3) P1.5V 14-3) P0.9V
S f
P1.5V_AUX & VCCP
PAGE 26
Thermal 15-2) VCCP 15-2) VCCP
Monitor SC1485 16-0) VCCP_PWRGD
PAGE 9 10-0) 1.5V_PWRGD
5-0) KBC3_SUSPWRON PAGE 41
P5V_AUX & P3V_AUX
4-0) KBC3_LANPWRON 5-1)P5V_AUX
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DDR2 POWER 8-2) P1.8V_AUX 8-2) P1.8V_AUX
4-1) P3.3V_LAN MAX1999 2-1) P5_ALW
DDR2
13-1) P0.9V 14-3) P0.9V
B (2) MAX8632
B
13-1) MEM_VREF 13-1) MEM_VREF Memory
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PAGE 40
PAGE 40
5-0) KBC3_SUSPWRON
4-1) P3.3V_LAN
FDC653N
C
8-1) P3.3V_AUX 22-0) PCI3_RST*
PAGE 39 6-1) P5V_AUX MiniCard
14-1)P5V 14-2) P3.3V
14-0) PWRON* FDC653N CardBus
PAGE 44
4-1) P3.3V_LAN 5-1) P3.3V_LAN
14-2) P3.3V
14-0) PWRON* FDC653N 14-1)P5V AUDIO
PAGE 44
4-3) P1.2V_LAN
QST5TR
5-1) P3.3V_AUX AMP
15-0) KBC3_PWRON_D 15-1) P2.5V
LOM PAGE 28
15-2) 1.5V_PWRGD
MIC5219 22-0) PLT3_RST*
GIGABIT TRANSFORMER
4-2) P2.5V_LAN LT1 H5015 PAGE 44
14-2) P3.3V
PAGE 27
PAGE 29 8-3) P1.8V_AUX
14-2) P1.8V
HDD
A 14-0) KBC3_PWRON FDC653N A
SAMSUNG
ELECTRONICS
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG. CLOCK DISTRIBUTION
D CLK0_HOST_CPU D
1205-002574 CLK0_HOST_CPU* CPU
133 MHz
CLK0_HOST_GMCH
CLK1_MCLK0/0*
133 MHz CLK0_HOST_GMCH*
CLK1_MCH3GPLL CLK1_MCLK1/1* SODIMM
133 MHz CLK1_MCH3GPLL*
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CLK1_DREFSSCLK GMCH 533 MHz
CLK1_MCLK3/3*
133 MHz CLK1_DREFSSCLK*
ONBOARD
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CLK1_DREFCLK CLK1_MCLK4/4*
96 MHz CLK1_DREFCLK*
DDR MEM.
CLK1_PCIEICH
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CLOCK GENERATOR
AUD3_AZALIA_BCLK
AUDIO CODEC 24.576MHz
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C 133 MHz CLK1_PCIEICH* C
12.288 MHz
33 MHz CLK3_PCLKICH6M
14.318 MHz CLK3_ICH14
ICH
RTC Clock MDC3_AZALIA_BCLK
MDC
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CLK3_SMBCLK SMB3_CLK 32.786KHz
ICS954305D
CK-410M+
33 MHz
a id
CLK3_PCLKMICOM
S f
KBC5_TCLK TOUCHPAD
Page 6
KBC
32.768KHz KBC3_SMCLK
BATTERY
CLK1_DCKPCIELAN
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133 MHz CLK1_DCKPCIELAN*
B B
33 MHz CLK3_SIOPCI_DS DOCKING
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33 MHz DCK3_CLK33
33 MHz CLK3_PCLKSIO
LPC47N207 14.318 MHz DCK3_SIO14
14.318 MHz CLK3_SIO14
C
CLK1_PCIELAN
96 MHz CLK1_PCIELAN* LAN 25MHz
33 MHz CLK3_PCLKFWH
FWH
33 MHz CLK3_PCLKCB CARDBUS
CONTROLLER
A A
33 MHz CLK3_PCLKMIN SAMSUNG
MINIPCI
ELECTRONICS
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SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS CO'S PROPERTY.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.
BOARD INFORMATION
D SCHEMATIC ANNOTATIONS AND BOARD INFORMATION D
PCI Devices Voltage Rails
Devices IDSEL# REQ/GNT# Interrupts
Power Rail Descriptions
CARDBUS AD17 0 E,F,G PRTC_BAT 3.3V (can drop to 2.0V min. in G3 state) supply for the RTC well.
USB AD29(internal) VDC Primary DC system power supply (9 to 19V)
Hub to PCI AD30(internal) MICOM_P3V Output voltage of MAX1999. (if VDC is removed, it will be off)
LPC Bridge/IDE/AC97/SMBUS AD31(internal) P5V_ALW Output voltage of MAX1999. (if VDC is removed, it will be off)
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Programable
Internal MAC AD24(internal) P3.3V_LAN 3.3V power rail (off in S4-S5)
P2.5V_LAN Internal Regulator's Power of LAN Controller
P1.2V_LAN Internal Regulator's Power of LAN Controller
P5V_AUX 5.0V power rail (off in S4-S5)
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P3.3V_AUX 3.3V power rail (off in S4-S5)
P1.8V_AUX GMCH/DDR II Power Source(off in S4-S5)
I2C / SMB Address P5V
P3.3V
5.0V switched power rail (off in S3-S5)
3.3V switched power rail (off in S3-S5)
P1.5V 1.5V switched power rail (off in S3-S5)
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Devices Address Hex Bus P0.9V DDR2 Termination
P2.5V 2.5V switched power rail (off in S3-S5)
ICH6 Master SMBUS Master
VCCP 1.05V power ralil. GMCH core, CPU/GMCH FSB Termination.
CK-410M+ (Clock Generator) 1101 001X D2h Clock, Unused Clock Output Disable VCC_CORE Core voltage for YONAH-ULV CPU (0.74~1.30V)
s n
C SODIMM0 1010 001X A2h - C
P1.5V_DMI 1.5V (Direct Media Interface Compensation)
MICOM INV_VDC DC power (Inverter)
Master
LCD_VDD3V 3.3V (LCD)
BATTERY 0001 011h 16h - VCC_CRT 5.0V (CRT)
W83L771G 0101 111x 5Eh - SD3_VCC 3.3V (3in1 B'D)
W83L786NG 0101 110x 5Ch CB3_VCC 3.3V (CF card)
m e
AUD_P5V 5.0V switched power rail (off in S3-S5)
AVDD 5.0V (ADI1986)
AMP_VDD 5.0V (Audio AMP)
BLT_P3.3V 3.3V (BLUETOOTH)
a id
USB PORT Assign
Port Number ASSIGNED TO Port Number ASSIGNED TO
S f
0 USB PORT (LEFT) 4 USB PORT (RIGHT)
UHCI_0 1 BLUETOOTH UHCI_2 5 DMB CARD
UHCI_1 3
2 MINI-CARD (WIRELESS)
DOCKING UHCI_3 7
6 MINI-CARD (WIBRO)
X
CPU Core Voltage Table
VID5 VID4 VID3 VID2 VID1 VID0 Voltage VID5 VID4 VID3 VID2 VID1 VID0 Voltage
0 0 0 0 0 0 1.708 V 1 0 0 0 0 0 1.196 V
0 0 0 0 0 1 1.692 V 1 0 0 0 0 1 1.180 V
0 0 0 0 1 0 1.676 V 1 0 0 0 1 0 1.164 V
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0 0 0 0 1 1 1.660 V 1 0 0 0 1 1 1.148 V
0 0 0 1 0 0 1.644 V 1 0 0 1 0 0 1.132 V
0 0 0 1 0 1 1.628 V 1 0 0 1 0 1 1.116 V
B
System Power States 0
0
-
0
-
0
0
0
1
1
1
1
0
1
1.612 V
1.596 V
1
1
0
0
-
0
0
1
1
1
1
0
1
1.100 V
1.084 V
B
o
0 0 1 0 0 0 1.580 V 1 0 1 0 0 0 1.068 V
0 0 1 0 0 1 1.564 V 1 0 1 0 0 1 1.052 V
Power Rail Devices (Page Number) 0 0 1 0 1 0 1.548 V 1 0 1 0 1 0 1.036 V
0 0 1 0 1 1 1.532 V 1 0 1 0 1 1 1.020 V
P5V ICH6-M (20) CRT(24) MICOM(26) DMB(28) USB(29) Mini-PCI(30) R5C841(31) 0 0 1 1 0 0 1.516 V 1 0 1 1 0 0 1.004 V
STAC9752(34) Audio AMP(35) DDR POWER(39) LED B'D(44) 0 0 1 1 0 1 1.500 V 1 0 1 1 0 1 0.988 V