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Service
Manual ORDER NO.
CRT3178
CD MECHANISM MODULE(S10.1)
CX-3110
- This service manual describes the operation of the CD mechanism module incorporated in models list-
ed in the table below.
- When performing repairs use this manual together with the specific manual for model under repair.
Model Service Manual CD Mechanism Module
DEH-1600/XU/UC CRT3173 CXK5602
DEH-16/XU/UC
DEH-6/XU/UC
DEH-1630R/XU/EW CRT3174
DEH-1600R/XU/EW
DEH-1600RB/XU/EW
DEH-1610/XU/EE CRT3175
DEH-1650/XU/ES CRT3176
DEH-1650B/XU/ES
DEH-1650/XU/CN
CONTENTS
1. CIRCUIT DESCRIPTIONS ...........................................2
2. MECHANISM DESCRIPTIONS.................................19
3. DISASSEMBLY .........................................................21
PIONEER CORPORATION 4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153-8654, Japan
PIONEER ELECTRONICS (USA) INC. P.O.Box 1760, Long Beach, CA 90801-1760 U.S.A.
PIONEER EUROPE NV Haven 1087 Keetberglaan 1, 9120 Melsele, Belgium
PIONEER ELECTRONICS ASIACENTRE PTE.LTD. 253 Alexandra Road, #04-01, Singapore 159936
C PIONEER CORPORATION 2003 K-ZZA. DEC. 2003 printed in Japan
1 2 3 4
A 1. CIRCUIT DESCRIPTIONS
Recently, Many CD LSIs have been one-chip LSIs where RF amplifier, DSP, audio DAC, post filter, and other circuits are
integrated.
This product uses this type CD LSI, UPD63712AGC, which includes all functions necessary for CD player control.
Basically, this system outputs the analog signal, and the digital output can be supported.
A-F
B UPD63712AGC
Digital signal
EFM
processing
RF amplifier
A/D converter
1 bit,
Audio DAC
Drive output
Servo Digital servo
C CD-TEXT
PWM output
Post filter
(SCF)
MPU interface
Microcomputer Analog output
for system control
D
Fig.1.0.1 Block diagram of CD LSI UPD63712AGC
E
F
2 CX-3110
1 2 3 4
5 6 7 8
1.1 PREAMPLIFIER BLOCK (UPD63712AGC: IC201) A
In the preamplifier block, the pickup output signals are processed to generate signals that are used for the next-stage
blocks: the servo block, demodulator, and control.
After I/V-converted by the preamplifier with built-in photo detectors (inside the pickup), the signals are applied to the
preamplifier block in the CD LSI UPD63712AGC (IC201). After added by the RF amplifier in this block, these signals are
used to produce necessary signals such as RF, FE, TE, and TE zero-cross signals.
The CD LSI employs a single power supply system of + 3.3V. Therefore, the REFO (1.65V) is used as the reference volt-
age both for this CD LSI and the pickup. The LSI produces the REFO signal by using the REFOUT via the buffer amplifi-
er and outputs from the pin 90. All the measurements should be made based on this REFO.
Caution: Be careful not to short the REFO and GRD when measuring.
B
1.1.1 APC (Automatic Power Control)
A laser diode has extremely negative temperature characteristics in optical output at constant-current drive. To keep
the output constant, the LD current is controlled by monitor diodes. This is called the APC circuit. The LD current is
calculated at about 30mA, which is the voltage between LD1 and V+3A divided by 7.5 (ohms).
Pickup Unit
CD CORE UNIT
MD 2 PD C
5 5
REG 1.25V
100 p
VR
7 7 + +
- 6.5 k -
LD- 1k
15 15
150 k
APC REG 1.25V
100/16
1R5 x 5
R1
3p
+
LD+
14 14
Vref
APN
1 LD +
1k - 100 k
2SB1132
D
110 k 100 k
R1
1SS355
3p
3 PN
LDS
UPD63712AGC
E
Fig. 1.1.1 APC
F
CX-3110 3
5 6 7 8
1 2 3 4
1.1.2 RF and RFAGC amplifiers
A
The photo-detector outputs (A + C) and (B + D) are added, amplified, and equalized inside this LSI, and then provided
as the RF signal from the RFI terminal. The RF signal can be used for eye-pattern check.
The low frequency component of the RFI voltage is:
RFO = (A + B + C + D) x 2
The RFO is used for the FOK generation circuit and RF offset adjustment circuit.
The RFI output from the pin 71 is A/C-coupled outside this LSI, and returned to the pin 76 of this LSI. The signal is
amplified in the RFAGC amplifier to obtain the RFAGC signal. This LSI is equipped with the RFAGC auto-adjustment
function as explained below. This function automatically controls the RFO level to keep at 1.5V by switching the feed-
back gain for the RFAGC amplifier.
B The RFO signal is also used for the EFM, DFCT, MIRR, and RFAGC auto-adjustment circuits.
R1
CD CORE UNIT
UPD63712AGC
78
77
2p
RF- 74
AGCI
RFO
3p
RF2- 75
20 p 1.2 k
EQ2
72
47 p 1.2 k
5k 5k 73
EQ1
3.55 k
+ +
-
- - 76
+ AGCO
15.2 k
44 k 20 k 11.75 k
15.2 k
C To DEFECT/A3T detection
RFOFF setup
For RFOK generation
Pickup Unit
R2
VREF
P2 +
61 k
- +
P4 -
A+C A + FEO
13 13 82 93
P8 10 k 8.8 k -
VREF C 83 140 k
10 k FE A/D
+ 61 k FE-
P3 92
-
P7 FEOFF setup
B+D D
6 6 85
P9 10 k 8.8 k
B 84
10 k
VREF
D
Fig. 1.1.2 RF/AGC/FE
E
F
4 CX-3110
1 2 3 4
5 6 7 8
1.1.3 Focus error amplifier
A
The photo-detector outputs (A + C) and (B + D) are applied to the differential amplifier and the error amplifier to obtain
the (A + C - B - D) signal, which is then provided from the pin 93 as the FE signal.
The low frequency component of the FE voltage is:
FE = (A + C - B - D) x 8.8k/10k x 111k/61k x 160k/72k
= (A + C - B - D) x 3.55
The FE output shows 1.5Vp-p S-shaped curve based on the REFO. For the next-stage amplifiers, the cutoff frequency
is 14.6kHz.
1.1.4 RFOK
The RFOK circuit generates the RFOK signal, which indicates focus-close timing and focus-close status during the play B
mode, and outputs from the pin 6. This signal is shifted to "H" when the focus is closed and during the play mode.
The DC level of the RFI signal is peak-held in the digital block and compared with a certain threshold level to generate
the RFOK signal. Therefore, even on a non-pit area or a mirror-surface area of a disc, the RFOK becomes "H" and the
focus is closed.
This RFOK signal is also applied to the microcomputer via the low-pass filer as the FOK signal, which is used for pro-
tection and RF amplifier gain switching.
1.1.5 Tracking error amplifier
The photo-detector outputs E and F are applied to the differential amplifier and the error amplifier to obtain the (E - F) C
signal, and then provided from the pin 96 as the TE signal.
The low frequency component of the TE voltage is:
TEO = (E - F) x 63k/112k x 160k/160k x 181k/45.4k x 160k/80k
= (E - F) x 4.48
The TE output provides the TE waveform of about 1.16Vp-p based on the REFO. For the next-stage amplifiers, the cut-
off frequency is 21.1kHz.
UPD63712AGC
CD CORE UNIT
TE A/D D
TEO
TEOFF setup + 96
-
Pickup Unit
+ 33 p
- 80 k 160 k
TE-
+ 95
- 45.4 k 161 k
P5
E E 87
11 11
P10 112 k 63 k
VREF +
TE2
- 45.4 k + 97
-
+
- 160 k 160 k R1
P1 20 k 60 k
F F 86
9 9
P6 112 k 63 k
TEC
98
-
Inside TEC
+
VREF E
Fig. 1.1.3 TE
F
CX-3110 5
5 6 7 8
1 2 3 4
1.1.6 Tracking zero-cross amplifier
A
The tracking zero-cross signal (hereinafter TEC signal) is obtained by amplifying the TE signal 4 times, and used to
detect the tracking-error zero-cross point.
By using the information on this point, the following two operations can be performed:
1. Track counting in the carriage move and track jump modes
2. Sensing the lens-moving direction at the moment of the tracking close (The sensing result is used for the tracking
brake circuit as explained below.)
The frequency range of the TEC signal is between 300Hz and 20kHz.
TEC voltage = TE level x 4
The TEC level can be calculated at 4.64V. This level exceeds the D range of the operation amplifier, and the signal gets
B clipped. However, it can be ignored because the CD LSI only uses the signal at the zero-cross point.
1.1.7 EFM
The EFM circuit converts the RF signal into a digital signal expressed in binary digits 0 and 1. The AGCO output from
the pin 76 is A/C-coupled in the peripheral circuit, fed back to the LSI from the pin 71, and sent to the EFM circuit inside
the LSI.
On scratched or dirty discs, part of the RF signal recorded may be missing. On other discs, part of the RF signal
recorded may be asymmetric, which was caused by dispersion in production quality. Such lack of information cannot
be completely eliminated by this AC coupling process. Therefore, by utilizing the fifty-fifty occurrence ratio of binary
C digits (0 and 1) in the EFM signal, the EFM comparator reference voltage ASY is controlled, so that the comparator
level always stays around the center of the RFO signal. The reference voltage ASY is made from the EFM comparator
output via the low-pass filter. The EFM signal is put out from the pin 68.
UPD63712AGC
Vdd
ASY
40 k 69
D EFM signal
RFI
71
+
68 EFM
- 2k
Vdd 40 k
+
40 k -
+
- 1.5 k 7.5 k
40 k
E
Fig. 1.1.4 EFM
F
6 CX-3110
1 2 3 4
5 6 7 8
1.2 SERVO BLOCK (UPD63712AGC: IC201) A
The servo block controls the servo systems for error signal equalizing, in-focus, track jump and carriage move and so
on. The DSP block is a signal-processing block, where data decoding, error correction, and compensation are per-
formed.
After A/D-converted, the FE and TE signals (generated in the preamplifier block) are applied to the servo block and
used to generate the drive signals for the focus, tracking, and carriage servos.
The EFM signal is decoded in the DSP block, and finally sent out as the audio signal after D/A-converted. In this
decoding process, the spindle servo error signal is generated, supplied to the spindle servo block, and used to gener-
ate the spindle drive signal.
The drive signals for focus, tracking, carriage, and spindle servos (FD, TD, SD, and MD) are provided as PWM3 data,
B
and then converted to the analog data by the low-pass filter in the driver IC BA5835FP (IC301). These analog drive sig-
nals can be monitored by the FIN, TIN, CIN, and SIN signals respectively. Afterwards, the signals are amplified and
applied to each servo's actuator and motor.
1.2.1 Focus servo system
In the focus servo system, the digital equalizer block works as its main equalizer. The figure 1.2.1 shows the block dia-
gram of the focus servo system.
To close the focus loop circuit, the lens should be moved to within the in-focus range. While moving the lens up and
down by using the focus search triangular signal, the system tries to find the in-focus point. In the meantime, the spin-
dle motor rotation is kept at the prescribed one by using the kick mode. C
The servo LSI monitors the FE and RFOK signals and automatically performs the focus close operations at an appropri-
ate timing. The focus loop will close when the following three conditions are satisfied at the same time:
1) The lens moves toward the disc surface.
2) The RFOK signal is shifted to "H".
3) The FE signal is zero-crossed. At last, the FE signal comes to the zero level (or REFO).
When the focus loop is closed, the FSS bit is shifted from "H" to "L". The microcomputer starts monitoring the RFOK
signal obtained through the low-pass filter 10msec after that.
If the RFOK signal is detected as "L", the microcomputer will take several actions including protection.
The timing chart for focus close operations is shown in fig. 1.2.2. (This shows the case where the system fails focus D
close.)
In the test mode, the S-shaped curve, search voltage, and actual lens movement can be confirmed by pressing the
focus close button when the focus mode selector displays 01.
UPD63712AGC BA5835FP
A+C 82
FE DIG.
A/D
B+D 85 AMP EQ
12 FOP
FD E
PWM 52 6 LENS
CONTROL
FOCUS SEARCH 11 FOM
TRIANGULAR
WAVE GENERATOR
Fig. 1.2.1 Block diagram of the focus servo system
F
CX-3110 7
5 6 7 8
1 2 3 4
A
Search start
Output from FD terminal
The broken line in the figure is assumed in the case
A blind period without focus servo.
FE controlling signals
B
You can ignore this for blind periods.
FSS bit of SRVSTS1 resistor
RFOK signals
The status of focus close is judged from the statuses
of FSS and RFOK after about 10mS.
C
Fig. 1.2.2 Timing chart for focus close operations
1.2.2 Tracking servo system
In the tracking servo system, the digital equalizer block is used as its main equalizer. The figure 1.2.3 shows the block
diagram of the tracking servo system.
(a) Track jump
Track jump operation is automatically performed by the auto-sequence function inside the LSI with a command from
D the microcomputer. In the search mode, the following five track jump modes are available: 1, 4, 10, 32, and 32*3
In the test mode, 1, 32, and 32*3 track jump modes, and carriage move mode are available and can be switched by
selecting the mode.
For track jumps, first, the microcomputer sets about half the number of tracks to be jumped as the target. (Ex. For 10
track jumps, it should be 5 or so.) Using the TEC signal, the microcomputer counts up tracks. When the counter
reaches the target set by the microcomputer, a brake pulse is sent out to stop the lens. The pulse width is determined
by the microcomputer. Then, the system closes the tracking loop and proceeds to the normal play. At this moment, to
make it easier to close the tracking loop, the brake circuit is kept ON for 50msec after the brake pulse, and the tracking
servo gain is increased.
E In the normal operation mode, the FF/REW operation is realized by continuously repeating single jumps about 10
times faster than the normal single jump operation.
(b) Brake circuit
The brake circuit stabilizes the servo-loop close operation even under poor conditions, especially in the setting-up
mode or track jump mode. This circuit detects the lens-moving direction and emits only the drive signal for the oppo-
site direction to slow down the lens. Thus, this makes it easier to close the tracking servo loop. The off-track direction
is detected from the phases of the TEC and MIRR signals.
F
8 CX-3110
1 2 3 4
5 6 7 8
A
UPD63712AGC BA5835FP
E 87
TE DIG.
A/D
F AMP EQ
86 13 TOP
TD LENS
PWM 3
CONTROL 54
14 TOM
JUMP
PARAMETERS
B
Fig. 1.2.3 Block diagram of the tracking servo system
BRAKE
t2
TD C
t1
KICK
TEC
ON
T. BRAKE
OFF
GAIN UP
EQUALIZER GAIN NORMAL D
NORMAL
OPEN
T. SERVO
CLOSED
Fig. 1.2.4 Single-track jump
E
F
CX-3110 9
5 6 7 8
1 2 3 4
A t1
TD
t2
TEC
(10 TRACK)
GAIN UP
EQUALIZER 50mS
NORMAL
ON
T. BRAKE
OFF
B OPEN
SERVO
CLOSED
SD
t
2.9mS (4.10 TRACK JUMP)
5.8mS (32 TRACK JUMP)
Fig. 1.2.5 Multi-track jump
C
LENS MOVING FORWARDS LENS MOVING BACKWARDS
(INNER TRACK TO OUTER)
TEC
TZC
D (TEC "SQUARED UP" )
(INTERNAL SIGNAL )
MIRR
MIRR LATCHED AT
TZC EDGES
=
SWITCHING PULSE
E EQUALIZER OUTPUT
(SWITCHED)
DRIVE DIRECTION REVERSE FORWARD
Time
Note : Equalizer output assumed to hava same phase as TEC.
F
Fig. 1.2.6 Track brake
10 CX-3110
1 2 3 4
5 6 7 8
1.2.3 Carriage servo system
A
In the carriage servo system, the low frequency component from the tracking equalizer (the information on the lens
position) is transferred to the carriage equalizer, where the gain is increased to a certain level, and then sent out from
the LSI as the carriage drive signal. This signal is applied to the carriage motor via the driver IC.
During the play mode, when the lens offset reaches a certain level, it is necessary to move the pickup toward the FOR-
WARD direction. The equalizer gain is adjusted so that the output over the carriage motor starting voltage is sent out
in such a case. In actual operations, only when the equalizer output exceeds the threshold level preset in the servo
LSI, the drive signal is sent out. This can reduce the consumption power.
With an eccentric disc loaded, before the whole pickup starts moving, the equalizer output may exceed the threshold
level a few times. In this case, the drive signal applied from the LSI shows pulse-like waveforms.
B
UPD63712AGC BA5835FP
From DIG.
TRACK EQ. EQ
18 LCOP
SD
PWM 56 24
CONTROL M
17 LCOM
KICK, BRAKE
CARRIAGE
REGISTERS
MOTOR
C
Fig. 1.2.7 Block diagram for the carriage servo block
TRACKING DRIVE
(LOW FREQUENCY) D
LENS POSITION
DRIVE ON/OFF THRESHOLD
CRG DRIVE
(INSIDE UPD63711GC)
E
CRG MOTOR VOLTAGE
CARRIAGE MOVED AT THESE POINTS
Fig. 1.2.8 Waveforms of the carriage signal
F
CX-3110 11
5 6 7 8
1 2 3 4
1.2.4 Spindle servo system
A
In the spindle servo system, the following six modes are available:
1) Kick
Used to accelerate the disc rotation in the setting-up mode.
2) Offset
a. Used in the setting-up mode until the AGC completes after the kick mode.
b. Used when the focus loop is unlocked during the play mode and until it is locked again.
In both cases, the mode is to keep the disc rotation near to the appropriate one.
3) Applicable servo
In the normal operation, the CLV servo mode is used.
B The EFM demodulation block detects through WFCK/16 sampling whether or not the frame sync signal and the inter-
nal frame counter output are synchronized, and generates the status signal based on the sampling result, synchro-
nized or non-synchronized. If eight consecutive "non-sync" signals are obtained, the system senses the status as "non-
sync". If not, the system senses as "sync". In the applicable servo mode, the leading-in servo mode is automatically
selected at the non-sync status, and the normal servo mode is at the sync status.
4) Brake
Used to stop the spindle motor.
In accordance with the microcomputer's command, the brake voltage is sent out from the servo LSI. At this moment,
the EFM waveform is being monitored in this LSI. When the longest EFM pattern exceeds a certain cycle (or the rota-
C
tion slows down enough), a flag is set inside the LSI, and the microcomputer switches off the brake voltage. If a flag is
not set within a certain period, the microcomputer shifts the mode from the brake mode to the stop mode, and keeps
this for a certain period. In the eject mode, after the mode is shifted to the stop mode and a certain period passes, the
loaded disc is ejected.
5) Stop
Used when the power is turned on and during the eject mode. At this moment, the voltage through the spindle motor
is 0V.
6) Rough servo
Used when the carriage is moved (or in the carriage move mode such as long search).
By obtaining the linear velocity from the EFM waveform, "H" or "L" is applied to the spindle equalizer. In the test
D mode, this mode is used for grating confirmation.
UPD63712AGC BA5835FP
SPEED ERROR SIGNAL
16 SOP
DSP DIG. MD
EFM PWM 58 26 M
SIGNAL BLOCK EQ
15 SOM
SPINDLE
E MOTOR
PHASE ERROR SIGNAL
Fig.1.2.9 Block diagram of the spindle servo system
F
12 CX-3110
1 2 3 4
5 6 7 8
1.3 AUTOMATIC ADJUSTMENT FUNCTION A
This system automatically handles the circuit adjustment inside the CD LSI. All adjustments are performed whenever
a disc is inserted or the CD mode is selected by pressing the source key. Each adjustment will be explained below.
1.3.1 TE, FE, and RF offset auto-adjustment
This adjustment is made to adjust the offsets of the TE, FE, and RF amplifiers in the preamplifier block to their target
values on the basis of the REFO when the power is turned on. (The target values for TE, FE, and RE offsets are 0V, 0V,
and -0.8V respectively.)
1) With the LD OFF status, the external microcomputer reads each offset through the servo LSI.
B
2) The microcomputer calculates the voltages for correction from the measured values, and inputs the calculated
results as the offset adjustment values.
1.3.2 Tracking balance (T.BAL) auto-adjustment
This adjustment is to equalize the pickup output offsets for E-ch and F-ch by changing the amplifier gain inside the LSI.
Actually, the gain is adjusted so that the TE waveform becomes symmetrical on each side of the REFO.
1) The focus loop is closed.
2) The lens is kicked in the radial direction to make certain that the TE waveform is generated.
3) The microcomputer reads the TE offset calculated in the LSI through the servo LSI. C
4) The microcomputer takes either of the following steps depending on the calculated offset: