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A B C D E
Compal Confidential
Model Name : Q3ZMC
File Name : LA-8481P
1 1
Compal Confidential
2 2
Q3ZMC UMA M/B Schematics Document
Intel Ivy/Sandy Bridge SFF BGA 1023p Processor
/Panther Point 989p PCH
/ DDR3L Memory Down *8
3 2012-04-11 3
REV:1.0(MP SMT)
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/4/6 2013/4/6 Title
Issued Date Deciphered Date Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Q3ZMC M/B LA-8481P Schematic
Date: Thursday, April 12, 2012 Sheet 1 of 51
A B C D E
A B C D E
PCB
ZZZ1
LA-8481P
DAZ0NS00100
1
DDR3L-ON BOARD 1
Memory BUS(DDR3L)
Fan Control eDP Conn. Intel
page 34 Two Channel
page 22 Ivy Bridge ULV
1.35V DDR3L 1333Mhz
eDP 120MHz Processor
BGA1023 page 11,12
page 4~10
FDI x8 DMI x4 USB 3.0 conn x2 Debug Port Camera Bluetooth mSATA
USB3.0 port 1,2 (Reserve)
Thunderbolt HDMI Conn. USB2.0 port 0,1 USB port 9 USB port 10 USB port 8 USB port 12
100MHz 100MHz
page 31 page 31 page 22 page 28 page 28
page 24~27 page 23 2.7GT/s 1GB/s x4
USBx14 3.3V 48MHz
2
Intel 2
TMDS HD Audio 3.3V 24MHz
DP Panther Point-M
PCH SPI D/B
PCI-Express x 8 (PCIE2.0 5GT/s) 100MHz HDA Codec
989pin BGA ALC271X-VB6/ALC281X
port 5~8 port 2 port 1 100MHz page 32
page 13~21 LPC
Thunderbolt WLAN Card reader SATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)
page 22 port 0 TPM SPI ROM x2 Int. Speaker x 2 Int. DMIC x 1 Phone Jack x 1
page 24~27 page 28
page 30 page 13
page 32 page 32 page 32
mSATA
LPC BUS
page 29
3 3
33MHz
ENE
KB930/KB9012
page 33
RTC CKT. LS-8481P Audio/B
page 13 page 32
Touch Pad Int.KBD
page 33 page 33
Power On/Off CKT. LS-8482P Card Reader/B
page 33 page 22
EC ROM x1
DC/DC Interface CKT. LS-8483P LED/B @ for page 33
KB930
page 35 page 32
4 4
Power Circuit DC/DC LS-8484P Battery/B
page 36~45
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/4/6 2013/4/6 Title
Issued Date Deciphered Date Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Q3ZMC M/B LA-8481P Schematic
Date: Thursday, April 12, 2012 Sheet 2 of 51
A B C D E
A B C D E
Voltage Rails
Power Plane Description S1 S3 S5 SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
VIN Adapter power supply (19V) N/A N/A N/A
BATT+ Battery power supply (12.6V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON
B+ AC or battery power rail for power circuit. N/A N/A N/A
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON*
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
+VGFX_CORE Core voltage for UMA graphic ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+1.05VS_VTT +1.05VS_VTTP to +1.05VS_VTT switched power rail for CPU ON OFF OFF
+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCH ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.35V +1.35VP to +1.35V power rail for DDR3L ON ON OFF
+1.35VS +1.35V to +1.35VS switched power rail ON OFF OFF
+0.675VS +0.675VSP to +0.675VS switched power rail for DDR3L terminator ON OFF OFF Board ID / SKU ID Table for AD channel
+1.5VS +1.5VSP to +1.5VS power rail for PCH ON OFF OFF Vcc 3.3V +/- 5%
+1.8VS +3VALW to 1.8VS switched power rail for PCH ON OFF OFF Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW +3VALWP to +3VALW always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3VALW_PCH +3VALW to +3VALW_PCH power rail for PCH (Short Resistor) ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3VS +3VALW to +3VS power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VALW +5VALWP to +5VALW always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VS +5VALW to +5VS switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
2 2
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
BOARD ID Table BTO Option Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BTO Item BOM Structure
Board ID PCB Revision
Unpop @
0 0.1,0.2
EC SM Bus1 address EC SM Bus2 address Connector CONN@
1 0.3 DVT:unknown MCU+MKS Motor,With TB IC
UMA UMA@
2 0.4 PVT1:PADAUK MCU+MKS Motor,Without TB IC
Device Address Device Address CPU IVB@
3 0.4 PVT2:PADAUK MCU+MKS Motor,With TB IC
Smart Battery 0001 011X b PCH HM77@
4 1.0
PCH SM Bus address DDR3 DDR3@
5
DDR3L DDR3L@
6
Device Address On Board DRAM X76@
ChannelA
7
A0 1010 000X 128bit RAM 128@
ChannelB A4 1010 010X eDP eDP@
3 LVDS LVDS@ 3
USB Port Table
BOM Config 2 External
USB 2.0 USB 1.1 Port USB Port
4319HNBOL01:UMA@/DDR3L@/eDP@/USB3.0@/9012@/TB@/IVB@/HM77@/DS3@/TXM@/TPM@/128@/
4319HNBOL02:UMA@/DDR3L@/eDP@/USB3.0@/9012@/TB@/IVB@/HM77@/DS3@/TXM@/TPM@ USB2.0 Conn USB2.0@
0 USB port (Rear side 3.0)
UHCI0 USB3.0 Conn USB3.0@
1 USB port (Rear side 3.0)
Thunderbolt TB@
2
UHCI1
3
EHCI1 KB930 930@
4
UHCI2 KB9012 9012@
5
6
UHCI3 Normal S3 S3@
7
Deep S3 DS3@
8
UHCI4
9 Debug Port
TPM+TCM TXM@
10 Camera
EHCI2 UHCI5 TPM TPM@
11
4 TCM TCM@ 4
12 mSATA(Reserve)
UHCI6
13 BlueTooth
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/4/6 2013/4/6 Title
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Q3ZMC M/B LA-8481P Schematic
Date: Thursday, April 12, 2012 Sheet 3 of 51
A B C D E
A B C D E
+1.05VS_VTT
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
1
R532
24.9_0402_1%
PEG_ICOMPO signals should be routed with - max length = 500 mils-
UCPU1A
typical impedance = 14.5 mohms
2
1 G3 PEG_COMP 1
PEG_ICOMPI G1
M2 PEG_ICOMPO G4
<15> DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO G3,W=4mil,S=15mil,L=500mil
<15> DMI_CRX_PTX_N1 P6 G1,W=12mil,S=15mil,L=500mil
P1 DMI_RX#[1]
<15> DMI_CRX_PTX_N2 DMI_RX#[2] G4,W=4mil,S=15mil,L=500mil
<15> DMI_CRX_PTX_N3 P10 H22
DMI_RX#[3] PEG_RX#[0] J21
N3 PEG_RX#[1] B22
UMA only=>PEG NC
<15> DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2]
<15> DMI_CRX_PTX_P1 P7 D21
DMI_RX[1] PEG_RX#[3]
DMI
DMI
<15> DMI_CRX_PTX_P2 P3 A19
P11 DMI_RX[2] PEG_RX#[4] D17
<15> DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] B14
K1 PEG_RX#[6] D13
<15> DMI_CTX_PRX_N0 DMI_TX#[0] PEG_RX#[7]
M8 A11
<15> DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8]
N4 B10
<15> DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9]
R2 G8
<15> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] A8
K3 PEG_RX#[11] B6
<15> DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12]
M7 H8
<15> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13]
P4 E5
<15> DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14]
T3 K7
<15> DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15]
K22
PEG_RX[0] K19
PEG_RX[1] C21
U7 PEG_RX[2] D19
<15> FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3]
W11 C19
<15> FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4]
W1 D16
<15> FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5]
AA6 C13
<15> FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6]
2 W6 D12 2
<15> FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7]
V4 C11
PCI EXPRESS -- GRAPHICS
<15> FDI_CTX_PRX_N5 FDI1_TX#[1] PEG_RX[8]
Y2 C9
<15> FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9]
AC9 F8
<15> FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
Intel(R) FDI
Intel(R) FDI
C8
PEG_RX[11] C5
U6 PEG_RX[12] H6
<15> FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13]
W10 F6
<15> FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14]
W3 K6
<15> FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15]
AA7
<15> FDI_CTX_PRX_P3 FDI0_TX[3]
W7 G22
<15> FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0]
T4 C23
<15> FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1]
AA3 D23
<15> FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2]
AC8 F21
<15> FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] H19
+1.05VS_VTT AA11 PEG_TX#[4] C17
<15> FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
eDP_COMPIO and ICOMPO signals <15> FDI_FSYNC1 AC12 K15
FDI1_FSYNC PEG_TX#[6] F17
should be shorted near balls and U11 PEG_TX#[7] F14
<15> FDI_INT FDI_INT PEG_TX#[8]
routed with typical impedance PEG_TX#[9]
A15
1
AA10 J14
<25 mohms R118
<15> FDI_LSYNC0
AG8 FDI0_LSYNC PEG_TX#[10] H13
<15> FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11]
should not be left floating 24.9_0402_1% M10
PEG_TX#[12] F10
,even if disable eDP function... PEG_TX#[13] D9
2
PEG_TX#[14] J4
W=4mil,S=15mil,L=500mil PEG_TX#[15]
EDP_COMP AF3
AD2 eDP_COMPIO F22
W=12mil,S=15mil,L=500mil eDP_ICOMPO PEG_TX[0]
EDP_HPD# AG11 A23
3 eDP_HPD# PEG_TX[1] D24 3
PEG_TX[2] E21
AG4 PEG_TX[3] G19
<22> EDP_AUXN eDP_AUX# PEG_TX[4]
AF4 B18
Add eDP circuit <22> EDP_AUXP eDP_AUX PEG_TX[5] K17
PEG_TX[6]
eDP
eDP
G17
+1.05VS_VTT AC3 PEG_TX[7] E14
<22> EDP_TXN0 eDP_TX#[0] PEG_TX[8]
AC4 C15
<22> EDP_TXN1 eDP_TX#[1] PEG_TX[9]
AE11 K13
eDP_TX#[2] PEG_TX[10]
1
AE7 G13
R809 eDP_TX#[3] PEG_TX[11] K10
eDP@ 1K_0402_5% AC1 PEG_TX[12] G10
<22> EDP_TXP0 eDP_TX[0] PEG_TX[13]
AA4 D8
<22> EDP_TXP1 eDP_TX[1] PEG_TX[14]
AE10 K4
2
AE6 eDP_TX[2] PEG_TX[15]
EDP_HPD# eDP_TX[3]
<22> EDP_HPD#
IVY-BRIDGE_BGA1023
IVB@
ULV type P/N:
1.SA00005B000:S IC AV8063801057400 QBP7 K0 1.7G BGA
2.SA00005AZ30:S IC AV8063801057401 QBTP K0 1.5G BGA
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/4/6 2013/4/6 Title
Issued Date Deciphered Date PROCESSOR(1/7) DMI,FDI,PEG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN