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8. Circuit Diagram

8.1 BB_MAIN
1 2 3 4 5 6 7 8 9 10

CTS CAM_HOLD UPR
C101 1000p
RTS PCM_TX VBAT VBAT
R101 220K




PCM_SYNC
INDLED_G
INDLED_R
RXD FOLDER




PCM_CLK
R103 R102




PCM_RX




SPK_EN
TXD MELODY_INT C102 33K




LCD_ID
10K




BCLKX
SD_IRDA RF_EN 15p




DSR
2 1 V_RTC
RX_IRDA C103 26MHz
TX_IRDA LCD_RESET 10p PWON
3 4
RX C104 RPWON
X101 C105 0.1u




TP105
TX 32.768KHz MC-146 PCHG
15p VCCS
R104 VBATS AA
A
R105 C106 100K VCHG
10K 0.1u ICTL
MCLK




M10
N10


N11




C13




C12
P11




A13
A12




A14


B13

E13
F12
L10
M9




M4




M2
N9

C8
D8
C7




C9
D9




N3




N2
K8

P9




A8
B8

B9
A9
E8




K9




P3




K7
L9




L4




L7
TDI




SDO
SDI
SCLK
NSCS0
NSCS1

TX_IRDA
RX_IRDA
TXIR_IRDA
RXIR_IRDA
SD_IRDA

TX_MODEM
RX_MODEM
RTS_MODEM
CTS_MODEM
DSR_MODEM

MCSI_TXD_IO9
MCSI_RXD_IO10
MCSI_CLK_IO11
MCSI_FSYNCH_IO12

BCLKX
BCLKR
IO2
IO3
IO0
IO1

RFEN
TCSOEN

NRESET_OUT_IO7
IDDQ

BU
LT

VSSO
OSC32K_IN

OSC32K_OUT

CLKTCXO
CLK13M_OUT
CLK32K_OUT
TDO_ARM
TCK
TMS
H10
LCD_BACKLIGHT TSPDI_IO4
H11
S_DATA TSPDO TDO
J14 AVL5M02-200
S_CLK TSPCLKX
H13 VA101




H8




D5

C5




D6
TSPEN0




A8

B7

A7

E2

E4

B5




A5
F8

F7
H12 R106 N.A
S_EN TSPEN1 10K
H14 N1




PWON

RPWON

TESTRESETZ

VREF

IBIAS

REFGND

CK32K

CK13M

PCHG

VCCS

VBATS

VCHG

ICTL
TP104
TSPEN2 NIBOOT
G12
TSPEN3
M12 F10 E3 C107
PDNB TSPACT0 ON_OFF ONNOFF 0.033u
M14 D12 R107 D3
PA_ON TSPACT1 RESPWRONZ RESPWONZ
L12 B14 0 D2
PA_BAND TSPACT2 IT_WAKEUP ITWAKEUP
L13 M3 E6 K4
VC1 TSPACT3 EXT_IRQ INT2 APC APC
J10 J4
VC2 TSPACT4 AFC AFC
K11 P1 H6 H4
VC3 TSPACT5 EXT_FIQ INT1 DAC
K13
TSPACT6
B K12 G3 D9 BB
TSPACT7 TDR BULIP TXIP
K14 D11 H1 D10
TSPACT8 NBSCAN _BSCAN TEN BULIM TXIN
J11 J6 C10
TSPACT9 TEST3 BULQP TXQP
J12 B11 F6 C9
TSPACT10 NEMU0 TEST4 BULQM TXQN
J13 E10 F9
TSPACT11 NEMU1 BDLIP RXIP
A(22) D2 D10 E7 F10
ADD22 TDI TDO BDLIM RXIN
A(21) L3 C10 D7 E10
ADD21 TDO TDI BDLQP RXQP
A(20) L2 B10 D8 E9
ADD20 TCK TCK BDLQM RXQN
A(19) L1 E9 E8
ADD19 TMS TMS
A(18) J5 J9
ADD18 EARP RCV_P
A(17) K4 L11 K2 J10
ADD17 BFSR BFSX EARN RCV_N
A(16) K2 K10 J2 K9
ADD16 BDR BDX U101 AUXOP AUXOP
U102
A(15) K3 P12 H3 K10
ADD15 BFSX BFSR AUXON AUXON
A(14) J4 M11 J3 G7
ADD14 BOX BDR TWL3014 AUXI AUXI
D751992GHH
A(13) J3 H9
ADD13 HSO HSO
A(12) J2 P14 F5 K7
ADD12 VDX VDR HSMICP HSMICP
A(11) J1 N13 H5 K8
ADD11 VDR VDX HSMICBIAS HSMICBIAS
A(10) H5 M13 G5 G6
ADD10 VSFRX VFS GNDAV
A(9) H4 N12 K3 J7
ADD9 VCLKRX VCK MICIP MICP
A(8) H2 H7
ADD8 MICIN MICN
A(7) H3 N7 J5 J8
ADD7 MCUDI UDX MICBIAS MICBIAS
A(6) H1 M7 K5
ADD6 MCUDO UDR
A(5) G3 M8 K6
ADD5 MCUEN0 UEN
A(4) G2 P8 C4
C ADD4 MCUEN1_IO8 IFMODE SIMCK SIM_CLK C
A(3) G4 L8 B3
ADD3 MCUEN2_IO13 HANDSFREE SIMIO SIM_IO
A(2) G5 E5 D4
ADD2 DBBSIO SIMRST SIM_RST
A(1) F2 G13 F4
ADD1 SIM_IO DBBSCK
F3 F13 G4 B6
A(1:22) TP101 ADD0 SIM_CLK DBBSRST ADIN1 JACK_DETECT
G10 A6
SIM_RST ADIN2 BATT_TEMP
D(15) B3 B8 C7
DATA15 R108 V_IO LEDA ADIN3 TEMPSENSE
D(14) A3 F14 B10 C6
DATA14