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Order Number: MCUK980101G8
Technical Guide
G600 Personal Cellular Telephone Handheld portable EB-G600 Car mount kit EB-HF600Z Easy fit car mount kit EB-HF600Z Dual charger EB-CR600
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This Technical Guide is copyright and issued on the strict understanding that it is not to be reproduced, copied, or disclosed to any third party, either in whole or part, without the prior written consent of Matsushita Communication Industrial UK Ltd. Every care has been taken to ensure that the contents of this manual give an accurate representation of the equipment. However, Matsushita Communication Industrial UK Ltd. accepts no responsibility for inaccuracies that may occur and reserves the right to make changes to specification or design without prior notice. The information contained in this manual and all rights in any designs disclosed therein, are and remain the exclusive property of Matsushita Communication Industrial UK Ltd. Other patents apply to material contained in this publication: BULL CP8 PATENTS Comments or correspondence concerning this manual should be addressed to: Customer Support Department, Matsushita Communication Industrial UK Ltd., Colthrop, Thatcham, Berkshire. RG19 4ZD. ENGLAND © 1998 Matsushita Communication Industrial UK Ltd.
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MCUK980101G8 Technical Guide
TABLE OF CONTENTS
1 INTRODUCTION
1.1 1.2 Purpose of this Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Structure of the Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
2
INTERFACES AND TEST POINTS
2.1 2.2 2.3 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
3
RF OVERVIEW
3.1 3.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
4
TRANSMITTER
4.1 4.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
5
RECEIVER
5.1 5.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2
6
BASEBAND OVERVIEW
6.1 6.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
7
GEMINI
7.1 7.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
8
VEGA
8.1 8.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1 Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
9
POWER SUPPLIES
9.1 9.2 9.3 9.4 9.5 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
10
ACCESSORIES
10.1 10.2 Handsfree Unit - Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1 Dual Charger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
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WARNINGS AND CAUTIONS
WARNING
The equipment described in this manual contains polarised capacitors utilising liquid electrolyte. These devices are entirely safe provided that neither a short-circuit nor a reverse polarity connection is made across the capacitor terminals. FAILURE TO OBSERVE THIS WARNING COULD RESULT IN DAMAGE TO THE EQUIPMENT OR, AT WORST, POSSIBLE INJURY TO PERSONNEL RESULTING FROM ELECTRIC SHOCK OR THE AFFECTED CAPACITOR EXPLODING. EXTREME CARE MUST BE EXERCISED AT ALL TIMES WHEN HANDLING THESE DEVICES.
CAUTION
The equipment described in this manual contains electrostatic sensitive devices (ESDs). Damage can occur to these devices if the appropriate handling procedure is not adhered to.
ESD Handling precautions
A working area where ESDs may be safely handled without undue risk of damage from electrostatic discharge, must be available. The area must be equipped as follows: Working Surfaces - All working surfaces must have a dissipative bench mat, SAFE for use with live equipment, connected via a 1M2 resistor (usually built into the lead) to a common ground point. Wrist Strap - A quick release skin contact device with a flexible cord, which has a built in safety resistor of between 5k2 and 1M2 shall be used. The flexible cord must be attached to a dissipative earth point. Containers - All containers and storage must be of the conductive type.
Batteries
This equipment may contains an internal battery in addition to the external battery packs. These batteries are re-cyclable and should be disposed of in accordance with local legislation. They must not be incinerated, or disposed of as ordinary rubbish.
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MCUK980101G8 Technical Guide
INTRODUCTION
1
1.1
INTRODUCTION
Purpose of this Guide
This guide contains technical information for the Panasonic G600 personal cellular telephone system operating on the GSM network. Procedures for installing, operating and servicing (e.g. disassembly and testing) the telephone system are provided in the associated Service Manual.
1.2
Structure of the Guide
The guide is structured to provide service-engineering personnel with the following technical information on the GSM mobile telephone: 1. Interface details and relevant test points. 2. Functional description of each section of the mobile telephone. 3. Detailed description of each section of the mobile telephone.
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INTERFACES AND TEST POINTS
2
2.1 2.2
INTERFACES AND TEST POINTS
Introduction Interfaces
This section provides details on connections between the RF and Baseband PCB and other interfaces on G600.
2.2.1 Baseband and RF
This details the 50-way connector between the RF and baseband PCB.
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Signal Name BAT TEMP CHARGE ON GND TX AUDIO RX AUDIO GND nADP SENSE nHF SENSE LO2SEL BUZZBUZZ+ SIM RST SIM IO SIM CLK TX ON PA ON RF ON RX ON1 RX ON2 nRADIO_MUTE
Function Battery Temperature measurement signal Charge control signal for Dual Charger
Connection ADIN3 of VEGA(10bitAD)
Status
Extended I/O: Q(1)
H:Charge On L:Charge Off
TX AUDIO analogue signal RX AUDIO analogue signal
AUXIN of VEGA AUXOUT of VEGA
Optional Adaptor detection signal Handsfree connection sense signal 2nd Local Frequency control signal Buzzer control signal Buzzer control signal SIM Interface: Reset signal SIM Interface: I/O signal SIM Interface: Clock signal Transmitter block power control signal PA power control signal
ADIN4 of VEGA(10bitAD) L:HF connected H:HF disconnected L:RX 8 MON slot H:TX slot
IO(11) of GEMINI TSPACT(4) of GEMINI BUZZIN of Charge IC REGFB of Charge IC SIM RST of GEMlNI SIM I/O of GEMINI SIM CLK of GEMINI TSPACT(10) of GEMINI TSPACT(11) of GEMINI
6V MAX Depends on SIM Card 3.25/372=8736.56baud 3.25MHz clock H:On, L: Off H:On, L:Off H:On, L: Off H:On, L: Off H:On, L:Off L: Radio Mute Hi Z:Radio Un-Mute
RF common block power TSPACT(5) of GEMINI control signal Receiver block power control signal1 Receiver block power control signal2 TSPACT(6) of GEMINI TSPACT(7) of GEMINI
Radio Mute control signal Extended I/O: Q(4) for Car
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No. 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
Signal Name VIB_ON nON_HOOK PA_RAMP VBAT DCOUT D5V EXT_PWR VDD GND 13MHZCLK SERIAL_UP IGNITION SERIAL_DOWN nLOGIC_PWR nHF_ON BATID VREF_OUT DQX DQ DIX Dl GND OCE IFAGCEN PLL_STRB PLL_SD
Function Vibrator control signal ON HOOK detection signal RF Output power control signal of PA Battery Power Supply 3.5V DC/DC output power supply 5.0V DC/DC output power supply for SIM External Power Supply Power supply for Vibrator
Connection Extended I/O: Q(3) 10(9) of GEMINI APC of VEGA(5bitDA) BAT VOLT:ADIN1(10bitAD)
Status H: Vibration On L: Vibration Off H: Off Hook L: On Hook 64 step Li-lON: 7.2V Ni-MH: 4.8V 3.44V ±5% 5.0V ± 2.4%
nEXT_PWR: lO(2) of GEMINI
9.4V Max
13MHz Main (Master) Clock Serial Interface (Uplink) Ignition sense signal Serial Interface (Downlink) H/H power sense signal for Optional equipment HF Audio block control signal Battery Cell detection signal Vega reference voltage output signal for RF Downlink nQ signal Downlink Q signal Downlink nl signal Downlink I signal
MCLK (more than 0.5V) GEMINI USART(8251) nlGNITION: IO(4) of GEMINI GEMINI USART(8251) LOGIC_PWR: lO(1) of GEMINI Baud rate:115.2, 57.6, 38.4, 28.8, 19.2, 9.6(k) H: Ignition On, L(Hi Z): Ignition Off 8 bit, Even, 1 stop L: H/H Power On Hi Z: H/H Power Off
HF_ON: 10(3) of GEMINI L: HF Audio On Hi Z: HF Audio Off BAT ID :ADIN2 of VEGA(10bitAD) VMID of VEGA
Output Cancel Enable signal
BCAL=TSPACT(l) of GEMINI
H: Enable H: Enable L: Disable H: Enable L: Disable
IF AGC Enable signal for TSPEN(4) of GEMINI RX IC PLL serial interface signal: Strobe PLL and AGC serial interface signal: Data
Section 2 2-2
TSPACT(9) of GEMINI TSPDO of GEMINI
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INTERFACES AND TEST POINTS
No. 47 48 49 50 51 52 53 54 55 56 57 58 59 60
Signal Name PLL_CLK GND UQX UQ UI X UI PL_CONT VBAT DCOUT D5V EXT_PWR VDD GND AFC
Function PLL and AGC serial interface signal: Clock
Connection TSPCLK of GEMINI
Status
Uplink nQ signal Uplink Q signal Uplink nl signal Uplink I signal TX Power Level control signal Battery Power Supply 3.5V DC/DC output power supply 5.0V DC/DC output power supply for SIM External Power Supply Power supply for Vibrator nEXT PWR: IO(2) of GEMINI AFC of VEGA (13bitDA) IO(6) of GEMINI BAT VOLT: ADIN1(10bitAD) H: TX PL5~1 L: TX PL12~19 Li-ION: 7.2V Ni-MH: 4.8V 3.44V ± 5% 5.0V ± 2.4% 9.4V Max
TCVCXO Frequency Control signal
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INTERFACES AND TEST POINTS
2.2.2 External Interface
G600 has 2 external connectors, a multiway connector for use with a handsfree and data and additional contacts for the charging the battery pack while in the desk top charger. Both interfaces are electrically and mechanically compatible with G600.
Handsfree and data connector (J001)
PIN 1 2 3 4 5 6 7 8 9 10 11 Signal GND TX_AUDIO AUDIO_GND nHF_ON nADP_SENSE SERIAL_UP SERIAL_DOWN EXT_PWR GND RX_AUDIO nRADIO_MUTE Output Output Output Input Input Output Input Input Direction (from HH) Description Power supply and digital signal ground TX audio Audio signal ground Handsfree control signal (Lo=ON, Hi-Zo=OFF) Data adaptor select signal UART up (9600, 33.8kbps) UART down (9600, 33.8kbps) Power for charging Digital signal power supply ground RX audio signal (analogue) Radio mute (Lo=mute, Hi-Zo=Not muted) Handsfree select signal (Lo=Handsfree mode) Flash write enable and enable external peripheral (Lo=Enable flash write) Condition of ignition (Lo=off, Hi=on) Handheld state (Lo=off, Hi=on) Power amplifier control signal and external peripheral power supply
12
nHF_SENSE nFLASH_WE / PERF_PWR_ENBL IGNITION
Input
13
Output
14
Input
15
nLOGIC_PWR PERF_PWR / PA_ON
Output
16
Output
Charge Contacts
PIN 20 21 Signal EXT_PWR GND Description Power for charging Ground
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INTERFACES AND TEST POINTS
Battery Contacts
PIN T + S Signal TEMP BATT + BATT SENSE Description Battery temperature sense Battery positive Battery negative Battery Type Sensor
SIM Interface
PIN 1 2 3 4 5 6 7 8 SIGNAL GND 5V Not connected Reset Serial input/output Clock Not connected Not connected
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2.3
Test Points
2.3.1 Baseband
TP No. 402 403 404 405 406 407 412 413 414 415 416 420 421 422 423 424 425 426 427 428 429 430 31 432 433 434 435 436 Signal TO3 (U401 pin 88) TO0 (U401 pin 83) nRESET TCK (U401 pin 90) TMS (U401 pin 91) SIM_CLK_LO TO0 (U402 pin 63) TOD (U402 pin 62) TRST (U402 pin 24) TCK (U402 pin 64) TMS (U402 pin 61) VIB_ON TEST 1 (U402 pin 69) TEST 2 (U402 pin 68) TEST 3 (U402 pin 67) BL_VB_ON CHARGE_LED POLEOUT (U503 pin 18) MIC_N MIC_P REC_P REC_N TX_AUDIO RX_AUDIO 13MHzCLK PA_ON TX_ON RX_ON2
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INTERFACES AND TEST POINTS
TP No. 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467
Signal RX_ON1 OCE RF_ON LO2SEL nHF_TX_MUTE VREF_OUT SIM_CLK SIM_IO SIM_RST BAT_TEMP nADP_SENSE nHF_SENSE nON_HOOK nLOGIC_POWER IGNITION SERIAL_UP BATID nHF_ON SERIAL_DOWN CHARGE_ON KBC(0) KBC(1) KBC(2) KBC(3) KBC(4) KBR(4) KBR(3) KBR(2) KBR(1) KBR(0) nPOWKEY
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TP No. 468 469 470 501 502 503 504 505 506 507 508 510 512 513 514 516
Signal nRADIO_MUTE AFC PARAMP BUZON (U501 pin 19) REGF8 (U501 pin 15) nLV3 nRESET BUZZER PAGING_LED EXT_PWR VDD VBAT D5V DC_OUT D3V A3V
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INTERFACES AND TEST POINTS
2.3.2 RF
TP No. 1 2 4 5 7 8 9 10 11 13 15 16 17 18 19 20 21 22 24 25 27 28 30 31 32 33 34 35 36 38
MCUK980101G8 Technical Guide
Signal BAT_TEMP nCAHRGE_ON TX_AUDIO RX_AUDIO nADP_SENSE nHF_SENSE IFLSEL BUZZ BUZZ + PARAMP TX_ON PA_ON LO_EN RX_ON1 RX_ON2 nRADIO_MUTE VIB_ON nON_HOOK BATTERY + DC_OUT EXT_PWR V_VIB CKL3MI SERIAL_UP IGNITION SERIAL_DOWN nLOGIC_PWR nHF_DN BATT_ID DLQN
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INTERFACES AND TEST POINTS
TP No. 39 40 41 43 44 45 46 47 49 50 51 52 53 60 E901 E908
Signal DLQP DLIN DLIP BCAL IFAGCEN PLL_STR PLL_SD PLL_CLK ULQN ULQP ULIN ULIP PLL_CONT AFC GND
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MCUK980101G8 Technical Guide
RF OVERVIEW
3
3.1
RF OVERVIEW
Introduction
All the RF circuitry is contained on one PCB. The RF PCB has six layers made from FR4 material. Top and bottom layer tracks are gold-plated to prevent oxidization and enable better soldering. The board thickness is 1.0 mm (+0.0, -0.1mm). The majority of the components are on one side of the PCB leaving as much as possible of the opposite side to be a complete ground plane; this is used to provide RF shielding. The RF board is connected to the baseband digital board via a 60 way dual in-line connector. A metallised plastic chassis is used to separate the RF and the Logic PCB's. The chassis has no holes other than the one for the interface connector. The continuous chassis design is important for EMC purposes. When the chassis is sandwiched between the RF and the Logic PCB's the ground plane of the RF board together with the chassis forms an effective shielded enclosure, which prevents spurious emissions. The chassis has been designed to provide smaller walled sections, which are used to isolate sensitive areas from areas with high level RF signals.
3.2
Functional Description
The major building blocks for the RF design are the transmit (Tx) and receive (Rx) IC's, RF-IF dual PLL and the antenna subsystem.
Rx (935.2 - 959.8)MHz (1136.2 - 1160.8)MHz 201MHz I, Q outputs to baseband zero IF
RF VCO
IF VCO 402MHz for Rx 492MHz for Tx 2nd LO Rx /Tx switch
2
2
Tx (890.2 - 914.8)MHz I, Q modulation inputs from baseband
Figure 1: RF Block Diagram
600-0301
3.2.1 Functional Description of the PLL's
The G600 design employs two fixed IF LO's - 201MHz for Rx and 246MHz for Tx. They are generated at 402MHz and 496MHz using the IF part of the PLL IC. The IF VCO used is a discrete design and the VCO tuning frequency is selectable between 402MHz and 492MHz by means of switching the frequency determining inductors, L302+L303, by IFLOSEL control line. The RF LO is generated by the PLL formed by the RF part of the PLL IC MB15F02 and an external modular VCO. The use of a modular VCO improves the design repeatability.
3.2.2 Antenna
The antenna is a fixed helical type. A whip antenna may be connected to the RF path and provides better gain and minimizes the head effects on the antenna. The I/O connector incorporates a mechanical RF switch which routes the RF signal to the I/O connector for handsfree operation and test purposes.
3.2.3 Transmit and Receive
The transmit and receive paths of G600 are covered in their own specific chapters later in this manual.
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RF OVERVIEW
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MCUK980101G8 Technical Guide
TRANSMITTER
4
4.1
TRANSMITTER
Introduction
This section provides a technical description of the transmitter circuit of the RF circuit. A circuit diagram of the whole system is provided in Section 8 of the Service Manual.
4.1.1 Uplink Frequencies
CHANNEL NUMBERS 1-5 6-10 11-15 16-20 21-25 26-30 31-35 36-40 41-45 46-50 51-55 56-60 61-65 66-70 71-75 76-80 81-85 86-90 91-95 96-100 101-105 106-110 111-115 116-120 121-124 890.200 891.200 892.200 893.200 894.200 895.200 896.200 897.200 898.200 899.200 900.200 901.200 902.200 903.200 904.200 905.200 906.200 907.200 908.200 909.200 910.200 911.200 912.200 913.200 914.200 UPLINK FREQUENCIES (MHz) 890.400 891.400 892.400 893.400 894.400 895.400 896.400 897.400 898.400 899.400 900.400 901.400 902.400 903.400 904.400 905.400 906.400 907.400 908.400 909.400 910.400 911.400 912.400 913.400 914.400 890.600 891.600 892.600 893.600 894.600 895.600 896.600 897.600 898.600 899.600 900.600 901.600 902.600 903.600 904.600 905.600 906.600 907.600 908.600 909.600 910.600 911.600 912.600 913.600 914.600 890.800 891.800 892.800 893.800 894.800 895.800 896.800 897.800 898.800 899.800 900.800 901.800 902.800 903.800 904.800 905.800 906.800 907.800 908.800 909.800 910.800 911.800 912.800 913.800 914.800 891.000 892.000 893.000 894.000 895.000 896.000 897.000 898.000 899.000 900.000 901.000 902.000 903.000 904.000 905.000 906.000 907.000 908.000 909.000 910.000 911.000 912.000 913.000 914.000
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TRANSMITTER
4.2
Functional Description
The main building block in the Tx line-up is the transmitter IC U102 which provides a Class 4 (2 Watts) transmitter.
Figure 1: Transmitter IC U102
600-0401
The RF mixer is used to generate the GSM carrier, which is then modulated by the baseband I-Q signals in the quadrature modulator. The output from the quadrature modulator is buffered and is output differentially at about -8dBm. The RF LO is obtained from the same VCO that supplies the Rx LO, therefore the Tx IF frequency is 45MHz greater than the Rx IF frequency. The IF LO is generated by the same discrete VCO as the Rx IF VCO offset by 90MHz. The VCO frequency is divided by two by an on-chip divider to generate the required 246MHz. The output from Tx IC is filtered before and after the PA driver U1063. The amount of filtering provided ensures that the Tx spurii and the Tx noise in the Rx band are within GSM limits with sufficient margins. The PA amplifies the output from the PA driver to any required level up to PL5 (33dBm) at the antenna. The power level can be controlled as required in Phase II GSM in 2dB steps from 33dBm to 9dBm. To achieve the accuracy and time mask requirements for the output power, a closed loop power control design has been implemented. In this method, a portion of the output power is coupled into a detector. This sample is then compared with a ramp waveform whose rising and falling edges are precisely shaped to ensure that the frequency splash due to the fast turn on and off of the PA remains within specifications. The level of the ramp waveform determines output power level that needs to be transmitted. The output from the PA is filtered through a discrete low-pass filter to ensure that there is sufficient margin in the rejection of the second and third Tx harmonics as the duplexer rejection is not sufficient. For a typical output power of 33dBm at the antenna, assuming a typical loss of 1.5dB between the PA output and the antenna, the PA has an efficiency minimum of 40%.
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MCUK980101G8 Technical Guide
TRANSMITTER
4.2.1 Signal Levels
The signal levels through the transmitter IC are given below.
FL101
U103
FL102
U104 (PA)
Coupler
LPF
FL104
-2.5dB
35
+21.5dB
-2.5dB
+26.8dB
-0.3dB
-0.3dB
-0.9dB
30
25
20
15
10
5
0
-5
-10
-15
Figure 2: Typical Losses
600-0402
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MCUK980101G8 Technical Guide
RECEIVER
5
5.1
RECEIVER
Introduction
This section provides a technical description of the receiver section of the RF circuit. A circuit diagram of the whole system is provided in Section 8 of the Service Manual (Order No. MCUK980101C8).
5.1.1 Downlink Frequencies
CHANNEL NUMBERS 1-5 6-10 11-15 16-20 21-25 26-30 31-35 36-40 41-45 46-50 51-55 56-60 61-65 66-70 71-75 76-80 81-85 86-90 91-95 96-100 101-105 106-110 111-115 116-120 121-124 935.200 936.200 937.200 938.200 939.200 940.200 941.200 942.200 943.200 944.200 945.200 946.200 947.200 948.200 949.200 950.200 951.200 952.200 953.200 954.200 955.200 956.200 957.200 958.200 959.200 DOWNLINK FREQUENCIES (MHz) 935.400 936.400 937.400 938.400 939.400 940.400 941.400 942.400 943.400 944.400 945.400 946.400 947.400 948.400 949.400 950.400 951.400 952.400 953.400 954.400 955.400 956.400 957.400 958.400 959.400 935.600 936.600 937.600 938.600 939.600 940.600 941.600 942.600 943.600 944.600 945.600 946.600 947.600 948.600 949.600 950.600 951.600 952.600 953.600 954.600 955.600 956.600 957.600 958.600 959.600 935.800 936.800 937.800 938.800 939.800 940.800 941.800 942.800 943.800 944.800 945.800 946.800 947.800 948.800 949.800 950.800 951.800 952.800 953.800 954.800 955.800 956.800 957.800 958.800 959.800 936.000 937.000 938.000 939.000 940.000 941.000 942.000 943.000 944.000 945.000 946.000 947.000 948.000 949.000 950.000 951.000 952.000 953.000 954.000 955.000 956.000 957.000 958.000 959.000
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RECEIVER
5.2
Functional Description
The main building block for the receiver is the IC U201. The receiver is a double superhet type with the first IF at 201MHz; this is then converted down to zero IF. The Rx IC contains the following stages: 1. 2. 3. 4. 5. LNA RF mixer Gain controlled 5-stage IF amplifier I,Q quadrature down converter Baseband Op Amps for further amplification and some filtering of the baseband I,Q signals
Figure 1: Receiver IC U201
600-0501
RF input to the receiver is either via the antenna or via the I/O connector for test purposes and handsfree operation. The input signal from the antenna or the I/O connector is fed into the LNA through the ANT Rx path of the ceramic duplexer (FL104). The duplexer provides a low-pass filter function for the Tx signals between its Tx and ANT ports and an additional notch in the Rx band to minimize the Tx noise within the Rx band. The response between the ANT and Rx ports is a bandpass filter response providing the roofing filter function for the Rx front end. The LNA gain can be controlled via a three-wire bus between a typical value of 17dB and approximately -3dB. The LNA gain reduction is required for operation under strong signal conditions where input power levels are greater than about -40dBm. The output from the LNA goes through a differential BP SAW filter and is differentially fed into the 1st down-converter mixer. The LO for the mixer is generated by a PLL (U304) employing a modular VCO (U305). The output from the VCO is buffered by an RF MMIC amplifier (U306). The LO frequency range is 1136.2 to 1160.8MHz. The IF output at 201MHz from the mixer is filtered by the differential IF SAW filter (FL203) before it is fed into the gain-controlled IF amplifiers. The use of differential filters eliminates the need for baluns and provides some space advantage. The IF amplifier is a five stage cascaded section. The gain is controllable by a three-wire bus from -10 to +70dB in 2dB steps. This function is used for AGC purposes. The output from IF amplifiers is fed into two quadrature mixers where it is converted down to its baseband. The IF LO is generated at 402MHz by an external discrete VCO. An on-chip divider on the Rx IC divides this by two and also produces two outputs in quadrature to generate the baseband I and Q signals. The outputs from the mixers are connected to external pins through a pair of buffers. Two on-chip Op Amps are used to amplify the AC signal from the mixers to meet the overall signal budget requirements. The DC level at the output of the Op Amps is 0.95V and a resistive DC adder is used to increase this DC levels to 1.425V as required by the baseband IC VEGA (see Section 8).
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MCUK980101G8 Technical Guide
RECEIVER
The coupling between RF output and the baseband input has been designed as DC coupling in order to minimize the turn-on time of the Rx IC for the purpose of current optimization.
5.2.1 Signal Levels
The signal levels through the receiver IC are given below.
Duplexer LNA RF Filter 1st Mixer IF Filter IF Amp.
-3.2 -2.7 -80
+15 +17
-4.0 -3.2
+5.0 +8.0
-9.0 -9.0
Worst case Normal case
-85
-90
-95
-100
Nominal Worst Case
-105
-110
Figure 2: Nominal and Worst Case Signal Levels -102.0 -102.0 -105.2 -104.7 -90.2 -87.7 -94.2 -90.9 -89.2 -82.9 -98.2 -91.9
600-0502 Worst case (dBm) Normal case (dBm)
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Section 5 5-3
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RECEIVER
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MCUK980101G8 Technical Guide
BASEBAND OVERVIEW
6
6.1
BASEBAND OVERVIEW
Introduction
All Baseband circuitry is contained on one PCB. The Baseband PCB has six layers made from FR4 material. Top and bottom layers are gold-plated to prevent oxidization and enable better soldering. The board thickness is 1.0mm (+0.0, -0.1mm). The Baseband board is connected to the RF board via a 50 way dual in line connector. A metallised plastic chassis is used to separate the Baseband and the RF PCB's. The continuous chassis design is important for EMC purposes. When the chassis is sandwiched between the Baseband and the RF PCB's the ground plane of the RF board together with the chassis forms an effective shielded enclosure, which prevents spurious emissions.
6.2
Functional Description
The G600 baseband is based around a 2 chip GSM chipset. One chip carries out signal processing with DSP and CPU, called GEMINI, and the other chip contains the analogue interface chip, called VEGA. The highly integrated nature of these components means each contain a large number of functions.
GEMINI
JTAG GSM TDMA TIMER TPU
SIM I/F DSP CORE
VEGA
TIMING
JTAG
I TX Q TX I RX
RAM 256k x 8
FLASH 1M x 16
DSP ROM
Q RX PA RAMP
DSP RAM
TCVCXO CONTROL
IRQ
SP INTERFACE
TCVCXO TEMP
VOICE MEMO
EEPROM
2k *8 serial
MEM I/F ARM
SERIAL I/F
UART
PWM
I/O
KEYPAD
POWER KEY
10 bit DAC
EXTERNAL POWER
RADIO MUTE
UART OUT
BACKLIGHT
3V
VOLTAGE REGULATOR
UART IN
BATTERY
HANDS FREE INTERFACE
Figure 1: Baseband Block Diagram
IGNITION
MCUK980101G8 Technical Guide
Section 6 6-1
AUDIO OUT
AUDIO IN
600-0601
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RF INTERFACE
3V to 5V DC/DC
SIM CONNECTOR
BASEBAND OVERVIEW
6.2.1 Keypad
The Keypad has a 5 x 5 matrix allowing 25 keys to be scanned on a key being pressed, a keypad interrupt is generated. To find which key is pressed the software must assert each column in turn and read which row is active. Because of key bounce, the key press must then be confirmed twice at about 20mS intervals. Because the End Key is also used to power on the phone it is allocated a complete row of the keyboard scan. The Keyboard scanning is software controlled. Key pressed is indicated by an interrupt, but key release is controlled by software.
KEYBD (0-9) 0 1 2 3 4
PWR/END
KEYPAD
D422 PWR_KEY 1 2 S417 3 S418 SND S419 PHONE BOOK S420
5
S416
6
4 S411
5 S412
6 S413
S414
7 S406
8 S407
9 S408
V
S409
*
S401
0 S402
# S403
SOFTKEY S404
Figure 2: Keypad Matrix
6.2.2 Subscriber Identity Module (SIM)
The SIM interface is designed for 5V SIMs, this requires the addition of a 5V step up regulator to provide the Interface requirements for a 5V SIM. The SIM outputs are open drain, and the inputs are 5V tolerant. To achieve the required rise time on the clock line a transistor must be used to pull the clock high.
6.2.3 Time Processing Unit (TPU)
The TPU provides the GSM TDMA timing requirements for the system, external timing signals are provided by an area of Microcode within the GEMINI chip. GEMINI Pin 65 66 67 68 69 70 118 119 58 Description VEGA BENA VEGA BCAL VEGA BULON VEGA BDLON RF signal IFLOSEL RF signal LO_EN RF signal RXON1 RF signal RXON2 Used as nTSPEN (0) (VEGA SELECT)
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Section 6 6-2
V V
V S415 7
S410
8
CLR S405 9
600-0602
MCUK980101G8 Technical Guide
BASEBAND OVERVIEW
GEMINI Pin 59 60 61 62
Description Used as nTSPEN (4) (PLL_STRB) RF signal TXON RF signal PAON Used as TSPEN (4) (IFAGCEN)
6.2.4 CPU Memory
The memory requirements for G600 are; 1 2 3 16Mbit 3V FLASH organized as 1M * 16 2Mbit 3V RAM organized as 256k * 8 16kbit 3V Serial EEPROM as 2k * 8
6.2.5 LCD
The LCD assembly is a subassembly comprising of LCD glass and driver chip with connection to the Logic PCB. A 96 x 58 pixel graphical display is used to give maximum information. It can also display Chinese characters and large numbers. For example, 12 x 12 line or 16 x 3 line, both with 2 lines of icons. A Sharp LH155B display driver is used.
6.2.6 Microphone
The microphone is the same type used on G500.
6.2.7 Buzzer
The volume level of the buzzer is defined by the 6 bit PWM register setting in GEMINI I/O. The buzzer tune is then superimposed on this level using software. Timer 1 in GEMINI is used to time the period between switching the buzzer on and off to make the tune. For more complex buzzer ringing tunes, the buzzer volume level can also be altered after each time-out of timer 1.
VDD
BUZZER from Gemini R502
Q501
Buzzer
C503
BUZZIN from Gemini
Figure 3: Buzzer Control Circuit
600-0603
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BASEBAND OVERVIEW
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MCUK980101G8 Technical Guide
GEMINI
7
7.1
GEMINI
Introduction
Gemini contains the DSP, CPU, GSM timing functions and many peripheral functions. The software for the DSP is contained in masked ROM.
7.2
Functional Description
UART DSP CORE
PWM
GSM TDMA TIMER TPU
ARM
I/O
DSP RAM SIM I/F
MEM I/F
Figure 1: GEMINI Block Diagram
SERIAL I/F
DSP ROM
JTAG
IRQ
600-0701
7.2.1 Digital Signal Processor
The Digital Signal Processor (DSP) core is compatible with the Texas Instruments TMS350C5xx family of DSPs. Included in the DSP core is an interface to the CPU by a shared memory interface. The DSP memory is also located within GEMINI, the ROM code size is determined by the size of the software.
7.2.2 CPU
The CPU is a 32 bit RISC CPU with 16bit instruction set. The CPU is designed to access 32bit memory and peripherals, a further module within the GEMINI chip allows access to 8 or 16bit memory. Memory access times Clock Speed 19.5MHz 13MHz 9.75MHz 6.5MHz 4.875MHz 3.75MHz Memory Access Time 41nS 67nS 91nS 144nS 194nS 298nS Additional Access time per wait state 51nS 77nS 102nS 154nS 204nS 308nS
For 120nS access FLASH and RAM, a 6.5MHz clock gives 1 wait state access to both devices.
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Section 7 7-1
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GEMINI
7.2.3 Memory Interface
The memory interface allows the 32 bit CPU to access 16 and 8 bit devices, and allows the addition of wait states to memory access. The memory interface allows between 0 and 7 wait states to be added. The ROM area is hardware write protected, a FLASH write enable bit in the ROM wait state configuration register can be used to enable write access the ROM area. CPU Memory MAP Device Name ROM RAM BUS CNTRL API RAM TPU RAM APIC SIM TSP INTH TPU REG CLKM TIMER APIF UWIRE ARMIO 8251 CS2 nCS0 nCS1 Start address 0000:0000 0020:0000 0040:0000 0050:0000 0050:0000 0050:4000 0050:4800 0050:4C00 0050:5000 0050:5400 0050:5800 0050:5C00 0050:6000 0050:6400 0050:6800 0050:6C00 0060:0000 0080:0000 00A0:0000 Size 2M 2M 1M 8k 8k 1k 1k 1k 1k 1k 1k 1k 1k 1k 1k 1k 2M 2M 2M Use FLASH 1M bytes RAM 256k bytes wait state registers CPU/DSP shared ram GSM timer Microcode RAM CPU/DSP interface controller SIM interface Timed Serial port Interrupt controller GSM timer registers Clock control module software timers ARM peripheral interface Synchronous Serial port Keypad, buzzer, LCD & I/O UART LCD driver Extended I/O not used Bus width 16 bits 8 bits 16 bits 16 bits 16 bits 16 bits 16 bits 16 bits 16 bits 16 bits 16 bits 16 bit 16 bit 16 bit 8 bit 8 bit 8 bit 8 bit --
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MCUK980101G8 Technical Guide
GEMINI
7.2.4 Interrupt Handler
The ARM CPU has 2 interrupts. FIQ is a Fast non maskable interrupt and IRQ is a standard maskable interrupt. GEMINI has 11 interrupt sources, The interrupt handler assigns priorities to these interrupts and routes them to either the FIQ or IRQ inputs of the ARM CPU. Additionally the interrupt handler controls waking up of the CPU on receiving an unmasked interrupt, if the CPU is in sleep mode. For G600 the FIQ interrupt is reserved for the power supply fail priority interrupt. Interrupt level assignments Interrupt source IRQ_TIM1 IRQ_TIM2 IRQ_API IRQ_EXT IRQ_USART IRQ_ARMIO IRQ_FRAME IRQ_PAGE IRQ_TIM_GSM IRQ_TSP IRQ_SIM IRQ_F_USART IRQ_RSS Timed serial port Interrupt SIM Interrupt Fast interrupt from USART Radio subsystem interrupt Description Buzzer timer operating system timer DSP Interface interrupt Power supply fail interrupt UART Interrupt Keypad Interrupt Frame Interrupt Page Interrupt Interrupt detection Edge sensitive Edge sensitive Edge sensitive Level sensitive Level sensitive Low for 1 clk period Edge sensitive Edge sensitive Edge sensitive Edge sensitive Level sensitive Level sensitive Edge sensitive
7.2.5 General Purpose I/O
The general purpose I/O includes keypad scanning, 2 PWM ports and 16 I/O general purpose I/O lines. The general purpose I/O lines are multiplexed onto other functions; if I/O is selected the other function is unavailable. I/O pin Assignments Signal IO (0) /nLCDCS IO (1) /RXE GEMINI Pin 117 116 Use nLCDCS STAY_ALIVE H = PSU kept on L = PSU off L = VEGA powered up H = VEGA powered down L = Hands free Off H = Hands free On L = Radio Mute Off H = Radio Mute On Signal
IO (2) /TXE
115
VEGA_PWRDWN
IO (3) /DTR
114
HF_ON
IO (4) /DSR
110
RADIO_MUTE
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GEMINI
I/O pin Assignments Signal IO (5) /EXTINT IO (6) / nRESETOUT GEMINI Pin 109 106 Use EXTINT PA_LOW H = Low RF Power level L = High RF power level L = Charging LED off H = Charging LED on Signal
IO (7) / SIM_RnW IO (8) /SIMPWCTRL IO (9) /SIM_CD I/O (10) /LT I/O (11) /CLK32 I/O (12) /TSPACT(0) I/O (13) /nPWRCS I/O (14) /nCS1
105 104 95 134 73 65 56 50
CHARGE_LED SIM_PWR nON_HOOK LT (LED output) nHF_DETECT TSPACT (0) nPWRCS PAGING_LED
H = Off hook L = On hook
H = No Hands Free L = Hands Free connected
L = Paging LED off H = Paging LED On H = Charger On L = Charger Off
I/O (15) /nCS0
49
CHARGE_ON
2 outputs have 6 bit PWM capability clocked at 2MHz LT BU 134 120 LED backlight Buzzer
Tones are generated by using timer 1 to switch the buzzer PWM on and off at a the frequency of timer 1. By altering the value of timer 1 ringing tunes can be played. During hands free operation the ringing tone is derived from the DSP using its tone generator.
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MCUK980101G8 Technical Guide
VEGA
8
8.1 8.2
VEGA
Introduction Functional Description
TIMING JTAG
VEGA contains the interface circuits to the Audio, RF and auxiliary analogue functions for the baseband circuit.
10 bit DAC
SP INTERFACE
Figure 1: VEGA Block Diagram
600-0801
8.2.1 Uplink I and Q
VEGA performs GMSK modulation on .dData samples received form GEMINI at 270Kbits per second
Timing interface
Offset
Din 270 Khz
Burst Register
Burst Timing control
Register
Cosine Table Differential Encoder Gaussian Integrator Filter phase(i) 16 *270 Khz sine
Low Pass 8 bit DAC Filter
ULIP ULIN
Low Pass 8 bit DAC Filter
ULQP ULQN
Table
Power Register
Ramp-up Shaper Offset Register
To Power control DAC
Figure 2: Functional structure of the baseband uplink path
600-0802
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Section 8 8-1
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VEGA
8.2.2 Downlink I and Q
Offset Calibration Offset Register SUB
DLIP DLIN
Antialiasing Filter
Sigma_Delta Modulator
SINC Filter
FIR Filter To baseband serial interface
fs1=6.5 Mhz
fs2=1.08 Mhz
fs3=270.8 Khz
DLQP DLQN
Antialiasing Filter
Sigma_Delta Modulator
SINC Filter
FIR Filter SUB
Offset Calibration
Offset Register
Figure 3: Functional structure of the baseband downlink path
600-0803
8.2.3 Power amplifier Ramp
The PA Ramp is formed by 2 D/As, The first, a 5 bit D/A defines the ramp shape, and the second - an 8 bit D/A defines the maximum level. The ramp shape is defined by 64 steps.The shape can be defined differently for rising and falling ramps. Typically a raised cosine shape will be used as a starting basis of the ramp shape.
Ramp Down
35.00 35.00
Ramp Up
30.00
30.00
25.00
5 bit D/A Value 5 bit D/A Value
25.00
20.00
20.00
15.00
15.00
10.00
10.00
5.00
5.00
21
51
21
12
42
51
54
24
30
33
27
36
39
48
57
60
0.00
12 0 3 6 18 9 15
0.00
0 3 6 18 9 42 54 24 30 33 27 36 39 45 48 57 60 63 15
Step
Step
Figure 4: Example for the PA ramp The raised cosine shape will be modified to compensate for RF circuit characteristics.
600-0804
The ramp time is selectable between each step being 1/16 of a bit and each step being 1/8 of a bit giving a maximum ramp time of either 14.77µS or 29.53µS. An 8 bit value is used to program the ramp output level.
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45
63
VEGA
8.2.4 AFC Control
The 13HMz system clock frequency is controlled by a 13bit sigma-delta D/A in the VEGA chip.
3/5 V
1 BIT DAC 13 BIT DIGITAL & LOW - PASS MODULATOR FILTER Output swing control RINT1 RINT2 VTCXO AFC
PROGRAMATION REGISTER
CEXT
Figure 5: AFC block diagram
600-0805
8.2.5 Audio
VEGA provides the analogue interface for the digital audio samples processed by the DSP in GEMINI.
Voice Uplink path
MICBIAS
Bias Generator
MICIP MICIN
Microphone PGA Amplifier
Sigma_Delta Modulator
SINC Filter
IIR Bandpass Filter
To voice serial interface
fs1=1 MHz
fs2=40 KHz
fs3=8.0 KHz
AUXI
Auxiliary Amplifier
Figure 6: Voice ADC block diagram
600-0806
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Section 8 8-3
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VEGA
Voice Downlink path
AUXO
Auxiliary Amplifier
EARP Earphone EARN Amplifier
Smoothing Filter Volume Cont & PGA
One bit DAC
Sigma_Delta Modulator
IIR Bandpass Filter
SINC Interpolation Filter
From voice serial interface
fs1=1 MHz
fs2=40 KHz
fs3=8.0 KHz
Figure 7: Voice DAC block diagram
600-0807
8.2.6 Auxiliary A/D
VEGA provides 5 A/D inputs. G600 takes advantage of the A/D inputs on VEGA allowing external power to be monitored with just 2 resistors each and no need for a buffer transistor. VEGA input ADC0 Pin Number 36 Use Battery Voltage Range 0 = 0V 3FFh = 9.0V 0~136h = Ni-MH 137~3FFh = Li-ION 0D5h = +70oC ADC2 38 Battery Temperature 249h = +25oC 3FBh = -20oC 0~168h = Data Adaptor 17C~1EDh = RS232 Direct Cable ADC3 39 nADP _SENSE 230~2C0h = SMS Cable 2L8~365h = Headset Adaptor Other value = No Adaptor ADC4 40 Current 0h = 0mAh 3FFh = 800mAh
ADC1
37
Battery Type
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MCUK980101G8 Technical Guide
POWER SUPPLIES
9
9.1
POWER SUPPLIES
Introduction
This section describes the Power Supply Unit (PSU) used on the G600 logic PCB and the method by which it is controlled. This section has detailed information on: 1. An overview of the circuit functionality 2. Powering-up the phone 3. Powering-down the phone 4. Power management
9.2
Overview
The circuit contains two linear regulators; 3.6V for the LCD and 3.0V for everything else, analogue and digital. There is a low current step-up converter to provide 5.0V for the SIM interface. The battery voltage detector, nominally set to 3.6V prevents the phone from powering up if the battery voltage is very low (to avoid deep battery discharge), The detector also provides an interrupt to shut down the phone if the battery is suddenly removed - primarily to protect the SIM. The SIM power supply should be enabled and disabled as part of the SIM interface procedures and therefore falls outside the scope of this document.
Battery Voltage Detector DC_OUT
Logic
3.0 V Regulator
EXT_PWR LOGIC_PWR LUA KBR0 EXT_PWR_SENSE BAT_VOLT nIGNITION Gemini ARM CPU SIM_PWR_CNT 3.4 V Regulator
5 V SIM Supply
Figure 1: Block diagram Signal KBR0 CPU I/O I Description
600-1001
Power key. This signal is connected to the KBR0 pin on GEMINI. When the power key is held down this signal is HIGH External power supply from AC adapter etc. When present, the PSU is forced on EXT_PWR scaled and sensed by the CPU as an analogue voltage Scaled battery voltage. This parameter is measured by the CPU and used for gas gauging, regulating LED brightness, charging and to decide when to power-down etc.
EXT_PWR EXT_PWR_SENSE
NC I
BAT_VOLT
I
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Section 9 9-1
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POWER SUPPLIES
Signal
CPU I/O
Description External interrupt to the CPU. The voltage detector output goes LOW when the battery voltage drops below 3.6V. If the phone is on, this signal forces the PSU off and the interrupt initiates an emergency power down procedure. If the phone is off, a LOW on this signal will lock the PSU off. EXTINT can override all signals except EXT_PWR Signal generated by the CPU to hold the PSU on. Active high Chip select to the 3.0 and 3.4V regulators. Active low Output from the CPU to enable the SIM 5.0V supply. Active high DEV Vehicle ignition. When the vehicle ignition is on, this signal is LOW. This is sensed by the CPU as an analogue voltage
LUA
I
LOGIC_PWR DC_OUT SIM_PWR_CNT nIGNITION
O NC O I
9.3
Power-up
The power-up procedure has two phases: There is an initial check to see if the battery is in good condition. If successful, the second phase determines the source of the power-up request, key press, external power, accessory etc. and acts accordingly. The phone can be defined as powered-on whenever the linear regulators are active. It is not always obvious to the user that the phone is powered-on as it may be in one of four modes. In this mode the CPU has been prevented from deactivating the linear regulators by EXT_PWR. There is no CPU activity The CPU is alive but may only perform battery charging functions and monitor the power key. LEDs light, beeps, can charge battery etc. but it is not permitted to use the radio. The mobile is fully functional; LEDs light, beeps, search for network etc.
Sleep Charge Restricted Active
9.3.1 Battery Condition
The CPU must check the battery condition before deciding to power-up. The CPU can measure battery voltage and temperature. If the temperature measurement is invalid, giving a ridiculous temperature reading; a non-standard battery has been fitted, the battery is missing or the whole phone is operating far outside its specified temperature range. In any of these cases the phone must not power up. The CPU will regularly monitor the battery condition while the phone is on. If EXT_PWR is present the regulators will be forced on and the CPU will not be able to deactivate them. If the CPU wants to power-down, all it can do is to enter sleep mode. Battery Voltage (V) X (don't care) X <4.0 <4.0 >4.0 Temp. reading invalid invalid X valid valid EXT_PWR_SENSE 0.5V 1.2V <0.5V 1.2V X Result Power-down (battery fault) Sleep (battery fault) Power-down (low battery) LOW OK
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MCUK980101G8 Technical Guide
POWER SUPPLIES
9.3.2 Power-up Sequence
The power-up sequence can be initiated by pressing the power key or by the presence of an external power source on the signal EXT_PWR. Both enable the linear regulators and the CPU becomes active. The CPU must then check the battery condition; if the phone is not required to power-down or sleep immediately, the result must be OK or LOW. The CPU then checks to see if a hands-free unit is connected by polling the nHF_SENSE signal, LOW when HF is connected. Now the CPU can make the decision whether to remain powered-up or not according to the truth-table below. In each case the active parameters are shaded. Battery condition OK LOW OK or LOW OK LOW
HF X X no yes yes
EXT_PWR_SENSE X >1.2V >1.2V >1.2V >1.2V
nIGNITION X X X <0.5V <0.5V
KBR0 1 1 0 0 0
LOGIC_PWR 1 1 1 1 1
Mode active restricted charge active or charge restricted or charge
With a hands-free, the phone can be configured via the MMI to power-up and down with transitions of the vehicle ignition. These are sensed by the CPU on nIGNITION, LOW when the ignition is on. Any other state than those in the table will cause the phone to deactivate the PSU by setting STAY_ALIVE LOW. While the CPU is active, it must monitor the battery condition and accessory connectivity and change state accordingly. Battery condition OK LOW OK
Current mode charge charge restricted
HF X X X
EXT_PWR_SENSE X 1.2V X
nIGNITION X X X
KBR0 1 1 0
New mode active restricted active
9.4
Power-down
There are two power-down procedures; In this case, the software has full control over the power-down procedure. Calls can be terminated gracefully etc. In some cases the PSU is not deactivated but there is a change of operating mode This situation is caused by battery removal and is flagged by EXTINT. In this case the CPU only has time to perform a subset of the normal procedure. The priority is to prevent corruption of SIM data
Normal power-down
Emergency power-down
The truth-table for the power state transitions are shown below, the cause of a transition is shaded. In some cases the phone does not power down completely but may enter a state of reduced functionality e.g. from active to charge mode. When the new mode is OFF or sleep, the CPU will set STAY_ALIVE LOW.
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Section 9 9-3
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POWER SUPPLIES
Current mode X X X active active active active active active active active active active
Battery Voltage
HF X
nIGNITION X X X X X >2.5V <0.5V >2.5V X <0.5V >2.5V >2.5V X
EXTINT 1 0 1 1 1 1 1 1 1 1 1 1 1
KBR0 X X 1 0 1 1 1 0 1 1 1 0 0
EXT_PWR _SENSE <0.5V X <0.5V >1.2V >1.2V X >1.2V X >1.2V >1.2V X >1.2V <0.5V
Power down normal emergency normal normal normal normal normal normal normal normal normal normal normal
New mode OFF OFF OFF restricted charge OFF charge OFF charge charge OFF OFF OFF
X X <4.0V <4.0V <4.0V <4.0V <4.0V X X X X X
X X X no yes yes yes no yes yes yes X
9.5
Power Management
The Power supply circuit needs to supply regulated power to the baseband and RF parts, control battery charging and monitor battery usage. G600 must achieve 2 types of battery operation - 4 cell Ni-MH and 2 cell Li-ION. The power supply section consists of four parts; 1. Power-on circuitry, 2. Voltage regulators, 3. Battery charging circuitry, 4. Power fail detection. In order to reduce the size and weight of the phone, two Li-ION cells have been chosen as the main power source. To reduce the cost of the phone four Ni-MH cells can be used as the optional power source. The Li-ION standard battery gives 400mAH (typical) capacity. The optional Ni_MH battery gives 670mAH capacity. Battery operating voltage range: 4.5V 6V 8.2V (minimum safe discharge) (maximum fully charged Ni-MH) (maximum fully charged Li-ION)
The G600 battery management operates with the following voltage levels: Battery Voltage B-Icon 3 bar B-Icon 2 bar B-Icon 1 bar LVA
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Li-ION 7.55< 7.20< 6.00< <7.55 <7.20 <6.00
Section 9 9-4
Ni-MH 4.90< 4.75< 4.50< <4.90 <4.75 <4.50
MCUK980101G8 Technical Guide
POWER SUPPLIES
NOTE: During charging, the voltage could rise as high as 9.4V and all circuitry connected to the battery must be designed to operate up to this voltage. A block diagram for a four cell power supply is shown in figure 2 below, note that the battery voltage is stepped-up to power 5V SIM cards or the 5V RF power amplifier. This circuit also shows a Power-On-Reset (POR) to hold the CPU in a reset state while the supply voltage and system clock stabilize.
External Power 9.2V 400mA 5.5V Step-up Reg Battery Li-ION:7.2V, Ni-MH:4.8V VBAT 5V Reg D5V SIM Power SIM 5V RF:1st VCO, APC circuit 3.4V Step-down Reg DC OUT LV1 3V Reg D3V Logic Digital part A3V Logic Analogue part DC OUT RF: RX.TX 2nd VCO Synth VBAT RF: PA RESET 2.7V Det EXT PWR VDD
3V Reg Charge IC
CPU (Gemini)
Figure 2: Power supply block diagram
600-1002
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Section 9 9-5
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POWER SUPPLIES
9.5.1 Power On Circuit
There are two mechanisms for powering on the Hand-held: Power Key or External power. The Hand-held is kept powered on by the CPU, stay alive, or external power. This means that the phone remains powered up all the time that external power is present. To minimize drain on external power, for example, while the phone is connected to a car kit with ignition off, the phone is put into sleep-mode to give an average power use of less than 2mA. For a 20AHr car battery this would give approximately 416 days before the battery would run flat, if left connected and the phone powered off assuming no battery self discharge.
Voltage Regulation
Using four cell Ni-MH or two cell Li-ION with 3.0V logic gives no problems with high regulator voltage dropout. Especially in Li-ION cells, high voltage dropout reduces the efficiency more than a small voltage dropout. To increase the current consumption efficiency, the G600 uses 3.4V step-down DC/DC voltage regulators. The DC/DC step-down circuitry uses two regulators on the LOGIC side and three regulators on the RF side to reduce the power loss to minimum. The G600 has the following power sources: D3V : Baseband power supply for digital circuitry (GEMINI and Memory) Voltage Current Voltage Current Voltage Current Voltage Current 3.0V±5% 200mA max. 3.0V ±5% 200mA max. 5.0V ±5% 50mA max. 8.5V max. 200mA max.
A3V : Baseband power supply for Analogue circuitry (VEGA and Voice-Memo)
D5V, SIM5V : SIM power supply (SIM access interface)
VDD : Common power supply
VDD power source is supplied by either the battery or the EXT_PWR. VDD supplies the 3.4V step-down DC/DC converter, 5.5V step-up DC/DC converter and the LED's. DCOUT : Step-down DC/DC converter output (input power for D3V and A3V regulators) Voltage Current Voltage Current 3.445V ± 5% 250mA max. 9.2V ± 0.2V 430mA ± 30mA Ni-MH Voltage 4.8V nominal Li-ION 7.2V nominal
Ext_PWR : External power supply
VBAT : Battery power supply
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POWER SUPPLIES
9.5.2 Battery Charging circuit
The CPU within the phone controls the battery charging. When external power is present the phone is automatically switched on. If rechargeable cells are detected and the temperature is within specified limits the charger starts using a rapid charge algorithm. With Ni-MH cells, charging is determined by delta V, with time, temperature and voltage safeguards. With Li-ION, cells, charging is determined by constant current, with time, temperature and voltage safeguards.
Deeply Discharged batteries
When a battery is deeply discharged, there may not be enough power to power on the phone for charging. In this case the charging circuit must automatically detect if the batteries are rechargeable and start slow trickle charge until there is enough power to switch on the phone.
9.5.3 Power Fail
The SIM card contains EEPROM; if power fails while the SIM is active, the SIM may corrupt its memory as the supply voltage drops out of specification. The nLVA_INT is a non-maskable interrupt to the CPU, which forces exception processing whenever the battery voltage drops below 3.2V.
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Section 9 9-8
MCUK980101G8 Technical Guide
ACCESSORIES
10 ACCESSORIES
10.1 Handsfree Unit - Circuit Description
10.1.1 General Description
The handsfree unit consists of audio processing, power supply and external power for the charging circuitry within the handheld unit. A digital signal processor (DSP) is used to remove the local echo or feedback created between the loudspeaker and microphone. The analogue speech signal is converted into digital form using CODECs, which perform analogue to digital and digital to analogue conversion on the received and transmitted audio. The handheld unit has an internal charging circuit. The handsfree unit uses this facility to charge the attached battery. The connector at the base of the handheld unit contains a mechanical RF switch. When the connector is in use the RF signal is disconnected from the internal antenna and sent out through the handsfree unit RF cable.
10.1.2 Detailed Description TX Audio
The external microphone connects to P301. The voice signal from the microphone is amplified by U311 and converted into a digital form by U305. U305 is a CODEC containing an analogue to digital converter for the transmitted audio, and a digital to analogue converter for the received audio. The digitized speech is processed by U306 (DSP echo canceller). The output from pin 13 of the DSP is reconverted into analogue form by U304 (CODEC). Further amplification is provided by U301 and U315. The audio signal is then transmitted via P201 to the handheld unit for further processing.
RX Audio
The voice signal from the handheld unit is amplified by the handsfree unit. P201 connects the audio signal from the handheld to the handsfree unit via pin 4. U301 provides initial amplification of the received audio. R324 is a variable resistor controlled by the thumbwheel on the side of the handsfree case, providing volume level control. The voice signal is converted into digital by U304 and processed by the DSP (U306). U305 reconverts the speech into analogue form. Further amplification is provided by U308, the output of which passes to the internal speaker via J300 and P300. If an external speaker is connected to J300 then the path to the internal speaker is broken and the audio is transmitted to the external source via J300.
Power Supply
Supply for the handsfree unit is provided via P203. Reverse voltage protection is provided by D201. An active low signal from the handheld unit (nLogic Pwr) switches Q202 and Q203 ON. Activation of Q203 switches the base of Q204 low, enabling the positive supply through Q204 to the voltage regulators. D202 provides over-voltage protection. Should the supply exceed 16V, D202 will break down switching Q201 ON and sending the base of Q203 low, switching Q204 OFF. The output from Q204 takes two paths. Through Q309 the positive 13V supply is regulated down to 5V by U302 and U303. U302 supplies the DSP, CODECs and reset control. U303 supplies the audio amplifiers. The 13V supply is also regulated down to 6.7V for the external power supply for the handheld unit. U101 is a switching regulator that provides this function.
Level Detector
A sample of the output audio is taken from J300 pin 2. U309 detects the audio signal level on pin 1. If the detected speaker audio level is high, then pin 6 will go low. A low signal on pin 6 switches Q305 ON, switching positive supply onto Q306. Q306 switches R305 into the TX audio path, reducing the audio level.
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ACCESSORIES
Reset Circuit
U310 and U314 form the reset circuit. U314 is a voltage level detector whose output goes low if the supply drops below 4.5V. When nHF ON is low (P201 pin 7), Q307 is switched on, pulling the input to U310 high. This signal also feeds the two analogue switches turning them on. On this line going high U310 Q output will go high for a predefined time of approximately 5µS, turning Q308 ON and pulling the reset line low.
10.1.3 Path Description
The following lists the direct connection between parts of a given portion of the circuit. TX Audio Path from P301 Pin 1 Microphone connection on PCB-GND REF POINT TP309 P301 U311 U305 U306 U304 U301 U312 U315 P201 2 PIN Connector Amplifier CODEC DSP CODEC Amplifier Analogue Switch Amplifier 16 PIN Connector Pin 1 or TP310 Input pin 1 Input pin 24 Input pin 9 Input pin 12 Input pin 5 Input pin 2 Input pin 3 Pin 3 (TX_Audio) or TP201 Output pin 4 Output pin 13 Output pin 13 Output pin 5 Output pin 7 Output pin 1 Output pin 4
RX Audio Path from P201 Pin 4 (RX_Audio) Main unit connector on PCB-GND REF POINT TP312 P201 U301 R324 U304 U306 U305 U313 U308 J300 P300 16 PIN Connector Amplifier Volume Control CODEC DSP CODEC Analogue Switch Output Amplifier Ext Speaker Socket 2 PIN Connector Pin 4 (RX_Audio) or TP304 Input pin 2 Input pin 1 Input pin 24 Input pin 10 Input pin 12 Input pin 1 Input pin 1 Input pin 2 or TP311 Pin 2 Output pin 1 Output pin 2 Output pin 13 Output pin 14 Output pin 5 Output pin 2 Output pin 4 Output pin 3
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ACCESSORIES
Level Detection Circuit Path from J300 pin 2 EXT SPK SKT or TP311 GND REF POINT TP312 J300 U309 Q305 Q306 Ext Speaker Socket Level Detector PNP Transistor NPN Transistor Pin 2 or TP311 Input pin 1 Input B Input B Output pin 6 Output C Output C
Power Supply Circuit Path from P203 pin 1 +Battery from car or TP203 P203 D201 Q204 Q309 U303 and U302 6 PIN Connector Diode PNP Transistor NPN Transistor 5V Reg Pin 1 or TP203 Input pin 1 Input E Input C Input pin 3 Output Pin 2 Output C Output E Output pin 1
External Power Supply Path from P203 pin 1 +Battery from car or TP203 P203 D201 Q204 Q101 D104 P201 6 PIN Connector Diode PNP Transistor PNP Transistor Diode 16 PIN Connector Pin 1 or TP203 Input pin 1 Input pin E Input pin E Input pin 1 Pin 15 or TP201 Output pin 2 Output pin C Output pin C Output pin 2
Power Amplifier Power Supply Path from P203 pin 1 +Battery from car or TP203 P203 D201 Q205 U308 6 PIN Connector Diode NPN Transistor Output Amplifier Pin 1 or TP203 Input pin 1 Input pin C Input pin 5 or TP301 Output pin 2 Output pin E
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10.1.4 Test Points
TP No. TP101 TP201 TP202 TP203 TP300 TP301 TP302 TP304 TP305 TP306 TP307 TP309 TP310 TP311 TP312 TP313 DESCRIPTION Switching Voltage Regulator External power nLogic Power Battery + (car) TX Audio (To the handheld unit) Output Amplifier Power GND RX Audio (To the handheld unit) Audio GND nHF on Mic override speaker Audio GND Mic Speaker Audio GND U306 pin 3 HCL BOARD LOCATION U102 Pin 2 P201 Pin 15 P201 Pin 14 P203 Pin 1 P201 Pin 3 Q205 Pin E U308 Pin 3 P201 Pin 4 P201 Pin 5 P201 Pin 7 R355, R309 P301 Pin 2 P301 Pin 1 J300 Pin 2 J300 Pin 1 U306 Pin 3
10.1.5 Adjustment and Calibration
The adjustments that can be made on the handsfree unit are to the external power supply. These are made by adjusting two variable resistors on the PCB. The procedure must be followed if the switching voltage regulator or any other part of the external power supply is replaced.
10.1.6 Procedure
Connect up the Handsfree unit as for normal testing, but do not connect the Handheld unit. Measure the external voltage power supply. Adjust R102 so that this voltage is 7.8V ± 0.07V. Once the handheld unit is connected and in a call, R144 is used to adjust the maximum current supplied.
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ACCESSORIES
10.2 Dual Charger
10.2.1 Circuit Description
A battery present is detected by the TH input, and battery type is detected by the S input. The S input is open-circuit on a small battery, pulling the base of Q13 high, turning it off. The base of Q2 is pulled low through R24, turning Q2 ON. This switches the extra control resistor VR1 into circuit, increasing the timer clock rate. VR2 is used to control the clock rate when a large battery is connected. The charging circuit is controlled by the current drawn by the handheld unit. If the handheld unit receives a call and thus requires greater than 300mA, then it switches the charger off, only switching it back on again when the current drops below 200mA. These current levels are controlled by VR3 (set the stop point) and VR4 (set the start point). The power out for the handheld unit is protected by Q11, Q16, and Q5. When the power is connected, a small current can flow through R27 and the bleed resistor R33. Through the potential divider R39 and R38, this turns Q5 ON, turning Q16 ON. Should the output CN2 become accidentally short-circuited the base of Q5 becomes low turning Q5 OFF. This pulls the base of Q16 high, turning Q16 OFF and shutting off the power.
10.2.2 Adjustment Procedure
If any of the main components in the charger are replaced then the following procedure must be followed. The procedure first adjusts the charge rate timer for each battery, followed by the control current levels for switching the charger on and off. Connect the charger as shown in the following diagram.
+
S1 S 30 TH 10K 10mS GND 3W
Figure 1: Charger Connections
600-1101
Adjust VR2 until the pulses on pin 3 of IC 2 have a period of 10mS ± 0.5mS. Open the switch S1 and adjust VR1 until the pulses have a period of 3.45mS ± 1.5mS. With S1 closed connect a load of 300mA ± 5mA across the output that goes to the handheld unit. Adjust VR3 so that clock pulses on pin 3 of IC 2 stop i.e. there is a steady level of 5V or 0V. Now reduce the load to 200mA ± 5mA and adjust VR4 so that the pulses start again.
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