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INTERNAL BLOCK DIAGRAM of ICs
IC101 LA1140
IC102 KIA6010SN
IC103 LA3430M
- 2-7 -
IC104 KIC9256P
VDD GND
FM L 9 12
PSC
AMP
FM IN 11 1/2 2 MODULUS 4 bit SWALLOW POWER ON
PRESCALER COUNTER RESET
FMS HF RESET
AM IN 10
COMPARATOR
12 bit PROGRAMMABLE COUNTER TRI-STATE 15 DO1
FM MODE LF BUFFER
PHASE
12
4
XT 2 OSC
REFERENCE COUNTER TRI-STATE
CIRCUIT MAX BUFFER 16 DO2
XT 15 (DO2/OT-4)
1
1mS OSC 4 OT4
24bit REGISTER UNLOCK
DATA 5
1/0 PORT
5 1/0-5/CLK
24bit SHIFT REGISTER
CLOCK 4 8 1/0-6
TEST 5
ADDRESS
24 22
DECODER
PERIOD 3 10
24bit REGISTER 13 1/0-9 IFIN2
(1/0-6 IF IN2 )
4 4 AMP
20bit BINARY COUNTER 1/0-8 IF
IN1
14 (1/0-5 IF
OUTPUT PORT UNIVERSAL COUNTER CONTROL
AMP IN1 )
GATE
1/0-7 SC IN
OT-4
XT 1mS
6 7 8
OT-1 OT-2 OT-3 OT-4
NOTE: Mark terminals are not existence in KIC9256P, KIC9256F
Terminal name of KIC9256P, KIC9256F is shown in parentheses.
Others are common terminals.
IC201 DBL 1019
Local OSC Local Local IF Signal Signal Detector Detector
Butter Out OSC2 OSC1 AGC Meter Out Meter In VCC Out GND In
20 19 18 17 16 15 14 13 12 11
IF
LOCAL DETECTOR
LOCAL IF SIGNAL
OSC
OSC AGC METER
BUFFER
ALC
RF DETECTOR
IF
RF ATTENUATOR MIX
RF RF AMP
AGC AMP2 DRIVER AMP2
1 2 3 4 5 6 7 8 9 10
RFAGC RFAmp2 RF ANT Damping GND MIX in & MIX VCC IF Amp IF Amp
Out In AGC Driver RF AMP1 In Out In Out
- 2-8 -
LCD DATA
CDC BUS
ENVOL- B
IC(VPP)
LCD CE
RESET
AVREF
AVDD
GND
N.C
N.C
N.C
NC
NC
X2
X1
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
N.C 49 32 ENVOL- A
LCD RESET 50 31 KEY IN2
LCD CLK 51 30 LEVEL METER
BEEP OUT 52 29 KEY IN1
uPD780022
DIODE OUTO 53 28 EJECT KEY IN
DIODE OUT1 54 27 SD IN
DIODE OUT2 55 26 STEREO IN
- 2-9 -
DIODE IN0 56 25 GND
DIODE IN1 57 24 VDD
DIODE IN2 58 23 PLL PERI
N.C 59 22 EV CLOCK
N.C 60 21 EV DATA
N.C 61 20 PLL CLK
ACC IN 62 19 PLL DATA
1) Overall block diagram
LED FLASHING 63 18 CDC ON
MUTE ON 64 17 N.C
IC401 uPD780022
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
STAND- BY SW
MAIN MTR ON
REEL PULSE
CDC D-OU T
POWER ON
IF CNT Req
MODE SW
UNLOAD
TAPE IN
F/ R SW
AMS IN
LOAD
GND
VDD
N.C
N.C
2) Pin function
No PORT FUNCTION I/O DESCRIPTION ACTIVE
1 P50/A8 POWER ON O Power Supply Control H
2 P51/A9 N.C - -
3 P52/A10 N.C - -
4 P53/A11 UNLOAD O SUB MOTOR UNLOAD Output (-) H
5 P54/A12 LOAD O SUB MOTOR LOAD Output (+) H
LOAD UNLOAD STOP OFF
UNLOAD L H H L
LOAD H L H L
6 P55/A13 REEL PULSE I TAPE REEL PULSE INPUT
7 P56/A14 HEAD F/R SW O TAPE HEAD DIRECTION SELLECTION
DIRECTION HEAD F/R SW
FORWARD H
REVERSE L
8 P57/A15 MAIN MOTOR O TAPE MAIN MOTOR Power Control H
9 VSS0 GND -
10 VDD0 VDD -
11 P30 AMS IN I TAPE! MUSIC LEVEL Perception H
12 P31 TAPE IN SW I TAPE INSERT PACK Perception H
13 P32 IF CNT Req O IF COUNT REQ. H
14 P33 CDC DATA OUT O CD CHANGER DATA Out -
15 P34/SI31 STAND-BY SW I TAPE STAND-BY STATE Perception H
16 P35/SO31 MODE SW I TAPE PLAY MODE STATE Perception
17 P36/SCK31 N.C O -
18 P20/SI30 CDC ON O CD CHANGER Power Control H
19 P21/SO30 PLL DATA O PLL IC(KIC9256P)" Serial Data Output -
20 P22/SCK30 PLL CLK O PLL IC(KIC9256P) CLOCK Output -
21 P23/RXD0 EV DATA O I.C(PT2313L) Serial Data Output -
22 P24/TXD0 EV CLOCK O I.C(PT2313L) CLOCK Output -
23 P25/ASCK0 PLL PERI O PLL I.C(KIC9256P) CHIP ENABLE
PLL PREI State
H DATA Transmission
L CHIP Address Transmission
24 VDD1 VDD
25 AVSS O GND
26 P17/ANI7 STEREO IN I Stereo Perception L
27 P16/ANI6 SD IN I Radio Mode: Perception of Receive Sensitivity
*TUNER BAND : SEEK STOP LEVEL
SDIN(Volt)
FM 1.5 VOLT (HIGH)
MW(LW) 1.2 VOLT(LOW)
28 P15/ANI5 EJECT KEY I TAPE EJECT KEY INPUT Perception
29 P14/ANI4 KEY IN1 I KEY A/D VALUE INPUT
30 P13/ANI3 LEVEL R/L I AUDIO LEVEL INPUT
31 P12/ANI2 KEY IN2 - KEY A/D VALUE INPUT
32 P11/ANI1 ENVOL-A I ENCODER VOLUME Input
33 P10/ANI0 ENVOL-B I ENCODER VOLUME Input
34 AVREF A/D Convertor Reference Voltage
35 AVDD GND
36 RESET SYSTEM RESET Signal Input L
37 XT2 Sub Clock Connection
38 XT1 Sub Clock Connection
39 IC(VPP) GND
40 X2 X2 - Crystal Connection
41 X1 X1 - Ceramic Oscillator Connection
42 VSS1 - GND
43 P00/INTP0 N.C -
44 P01/INTP1 N.C -
45 P02/INTP2 CDC BUS I CD CHANGER DATA BUS INPUT
46 P03/INTP3/ADTRG N.C -
47 P70/TI00/TO0 LCD DATA O FRT LCD DRIVER DATA OUTPUT
48 P71/TI01 LCD CE O FRT LCD DRIVER CHIP ENABLE OUTPUT
49 P72/TI50/TO50 N.C -
50 P73/TI51/TO51 LCD RESET O FRT LCD DRIVER RESET OUTPUT
51 P74/PCL LCD CLK O FRT LCD DRIVER CLOCK OUTPUT
52 P75/BUZ BEEP OUT O BEEP(2KHZ) Output
53 P64/RD DIODE OUT0 I/O DIODE OPTION MATRIX DATA INPUT0
54 P65//WR DIODE OUT1 I/O DIODE OPTION MATRIX DATA INPUT1
55 P66/WAIT DIODE OUT2 I/O DIODE OPTION MATRIX DATA INPUT2
56 P67/ASTB DIODE IN0 I/O DIODE OPTION MATRIX DATA OUTPUT0
57 P40/AD0 DIODE IN1 I/O DIODE OPTION MATRIX DATA OUTPUT1
58 P41/AD1 DIODE IN2 I/O DIODE OPTION MATRIX DATA INPUT2
59 P42/AD2 N.C I
60 P43/AD3 N.C I
61 P44/AD4 N.C O
62 P45/AD5 ACC IN O ACC ON/OFF Perception L
63 P46/AD6 LED O FRT LED FLASH H
64 P47/AD07 MUTE ON O H
- 2-10 -
IC501 KIA2025
4 1
IC502 LA2000
IC503 FAN8082
GND 1 DRIVER OUT 8 VO2
VO1 2 7 PV CC
PRE DRIVER
V CTL 3 6 SV CC
TSD BIAS
V IN1 4 LOGIC SWITCH 5 V IN2
- 2-11 -
IC601 PT2313L
LOUT LIN LOUD_L BOUT_L BIN_L TREB_L
17 16 12 19 18 4
Speaker
ATT
25 LFOUT
LIN1
LIN1 15 RB
Mute
LIN2
LIN2 14 Speaker
LIN3 Voume & ATT
LIN3 13 Bass Treble
Input Loudness
23 LROUT
Selector
Mute
RIN3
& Gain
RIN3 9
RIN2 Serial Bus Decoder & Latches 28 CLK
Control
RIN2 10
RIN1 27 DATA
RIN1 11 26 DGND
Speaker
ATT
Voume
Bass Treble
&
24 RFOUT
Loudness
Mute
RB Speaker
ATT
22 RROUT
Supply
Mute
2 3 1 7 6 8 21 20 5
VDD AGND REF ROUT RIN LOUD BOUT_R BIN_R TREB_R
- 2-12 -
IC801 TDA8571J
MODE VP1 VP2 VP3 VP4
15 1 8 16 23
10
IN1 +
2
OUT1+
-
30 K