Text preview for : compal_la-8331p_r0.4_schematics (1).pdf part of acer compal la-8331p r0.4 schematics (1) acer Notebook Ноутбук Acer Aspire V3-551G compal_la-8331p_r0.4_schematics (1).pdf
Back to : compal_la-8331p_r0.4_sche | Home
A B C D E
1 1
Compal Confidential
2
Q5WV8 Schematics Document 2
AMD "Comal" Platform
AMD Trinity APU / Hudson M3 FCH / ATI Thames XT
3 3
2012-01-05A
LA-8331P REV: 0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A8331
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H2
Date: Wednesday, February 29, 2012 Sheet 1 of 52
A B C D E
A B C D E
Compal Confidential
Model Name : Q5WV8
1
VRAM 1G/2G 1
64M16/128M16 x 8
page 18, 19
R03 Resverd
Thermal Sensor ATI Vancuver
DDR3 AMD Comal
PCIe x 16 Gen2
ADM1032 Thames XT 128Bit DDR3
page 14
uFCBGA-962 AMD FS1R2 APU Memory BUS(DDR3)
DP2 204pin DDRIII-SO-DIMM X2
Page 13~17 APU HDMI Dual Channel
HDMI LVDS VGA (UMA / Muxless) Trinity BANK 0, 1, 2, 3 Page 11,12
1.5V DDRIII 800~1866MHz
(DIS Only) (DIS Only) (DIS Only) DP0
uPGA-722 Package
HDMI Conn.
page 23
LVDS DP1 Page 6~10
2 Translator DP x 4 2
LVDS Conn. P_GPP x 3
page 22 RTD2132S GEN1 (DP1 TXP/N 0~4) UMI
page 21
ML for FCH VGA USB20 USB20 USB30 CMOS Bluetooth Mini Mini
eDP Panel UMA eDP M/B*1 Sub/B*2 M/B*1 Camera Conn.
Card 1 Card 2
page 22
page 36 page 36 page 36 page 22 page 36 page 34 page 34
CRT Conn. FCH CRT (VGA DAC) Port 10 Port 0 Port 0 Port 5 Port 7 Port 8 Port 9
page 24 FCH USB
(USB3.0) Port 1 (USB3.0)
3.3V 48MHz
GPP3 GPP2 GPP1 GPP0
Hudson-M2/M3
HD Audio 3.3V 24.576MHz/48Mhz
uFCBGA-656
Card Reader MINI Card 2 MINI Card 1 LAN(GbE) SATA Gen2
Realtek (Option) (Wireless LAN) Atheros Page 25~29
RTS5209 page 31 page 34 page 34
AR8151 page 32
GPP0 port 0 port 1
3
LPC BUS 3
GEN2
SATA HDD1 ODD HDA Codec
Transformer / RJ45
page 33 Conn. Conn. ALC271X VB6
page 30 page 30
ALC281X page 38
LED
page 39
ENE
KB930/KB9012
page 38
RTC CKT. USB30
page 25
Fresco FL1009 Touch Pad Int.KBD
On M/B page 35 page 39 page 39
Power On/Off CKT. Sub board
page 37
LID SW - Power/B
page 39
Fan Control
4
page 30 4
USB20/B
BIOS ROM
DC/DC -USB20 x2 page 36
Interface CKT. SYS BIOS (4M)
page 41 page 26 Security Classification Compal Secret Data Compal Electronics, Inc.
USB30/B Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
-USB20 x1+ USB30 x1 SCHEMATIC,MB A8331
Power Circuit EC BIOS (128K) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
B
Document Number Rev
B
page 42~51 page 36 page 39 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 4019H2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, February 29, 2012 Sheet 2 of 52
A B C D E
5 4 3 2 1
CLOCK DISTRIBUTION DISPLAY DISTRIBUTION
: LVDS PATH
, : eDP PATH
: APU HDMI PATH
LVDS CONN
B_SODIMM
A_SODIMM
D : VGA HDMI PATH D
TXOUT[0:2]+/- TXOUT[1:2]+/-
TXCLK+/- I2CC_SCL/DA
TZOUT[0:2]+/-
TZCLK+/-
I2CC_SCL/DA TXOUT[1:2]+/-
AMD R
I2CC_SCL/DA
TXOUT[0:2]+/- TZOUT[0:2]+/-
ATI VGA TXCLK+/- TZCLK+/-
I2CC_SCL/DA
MEM_MB_CLK7_P/N
MEM_MB_CLK1_P/N
MEM_MA_CLK7_P/N
MEM_MA_CLK1_P/N
1066~1866MHz
1066~1866MHz
Whistler/Seymour/Thames
APU_TXOUT[0:2]+/-
C
APU_TXOUT[1:2]+/-
R R
APU_TXOUT_CLK+/-
APU_TZOUT[0:2]+/- APU_LVDS_CLK/DATA
CLK_PEG_VGAP/N
APU_TZOUT_CLK+/-
100MHz APU_LVDS_CLK/DATA
Place near
the pin
C
APU_DISP_CLKP/N
C AMD 100MHz AMD LVDS_OUT C
RTD2132 DP0_TXP/N[0:1]_R VGA_TXOUT[1:2]+/-
CPU FS1 SOCKET
FCH DP_IN
DP0_AUXP/N_R VGA_LCD_CLK/DATA
APU_CLKP/N Hudson-M2/M3 VGA_TXOUT[0:2]+/- VGA_TZOUT[0:2]+/-
VGA_TXCLK+/- VGA_TZCLK+/-
100MHz Internal CLK GEN R
VGA_LCD_CLK/DATA
Place near
the pin
DP0_AUX GPP_CLK
100MHz
LVDS Transtator 32.768KHz 25MHz
R
C
DP0_TXP/N[0:1]
DP0_AUXP/N
B
GPP4 GPP3 GPP2 GPP1 GPP0 DP0 DPE DPF B
WLAN WLAN PCIE_GFX[0:11] C
USB30 M/B USB30 SUS/B
OPT PCI Socket Mini PCI Socket
GbE LAN APU C
VGA
PCIE_GFX[12:15] PCIE_GFX[0:15]
DP1 R DAC1 DPA
25MHz
FCH
R R
R R
A A
CRT CONN HDMI CONN
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
SCHEMATIC,MB A8331
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 4019H2 B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, February 29, 2012 Sheet 3 of 52
5 4 3 2 1
A B C D E
ZZZ ZZZ2 ZZZ3
Voltage Rails
SIGNAL
Power Plane Description S1 S3 S5 STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
PCB X76 X76
Part Number = DA60000QV00 Part Number = X76356BOL02 Part Number = X76356BOL03
VIN Adapter power supply (19V) N/A N/A N/A Full ON HIGH HIGH HIGH HIGH ON ON ON ON PCB 0OH LA-8331P REV0 M/B TMSSAM2G@ SEYHYN1G@
B+ AC or battery power rail for power circuit. N/A N/A N/A ZZZ1 ZZZ4
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
+CPU_CORE Core voltage for CPU ON OFF OFF
1
+CPU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF 1
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF X76 X76
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF Part Number = X76356BOL01 Part Number = X76356BOL04
+VDDCI 0.95-1.2V switched power rail ON OFF OFF TMSHYN2G@ SEYSAM1G@
+0.75VS 0.75V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.0VSG 1.0V switched power rail for VGA ON OFF OFF
+1.1ALW 1.1V switched power rail for FCH ON ON ON* Board ID / SKU ID Table for AD channel
+1.1VS 1.1V switched power rail for FCH ON OFF OFF Vcc 3.3V +/- 5%
+1.2VS 1.2V switched power rail for APU ON OFF OFF Ra/Rc/Re 100K +/- 5% BOARD ID Table
+1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max Board ID PCB Revision
+1.5VS 1.5V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V 0 EVT
+1.8VSG 1.8V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V 1 EVT2
+2.5VS 2.5V for CPU_VDDA ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V 2 DVT
+3VALW 3.3V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V 3
+3V_LAN 3.3V power rail for LAN ON ON ON 4 56K +/- 5% 1.036 V 1.185 V 1.264 V 4
+3VS 3.3V switched power rail ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V 5
+5VALW 5V always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V 6
2
+5VS 5V switched power rail ON OFF OFF 7 NC 2.500 V 3.300 V 3.300 V 7 2
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BOM Option Table BOM Config
BOM UMA Thames EVT2 DVT DVT DVT DVT DVT
Structure Description UMA UMA-LVDS UMA-eDP PX5 PX5 PX5
1G-LVDS 1G-eDP 2G-LVDS
M2@ Use Hudson-M2 V
M3@ Use Hudson-M3 V V V V V V V
930@ Use EC 930 V V
9012@ Use EC 9012 V V V V V V
UMA@ Display output from APU (UMA only or PX) V V V V V V V V
x = 1 is read cmd, x= 0 is writee cmd. DISO@ Display output from VGA (DIS only)
VGALVDS@ VGA output LVDS (DIS only)
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts VGA@ Use VGA (PX or DIS only) V V V V
THA@ VGA: Thames V V V V
3 3
SEY@ VGA: Seymour
128@ Use VRAM channel A&B V V V V
PX@ PX function V V V V
BACO@ BACO function (PX4.0) V
NOBACO@ Without BACO function (DISO and PX5.0) V V V
EC SM Bus1 address EC SM Bus2 address
TL@ LVDS Translator (for LVDS) V V V V V V
Device Address HEX Device Address HEX EDP@ Use eDP Panel V V
Smart Battery 0001 011X b 16H ADI ADM1032 (VGA) 1001 101X b 9AH APUEDP@ APU output eDP V V
SB-TSI (APU) 1001 100X b 98H VGAEDP@ VGA output eDP (DIS only)
LVDS TR( RTD-2132S) 1010 100X b A8H 271@ Realtek ALC271x VB6 V V V V V V V V
VGA Internal Thermal 1000 001X b 82H 281@ Realtek ALC281x
ZERO@ ZERO Power ODD function
FL@ Fresco FL1009 USB3.0 Controller V
8151@ LAN Atheros AR8151 10/100/1000M LAN V V V V V V
FCH FCH
8152@ LAN Atheros AR8152 10/100M LAN
4 SM Bus 0 address SM Bus 1 address X76@ VRAM ID Table (Load By X76J) 4
Device Address HEX Device Address HEX CONN@ Connector (Control by ME)
DDR DIMM1 1101 000X b 90
DDR DIMM2 1101 001X b 94
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC,MB A8331
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019H2
Date: Wednesday, February 29, 2012 Sheet 4 of 52
A B C D E
5 4 3 2 1
AMD APU FS1R2
BATTERY BATT+ PU21 PU27 +CPU_CORE
+CPU_CORE 0.7~1.475V VDD CORE 60A
12.6V CHARGER ISL6277HRTZ-T +CPU_CORE_NB
BQ24725RGRR +CPU_CORE_NB 0.7~1.475V VDDNB 37A
PU25 +2.5VS +2.5VS VDDA 750mA
APL5508 +1.5V +1.5V VDDIO 3.2A
PU19 +1.2VS
AC ADAPTOR VIN +1.2VS +1.2VS VDDR 8.5A
D RT8209MGQW D
19V 90W
RAM DDRIII SODIMMX2
+1.5V +1.5V +1.5V
PU26 +1.5V VDD_MEM 4A
RT8207MZQW +0.75VS
B+ +0.75VS +0.75VS VTT_MEM 0.5A
VGA ATI
+VGA_CORE Whistler/Seymour/Granville
PU10 +VGA_CORE
TPS51218DSCR 0.85~1.1V VDDC 47A
PU7
+VDDCI 0.9~1.0V VDDCI 4.6A
SY8033BDBC U41
AO4430L PU24 +1.0VSG DPLL_VDDC: 125 mA
PU20 +1.5VSG SPV10: 120 mA
APL5930 +1.0VSG
TPS51212DSCR PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA
VRAM 512/1GB/2GB
+1.5VSG
+1.5VSG VDDR1: 3400 mA 64M / 128Mx16 * 4 / 8
PU5 +1.1VALW
RT8209MGQW PLL_PVDD: 75 mA +1.5VSG 2.4 A
TSVDD: 20 mA
AVDD: 70 mA
C VDD1DI: 100 mA C
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
PU2 +3VALW
U40 PU23 VDD_CT: 110 mA
RT8205EGQW