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CCS Technical Documentation RH-9 Series Transceivers
System Module & UI
Issue 1 11/02
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RH-9 System Module & UI Table of Contents
CCS Technical Documentation
Abbreviations ................................................................................................................. 4 ........................................................................................................................................ 4 Transceiver RH-9 - Baseband Module........................................................................... 5 Hardware characteristics in brief .................................................................................5 Technical Summary .....................................................................................................6 Technical Specifications ..............................................................................................7 Operating conditions ................................................................................................. 7 DC Characteristics.................................................................................................... 8 Internal Signals and Connections.............................................................................. 9 Current consumption during sleep .......................................................................... 15 External Signals and Connections........................................................................... 16 Functional Description ...............................................................................................18 Modes of Operation................................................................................................. 18 Charging ................................................................................................................. 21 Charging Circuitry Electrical Characteristics ......................................................... 23 Power Up and Reset ................................................................................................ 24 A/D Channels .......................................................................................................... 26 LCD & Keyboard Backlight ................................................................................... 28 ................................................................................................................................. 28 LCD cell .................................................................................................................. 30 SIM Interface........................................................................................................... 31 Internal Audio ......................................................................................................... 33 Accessories.............................................................................................................. 36 Keyboard ................................................................................................................. 41 RF Interface Block .................................................................................................. 42 ................................................................................................................................. 43 Memory Module...................................................................................................... 44 Flash Programming ................................................................................................. 59 EMC Strategy ............................................................................................................62 PWB strategy........................................................................................................... 62 LCD metal frame..................................................................................................... 64 Bottom connector .................................................................................................... 64 Mechanical shielding............................................................................................... 65 Security ......................................................................................................................65 Test Interfaces ............................................................................................................65 Production / After Sales Interface ........................................................................... 65 FLASH Interface ..................................................................................................... 66 FBUS Interface........................................................................................................ 67 MBUS Interface ...................................................................................................... 67 JTAG & Ostrich Interface ....................................................................................... 67 DAI.......................................................................................................................... 67 Test modes (SW dependant) ................................................................................... 67 Test points ............................................................................................................... 69 List of unused UEM pins ..........................................................................................69 List of unused UPP pins ............................................................................................70 Transceiver RH-9 - RF Module ................................................................................... 72
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RH-9 System Module & UI
Main Technical specifications ...................................................................................73 Temperature conditions........................................................................................... 73 Nominal and maximum ratings ............................................................................... 73 RF frequency plan ................................................................................................... 73 DC characteristics ................................................................................................... 73 Functional descriptions ..............................................................................................76 RF block diagram .................................................................................................... 76 Frequency synthesizers ........................................................................................... 76 Receiver................................................................................................................... 78 Transmitter .............................................................................................................. 80 Synthesizer and RF Control .................................................................................... 81 RF characteristics .......................................................................................................82 Channel numbers and frequencies........................................................................... 82 Main RF characteristics........................................................................................... 82 Transmitter characteristics ...................................................................................... 82 Receiver characteristics........................................................................................... 86
List of Figures Page No
Fig 1 RH-9 baseband block diagram ...................................................................................7 Fig 2 UEM charging circuitry..............................................................................................22 Fig 3 Shared LED driver circuit for LCD and Keyboard backlight ....................................30 Fig 4 Complete overview of LCD module ..........................................................................31 Fig 5 RH-9 LCD module .....................................................................................................32 Fig 6 BSI Detection .............................................................................................................33 Fig 7 UEM & UPP SIM connections...................................................................................34 Fig 8 Speaker Interface ........................................................................................................34 Fig 9 Internal microphone electrical interface .....................................................................36 Fig 10 Interface between the MIDI-circuit and the UEM....................................................37 Fig 11 Mechanical layout and interconnections of DCT-4 battery......................................38 Fig 12 Headset interface ......................................................................................................39 Fig 13 DC-OUT Interface....................................................................................................41 Fig 14 Keyboard layout .......................................................................................................42 Fig 15 AC characteristics for SRAM...................................................................................46 Fig 16 Timing diagrams of read cycles ...............................................................................47 Fig 17 Intel-AMD signal deviations description .................................................................51 Fig 18 An XOR comparison of the data indicates more equal bits .....................................53 Fig 19 An XOR comparison indicates more unequal bits ...................................................53 Fig 20 Intel Asynchronous Read .........................................................................................56 Fig 21 Intel Synchronous Four-Word Burst Read ...............................................................57 Fig 22 Intel Write.................................................................................................................58 Fig 23 AMD Asynchronous Read .......................................................................................59 Fig 24 AMD Synchronous Burst Read ................................................................................59 Fig 25 Production/Test/After sales interface .......................................................................67 Fig 26 RF Frequency plan ...................................................................................................74 Fig 27 Power distribution diagram ......................................................................................76 Fig 28 Block Schematic .......................................................................................................77 Fig 29 Simplified Synthesizer..............................................................................................79
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RH-9 System Module & UI Fig 30 Fig 31 Fig 32 Fig 33
CCS Technical Documentation
Simplified Mjoelner BB, either I or Q channel ........................................................79 Gain control ..............................................................................................................80 DC compensation principle ......................................................................................81 Power Loop ..............................................................................................................82
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RH-9 System Module & UI
Abbreviations
DCT4 DSP MCU PDM RESET RTC SIM SLEEP SLEEPX TBSF UEM UPP CSTN DBEF t-BEF ESR Digital Core Technology, 4th Generation Digital Signal Processor MicroController Unit Pulse Density Modulation UEM state where regulators are enabled UEM internal Real Time Clock Subscriber Identity Module UEM power saving state controlled by UPP SLEEP control signal from UPP Through the Board Side Firing Universal Energy Management Universal Phone Processor Colour Super Twisted NematicCharger detection threshold level Double Brightness Enhancement Foil thin Brightness Enhancement Foil Enhanced Specular Reflector
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Transceiver RH-9 - Baseband Module
This section specifies the baseband module for the RH-9 transceiver. The transceiver board is named ey1a, and all board references used refer to the board version ey1a_03. The baseband module includes the baseband engine chipset, the UI components and the acoustical parts for the transceiver. RH-9 is a hand-portable dualband EGSM900/GSM1800 phone, with GPRS (Class-4) for the high-end Basic/Expression segment, having the DCT4 generation baseband (UEM/ UPP) and RF(MJOELNER) circuitry. The key drivers for this product are colour display, short time to market, low field failure, low cost and high performance. RH-9 is to be used in high volume production, which puts a very high focus on second and third suppliers, and the verification of the different mix of components. The baseband module is developed, as part of the DCT4 common Baseband. It is based very much upon the NPE-4 and NHM-7 products, main difference being colour display, white leds, external SRAM and SW/Feature upgrade. The mechanical construction is based on the NHM-5 phone, with an A/B cover update for an APAC region. The baseband engine consists basically of two major ASICs. The UEM is the universal energy management IC, having audio, charge control and voltage regulators included, and the UPP having DSP, MCU and SRAM memory included. These two ASICs are tested and delivered bu the Gemini AD project. RH-9 will use a high resolution (98*67, 4096 colours, 485M042) display from Philips, Seiko Epson and Samsung.
Hardware characteristics in brief
· High resolution (98*67) , 12 -bit colour display · 4 TBSF White LEDs · Charge pump IC with constant current generator for driving the white LEDs · 4Mbit external SRAM) · No shielding can above the memory ICs
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RH-9 System Module & UI
Technical Summary
The baseband module contains 2 main ASICs named the UEM and UPP. The baseband module furthermore contains an audio amplifier LM4890 for MIDI support, a LED driver LM2795, a 64Mbit Flash IC and a 4Mbit SRAM. The baseband is based on the DCT4 engine program.
Figure 1: RH-9 baseband block diagram
RFBUS
Battery
UI
Mjoelner
PA Supply
Baseband
LM2795 DLIGHT
26MHz
RF Supplies
SLEEPCLK 32kHz
RF RX/TX
CBUS/ DBUS
UPP
SIM
UEM
BB Supplies
EAR
MEMADDA
MIC External Audio Charger connection
LM4890 HF
SRAM
FLASH
M
VIBRA
DCT4 Janette connector
MBus/FBus
The UEM supplies both the baseband module as well as the RF module with a series of voltage regulators. Both the RF and Baseband modules are supplied with regulated voltages of 2.78 V and 1.8V. UEM includes 6 linear LDO (low drop-out) regulators for baseband and 7 regulators for RF. BB regulator VFLASH2, RF regulators VR1B, VR4 as well as the current sources IPA1 and IPA2 must be kept disabled by SW, as they are left unconnected on the PWB. The UEM is furthermore supplying the baseband SIM interface with a programmable voltage of either 1.8 V or 3.0 V. The core of the UPP is supplied with a programmable voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V. UPP operates from a 26MHz clock, coming from the RF ASIC MJOELNER, the 26 MHz
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clock is internally divided by two, to the nominal system clock of 13MHz. DSP and MCU contain phase locked loop (PLL) clock multipliers, which can multiply the system frequency by factors from 0.25 to 31. Practical speed limitations are depending on memory configuration and process size (Max. DSP speed for C035 process is ~ 180MHz) The UEM contains a real-time clock, sliced down from the 32768 Hz crystal oscillator. The 32768 Hz clock is fed to the UPP as a sleep clock. The communication between the UEM and the UPP is done via the bi-directional serial buses CBUS and DBUS. The CBUS is controlled by the MCU and operates at a speed of 1 MHz. The DBUS is controlled by the DSP and operates at a speed of 13 MHz. Both processors are located in the UPP. The interface between the baseband and the RF section is mainly handled by the UEM ASIC. UEM provides A/D and D/A conversion of the in-phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the user interface. The UEM supplies the analog signals to RF section according to the UPP DSP digital control. RF ASIC MJOELNER is controlled through UPP RFBUS serial interface. There are also separate signals for PDM coded audio. Digital speech processing is handled by the DSP inside UPP ASIC. UEM is a dual voltage circuit, the digital parts are running from the baseband supply 1.8V and the analog parts are running from the analog supply 2.78V also VBAT is directly used by some blocks. The baseband supports both internal and external microphone inputs and speaker outputs. Input and output signal source selection and gain control is done by the UEM according to control messages from the UPP. Keypad tones, DTMF, and other audio tones are generated and encoded by the UPP and transmitted to the UEM for decoding. RH-9 has two external serial control interfaces: FBUS and MBUS. These busses can be accessed only through production test pattern. RH-9 transceiver module is implemented on 6 layer selective OSP/Gold coated PWB.
Technical Specifications
Operating conditions Temperature Conditions
Table 1: Temperature conditions for NHM-8 Environmental condition Normal operation Reduced performance No operation and/or storage Ambient temperature -25 ° C ... +55 °C -40 °C ..-25 °C and +55 °C ... +85 °C < -40 °C or > +85 °C No storage or operation. An attempt to operate may damage the phone permanently Remarks Specifications fulfilled
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CCS Technical Documentation Absolute Maximum Ratings
Table 2: Absolute Maximum Ratings Signal Battery Voltage Charger Input Voltage Rating -0.3 ... 5.4V (VBAT LIM2H+)) -0.3 ... 20V
RH-9 System Module & UI
DC Characteristics Regulators and Supply Voltage Ranges
Table 3: Battery voltage range Signal VBAT Min 3.1V Nom 3.6V Max 4.235V Note 3.1V SW cut off
Table 4: BB regulators Signal VANA VFLASH1 VFLASH2 VSIM VIO VCORE Min 2.70V 2.70V 2.70V 1.745V 2.91V 1.72V 1.0V 1.235V 1.425V 1.710V Nom 2.78V 2.78V 2.78V 1.8V 3.0V 1.8V 1.053V 1.3V 1.5V 1.8V Max 2.86V 2.86V 2.86V 1.855V 3.09V 1.88V 1.106V 1.365V 1.575V 1.890V Note Imax = 80mA Imax = 70mA ISleep = 1.5mA Not used Imax = 25mA ISleep = 0.5mA Imax = 150mA ISleep = 0.5mA Imax = 200mA ISleep = 0.2mA Used voltages: (c05) = 1.8V (c035) = 1.5V
Table 5: RF regulators Signal VR1A VR1B VR2 VR3 VR4 Min 4.6V 4.6V 2.70V 3.20V 2.70V 2.70V Nom 4.75V 4.75V 2.78V 3.3V 2.78V 2.78V Max 4.9V 4.9V 2.86V 3.40V 2.86V 2.86V Note Imax = 10mA Not used Imax = 100mA Imax = 20mA Not used
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VR5 VR6 VR7 2.70V 2.70V 2.70V 2.78V 2.78V 2.78V
CCS Technical Documentation
2.86V 2.86V 2.86V Imax = 50mA ISleep = 0.1mA Imax = 50mA ISleep = 0.1mA Imax = 45mA
Table 6: Current sources Signal IPA1 and IPA2 Min 0mA Nom Max 5mA Note Not used
Internal Signals and Connections The tables below describe internal signals. The signal names can be found on the schematic for the ey1a PWB. Audio
Table 7: Internal microphone Signal MIC1P (Differential input P) MIC1N (Differential input N) MICB1 (Microphone Bias) External loading of MICB1 Min 2.0 V Nom 2.1 V Max 100mVpp 100mVpp 2.25 V 600uA Condition G=20dB G=20dB DC DC Note 1k to MIC1B (RC filtered by 220R/4.7uF) 1k to GND
Table 8: Internal speaker (Differential output EARP & EARN) Signal Output voltage swing Load Resistance (EARP to EARN) Load Capacitance (EARP to EARN) Min 4.0 26 No m 32 Max 50 Units Vpp W nF Note Differential output
MIDI
Table 9: Connections between UPP and LM4890 Signal Shutdown From GENIO[14] To Shutdown (p. 5) Parameter Vih Vil Min. 1.2 Max. 0.4 Unit V V Notes LM4890 detections treshold levels
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RH-9 System Module & UI
Table 10: Connections between UEM/Battery and LM4890 Signal name XAUDIO[1] Filtered signal From UEM, HF No direct connection between UEM and LM4890 Battery To LM4890 Parameter Output Swing Min. 1.0 Max. Unit Vpp Notes with 60 dB signal to total distortion ratio
VBAT
LM4890 (p. 6)
Supply
3.1
4.2
V
Lower limit is SW cut-off
LCD
Table 11: LCD connector interface Pin 1 Signal /RES NMP net XRES Symbol Parameter Reset 0.7 x VDDI 2 /SCE XCS Chip Select 0.7 x VDDI 0.3 x VDDI 3 4 VSS SDATA VSS SDA GND Ground Input (writing to display) Output (reading from display) IOL = 0.5mA, IOH = 0.5mA 0.7 x VDDI 0.3 x VDDI 0.8 x VDDI O.2x VDDI V 01 Min. Ty p. Max. 0.3 x VDDI Un it V ns V V V V Logic High Logic Low Logic High Logic Low Notes Logic Low, active Logic high Logic High Logic Low, active
0.3 x VDDI ts1 tH1 5 SCLK SCLK Serial clock input 100 100 0.7 x VDDI 0.3 x VDDI -
V ns ns V V
Logic Low Data setup time Data hold time Logic High Logic Low
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6 7 8 VDD1 VDD2in VLCDout
CCS Technical Documentation
VDD digital power supply Booster power supply Booster output 1.6 2.6 1.8 0 2.7 8 2.02 2.93 12 V V V Decoupled to GND on main PWB with 1uF
VDDI VDD VOUT
Baseband RF interface
Table 12: BB RF interface description Signal name RFICCNTRL (2:0) RFBUSEN1X UPP MJOELNER MJOELNER MJOELNER From To Parameter Min. Typ. Max. Unit Notes
MJOELNER control bus Logic "1" Logic "0" Logic "1" Logic "0" Logic "1" Logic "0" 1.38 0 1.38 0 1.38 0 1.80 0.4 1.80 0.4 1.80 0.4 V V V V V V RF serial control bus (bi-directional) RF bus clock RF Chip select
RFBUSDA
UPP
RFBUSCLK
UPP
Clock RFCLK MJOE LNER UPP
System clock for phone Frequency Signal amplitude Duty cycle (Mjoelner spec.) 0.3 40 26 1 1.37 6 60 MHz Vpp % System clock UPP minimum recommended amplitude is 0.3Vpp. Waveform: Sinus/ triangle
RFCONV (9:0) RXIINP MJOE LNER UEM
RF / BB analogue signals Voltage swing DC level I/Q amplitude mismatch I/Q phase mismatch Data clock rate 1.35 1.3 -5 1.4 1.35 1.45 1.4 0.2 5 13 V V dB Deg. MHz Positive in-phase Rx signal
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RXIINN MJOE LNER UEM Voltage swing DC level I/Q amplitude mismatch I/Q phase mismatch Data clock rate RXQINP MJOE LNER UEM Voltage swing DC level I/Q amplitude mismatch I/Q phase mismatch Data clock rate RXQINN MJOE LNER UEM Voltage swing DC level I/Q amplitude mismatch I/Q phase mismatch Data clock rate TXIOUTP UEM MJOELNER Diff. Voltage swing DC level Source impedance Data clock rate TXIOUTN UEM MJOELNER Differential voltage swing DC level Source impedance Data clock rate 1.35 1.3 -5 1.35 1.3 -5 1.35 1.3 -5 2.15 1.10 2.15 1.17 1.4 1.35 1.4 1.35 1.4 1.35 2.2 1.20 2.2 1.20 1.45 1.4 0.2 5 13 1.45 1.4 0.2 5 13 1.45 1.4 0.2 5 13 2.25 1.25 200 13 2.25 1.23 200 13
RH-9 System Module & UI
V V DB Deg. MHz V V dB Deg. MHz V V dB Deg. MHz Vpp V W MHz Vpp V W MHz Negative TX signal (program-able voltage swing) Positive TX signal (program-able voltage swing) Negative quadrature phase RX signal Positive quadrature phase RX signal Negative in-phase Rx signal
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TXQOUTP UEM MJOELNER Differential voltage swing DC level Source impedance Data clock rate TXQOUTN UEM MJOELNER Differential voltage swing DC level Source impedance Data clock rate GENIO (28:0) GENIO5 (TXP) GENIO6 (RESETX_MJO EL) RFAUXCONV(2:0) AUXOUT UEM MJOELNER UPP MJOELNER MJOELNER 2.15 1.17 2.15 1.17 2.2
CCS Technical Documentation
2.25 1.23 200 13 2.25 1.23 200 13 Vpp V W MHz Vpp V W MHz Negative TX signal (program-able voltage swing) Positive TX signal (program-able voltage swing)
1.20 2.2 1.20 -
General purpose I/O Logic "1" Logic "0" Logic "1" Logic "0" 1.38 0 1.38 0 1.80 0.4 1.80 0.4 V V V V Transmitter power control enable Reset to RF chip
UPP
RF / BB analogue control signals Output voltage Source impedance Resolution 0.12 10 2.50 200 V W Bits Transmitter power control
Regulators VBAT (VBATREGS) VR1A Battery UEM PA / UEM
RF regulators (currents are max. according to UEM spec.) Output voltage 2.9 3.6 4.2 V Battery cut-off is set by UEM to 2.9 V
Mjoelner
Output voltage Current
4.6 0 2.64 0.1 2.64 0.1 2.64 0.1
4.75 2.78 2.78 2.78 -
4.9 10 2.86 100 2.86 20 2.86 50
V mA V mA V mA V mA Supply to: TX chain, Power Loop Control and Digital logic Supply to: Ref. Osc. Supply to: PLL, Divider, LO buffers
VR2
UEM
MJOELNER
Output voltage Current Output voltage Current Output voltage Current
VR3
UEM
MJOELNER MJOELNER
VR5
UEM
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VR6 UEM MJOELNER VCO Output voltage Current Output voltage Current VREFRF01 UEM MJOELNER Output voltage Current Current VIO UEM MJOELNER Output voltage Current 2.64 0.1 2.64 0.1 1.33 4 1.71 0.1 2.78 2.78 1.35 1.8 2.86 50 2.86 45 1.36 6 100 100 1.88 150
RH-9 System Module & UI
V mA V mA V µA µA V mA Supply to: BB buffer Supply to: LNA's, Pregain Supply to: LO buffers, Local oscillators Used in MJOELNER (VBEXT) as 1.35V reference
VR7
UEM
Table 13: Board Clocks Signal name RFCLK SLEEPCLK RFCONVCLK From MJOELNER UEM UPP To UPP UPP UEM Min. Typ. 26 32.768 13 Max. Unit MHz kHz MHz Notes Active when SLEEPX is high Active when VBAT is supplied Active when RF converters are active Only active when bus-enable is active Only active when bus-enable is active Only active when bus-enable is active Only active when bus-enable is active
RFBUSCLK
UPP
MJOELNER
-
13
13
MHz
DBUSCLK
UPP (DSP)
UEM
-
13
13
MHz
CBUSCLK
UPP (MCU)
UEM
-
1
1
MHz
LCDCAMCLK
UPP (Write) (Read)
LCD
0.3 3.25 0.650
4
MHz
Connection for regulators active during sleep
Table 14: Connections for regulators active during sleep Regulators UEM UPP FLASH LCD X387 (SIM con.) MJOELNER Externally circuit
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VIO [1,8V] VDD18 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDA VDDSP1 VDDSP2 VDDSP3 VDDMCU VDDCORE1 VDDCORE2 VDDPDRAM1 VDDPDRAM2 VDD28 BSI(pull up) PATEMP (pull up) VDD VDD VDDI
CCS Technical Documentation
VDDDL SELADDR
VCORE [1,5V]
VFLASH1 [2,78V]
VSIM [1,8V / 3V] VR2 [2,78V]
VSIM VDDDIG VDDTX TX section of MJOELNER sheet
Current consumption during sleep Following section state the different regulators current consumption (theoretically excluding leakage in decoupling capacitors) in sleep mode. VIO
1,8V UEM UPP PINS VDD18 VDDIO1-4 VDDA FLASH SRAM LCD MJOELNER VDD VCC VDDI VDDDL SELADDR Totally Specification: Max: 500uA Current consumption in sleep (SLEEPX = low) < 5 µA < 300uA (depends on I/O config) < 5uA 20 µA <8uA <150µA 5 µA 0uA <493uA
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1,5V UPP PINS VDDSP1-3, VDDMCU, VDDCORE1-2 VDDPDRAM1-2 Specification: Max: 200uA
RH-9 System Module & UI
Current consumption in sleep (SLEEPX = low) < 9 µA (Measured value < 120uA)
Totally
Measured value < 120uA
VFLASH1
2,78V UEM PINS VDD28 BSI (pull up) PATEMP (pull up) LCD Totally VDD Specification: Max: 1500uA Current consumption in sleep (SLEEPX = low) < 5 µA < 30 µA < 25 µA <1100 µA <1160 µA
VSIM
1,8V / 3V X387 (SIM con) Totally PINS VSIM Specification: Max: 500uA Current consumption in sleep (SLEEPX = low) < 200 µA < 200 µA
VR2
2,78V MJOELNER PINS VDDDIG VDDTX Totally Specification: Max: 100uA Current consumption in sleep (SLEEPX = low) 70 µA 0 µA 70uA
External Signals and Connections System connector (X102)
Table 15: DC connector Pin 2 Signal VCHAR Min Nom 11.1Vpeak Max 16.9 Vpeak 7.9 VRMS 1.0 Apeak 9.2 VRMS
850 mA
Condition Standard charger (ACP-7) Fast charger
Note Charger positive input
7.0 VRMS
8.4 VRMS
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1 CHGND 0 -
CCS Technical Documentation
Charger ground
Table 16: External microphone Signal MIC2P (Differential input P) MIC2N (Differential input N) MICB2 (Microphone Bias) External loading of MICB2 Min 2.0 V Nom 2.1 V Max 100mVpp 100mVpp 2.25 V 600uA Condition G=20dB G=20dB DC DC Note 1k to MIC1B 1k to GND Unloaded
Table 17: External speaker, differential output XEARP(HF) & XEARN (HFCM) Signal Output voltage swing* * seen from transducer side Common voltage level for HF output (HF & HFCM) VCMHF Load Resistance (HF to HFCM) Load Capacitance (HF to HFCM) Min 2.0 0.75 30 No m 0.8 Max 0.85 10 Units Vpp V W nF Note Differential output, with 60 dB signal to total distortion ratio
Table 18: Headset detection Signal HookInt HeadInt Min 0V 0V Nom Max 2.86V (VANA) 2.86V (VANA) Condition Note Headset button call control, connected to UEM AD-converter Accessory detection, connected to UEM AD-converter
DC-OUT (J307,J308 & J309)
Table 19: DC-OUT Connections Pad J307 Name Power Parameter Voltage (open) Current (short) J308 J309 CTI(Input) GND Resistor value Min 56 30.9 Typ 64 Max Vbat 72 750 Unit V mA k Cover detection Ground Notes Output power line
SIM (X387)
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Table 20: SIM Connector Pin 1 Name CLK Parameter Frequency Trise/Tfall 2 RST 1.8V SIM Card 3V SIM Card 3 VCC 1.8V SIM Card 3V SIM Card 4 5 6 GND VCC I/O 1.8V Voh 1.8V Vol 3 Voh 3 Vol 1.8V Vih 1.8V Vil 3V Vil 3V Vil GND Min 1.62 0 2.7 0 1.6 2.8 1.62 0 2.7 0 1.26 0 2.1 0 Typ 3.25 "1" "0" "1" "0" 1.8 3.0 0 "1" "0" "1" "0" "1" "0" "1" "0" Max 50 VSIM 0.27 VSIM 0.45 2.0 3.2 VSIM 0.27 VSIM 0.45 VSIM 0.27 VSIM 0.45
RH-9 System Module & UI
Unit MHz ns V V V V V
Notes SIM clock
SIM reset (output)
Supply voltage
Ground Not connected
V
SIM data (output)
V V SIM data (input) Trise/Tfall max 1us
V
Functional Description
Modes of Operation
RH-9 baseband engine has six different operating modes (in normal mode):
· No supply · Power_off · Acting Dead · Active · Sleep · Charging Additionally two modes exist for product verification: 'testmode' and 'local mode'.
No supply
In NO_SUPPLY mode, the phone has no supply voltage. This mode is due to disconnection of main battery or low battery voltage level.
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Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected. Battery voltage can rise either by connecting a new battery with VBAT > VMSTR+ or by connecting charger and charging the battery above VMSTR+.
Power_off
In this state the phone is powered off, but supplied. VRTC regulator is active (enabled) having supply voltage from main battery. Note, the RTC status in PWR_OFF mode depends on whether RTC was enabled or not when entering PWR_OFF. From Power_off mode UEM enters RESET mode (after 20ms delay), if any of following statements is true (logical OR function): · · · Power_on button detected (PWROFFX) Charger connection detected (VCHARDET) RTC_ALARM detected
The Phone enters POWER_OFF mode from all the other modes except NO_SUPPLY if internal watchdog elapses.
Acting Dead
If the phone is off when the charger is connected, the phone is powered on but enters a state called "Acting Dead", in this mode no RF parts are powered. To the user, the phone acts as if it was switched off. A battery charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged.
Active
In the active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several sub-states in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc. In active mode the RF regulators are controlled by SW writing into UEM's registers wanted settings: VR1A/B must be kept disabled. VR2 can be enabled or forced into low quiescent current mode. VR3 is always enabled in active mode. VR4 -VR7 can be enabled, disabled or forced into low quiescent current mode.
Table 21: Regulator controls Regulator VFLASH1 VFLASH2 VANA NOTE Enabled; Low Iq mode during sleep Not used in NHM-8, must be kept disabled Enabled; Disabled in sleep mode
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VIO VCORE VSIM VR1A VR1B VR2 VR3 VR4 VR5 VR6 VR7 IPA1-2 Enabled; Low Iq mode during sleep Enabled; Low Iq mode during sleep Controlled by register writing. Enabled; Disabled in sleep mode Not used in NHM-8, must be kept disabled
RH-9 System Module & UI
Controlled by register writing; Enabled in sleep mode Enabled; Disabled in sleep mode Not used in NHM-8, must be kept disabled Enabled; Disabled in sleep mode Enabled; Disabled in sleep mode Enabled; Disabled in sleep mode Not used in NHM-8, must be kept disabled
Sleep mode
Sleep mode is entered when both MCU and DSP are in stand-by mode. Sleep is controlled by both processors. When SLEEPX low signal is detected UEM enters SLEEP mode. VCORE, VIO and VFLASH1 regulators are put into low quiescent current mode. All RF regulators, except VR2, are disabled in SLEEP. When SLEEPX=1 is detected UEM enters ACTIVE mode and all functions are activated. The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by some external interrupt, generated by a charger connection, key press, headset connection etc. In sleep mode the main oscillator (26MHz) is shut down and the 32 kHz sleep clock oscillator is used as reference clock for the baseband.
Charging
Charging can be performed in parallel with any other operating mode. A BSI resistor inside the battery pack indicates the battery type/size. The resistor value corresponds to a specific battery capacity and technology. The battery voltage, temperature, size and current are measured by the UEM controlled by the charging software running in the UPP. The charging control circuitry (CHACON) inside the UEM controls the charging current delivered from the charger to the battery. The battery voltage rise is limited by turning the UEM switch off when the battery voltage has reached VBATLim (programmable charging cut-off limits 3.6V / 5.0V / 5.25V). Charging current is monitored by measuring the voltage drop across a 220 mOhm resistor. Detailed description of the charging func-
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RH-9 System Module & UI tionality can be found in next section. Charging RH-9 supports the NMP Janette Charger interface.
CCS Technical Documentation
Charging is controlled by the UEM ASIC, and external components are mounted for EMC, reverse polarity and transient protection of the input to the baseband module. The charger connection is through the system connector interface. Both 2- and 3-wire type chargers are supported. The operation of the charging circuit has been specified in such a way as to limit the power dissipation across the charge switch and to ensure safe operation in all modes.
Figure 2: UEM charging circuitry
UEM
VCHAR
V C H A R in
VCHARout
VBATT
O ve r T em p . D e te c tio n S w itc h D rive r
V m str
C trl L o g ic W atch D o g
C u rre n t S e n sin g / L im it
VBATT
PW M
PW M G en e rato r
+ Com p -
V B A T T lim
Charger Detection Connecting a charger creates voltage on VCHAR input of the UEM. When VCHAR input voltage level is detected to rise above VCHDET+ threshold by UEM charging starts. VCHARDET signal is generated to indicate the presence of the charger for the SW. The charger identification/acceptance is controlled by EM SW. The charger recognition is initiated when the EM SW receives a "charger connected" interrupt. The algorithm basically consists of the following three steps: 1. Check that the charger output (voltage and current) is within safety limits. 2. Identify the charger. 3. Check that the charger is within the charger window. If the charger is accepted and identified, the appropriate charging algorithm is initiated.
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CCS Technical Documentation Charge Control
RH-9 System Module & UI
In active mode charging is controlled by UEM's digital part. Charging voltage and current monitoring is used to limit charge into safe area. For that reason UEM has programmable charging cut-off limits VBATLim1,2L,2H (3.6V / 5.0V / 5.25V). Maximum charging current is limited to 1.2 A. Default for VBATLim is 3.6V (used for Initial charging of empty battery). VBATLim1,2L,2H are designed with hysteresis. When the voltage rises above VBATLim1,2L,2H+ charging is stopped by turning charging switch OFF. No change in operational mode is done. After voltage has decreased below VBATLim- charging re-starts. If VBAT is detected to rise above the programmed limit, the output signal OVV is set to `1' by CHACON. If charging current limit is reached OVC output is set `1' by CHACON. Pulse-width-Modulated (PWM) control signals PWM1 and PWM32 are generated by UEM's digital part to CHACON block. In principle there are two PWM frequencies in use depending on the type of the charger (standard charger 1Hz, fast charger 32Hz. Duty cycle range is 0% to 100%), but in RH-9 only the 1Hz mode will be used, as all charger will be treated as standard charges (2wire types). Supported Chargers Supported chargers are: · · 2-wire chargers: ACP-7, ACP-8 and ACP-12. 3-wire chargers: PPH-1, ACP-9,, ACT-1, LCH-8 and LCH-9.
The 3-wire chargers have a 3 wire interface to the phone, 2 power and 1 control. The control wire carries the 32Hz digital pulse width modulated signal which must be generated by the phone to control the charger output voltage. In RH-9 the 32Hz PWM for the charger is connected to GND inside the bottom connector. This sets full charger output voltage and equals 0% PWM from charger point of view. Charger Interface Protection In order to ensure safe operation with all chargers and in misuse/fail situations charger interface is protected using transient voltage suppressor (TVS) and 1.5A fuse. TVS used in RH-9 is 16V@175W device.
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RH-9 System Module & UI
Table 22: Charger interface
CCS Technical Documentation
TVS characteristics: Breakdown voltage (VBR) Reverse standoff voltage (VR) Max reverse leakage current at VR (IR) Max peak impulse current (Ipp) Max clamping voltage at Ipp (Vc)
17.8Vmin (at IT 1.0mA) 16V 5uA 7A (at Ta=25*C, current waveform: 10/1000us) 26V
Charging Circuitry Electrical Characteristics
Table 23: Electrical Characteristics Parameter Test conditions Input voltage range (fast charger, no load) Input voltage range (std charger, no load) Absolute Maximum VCHAR voltage Input resistance from VCharIn to ground Master reset threshold level VCOFFX threshold levels VCHAR detection threshold level Continuous input current (fast charger) Maximum input current (std charger) Start-up mode charging current PWM mode charge current Output voltage (Battery voltage) Rin VMSTR+
VMSTR-
Symbol VCHAR
Min 7.0 -0.3 2 2.0 1.8 3.0 2.7 1.9 1.7 100 1.1 0
Typ 8.4 11.1 7.9 4 2.1 1.9 3.1 2.8 2.0 1.8 1.2 3.6
Max 9.2 16.9 +20 6 2.2 2.0 3.2 2.9 2.1 1.9 850 1.0 150 1.45 4.2
Units VRMS Vpeak VRMS V k V V V mA Apeak mA A V
VCOFF+
VCOFF-
VCHDET+
VCHDET-
ICH ICH ISTART ILIM VBAT
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Charging cut-off limits (programmable) VBATLim1+
VBATLim1VBATLim2L+ VBATLim2LVBATLim2H+ VBATLim2H-
RH-9 System Module & UI
3.54 3.32 4.85 4.65 5.10 4.90 3.65 3.50 5.0 4.85 5.25 5.10 3.76 3.66 5.15 5.05 5.40 5.30 0.3 V
Charging switch resistance (includes bonding and leads) Temp =65°C (ambient) PWM frequency (std charger) PWM duty cycle Switch output current slew rate Charging thermal shutdown threshold VFLASH1 supply voltage input
RSW
W
0.5 0 SR TjsdC+ TjsdCVFLASH1 0.4 140 120 2.7
1 0.6 150 130 2.78
1.5 100 0.8 160 140 2.88
Hz % A/ms °C V
Note: VCHAR is used as a supply voltage for charging control parts Power Up and Reset Power up and reset is controlled by the UEM ASIC. RH-9 baseband can be powered up in following ways: 1 2 3 4 Press power button, which means grounding the PWRONX pin of the UEM Connect the charger to the charger input Supply battery voltage to the battery pin RTC Alarm, the RTC has been programmed to give an alarm
After receiving one of the above signals, the UEM counts a 20ms delay and then enters it's reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+ a 200ms delay is started to allow references etc. to settle. After this delay elapses the VFLASH1 regulator is enabled. 500us later VR3, VANA, VIO and VCORE are enabled. Finally the PURX line is held low for 20 ms. This reset, PURX, is fed to the baseband ASIC UPP, resets are generated for the DSP and the MCU. During this reset phase the UEM forces the VCXO regulator on regardless of the status of the sleep control input signal to the UEM. All baseband regulators are switched on at the UEM power on except for the SIM regulator that is controlled by the MCU. The UEM internal watchdog is running during the UEM reset state, with the longest watchdog time selected. If the watchdog expires the UEM returns to power off state. The UEM watchdog is internally acknowledged at the rising edge of the PURX signal in order to always give the same watchdog response time to the MCU. Power up with PWR key When the Power on key is pressed the UEM enters the power up sequence as described in
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RH-9 System Module & UI
CCS Technical Documentation
the section Power Up and Reset. Pressing the power key causes the PWRONX pin on the UEM to be grounded. The UEM PWRONX signal is not part of the keypad matrix. The power key is only connected to the UEM. This means that when pressing the power key an interrupt is generated to the UPP that starts the MCU. The MCU then reads the UEM interrupt register and notice that it is a PWRONX interrupt. The MCU now reads the status of the PWRONX signal using the UEM control bus, CBUS. If the PWRONX signal stay low for a certain time the MCU accepts this as a valid power on state and continues with the SW initialization of the baseband. If the power on key does not indicate a valid power on situation the MCU powers off the baseband. Power up when charger is connected In order to be able to detect and start charging in a case where the main battery is fully discharged (empty) and hence UEM has no supply (NO_SUPPLY mode of UEM) charging is controlled by START-UP CHARGING circuitry. Whenever VBAT level is detected to be below master reset threshold (VMSTR-) charging is controlled by START_UP charge circuitry. Connecting a charger forces VCHAR input to rise above charger detection threshold, VCHDET+. By detection start-up charging is started. UEM generates 100mA constant output current from the connected charger's output voltage. As battery charges its voltage rises, and when VBAT voltage level higher than master reset threshold limit (VMSTR+) is detected START_UP charge is terminated. Monitoring the VBAT voltage level is done by charge control block (CHACON). MSTRX=`1' output reset signal (internal to UEM) is given to UEM's RESET block when VBAT>VMSTR+ and UEM enters into the reset sequence described in section Power Up and Reset. If VBAT is detected to fall below VMSTR- during start-up charging, charging is cancelled. It will restart if new rising edge on VCHAR input is detected (VCHAR rising above VCHDET+). Power up when battery is connected Baseband can be powered up by connecting battery with sufficient voltage. Battery voltage has to be over UEM internal comparator threshold level, Vcoff+. Battery low limit is specified in Table 2. When battery proper voltage is detected UEM enters to reset sequence as described in section Power Up and Reset. This power up sequence is meant for test purposes, in normal use (Btemp resistor > 1k) the phone will power off again immediately, without noticing the user. RTC alarm power up If phone is in POWER_OFF mode when RTC alarm occurs the wake up procedure is as described in section Power Up and Reset. After baseband is powered on an interrupt is given to MCU. When RTC alarm occurs during ACTIVE mode the interrupt for MCU is generated.
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RH-9 System Module & UI
A/D Channels The UEM contains the following A/D converter channels that are used for several measurement purposes. The general slow A/D converter is a 10 bit converter using the UEM interface clock for the conversion. An interrupt will be given at the end of the measurement. The UEM's 11-channel analog to digital converter is used to monitor charging functions, battery functions, voltage levels in external accessory detection inputs, user interface and RF functions. When the conversion is started the converter input is selected. Then the signal processing block creates a data with MSB set to '1' and others to '0'. In the D/A converter this data controls the switches which connect the input reference voltage (VrefADC) to the resistor network. The generated output voltage is compared with the input voltage under measurement and if the latter is greater, MSB remains '1' else it is set '0'. The following step is to test the next bit and the next., until LSB is reached. The result is then stored to ADCR register for UPP to read. The monitored battery functions are battery voltage (VBATADC), battery type (BSI) and battery temperature (BTEMP) indication. The battery type is recognized through a resistive voltage divider. In phone there is a 100kOhm pull up resistor in the BSI line and the battery has a pull down resistor in the same line. Depending on the battery type the pull down resistor value is changed. The battery temperature is measured equivalently except that the battery has a NTC pull down resistor in the BTEMP line. KEYB1&2 inputs are made for keyboard scanning purposes. These inputs are also routed internally to the miscellaneous block. KEYB1&2 inputs are not used In NHM-8, and the connected interrupts must be kept disabled by SW. The HEADINT and HOOKINT are external accessory detection inputs used for monitoring voltage levels in these inputs. They are routed internally from the miscellaneous block and they are connected to the converter through a 2:1 multiplexer. PATEMP and VCXOTEMP channels are not used as originally intended. PATEMP input is used for detection of accessory covers (CTI), VCXOTEMP is not used in NHM-8.
Table 24: Slow A/D converter characteristics Characteristics Number of bits Integral non linearity Differential non linearity Conversion time Min 10 +/- 2 +/- 2.5 11 Typ Max Unit bits LSB LSB µs
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Input voltage range (1) Input capacitance 0 4 5 .
CCS Technical Documentation
2.7 6 V pF
Table 25: Slow A/D converter input ranges Signal VBATADC ICHAR VCHARADC BSI BTEMP PATEMP VCXOTEMP HEADINT HOOKINT LS KEYB1 KEYB2 Min 2.7 VBATADC 0.1 0 0 0 0 0 0 0 0 0 Typ Max 5.25 VBATADC+0.316 1.35 2.7 2.7 2.7 2.7 2.7 2.7 2.7 2.7 2.7 Unit V V V V V V V V V V V V Not used in NHM-8 Not used in NHM-8 Not used in NHM-8 Used for CTI Not used in NHM-8 Note Physical input on UEM is VBATREGS
AD converter is calibrated in production. Battery Voltage Measurement A/D Channel (VBATADC) The battery voltage is scaled inside the UEM in order to avoid external components. The maximum battery voltage that gives a full A/D reading is 5.25V. Battery voltage can be connected to sample and hold circuit either through a resistive voltage divider or through a voltage scaling circuit. The voltage scaling circuit is used to get larger input voltage range for the converter than what is achieved with the resistive divider. The sample and hold circuit is used to measure the battery voltage during transmit burst. Otherwise the S/H circuit is bypassed. Note that both the battery voltage (VBATADC) and the charger voltage (VCHARADC) are sampled whenever the sampling function is used. Charger Voltage Measurement A/D Channel (VCHARADC) This channel is used to measure the charger input voltage VCHAR. The charger input idle voltage is measured to identify the charger. Associated with the charger voltage measurement an envelope detector is used to detect a rectifier bridge type of charger. Connection of the charger is performed by the rising edge of the charger input. The charger must be a full wave rectifier. A half wave rectifier charger have to be rejected.
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RH-9 System Module & UI
This A/D channel has a feature built into it that the charger voltage measurement can be specified to be performed when the charger switch is closed or open. This information is provided by the MCU when this channel is addressed. The charger measurement A/D channel can also be timed to the charger envelop detector in order to measure the standard charger peak voltage. Charger Current Measurement A/D Channel (ICHAR) This A/D channel is used to measure the charger current ICHAR. The current sensor is implemented using 0.22 resistor in series between UEM charging voltage output and battery voltage. The voltage drop over the resistor is examined. The charger current measurement is used for charger detection and maintenance charging PWM calculations. Battery Temperature Measurement A/D Channel (BTEMP) The temperature of the battery pack is monitored during charging. The battery pack is equipped with an NTC resistor, value is 47kOhm at 25oC. The BTEMP signal is connected on the baseband to the UEM. An external 100kOhm pull-up is needed. Battery Size Measurement A/D Channel (BSI) This channel is used to identify the battery. The battery pack BLC-2 has a resistor 75kOhm connected to ground. An external 100kOhm pull-up resistor is on the phone side. The BSI signal is connected to UEM. External Accessory Detection A/D Channel (HEADINT, HOOKINT) In order to be able to detect DCT4 type of accessories an A/D converter channel is used to measure the DC level on the external microphone. The detection is implemented using a pull-down resistor in the accessory and a pull-up on the baseband side. The pull-up resistor on the baseband side is internal to the UEM. This A/D channel is internally connected to either HeadInt or HookInt. PA Temperature measurement A/D Channel (PATEMP) In RH-9 this A/D channel is used for Cover Type Detection (CTI) in conjunction with DCOUT covers.The detection is implemented using a pull-down resistor in the accessory and a pull-up on the baseband side. LCD & Keyboard Backlight LCD Backlight LCD Backlight consists of 2 TBSF (Through the Board Side Firing) white LEDs which are placed on the main PWB below the LCD area. They lit into the light guide where the light is distributed to generate sufficient backlight for the LCD.
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RH-9 System Module & UI Keyboard light
CCS Technical Documentation
The keyboard light consists of 2 TBSF white LEDs, which are placed under the keyboard and use the light guide to distribute the light LED driver circuit The LCD & Keyboard backlight LEDs are drivenfrom a sharedLED driver with a constant current vharge-pump circuit (LM2795) as shown below in figure 3. The driver circuit is controlled by the UEM output pin [DLIGHT] and drive current is 20mA pr. output. Separate outputs are used for LEDs for LCD, and a shared output is used for Keyboard LEDs (10mA). By appropriate SW the driver can be PWM controlled for dimming purpose.
Figure 3: Shared LED driver circuit for LCD and Keyboard backlight
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RH-9 System Module & UI
LCD cell The LCD is a CSTN 96x65 full dot matrix display with a colour resolution of 12bit (4096) and a one pixel border area around the content area so total active area is 98x67 pixels. The LCD cell is part of the complete Display Assembly, which includes metal frame, gasket, light guide, spring connector, reflector, speaker and dome sheet. The figure below illustrates the complete overview of the LCD module
Figure 4: Complete overview of LCD module
Metal frame LCD cell with DBEF Earpiece RIM sheet Upper t-BEF Lower t-BEF Diffusor Connector Light guide Light guide label Dome sheet ESR
The general specifications are listed below:
·
· · · ·
Glass size, width x height x thickness 37.6mm x 1.70mm Glass thickness Viewing area (width x height) 27.7mm Active pixel area (width x height) 24.78mm Number of pixels rows ăNokia Corporation
: 38.4mm x : 0.50mm : 35.4mm x : 31.15mm x : 98 columns x 67
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RH-9 System Module & UI · Pixel height to width ratio · Pixel gap · Technology super twisted nematic) · Operating temperature range · Multiplex ratio · Main viewing direction · Illumination Mode · Colour Tone:Background · Optical response time sec@25°C
Figure 5: RH-9 LCD module
CCS Technical Documentation : 1.17:1 : 9-12µm : CSTN (colour : -25°C to +70°C : 67 : 6 o'clock : Transflective : Neutral/Black :9 frames/
C
C
C
Driver
R 0C 0
C 97
Top View
Active area 98 x 67
R 66
The LCD is powered from both VFLASH1 and VIO. VFLASH1 is used for the boosting circuit and VIO for the driver chip. SIM Interface The UEM contains the SIM interface logic level shifting. The SIM supports 3V and 1.8V SIMs. SIM supply voltage is selected by a register in the UEM. It is only allowed to change the SIM supply voltage when the SIM IF is initialized. The SIM power up/down sequence is generated in the UEM. This means that the UEM generates the RST signal to the SIM. Also the SIMCardDet signal is connected to UEM. The card detection is taken from the BSI signal, which detects the removal of the battery. The monitoring of the BSI signal is done by a comparator inside UEM. The comparator offset is such that the comparator output does not alter state as long as the battery is connected. The threshold voltage is calculated from the battery size specifications. The SIM interface is powered up when the SIMCardDet signal indicates "card in". This signal is derived from the BSI signal.
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Table 26: BSI Detection Parameter BSI comparator Threshold BSI comparator Hysteresis (1) Variable Vkey Vsimhyst Min 1.94 50 Typ 2.1 75
RH-9 System Module & UI
Max 2.26 100
Unit V mV
Note: (1) Hysteresis is defined as [Vkey(+)-Vkey(-)] / 2 Figure 6: BSI Detection
VFLASH1
Example of BSI detection SIMCARDBSdetection
BSI
Vkey(+) Vkey Vkey(-)
GND The whole SIM interface is located in the two ASICs, UPP and UEM. The SIM interface in the UEM contains power up/down, port gating, card detect, data receiving, ATR-counter, registers and level shifting buffers logic. The SIM interface is the electrical interface between the Subscriber Identity Module Card (SIM Card) and mobile phone (via UEM device). The data communication between the card and the phone is asynchronous half duplex. The clock supplied to the card is 3.25 MHz. The data baudrate is SIM card clock frequency divided by 372 (by default), 64, 32 or 16. The protocol type, that is supported, is T=0 (asynchronous half duplex character transmission as defined in ISO 7816-3).
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CCS Technical Documentation
Figure 7: UEM & UPP SIM connections
GND SIM
SIMDATA C5 C6 C7 C8 C1 C2 C3 C4 SIMCLK SIMRST VSIM SIMIO SIMClk Data
GND
SIMIO SIMClk Data
UEM
SIMIF register
UPP
UIF Block UEM digital logic UEMInt CBusDa CBusEnX CBusClk
From Battery Type contact
BSI
The internal clock frequency from UPP CTSI block is 13 MHz in GSM. Thus to achieve the minimum starting SIMCardClk rate of 3.25 MHz (as is required by the authentication procedure) and the duty cycle requirement of between 40% and 60% then the slowest possible clock supplied to the SIM has to be in the GSM system clock rate of 13/4 MHz. Internal Audio Earpiece The earpiece selected for RH-9 is the standard DCT3 13-mm earpiece from PSS (previously used for 3210, 3310, 6210, 7110 among others). The earpiece design is leak tolerant. The internal earpiece is a dynamic earpiece with an impedance of 32 ohms. The earpiece is a low impedance type, since the sound pressure is to be generated using current and not voltage as the supply voltage is restricted to 2.7V. The earpiece is driven directly by the UEM and the earpiece driver in UEM is a bridge amplifier.
Figure 8: Speaker Interface
UEM
10 EARP
EARP
10
EARN
EARN
Earpiece Acoustic Design The earpiece acoustics is designed to be type approved by type 3.2, low leak artificial ear
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RH-9 System Module & UI
Three different types of A-covers is used for RH-9: Standard cover, gaming cover and DCout cover. The gaming and DC-out covers is accessory covers. The std. A-cover and the gaming cover comply with the same TA rules since they cannot be identified HW- and SW-wise; this means that they match acoustical wise. However, the DC-out cover can be identified, meaning that this type of cover is equalised separately. In the assembly process the earpiece is placed into the lightguide from the front of the phone. On top of this the metal frame is mounted. The lightguide have stoppers in the bottom which lift the earpiece 0.3mm from the PWB to provide leakage to the back. On top of the lightguide is a metal frame which is the only visible part (in the earpiece area) when the A-cover is removed. The metal frame covers the front of the earpiece to provide protection against damage from fingers etc. The metal frame contain two acoustical holes in the area over the earpiece. These are placed as close to the vertical centre of the phone as the design allows, in order to secure a sufficient sound pressure. The metal frame have double-sided sealing in the earpiece area 1) downwards in order to provide sealing and pressure against the top of the earpiece 2) upwards to provide sealing to the A-cover. There is an opening in this gasket in the area on top of the metal frame to provide better leakage to the internal volume. The A-cover have a total of 5 acoustical holes positioned on a straight vertical line through the centre of the phone. All holes are equal in size, elliptical in shape (each hole approximates the area of a Ř1.3 hole). The three holes in top of the A-cover are positioned close to the metal frame hole in order to control loudness. The A-cover includes a ring underneath which seals against the metal frame gasket. The ring has a well defined opening of 5 mm (width). The opening has one main purpose: to allow a dust shield to be mounted. Secondly the opening will provide better conditions for obtaining good leak tolerant performance, than if only one A-cover hole was present. All covers are optimised for the use of a dust shield, the specific type is Saatitech PEC120/41. Below the earpiece is the PWB, where 4 holes will secure proper leakage to the volume between the PWB and the internal antenna. However since the PWB doesn't stretch all the way up to the top of the phone there will also be some natural leakage where the PWB is missing. Microphone electrical interface In RH-9 a differential bias circuit, driven directly from the MICB1 bias output with external RC-filters is chosen. This is a solution that has previously been used with success in other phones. The RC filter (220 , 4.7µF) is scaled to provide damping at 217 Hz. 217 Hz
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audible noise (TDMA) will occur if the bias output MICB1 demodulates in-coming radio frequencies. Common DCT4 BB specifies filtering of the reference voltage for the microphone bias generators. In below figure this filtering is included on the MICBCAP pin. Besides pure bias purposes also EMC and ESD protection is shown in figure 11. The RCfilter 2.2 k and 1nF are EMC-component, while the remaining 10 nF and 1 nF capacitors near the bottom connector are for ESD. The 33nF and 100nF series-capacitors and 12k parallel resistor create a 2'nd order high pass filter. The input impedance of the gain stage at MIC1P/N is part of the 2'nd stage of the RC-circuit. The high pass filter is required due to low-frequency noise, which is one phenomenon identified as a problem when the internal microphone is used as handsfree microphone (PPH-1/carkit mode). The microphone bias is controlled in the 8 bit AudioBiasR register.
Figure 9: Internal microphone electrical interface
UEM Placed near UEM Placed near bottom connector
MICB1
220
1k
4.7uF
MIC+
MIC1P
2k2 2*33n 12k 2*100n 1n
MIC1N
2k2 1k MIC-
1n
1n 10n 10n
MICBCAP
1u
Ringer A speaker is used to generate alerting tones and melodies to indicate incoming call, as well as used to generate game sound, keypress and warning tones for the user A new type of component is used for ringer melodies: a speaker. The speaker is a 13 mm device from PSS. It's inherited from the 13mm earpiece (also used by NHM-8) however with more height to provide opportunities for more displacement for the speaker diaphragm. The speaker have a protective shield directly in front of the diaphragm. The speaker substitutes the original buzzer. Alerting tones and MIDI melodies is generated by the speaker, which is controlled by a
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RH-9 System Module & UI
The speaker implementation have two main resonances: 1.8 kHz and 2.9 kHz. The ringer melodies is optimised for the given response so that the best possible (and loudest possible) tones will be implemented. Acoustical wise the back of the speaker is designed to be completely tight, with a welldefined volume. The volume is kept under control by a semi-adhesive gasket mounted on the back of the speaker, and the PWB. A double-adhesive gasket is being used on the front of the speaker to provide sealed conditions from front to back. In front of the speaker there is a well-defined volume which connects into the sound-port holes in the D-cover. The speaker is electrically connected to the PWB by spring contacts (similar to that for the internal earpiece).
Figure 10: Interface between the MIDI-circuit and the UEM
UEM
HEADINT
1u 100k
External audio interface
INT
10
HF
XEARP
HFCM
10 XEARN
10n
10n
10n
10n
Vbat
100k 1u 27p
42 ohm / 100 MHz Vo1
SALT
10n 10n
47k
IN47k
Vdd
IN+
100k
1u
Vo2 42 ohm / 100 MHz
BYPASS
UPP
Interface to DC-out
SHUTDOWN GND
GENIO14
Placed near UEM
Placed outside BB-can, near SALT
Accessories Batteries
RH-9 supports Li-Ion batteries.
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Figure 11: Mechanical layout and interconnections of DCT-4 battery
Table 27: Pin numbering of battery pack Signal name VBAT BSI BTEMP GND Pin number 1 2 3 4 Function Positive battery terminal Battery capacity measurement (fixed resistor, connected to GND, inside the battery pack) Battery temperature measurement (measured by ntc resistor connected to GND inside pack) Negative/common battery terminal
The BSI fixed resistor value indicates type and default capacity of a battery. NTC-resistor BTEMP measures the battery temperature. Temperature and capacity information are needed for charge control. These resistors are connected to BSI and BTEMP pins of battery connector. Phone has 100 k pull-up resistors for these lines so that they can be read by A/D inputs in the phone. External Audio RH-9 is designed to support fully differential external audio accessory connection. A headset and PPH-1 can be directly connected to system connector. Detection of the different accessories is made in analog way by reading the DC voltage value of EAD converter.
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Figure 12: Headset interface
RH-9 System Module & UI
2.7V Hookint /MBUS EAD Headint Mic_bias MICB2 MIC2P MIC2N HF HFCM
3...25k
Not all components are shown
Button Contact 2.1V 33N 33N 0.8V 0.8V 1k0 0.3V 1k0 MicGnd 1.8V
UEM
Analog Audio Accessory Detection The accessory is detected by the HeadInt signal when the plug is inserted. Normally when no plug is present, the internal pull-down on the HF pin pulls down the HeadInt signal. HeadInt comparator value is 1.9V. When the plug is inserted the switch in the connector is opened and the HeadInt signal is pulled up by the internal pull-up. The 1.9V threshold level is reached and the comparator output changes to low state causing an interrupt. Vice versa when the accessory is disconnected the HeadInt switch is closed and the HeadInt is pulled down.
Table 28: Truth table for HookInt and HeadInt HookInt Basic Headset, fully differential Button