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NPM-6 Series Transceivers
System Module and User Interface
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System Module and User Interface
CCS Technical Documentation
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CCS Technical Documentation Table of Contents
System Module and User Interface
Page No Glossary of Terms .......................................................................................................... 5 Introduction.................................................................................................................... 8 Electrical Modules .......................................................................................................8 Interconnection Diagram .............................................................................................8 Temperature Conditions ..............................................................................................9 Humidity ......................................................................................................................9 System Module ............................................................................................................ 10 Baseband Module ......................................................................................................10 Block Diagram ........................................................................................................ 11 Technical Summary ...................................................................................................11 DC Characteristics................................................................................................... 12 External and Internal Signals and Connections .........................................................15 Digital Signals ......................................................................................................... 15 Analogue Signals..................................................................................................... 16 Keyboard (board-to-board) Connector.................................................................... 17 LCD Connector (Board to Board)........................................................................... 19 DC Connector.......................................................................................................... 20 Bottom Connector ................................................................................................... 20 SIM connector ......................................................................................................... 22 Internal Signals and Connections............................................................................ 23 Headset connector ................................................................................................... 24 Functional Description................................................................................................. 25 Modes of Operation ...................................................................................................25 No Supply................................................................................................................ 25 Back-up ................................................................................................................... 25 Acting Dead............................................................................................................. 25 Active ...................................................................................................................... 25 Sleep Mode.............................................................................................................. 26 Charging .................................................................................................................. 26 Battery ..................................................................................................................... 26 Power Up and Reset ..................................................................................................... 28 A/D Channels ............................................................................................................... 28 FM Radio ...................................................................................................................30 IR Module ............................................................................................................... 30 Backup Battery........................................................................................................ 30 SIM Interface........................................................................................................... 30 ACI .......................................................................................................................... 31 External Accessory Regulator................................................................................. 32 External Audio ...........................................................................................................32 internal Audio ............................................................................................................33 IHF Speaker & Stereo Audio Amplifier ................................................................. 33 Internal Microphone................................................................................................ 34 Internal Speaker....................................................................................................... 34 Memory Block ...........................................................................................................35 Security.................................................................................................................... 35 Clock distribution ......................................................................................................35 Audio Control.......................................................................................................... 36 ăNokia Corporation. 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Accessory identification and Power Supply............................................................ 37 RF Module ................................................................................................................... 38 RF Frequency Plan .................................................................................................. 39 DC characteristics ......................................................................................................40 Regulators................................................................................................................ 40 Power Distribution .................................................................................................. 41 RF characteristics .......................................................................................................42 Transmitter characteristics ...................................................................................... 42 Receiver characteristics........................................................................................... 43 RF Block Diagram .................................................................................................. 43 RF Block Diagram NPM-6 ..................................................................................... 44 Frequency synthesizers ........................................................................................... 45 Receiver................................................................................................................... 45 Transmitter .............................................................................................................. 46 Front End................................................................................................................. 47 Power Amplifier...................................................................................................... 48 RF ASIC Helga ....................................................................................................... 49 AFC function........................................................................................................... 49 Antenna .................................................................................................................. 49
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System Module and User Interface
Glossary of Terms
ACCIf ACI ADC AEC AFC AEM AGC AIF ALWE API ARM ASIC BB BT CBus CCONT CCI CCP CIS CMT CPU CTSI COBBA_GJP CSP Accessory Interface block of MAD2WD1 Accessory Control Interface Analog-Digital Converter Acoustic Echo Canceller Automatic Frequency Control Auxiliary Energy Management ASIC Automatic Gain Control Application Interface Background noise suppressor Application Programming Interface Processor architecture Application Specific Integrated Circuit Baseband Bluetooth Control Bus connecting UPP_WD2 with AEM and UEM Power management IC for digital phones Camera Control Interface Compact Camera Port PCMCIA Card Information Structure Cellular Mobile Telephone (MCU and DSP) Central Processing Unit Clocking Timing Sleep Interrupt DCT3 RF-interface and audio codec ASIC with serial MAD interface Chip Scale Package
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System Module and User Interface DAC DAI DB DCT3 DCN DLL DRC DSP EGSM EFR EGPRS EMC EMI EXT RF FBUS GPRS GSM HS HSCSD IC I/O IrDA LCD LNA Digital-Analog Converter Digital Audio Interface Dual band
CCS Technical Documentation
Digital Core Technology, 3rd generation Offset Cancellation control signal Dynamic Link Library Dynamic Range Controller Digital Signal Processor Extended GSM Enhanced Full Rate Enhanced General Packet Radio Service Electromagnetic compatibility Electromagnetic Interference External RF Asynchronous Full Duplex Serial Bus General Packet Radio Service Global System for Mobile communications Half Rate Speech High Speed Circuit Switched Data Integrated Circuit Input/Output Infrared Association Liquid Crystal Display Low Noise Amplifier
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CCS Technical Documentation MBUS MCU MDI MFI PA PC PCM PCM SIO PCMCIA PIFA PWB RF SIM SMART UEM UI UPP VCXO VCTCXO 1-wire half duplex serial bus Micro Controller Unit MCU-DSP Interface Modulator and Filter Interface Transmit Power Amplifier Personal Computer Pulse Code Modulation
System Module and User Interface
Synchronous serial bus for PCM audio transferring PC Memory Card International Association Planar Inverted F-antenna Printed Wiring Board Radio Frequency Subscriber Identity Module PCMCIA interface ASIC Universal Energy Management User Interface Universal Phone Processor Voltage Controlled Crystal Oscillator Voltage Controlled Temperature Compensated Crystal Oscillator.
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Introduction
Electrical Modules
The system module AK4 consists of Radio Frequency (RF) and baseband (BB). User Interface (UI) contains display, keyboard, IR link, vibra, HF/HS connector and audio parts. FM radio is located on the main PWB AK4. The electrical part of the keyboard is located in separate UI PWB named KU4. KU4 is connected to radio PWB through spring connectors. The Baseband blocks provide the MCU, DSP, external memory interface and digital control functions in the UPP ASIC. Power supply circuitry, charging, audio processing and RF control hard ware are in the UEM ASIC. The purpose of the RF block is to receive and demodulate the radio frequency signal from the base station and to transmit a modulated RF signal to the base station. The UI module is described in a dedicated section of the manual.
Interconnection Diagram
Figure 1: Interconnection diagram
Keyboard module
Flashlight
Display
IHF speaker
SIM
Antenna
Radio Module NPM-6 NHL-4
Battery Charger
Microphone
IR Link
Earpiece
Tomahawk Accessories
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System Module and User Interface
Temperature Conditions
Specifications are met within range of -10...+55 deg. C ambient temperature Storage temperature range -40...+70 deg. C
Humidity
Relative humidity range is 5... 95%. This module is not protected against water. Condensated or splashed water might cause malfunction momentary. Long term wetness will cause permanent damage.
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System Module
The System module (or Engine) consists of Baseband and RF sub-modules, each described below.
Baseband Module
Main functionality of the baseband is implemented into two ASICs: UPP (Universal Phone Processor) and UEM (Universal Energy Management). UPP ASIC provides the MCU, DSP, external memory interface and digital control functions. UEM ASIC contains power supply circuitry, charging, audio processing and RF control hardware. The baseband architecture supports a power saving function called "sleep mode". This sleep mode shuts off the VCTCXO, which is used as system clock source for both RF and baseband. During the sleep mode the system runs from a 32 kHz crystal. The phone is waken up by a timer running from this 32 kHz clock supply. The sleep time is determined by net work parameters. Sleep mode is entered when both the MCU and the DSP are in standby mode and the normal VCTCXO clock is switched off. NPM-6 supports both three and two wire type of Nokia chargers. Three wire chargers are treated like two wire ones. There is not separate PWM output for controlling charger but it is connected to GND inside the bottom connector. Charging is controlled by UEM ASIC (Universal Energy Management) and EM SW running in the UPP (Universal Phone Processor). BL-4C Li-ion rechargeable battery is used as main power source for NPM-6. BL-4C has a capacity of 720 mAh.
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CCS Technical Documentation Block Diagram
System Module and User Interface
Figure 2: Baseband block diagram
LCD
Passive colour STN
RF Interface
FLASH
128Mb
SRAM
4Mb
Flashlight
SIM
DCT-3
UEM V6
UPP8M v2.2
Keyboard
Keyboard Illumination
Battery
BL-4C 1.8 V
IR
Vibra
Accessory Regulator
IHF
Mo/St Amp
LM4855
TEA5767 St
FM radio
Charger
DC jack
System connector
Tomahawk
Technical Summary
Baseband of the NPM-6 is running from power rails 2.8V analog voltage and 1.8V I/O voltage. UPP core voltages can be lowered down to 1.0V, 1.3V and 1.5V. UEM includes 6 linear LDO (low drop-out) regulator for baseband and 7 regulator for RF. It also includes 4 current sources for biasing purposes and internal usage. UEM also includes SIM interface which has supports both 1.8V and 3V SIM cards. A real time clock function is integrated into the UEM, which utilizes the same 32kHz clock supply as the sleep clock. A backup power supply is provided for the RTC-battery, which keeps the real time clock running when the main battery is removed. The backup power supply is a rechargeable surface mounted Li-Ion battery. The backup time with the battery is 30 minutes minimum. The interface between the baseband and the RF section is mainly handled by the UEM ASIC. The UEM provides A/D and D/A conversion of the in-phase and quadrature receive and transmit signal paths and also A/D and D/A conversions of received and transmitted audio signals to and from the user interface. The UEM supplies the analog TXC and AFC signals to RF section according to the UPP DSP digital control.
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CCS Technical Documentation
Data transmission between the UEM and the UPP is implemented using two serial busses, DBUS for DSP and CBUS for MCU. There are also separate signals for PDM coded audio. Digital speech processing is handled by the DSP inside UPP ASIC. The UEM is a dual voltage circuit, the digital parts are running from the baseband supply 1.8V and the analog parts are running from the analog supply 2.78V also VBAT is directly used. The baseband supports both internal and external microphone inputs and speaker outputs. Input and output signal source selection and gain control is performed by the UEM according to control messages from the UPP. Keypad tones, DTMF, and other audio tones are generated and encoded by the UPP and transmitted to the UEM for decoding. An external vibra alert control signals are generated by the UEM with separate PWM outputs. NPM-6 has two serial control interfaces: FBUS and MBUS. FBUS can be accessed through a test pad and the System Connector as described later. The MBUS can be accessed through the production test pattern as described in section MBUS Interface EMC shielding is implemented using a metallized plastic frame. On the other side, the engine is shielded with PWB grounding.
DC Characteristics Regulators and Supply Voltage Ranges
Absolute Maximum Ratings
Signal Battery Voltage (Idle) Battery Voltage (Call) Charger Input Voltage Note -0.3V - 5.5V Max 4.8V -0.3V - 16V
Battery Voltage Range
Signal VBAT Min. 3.1V Nom 3.7V Max 4.2V (charging high limit voltage) Note 3.1V SW cut off
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CCS Technical Documentation BB Regulators
Signal VANA VFLASH1 VFLASH2 VSIM VIO VCORE Min. 2.70V 2.70V 2.70V 1.745V 2.91V 1.72V 1.0V 1.235V 1.425V 1.710V Nom 2.78V 2.78V 2.78V 1.8V 3.0V 1.8V 1.053V 1.3V 1.5V 1.8V
System Module and User Interface
Max 2.86V 2.86V 2.86V 1.855V 3.09V 1.88V 1.106V 1.365V 1.575V 1.890V
Note Imax = 80mA Imax = 70mA Isleep = 1.5mA Imax = 40mA Imax = 25mA Isleep = 0.5mA Imax = 150mA Isleep = 0.5mA Imax = 200mA Isleep = 0.2mA Default value 1.5V
Current Sources
Signal IPA1 and IPA2 IPA3 and IPA4 0.5mA Min. Nom 0mA - 5mA 1mA 1.5mA Max Note Programmable, +/-6% VIPA1,VIPA1 = 0V - 2.7V VIPA1 = 0V - 2.7V
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System Module and User Interface Power Distribution diagram
CCS Technical Documentation
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System Module and User Interface
External and Internal Signals and Connections
This section describes the external and internal electrical connection and interface levels on the baseband. The electrical interface specifications are collected into tables that covers a connector or a defined interface. Digital Signals AC and DC Characteristics of RF-BB digital signals
Signal name From To Parameter Input Characteristics Min. TXP UPP GenIO 5 Helga "1" "0" Load Resistance Load Capacitance Timing Accuracy RFBusEna1X UPP Helga "1" "0" Current Load resistance Load capacitance RFBusData UPP the Helga "1" "0" Load resistance Load capacitance Data frequency RFBusClk UPP the Helga "1" "0" Load resistance Load capacitance Data frequency 1.38 0 10 1.38 0 10 10 1.38 0 1.38 0 10 Typ Max 1.88 0.4 220 20 1/4 1.88 0.4 50 220 20 1.88 0.4 220 20 10 1.88 0.4 220 20 10 Unit V V kohm pF symbol V V uA kohm pF V V kohm pF MHz V V kohm pF MHz RFbus clock RFbus data; read/write RFbus enable Power amplifier enable Function
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System Module and User Interface
RESET UPP GenIO 6 the Helga "1" "0" Load capacitance Load resistance 10 1.38 0
CCS Technical Documentation
1.85 0.4 20 220 V V pF kohm Reset to the Helga
Analogue Signals
Signal name VCTCXO
From VCTCXO
To UPP
Parameter Frequency Signal amplitude Input resistance Input capacitance Harmonic content Clear signal window (no glitch) Duty cycle
Min 13 0.2 10
Typ
Max 26 1.32
Unit MHz Vpp kohm
Function High stability clock signal for the logic circuits, AC coupled. Distorted sinewave eg. sawtooth.
10 -8 200 40 0 1.35 1.4 1.45 60
pF dBc mVpp % V Vpp
VCTCXOGnd RXI/RXQ
VCTCXO Helga
UPP UEM
DC level Voltage swing (static) DC level Input impedance
Ground for reference clock Received demodulated I- and Qsignals
1.3 500 2.15 1.17
1.35
1.4
V kohm
TXIP / TXIN
UEM
the Helga
Differential voltage swing (static) DC level Source impedance
2.2 1.20
2.25 1.23 200
Vpp V ohm
Programmable voltage swing. Programmable common mode voltage. Between TXIPTXIN
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System Module and User Interface
TXQP / TXQN AFC
UEM UEM
Helga VCTCXO
Same as TXIP / TXIN Voltage Min. Max 0.0 2.4 0.1 2.55 V Automatic frequency control svoltage for the VCTCXO
Source impedance Load resistance capacitance Resolution TXC UEM Helga Voltage Min. Max Source impedance Load resistance capacitance Resolution RFTemp Helga UEM Voltage at -20 deg.C Voltage at +25 deg.C Voltage at +60 deg.C 5 2.4 1
200
ohm
100 11 0.1
kohm nF bits V Transmitter power level and ramping control
200
ohm
15 10 1,57 1,7
kohm pF bits V Temperature sensor of the RF.
1,79
Keyboard (board-to-board) Connector
Pin 1 2 3 4 5 6
Signal VLED+ VLED(GND) VLED+ KEYB2
Min. 7.2 V 0.2 V 7.2 V 0.293V
Nom 0V 7.7 V 0V 0V 7.7 V 0.309V
Max 8.4 V 0.35 V 8.4V 0.324V
Condition LED off LED on LED off LED on LED off LED on 25°C
Note Supply Voltage for Keyboard LEDs LED Katode Voltage Supply Voltage for Keyboard LEDs Ambient temp. sensor on KU4
Not connected GND 0V
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7 8 9 10 11 12 13 14 15 16 ROW (4) ROW(3) COL(2) ROW(1) COL(1) ROW (0) ROW (1) COL (3) COL(4) GND 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0 0.7xVIO 0.7xVIO 0.7xVIO 0 0V 1.8 V 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO VIO 0.3xVIO High Low High Low High Low High Low High Low High Low High Low High Low High Low
CCS Technical Documentation
Keyboard matrix row 4 Keyboard matrix row 3 Keyboard matrix column 2 Keyboard matrix row 1 Keyboard matrix column 1 Keyboard matrix row 0 Keyboard matrix row 1 Keyboard matrix column 3 Keyboard matrix column 4
Note: VIO is specified in Table 3 `Baseband Regulators'
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CCS Technical Documentation LCD Connector (Board to Board)
Pin 1 2 Signal VDDI RESX Min 1.72V 0.7*VDDI 0 1us 3 SDA 0.7*VDDI 0 100ns 100ns 4 SCLK 0.7*VDDI 0 VDDI 0.3*VDDI 6.5MHz VDDI 0.3*VDDI Nom 1.8V Max 1.88V VDDI 0.3*VDDI
System Module and User Interface
Condition
Note Logic voltage supply Connected to VIO
Logic '1' Logic '0' trw Logic '1' Logic '0' tsds tsdh Logic '1' Logic '0' Max frequency tscyc tshw tslw
Reset Active low Reset active Serial data Data setup time Data hold time Serial clock input
250ns 100ns 100ns 5 CSX 0.7*VDDI 0 60ns 100ns 6 7 8 9 10 VDD NC GND VLED(GND) VLED Display 7.2V 0V 0V 0V 7.7V 2.70V 2.78V 2.86V VDDI 0.3*VDDI
Clock cycle Clock high Clock low Chip select Active low CXS low before SCLK rising edge CXS low after SCLK rising edge Supply Voltage. Connected to VFLASH1 Not Connected Ground Return current
Logic '1' Logic '0' tcss tcsh
8.4V
LED off LED on
Supply Voltage for LEDs
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System Module and User Interface DC Connector
Pin 1 Signal VCHAR Min. Nom 11.1Vpeak Max 16.9 Vpeak 7.9 VRMS 1.0 Apeak 9.2 VRMS
850 mA
CCS Technical Documentation
Condition Standard charger
Note Charger positive input
7.0 VRMS 2 CHGND
8.4 VRMS 0
Fast charger Charger ground
Bottom Connector Bottom connector is of type Pop-Port (TM)
Figure 3: Bottom connector pinout
1 Contacts, 14 pcs
14
Locking holes for accessories, 2 pcs
Bottom connector pins and signals:
Max or nominal serial impedance
Pin/Signal name 1 / Charge 2 / GND
Signal description V Charge Charge GND
Spectral range
Voltage / Current levels 0-9 V / 0.85 A 100 mOhm (PWB + conn.) Digital 0 / 2.5V-2.78V 2.78V 70mA 2.5V 90mA
Note
DC - 0.85 A
3 / ACI
ACI
1 kbit/s
47 Ohm (lowpass 50kHz) 500 mOhm (PWB + conn.)
Insertion & removal detection 200mW
4 / Vout
DC out
DC
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5 / USB Vbus 6 / USB D+ / FBUS RX DC in DC FBUS nominal 115k, fast FBUS 1.295M, USB 12M FBUS nominal 115k, fast FBUS 1.295M, USB 12M Data GND Audio in Audio in Audio out Audio out Audio out Audio out 300 - 8kHz 300 - 8kHz 20 - 20kHz 20 - 20kHz 20 - 20kHz 20 - 20kHz
System Module and User Interface
4.375-5.25V USB 0-3.3V Fbus 0 / 2.5V2.78V FBUS RX USB 0-3.3V Fbus 0 / 2.5V2.78V 33 Ohm USB spec. USB spec.
7 / USB D- / FBUS TX
33 Ohm
USB spec.
8 / USB data GND 9 / XMIC N 10 / XMIC P 11 / HSEAR N 12 / HSEAR P 13 / HSEAR R N 14 / HSEAR R P
ferrite 1Vpp & 2.5V2.78VDC 1Vpp & 2.5V2.78VDC 1Vpp 1Vpp 1Vpp 1Vpp 10 Ohm 10 Ohm 10 Ohm 10 Ohm
USB spec.
Not conn. In mono Not conn. In mono
Table 1: Board to board connector pinlist (for PopPort Assembly) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol Shield GND Charge Charge GND Shield GND ACI Vout USB Vbus USB D+ /Fbus RX USB D- /Fbus TX Data GND XMIC N XMIC P XEAR N 3 4 5 6 7 8 9 10 11 Digital input Voltage output Voltage supply input Digital input Digital output Return current Audio input Audio input Audio output 2.8V 2.8V/0.5A 5V/1A 2.8V 2.8V 1.5A 1 2 In current from charger Return current 16V/2A 16V/2A Pop-Port pin Note Max
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14 15 16 17 XEAR P XEAR LN XEAR LP Shield GND 12 13 14
CCS Technical Documentation
Audio output Audio output Audio output
SIM connector
Pin 1 Name VSIM Parameter 1.8V SIM Card 3V SIM Card 2 SIMRST 1.8V SIM Card 3V SIM Card 3 SIMCLK Frequency Trise/Tfall 1.8V Voh 1.8V Vol 3V Voh 3V Vol 4 DATA 1.8V Voh 1.8V Vol 3V Voh 3V Vol 1.8V Vih 1.8V Vil 3V Vil 3V Vil 5 6 NC GND GND 0 0 V 0.9xVSIM 0 0.9xVSIM 0 0.9xVSIM 0 0.9xVSIM 0 0.7xVSIM 0 0.7xVSIM 0 Min. 1.6 2.8 0.9xVSIM 0 0.9xVSIM 0 3.25 50 VSIM VSIM VSIM 0.15xVSIM VSIM 0.15xVSIM VSIM 0.15xVSIM VSIM 0.15xVSIM Not connected Ground V SIM data (input) Trise/Tfall max 1us Typ 1.8 3.0 Max 1.9 3.2 VSIM 0.15xVSIM VSIM 0.15xVSIM Unit V V V V MHz ns V V V SIM data (output) SIM clock SIM reset (output) Notes Supply voltage
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CCS Technical Documentation Internal Signals and Connections FM Radio Interface
BB Signal VFLASH2 FM Radio Signal Vcc1 Vcc2 VDD GenIO(3) FMClk Min. 2.7V 2.7V 2.7V 1.4V 0 Nom 2.78V 2.78V 2.78V 1.8V 75581 kHz 30ppm 2 ms GenIO(8) FMWrEn 1.4V 0V 20ms 1.8V 1.88V 0.4V Max 2.86V 2.86V 2.86V 1.88V 0.4V
System Module and User Interface
Condition
Note max. Icc1 19mA max. Icc2 800uA max. IDD 3mA
High Low Frequency Stability trise High Low twd
Reference clock for FM radio module In GSM
rise / fall time
FMWrEn high before rising edge of FMCtrlClk (write opera tion) max. 300kHz rise / fall time FMCtrlClk delay after switching on the VFLASH2 (oscillator running) Bidirectional shift register available after "search ready" data available after FMCtrlClk rising edge (read operation) FMCtrlDa stable after FMCtrlClk rising edge (write opera tion) from FM module to UPP (FMCtrlClk = '1')
GenIO(11)
FMCtrlClk
1.4V 0
1.8V
1.88V 0.4V 1 ms
High Low tr / tf tstart
50 ms
GenIO(12)
FMCtrlDa
1.4V 0
1.8V
1.88V 0.4V 14us
High Low tda
10 ms
tshift
1.5 ms
thold
GenIO(27)
FMTuneX
1.4V 0
1.8V
1.88V 0.4V
High Low
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System Module and User Interface
MIC3P FMAudio 228mVpp 50dB 2% 326mVpp 460mVpp
CCS Technical Documentation
S/N Harmonic distortion
Internal microphone
Signal MICP 2.0 V MICN 2.0V 2.1 V 2.1V Min. Nom Max 200mVpp 2.25 V 2.25V Condition AC DC DC Note 2.2kW to MIC1B
Internal speaker
Signal EARP EARN Min. 0.75V 0.75V Nom 0.8V 0.8V Max 2.0 Vpp 0.85V 2.0 Vpp 0.85V Condition AC DC AC DC Note Differential output (Vdiff = 4.0 Vpp)
Headset connector
Pin 5 Signal XMICP Min. Nom Max 1Vpp 100 mVpp 2.0 V 3 XMICN 2.1 V 2.25 V 1Vpp 100 mVpp 4 XEARN 0.75V 0.8V 0.85V 1Vpp 7 XEARP 0.75V 0.8V 0.85V 1Vpp 5 HookInt 0V 2.86V (VFLASH1) 2.86V (VANA) Condition G = 0dB G = 20dB DC G = 0 dB G = 20dB DC AC DC AC Connected to UEM AD-converter Accessory detection 1kW to GND Note 1kW to MIC2B
6
HeadInt
0V
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CCS Technical Documentation
System Module and User Interface
Functional Description
Modes of Operation
AK4 baseband has six different functional modes: No supply Back-up Acting Dead Active Sleep Charging
No Supply In NO_SUPPLY mode, the phone has no supply voltage. This mode is due to disconnection of main battery and backup battery or low battery voltage level in both of the batteries. Phone is exiting from NO_SUPPLY mode when sufficient battery voltage level is detected. Battery voltage can rise either by connecting a new battery with VBAT > VMSTR+ or by connecting charger and charging the battery above VMSTR+. Back-up In BACK_UP mode the backup battery has sufficient charge but the main battery can be disconnected or empty (VBAT < VMSTR and VBACK > VBUCOFF). VRTC regulator is disabled in BACK_UP mode. VRTC output is supplied without regulation from backup battery (VBACK). All the other regulators are disabled in BACK_UP mode. Acting Dead If the phone is off when the charger is connected, the phone is powered on but enters a state called "Acting Dead". To the user, the phone acts as if it was switched off. A battery charging alert is given and/or a battery charging indication on the display is shown to acknowledge the user that the battery is being charged. Active In the Active mode the phone is in normal operation, scanning for channels, listening to a base station, transmitting and processing information. There are several sub-states in the active mode depending on if the phone is in burst reception, burst transmission, if DSP is working etc. One of the sub-states of the active mode is FM radio on state. In that case, Audio Amplifier and FM radio are powered on. FM radio circuitry is controlled by the MCU and
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System Module and User Interface
CCS Technical Documentation
13MHz-reference clock is generated in the UPP. VFLASH2 regulator is operating. In Active mode the RF regulators are controlled by SW writing into EM's registers wanted settings: VR1A can be enabled or disabled. VR2 can be enabled or disabled and its output voltage can be programmed to be 2.78V or 3.3V. VR4 -VR7 can be enabled, disabled, or forced into low quiescent current mode. VR3 is always enabled in Active mode. Sleep Mode Sleep mode is entered when both MCU and DSP are in standby mode. Sleep is controlled by both processors. When SLEEPX low signal is detected UEM enters SLEEP mode. VCORE, VIO and VFLASH1 regulators are put into low quiescent current mode. All the RF regulators are disabled in SLEEP. When SLEEPX=1 detected UEM enters ACTIVE mode and all functions are activated. The sleep mode is exited either by the expiration of a sleep clock counter in the UEM or by some external interrupt, generated by a charger connection, key press, headset connection etc. In sleep mode VCTCXOr is shut down and 32 kHz sleep clock oscillator is used as reference clock for the baseband. Charging Charging can be performed in any operating mode. NPM-6 supports the standard NMP charger interface. Supported chargers are ACP-7, ACP-8, ACP-9, ACP-12, LCH-8 and LCH-9. Charging is controlled by the UEM ASIC and external components are needed for EMC, reverse polarity and transient protection of the input to the baseband module. The charger connection is through the system connector interface. The NPM-6 baseband is designed to support DCT3 chargers from an electrical point of view. Both 2- and 3-wire type chargers are supported. The operation of the charging circuit has been specified in such a way as to limit the power dissipation across the charge switch and to ensure safe operation in all modes. Battery 720 mAh Li-ion battery pack BL-4C is used in NPM-6.
Nominal discharge cut-off voltage Nominal battery voltage Nominal charging voltage Maximum charger output current Minimum charger output current 3.1V 3.7V 4.2V 850 mA 200 mA
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CCS Technical Documentation Pin numbering of battery pack
Signal name VBAT BSI GND Pin number 1 2 3 Function
System Module and User Interface
Positive battery terminal Battery capacity measurement (fixed resistor inside the battery pack) Ground/negative/common battery terminal
BL-4C battery pack pin order
Figure 4: Battery Pack Contents
4(GND) 3(BTEMP) 2(BSI) 1 (+)
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Power Up and Reset
Power up and reset is controlled by the UEM ASIC. NPM-6 baseband can be powered up in following ways: Press power button which means grounding the PWRONX pin on UEM Connect the charger to the charger input Supply battery voltage to the battery pin. RTC Alarm, the RTC has been programmed to give an alarm After receiving one of the above signals, the UEM counts a 20ms delay and then enters its reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+ a 200ms delay is started to allow references etc. to settle. After this delay elapses the VFLASH1 regulator is enabled. 500us later VR3, VANA, VIO and VCORE are enabled. Finally the PURX line is held low for 20 ms. This reset, PURX, is fed to the baseband ASIC UPP, resets are generated for the DSP and the MCU. During this reset phase the UEM forces the VCXO regulator on regardless of the status of the sleep control input signal to the UEM. The sleep signal from the ASIC is used to reset the flash during power up and to put the flash in power down during sleep. All baseband regulators are switched on at the UEM power on except for the SIM regulator that is controlled by the MCU. The UEM internal watchdog is running during the UEM reset state, with the longest watchdog time selected. If the watchdog expires, the UEM returns to power off state. The UEM watchdog is internally acknowledged at the rising edge of the PURX signal in order to always give the same watchdog response time to the MCU.
A/D Channels
The UEM contains the following A/D converter channels that are used for several measurement purpose. The general slow A/D converter is a 10 bit converter using the UEM interface clock for the conversion. An interrupt will be given at the end of the measurement. The UEM's 11-channel analog to digital converter is used to monitor charging functions, battery functions, user interface and RF functions. When the conversion is started the converter input is selected. Then the signal processing block creates a data with MSB set to'1' and others to'0'. In the D/A converter this data controls the switches which connect the input reference voltage (VrefADC) to the resistor network. The generated output voltage is compared with the input voltage under measurement and if the latter is greater, MSB remains'1' else it is set'0'. The following step is to test the next bit and the next...until LSB is reached. The result is then stored to ADCR register for UPP to read. The monitored battery functions are battery voltage (VBATADC), battery type (BSI) and
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battery temperature (BTEMP) indication.
System Module and User Interface
The battery type is recognized through a resistive voltage divider. In phone there is a 100kW pull up resistor in the BSI line and the battery has a pull down resistor in the same line. Depending on the battery type the pull down resistor value is changed. The battery temperature is measured equivalently except that the systemboard has an NTC pull down resistor in the BTEMP line. KEYB1&2 inputs are used for ambient temperature sensor. These inputs are also routed internally to the miscellaneous block. The monitored RF function is PATEMP detection. PATEMP input is used to measure temperature of the RFIC, the Helga.
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FM Radio
FM radio circuitry is implemented using the integrated radio IC, TEA5767. Only a few external components like filters, discriminator and capacitors are needed. TEA5767 is an integrated AM/FM stereo radio circuit including digital tuning and control functions. NPM-6 radio is implemented as FM stereo receiver.
Figure 5: FM radio
UEM Vflash2 M ic3P
VDIG VCC VCCV CO
FMR adio Xtal2 SD A SCL FM Clk FM CtrlDa FM CtrlClk FM rEn W
U PP8M v2.X Genio(3) Genio(12) Genio(11) Genio(8)
Audio Am p. H RN SEA H RP SEA H RRN SEA H RRP SEA Lin Rin Antenna connection VAFL VAFR
RF RFI W /R IN N2 1
IR Module The IR interface when using transceiver with 1.8V I/O is designed into the UPP. The IR link supports speeds from 9600 bit/s to 1.152 MBit/s up to distance of 80 cm. Transmission over the IR if half-duplex. Backup Battery Backup battery is used in case when main battery is either removed or discharged. Backup battery is used for keeping real-time clock running for minimum of 30 minutes. Rechargeable backup battery is connected between UEM VBACK and GND. In UEM backup battery charging high limit is set to 3.2V. The cutoff limit voltage (V BUCoff) for backup battery is 2.0V. Backup battery charging is controlled by MCU by writing into UEM register. Li-Ion SMD battery type is used. The nominal capacity of the battery is 0.01 mAh. SIM Interface UEM contains the SIM interface logic level shifting. SIM interface can be programmed to support 3V and 1.8V SIMs. SIM supply voltage is selected by a register in the UEM. It is only allowed to change the SIM supply voltage when the SIM IF is powered down. The SIM power up/down sequence is generated in the UEM. This means that the UEM
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generates the RST signal to the SIM. Also the SIMCardDet signal is connected to UEM. The card detection is taken from the BSI signal, which detects the removal of the battery. The SIM interface is powered up when the SIMCardDet signal indicates "card in". This signal is derived from the BSI signal.
Parameter SIMCARDet, BSI comparator Threshold SIMCARDet, BSI comparator Hysteresis (1) Variable Vkey Vsimhyst Min. 1.94 50 Typ 2.1 75 Max 2.26 100 Unit V mV
The entire SIM interface locates in two chips: UPP and UEM. The SIM interface in the UEM contains power up/down, port gating, card detect, data receiving, ATR-counter, registers and level shifting buffers logic. The SIM interface is the electrical interface between the Subscriber Identity Module Card (SIM Card) and mobile phone (via UEM device). The data communication between the card and the phone is asynchronous half duplex. The clock supplied to the card is in GSM system 1.083 MHz or 3.25 MHz.
Figure 6: SIM interface NPM-6
SIM
C5 C6 C7 C8 C1 C2 C3 C4
GND
SIMDATA SIMIO SIMClk SIMCLK SIMRST VSIM Data
GND
SIMIO SIMClk Data
UEM
SIMIF register
UPP
UIF Block UEM digital logic UEMInt CBusDa CBusEnX CBusClk
From Battery Type contact
BSI
ACI ACI is a point-to-point, bi-directional serial bus. ACI has two main features: 1)The insertion and removal detection of an accessory device 2) acting as a data bus, intended mainly for control purposes. A third function provided by ACI is to identify and authenticate the specific accessory which is connected to the System interface.
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External Accessory Regulator An external LDO Regulator exists for accessory power supply purposes. All ACI-accessories require this power supply. Regulator input is connected to battery voltage VBAT and output is connected to Vout pin in the system connector. Regulator is controlled via UPP (On/Off-function). Accessory Regulator Signals
Signal Vout GenIO(0) Min. 2.70V 1.4 Nom 2.78 1.8 Max 2.86V 1.88 0.6 Note Imax = 150mA High (ON) Low (OFF)
Figure 7: External Accessory regulation
VBAT
System Connector
UPP
Genio(0)
Accessory Regulator
Vout
External Audio
NPM-6 is designed to support fully differential external audio accessory connection. A headset can be directly connected to the system connector. With NPM-6, two different kinds of headsets can be used; Stereo and Mono headset. Headset is also used as antenna input for the FM radio. Headset implementation uses separate microphone and earpiece signals. The accessory is detected by the HeadInt signal when the plug is inserted. Normally when no plug is present the internal pull-down on the HF pin pulls down the HeadInt signal. Due to the that the comparator level is 1.9V the HeadInt signal will not change state even if the HF output is biased to 0.8V. When the plug is inserted the switch is opened and the HeadInt signal is pulled up by the internal pull-up. The 1.9V threshold level is reached and the comparator output changes to low state causing an interrupt. The hook signal is generated by creating a short circuit between the headset microphone signals. When no accessory is present, the HookInt signal is pulled up by the UEM resistor.
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Figure 8: External audio connection
SYSTEM CONNECTOR 3 * EXC24CB102U 1k9 @ 100MHz XMIC N XMIC P BIAS ground HSEARN HSEARP HSEARRN HSEARRP
14V/46V varistors
MIC BIAS 100nF MIC ASIP
UEM
2* 33nF PhoneAudio
Stereo audio Amplifier
22pF
1nF
Stereo Radio Audio
Antenna signal
FM radio
When the accessory is inserted and the microphone path is biased the HookInt signal decreases to 1.8V due to the microphone bias current flowing through the resistor. When the button is pressed the microphone signals are connected together, and the HookInt input will get half of micbias dc value 1.1 V. This change in DC level will cause the HookInt comparator output to change state, in this case from 0 to 1. The button can be used for answering incoming calls but not to initiate outgoing calls.
internal Audio
IHF Speaker & Stereo Audio Amplifier Integrated HandsFree Speaker is used to generate alerting and warning tones in NPM-6. IHF Speaker is controlled by an Audio amplifier . Speaker capsule is mounted in the Ccover. Spring contacts are used to connect the IHF Speaker contacts to the main PWB.
Figure 9: IHF speaker and amplifier
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Internal Microphone The internal microphone is connected to the UEM microphone input. The microphone input is symmetric and microphone bias is provided by the UEM. The microphone input on the UEM is ESD protected. Microphone capsule is mounted in the System Connector Assembly. Spring contacts are used to connect the microphone contacts to the main PWB.
Figure 10: Internal microphone
Internal Speaker The internal earpiece is a dynamic earpiece with impedance of 32 ohms. The earpiece must be low impedance one since the sound pressure is to be generated using current and not voltage as the supply voltage is restricted to 2.7V. The earpiece is driven directly by the UEM and the earpiece driver in UEM is a bridge amplifier. In NPM-6 8mm PICO type earpiece is used.
Figure 11: Internal speaker
UEM
22W
EARP
1000W@100MHz
22W
EARN
18V 18V
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Memory Block
For the MCU the UPP includes 2 kbytes ROM, that is used mainly for boot code of MCU. To speed up the MCU operation small 64 byte cache is also integrated as a part of the MCU memory interface. For program memory 8Mbit (512 x 16bit) PDRAM is integrated. RAM is mainly for MCU purposes but also DSP has also access to it if needed. MCU code is stored into external flash memory. Size of the flash is 64Mbit (4096 x 16bit). Security The phone flash program and IMEI codes are software protected using an external security device that is connected between the phone and a PC.
Clock distribution
Figure 12: Clock Distribution Diagram
VR3
VCTCXO
26MHz
26 MHz
HELGA
26 MHz 32 kHz
UEM
32 kHz
SLEEPX
UPP
SLICER
RFBUSCLK 13MHz CBUSCLK 1MHz
MCU DSP
PLL
DBUSCLK 13MHz LCDCLK max. 6.5MHz
CTSI
SIMCLK max. 3.25MHz
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Audio Control
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Figure 13: Audio block diagram NPM-6
earp iece
TPop-Port k om ahaw TM bottom connector bottom connector
m icro fone
U PP UEM
earp m ic1 m ic2 headint xear m ic3 ear d ata
M ic ACI
Phs Pihf Lin R in
m ic d ata
SP K R
L out R out
Lou t R out
PA
R adio
L R antenna
C ontrol Bus
IH F Sp eak er
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Accessory identification and Power Supply
System Module and User Interface
Figure 14: Accessory identification and Power supply
UEM Tomahawk Pop-port
TM
Vflash1 Vhead
Vflash1 100k HEADINT ACI-line 56k
Vflash1 headint= ACI switch 4.7k MBUS
ACI Chip
VBatt UPP Enable
Accessory Regulator 2.8V/70mA
Vout
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RF Module
The RF module comprises all RF functions of the NPM-6 engine. it is a triple band EGSM900 / GSM1800 / GSM1900 transceiver It is supporting GGSM1800PRS, EGPRS and HSCSD protocols and multislot classes 1 to 6. Transmitter and receiver have been implemented by using direct conversion architecture which means that the modulator and demodulator operate at the channel frequency. The core of the RF is the Helga RF ASIC. Other main components include - the power amplifier module which includes two amplifier chains, one for EGSM900 and the other for GSM1800/GSM1900. - 26 MHz VCTCXO for frequency reference, - 3420-3980 MHz SHF VCO (super high frequency voltage controlled oscillator), - front end module with a RX/TX switch and two RF bandpass SAW filters inside, and three additional SAW filters. EGSM900 and GSM1800 LNA's (low noise amplifier) for the receiver front-end are integrated in the Helga while GSM1900 LNA is external. The RF module includes metal shields for PA, the Helga and FM Radio. Internal antenna is based on the PIFA concept (planar inverted F-antenna). The RF is controlled by the baseband section of the engine through a serial bus, referred later on as RFBus. This serial bus is used to pass the information about the frequency band, mode of operation, and synthesizer channel for the RF. In addition, exact timing information and receiver gain settings are transferred through the RFBus. Physically, the bus is located between the baseband ASIC called UPP and the Helga. Using the information obtained from UPP the Helga controls itself to the required mode of operation and further sends control signals to the front end and power amplifier modules. In addition to the RFBus there are other interface signals for the power control loop and VCTCXO control and for the modulated waveforms.
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RF Frequency Plan
System Module and User Interface
Figure 15: RF Frequency plan
925-960 MHz 1805-1990 MHz
HELGA
I-signal Q-signal
RX
f f/4 f/2
f
f f/4 f/2
f PLL
34203980 MHz 26 MHz
VCTCXO
1710-1910 MHz
880-915 MHz
I-signal Q-signal
TX
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DC characteristics
Regulators The transceiver baseband section has a multi function analog ASIC, UEM, which contains among other functions six pieces of 2.78 V linear regulators and a 4.8 V switching regulator. All the regulators can be controlled individually by the 2.78 V logic directly or through a control register. Normally, direct control is needed because of switching speed requirement: the regulators are used to enable the RF-functions which means that the controls must be fast enough. The seven regulators are named VR1 to VR7. VrefRF01 is used as the reference voltages for the Helga, VrefRF01 (1.35V) for the bias reference and for the RX ADC (analog-todigital converter) reference. The regulators (except for VR7) are connected to the Helga. Different modes of operation can be selected inside the Helga according to the control information coming through the RFBus. List of the needed supply voltages
Volt. source VR1 VR2 VR3 VR4 VR5 VR6 VR7 VrefRF01 Vbatt
Load PLL charge pump (4.8 V) TX modulators, ALCs, driver VCTCXO, synthesizer digital parts Helga pre-amps, mixers, DtoS dividers, LO-buffers, prescaler LNAs, Helga baseband (Vdd_bb) VCO ref. voltage for Helga PA
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Power Distribution
System Module and User Interface
Figure 16: Power distribution diagram
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RF characteristics
Parameter Cellular System RX Frequency Band
Unit and value EGSM900, GSM1800 and GSM1900 EGSM900: 925 - 960 MHz GSM1800: 1805 - 1880 MHz GSM1900: 1930 - 1990 MHz EGSM900: 880 - 915 MHz GSM1800: 1710 - 1785 MHz GSM1900: 1850 - 1910 MHz EGSM900: +5...+33 dBm / 3.2 mW... 2 W GSM1800: +0...+30 dBm / 1.0 mW... 1 W GSM1900: +0...+30 dBm / 1.0 mW... 1 W EGSM900: 174 GSM1800: 374 GSM1900: 300 200 kHz EGSM900 : 15 GSM1800: 16 GSM1900: 16
TX Frequency Band
Output Power
Number of RF Channels
Channel Spacing Number of TX Power Levels
Transmitter characteristics
Item Type LO frequency range Output power Gain control range Maximum phase error (RMS/peak) Values EGSM900/GSM1800/GSM1900 Direct conversion, nonlinear, FDMA/TDMA 3520...3660 MHz / 3420...3570 MHz/ 3700...3820 MHz 2 W / 1 W/1W peak min. 30 dB max 5 deg./20 deg.
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Receiver characteristics
Item Type LO frequencies Typical 3 dB bandwidth Sensitivity Total typical receiver voltage gain (from antenna to RX ADC) Receiver output level (RF level -95 dBm) Typical AGC dynamic range Accurate AGC control range Typical AGC step in LNA Usable input dynamic range RSSI dynamic range Compensated gain variation in receiving band
System Module and User Interface
Values EGSM900/GSM1800/GSM1900 Direct conversion, Linear, FDMA/TDMA 3700...3840 MHz / 3610...3760 MHz/3860...3980 MHz +/- 91 kHz min. - 102 dBm (GSM1800/GSM1900 norm.cond. only) 86 dB 230 mVpp, single-ended I/Q signals to RX ADCs 83 dB 60 dB 30 dB GSM1800/GSM1900, -102... -10 dBm -110... -48 dBm +/- 1.0 dB 25 dB EGSM900
RF Block Diagram The block diagram of the RF module can be seen in Chapter on "RF Block Diagram". The detailed functional description is given in the following sections
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RF Block Diagram NPM-6
Figure 17: RF Block Diagram
CCS Technical Documentation
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Frequency synthesizers The VCO frequency is locked by a phase locked loop (PLL) and VCTCXO which is running at 26 MHz. The frequency of the VCTCXO is in turn locked into the frequency of the base station with the help of an AFC voltage which is generated in UEM by an 11 bit D/A (digital-to-analog) converter. The PLL is located in the Helga and is controlled through the RFBus. Loop filter filters out the comparison pulses of the phase detector and generates a DC control voltage to the VCO. The dividers are controlled via the RFBus. RFBusData is for the data, RFBusClk is a serial clock for the bus and RFBusEna1X is a latch enable, which stores the new data into the dividers. Receiver Each receiver path is a direct conversion linear receiver. From the antenna the received RF-signal is fed to the front end module where a diplexer first divides the signal to two separate paths according to the band of operation: either lower, EGSM900 or upper, GSM1800/GSM1900 path. At each of the paths a pin-diode switch is used to select either receive or transmit mode. At the upper band in receive mode either GSM1800 or GSM1900 path is further selected by another pin-diode switch. The selections are controlled by the Helga which obtains the mode/band and timing information through the RFBus. After the switches there is a bandpass filter at each of the receiver paths. These filters are included in the front end module, except for GSM1900 where it is external. Then the signal is fed to the LNAs which are integrated in the Helga in EGSM900 and GSM1800 while in GSM1900 the LNA is external. In GSM1900 the amplified signal is fed to another bandpass filter and thereafter to a pregain stage of the mixer while in EGSM900 and GSM1800 the LNA's are directly connected to the pregain stages without having SAW filters in between. The pregain stages as well as all the following receiver blocks are integrated in the Helga. The LNAs have three gain levels. The first one is the maximum gain, the second one is about 30 dB below the maximum, and the last one is the off state. After the pregain stages there are demodulator mixers at each signal path to convert the RF signal directly down to baseband I and Q signals. Local oscillator signals for the mixers are generated by an external VCO the frequency of which is divided by two in GSM1800 and GSM1900 and by four in EGSM900. Those frequency dividers are integrated in the Helga and in addition to the division they also provide accurate phase
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shifting by 90 degrees which is needed for the demodulator mixers. The demodulator output signals are all differential. After the demodulators the amplifiers convert the differential signals to single ended. Before that, they combine the signals from the three demodulators to a single path which means that from the output of the demodulators to the baseband interface there are just two signal paths (I and Q) which are common to all the frequency bands of operation. In addition, the amplifiers perform the first part of the channel filtering and AGC: they have two gain stages, the first one with a constant gain of 12 dB and 85 kHz -3 dB bandwidth and the second one with a switchable gain of 6 dB and -4 dB. The filters in the amplifier blocks are active RC filters. The rest of the analog channel filtering is provided by blocks called BIQUAD. After the amplifier and BIQUAD blocks there is another AGC-amplifier which provides a gain control range of 42 dB in 6 dB steps. In addition to the AGC steps, the last AGC stage also performs the real time DC offset compensation which is needed in a direct conversion receiver. DC offset compensation is performed during the operations called DCN1 and DCN2. DCN1 is carried out by charging off-chip capacitors in the last AGC stages to a voltage which causes a zero DC offset. DCN2 is used to set the signal offset to a constant value, VrefRF_02 which is 1.35 V. That voltage level is then used as a zero level for RX ADCs which are located in UEM. After the last AGC and DC offset compensation stages the single ended and filtered Iand Q-signals are finally fed to the RX ADCs. The maximum peak-to-peak voltage swing for the ADCs is 1.45 V. In the Helga there is a port called RF-temp which can be used for compensation of RX SAW filters thermal behavior. The temperature information to the Helga comes from a voltage over two diodes when the diodes are fed with temperature independent, constant current. Transmitter The transmitter consists of two final frequency IQ-modulators and power amplifiers, for the lower and upper bands separately, and a power control loop. The IQ-modulators are integrated in the Helga, as well as the operational amplifiers of the power control loop. The two power amplifiers are located in a single module which also includes the power detector and the directional coupler. Loop filter parts of the power control loop are implemented as discrete components on the PWB. In the GMSK mode the power is controlled by adjusting the DC bias levels of the power amplifiers. The modulated waveforms, i.e. the I- and Q-signals, are generated by the baseband part of the engine module. After post filtering, implemented as RC-networks, they go into the IQ-modulator. Local oscillator signals for the modulator mixers are generated by an external VCO the frequency of which is divided by two in GSM1800 and in GSM1900 and
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by four in EGSM900. Those frequency dividers are integrated in the Helga and in addition to the division they also provide accurate phase shifting by 90 degrees which is needed for the modulator mixers. At the upper band there is a dual mode buffer amplifier at the output of the IQ-modulator. The final amplification is realized by a three stage power amplifier. There are two different amplifier chains in a single amplifier module, one for EGSM900 and one for GSM1800/GSM1900. The lower band power amplifier is able to deliver over 2 W of RF power, while the capability of the upper band amplifier is over 1 W. In the GMSK mode the gain control is implemented by adjusting the bias voltages of the first two transistor stages thereby reaching the dynamic range of over 70 dB. After the power amplifier the signal goes through a low pass filter and a pin-diode switch which is used to select between the reception and transmission. Finally, the two signal paths, lower and upper band, are combined in a diplexer after which the signal is routed through the antenna. Power control circuitry consists of a power amplifier and an error amplifier. The power amplifier produces a voltage level related to the value of the RF voltage. It is fed to the negative input of the error amplifier where it is compared to the level of the reference signal, TXC, obtained from UEM. Depending on the difference between the two signals the biases of the power amplifier stages are either increased or decreased to get the correct power level out of the power amplifier. Front End The front end module includes: - Antenna 50 ohm input - RX GSM1900 single output, RX EGSM900 and GSM1800 balanced output - TXs EGSM900 and GSM1800/GSM1900 single 50 ohm input -3 control lines from the Helga
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Figure 18: Front End
CCS Technical Documentation
RX GSM1900 PCS Ant
RX RX GSM1800 DCS
RX
TX TX EGSM900 GSM1800/1900 DCS/PCS
RX EGSM900
Power Amplifier The power amplifier features include: - 50 ohm input and output, EGSM900 and GSM1800/GSM1900 - internal power detector - low and high power mode (EGSM900)
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Figure 19: Power amplifier
EGSM 900 out DCS/ GSM1800/1900 PCS out
EGSM 900 in DCS/ GSM1800/1900 PCS in Power detector Mode
EGSM900 GSM1800/1900 EGSM DCS/PCS
Power control Power control
RF ASIC Helga The RF ASIC module includes: - Package uBGA108 - Balanced I/Q demodulator and balanced I/Q modulator - Power control operational amplifier, acts as an error amplifier - The signal from VCO is balanced, frequencies 3420 to 3980 MHz - EGSM900 and GSM1800 low noise amplifier (LNA) are integrated. The Helga can be tested by test points only. AFC function AFC is used to lock the transceiver's clock to the frequency of the base station. Antenna The NPM-6 EGSM900/GSM1800/GSM1900 transceiver features an internal antenna.
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