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V2288
Level 3 Circuit Description 17 / 02 / 99 V1.0
V2288 Circuit Description V2288 Level 3 Product Guide RF: Receive 1) The RF Signal from the base station is received through the Antenna A100 and is fed to J300, which is a purely mechanical switch which is operated when an cable is plugged into the Aux RF socket of the phone. This connects RF to the Aux RF port or the antenna. 2) The RX signal is then fed directly into U100 RF Switch, the switch acts as an isolation between TX and RX, this is controlled via the signals VA and VB which are previously created by TX_EN and RX_EN respectively through Q110. 3) Provided VB is high, then the received signal will be passed to the band pass filter FL470, where the selected frequency band (GSM 1800 or GSM900) will be filtered through, *Note. The front-end filter has a bandwidth that is capable of working with the American GSM standard 1900Mhz. This gives the option of creating a PCS unit without the need to change many components. 4) The appropriate signal is then fed onto FL472 (For GSM 1800) or FL480 (For 900) where any existing harmonics or other unwanted frequencies are removed. 5) Our received RF frequency is now fed into the Front End IC (U432). This IC is new to the T2288 and has several main purposes; reduce discreet part count and therefore cost as it replaces the mixer stage and also the two other front end filters from previous products and also the main RX VCO buffer. (Refer to Front End IC Document for internal block diagram interpretation). The IC's power is maintained by RF_V2 (MAGIC), and is controlled with the aid of RVCO_250 (created by SF_OUT (MAGIC) and GPO4 (MAGIC) through Q172), RX_EN (Whitecap) and DCS_SEL (MAGIC). The GSM 900 signal is fed in through Pin 13, back out through Pin 12 to matching circuitry, then returns to the IC on Pin 9, where the signal is internally mixed with the RX VCO signal to produce a balanced + and 400 MHz IF Signal. The main reason for using the balanced IF output is to provide cancelling of the 3rd harmonic. This is then fed out on Pins 3 and 4. The GSM 1800 route is of the same description but uses the Pins 18-20-23-3 and 4. 6) The RX VCO U253 is now an integrated circuit and is controlled firstly from the Whitecap using the MQ SPI bus to program the MAGIC and then MAGIC drives the RX VCO IC using the CP_RX signal Pin B1. The power is supplied by RVCO_250 (SF_OUT + GPO4 through Q172). 7) The + and IF, is now fed to the SAW FL490 filter (Surface Acoustic Wave), this filter is the same as was used in previous 400MHz products, and is balanced to accept the new + and IF. 8) The signal is then passed to the MAGIC IC U200 PRE IN Pin A7 9) The signal is then demodulated internally using an external Varactor diode RX Local Oscillator set up CR249, which is driven by PLL CP Pin A9 of MAGIC U200. 10) Where in earlier products, we used to have RX I and RXQ, these signals are now only used in digital form within the MAGIC and cannot be measured. The demodulated signal is now converted internally to digital form to be passed along an RX SPI bus to the Whitecap.
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V2288 Circuit Description 11) The RX SPI signal is made up of BDR (Base band Data Receive), BFSR (Base band Frame Synch Receive) and BCLKR (Base band Clock Receive, fed from MAGIC Pins G8, G9 and F7 respectively.
12) The Whitecap U800 receives these signals on Pins A3, D4 and B4, within the Whitecap the signal is digitally processed. Baud rate reduced, Error correction bits removed, etc... 13) The digital signal is now being fed down the DI_AUD_SPI bus to the GCAP II U900, internally, the digital signal is converted to analogue and distributed to the correct outputs 14) For Earpiece, from GCAP II Pins H6 and H7 to speaker pads J502 and J503 15) The Alert is generated within the Whitecap, given the appropriate data from the incoming signal, SMS, call etc... and is fed to the alert pads J510 and J511. This signal is supported by the signal ALRT_VCC, which is generated from B+ through Q903. 16) For the headset only the SPKR- signal is used and feeds the Stereo Audio IC U1500, Pin 12, and is fed out on Pin 1, the exact operation of which can be found in the Level 3 Block diagram IC description. The output is then fed out on HEADSET_L to the Headset Jack socket J504. *NB There is no stereo headset operation for voice calls.
RF: Transmit 1) There are 2 Mic inputs, firstly from the Xcvr mic J900, where the analogue input is fed to the GCAP II U900 Pin J2 2) Secondly the analogue voice can be fed from the Aux Mic attached to the headset and will be routed from connection 1 of the headset jack J504, through to GCAP II, Pin H3. 3) Within the GCAP II the analogue audio will be converted to digital and clocked out onto the DI_AUD SPI bus to the Whitecap U800. 4) It is within the Whitecap that all information about the transmission burst is formulated i.e. The timing of the burst / The channel to transmit on / The error correction protocol / In which frame the information will be carried to the base station, etc, etc... 5) All this information is then added to the digitised audio and is transferred to the MAGIC U200 along a TX SPI bus. The bus is made up of BCLKX (Base band Clock Transmit) Pin B2 and BDX (Base band Data Transmit) Pin B6. The timing for this data is already decided for the transmission burst, and therefore a frame synch is not required. 6) The SPI comes into the MAGIC at Pin G7 (BCLKX) and Pin J2 (BDX) 7) The operation of the MAGIC is very complex and with respect to the transmit path, intergrates the functions of the Modem and its function of GMSK (Gaussian Minimum Shift Keying) and also the functions of the TIC (Translational Integrated Circuit).
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V2288 Circuit Description 8) A very basic block view of how the transmit path works within the MAGIC is demonstrated in: Fig 8.1 Internal MAGIC Operation Fig 8.1
BDX Look Up ROM CLK
Digital representation of RX VCO
AFC
Channel Info
Digital representation of TX VCO F/B
TX_CP CLK 9) The data is transmitted from Whitecap to MAGIC on TX SPI bus BDX, within the MAGIC each bit of data is clocked into a register. The clocked bit and the 3 preceding bits on the register are then clocked into the look up ROM, which looks at the digital word and from that information downloads the appropriate GSMK digital representation. Channel information and AFC information from MAGIC SPI is then added to this new digital word, this word is then representative of the TX IF frequency of GIFSYN products. As in the case of the TIC, the TX frequency feedback and the RX VCO frequency are mixed to give a difference signal, this is digitally phase compared with the `modulation' from the look up ROM. The difference creates a DC error voltage TX_CP that forms part of the TX Phase locked loop. 10) The error correction voltage TX_CP is then fed from Pin B1 of MAGIC to Pin 6 of the TX VCO IC U301, adjoining this line is the loop filter (See Loop Filter document). 11) The Loop filter comprises mainly of U310 / Q310 / Q311 and it's main function is to `smooth' out any overshoots when the channel is changed, see Fig 11.1. If this overshoot were fed to the TX VCO the resulting burst would not meet the world standards for GSM with respect to bandwidth, see Fig 11.2.
Overshoot Channel 56 Channel 24
Fig 11.2 Fig 11.1
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Acceptable 4 3dB Bandwidth
Unacceptable 3dB Bandwidth
V2288 Circuit Description 12) The Loop filter basically acts then as a huge capacitor and resistor to give a long CR time for smoothing. It uses a small capacitor and the very high input impedance buffer Op-Amp. During the TX_EN (Whitecap) period when the transmitter is preparing to operate the capacitor charges, then on receipt of DM_CS (Whitecap) when the Transmitter actually fires; the capacitor discharges through the Op-Amp giving a smooth tuning voltage, carrying modulation to the TX VCO. The support voltage for the Loop filter is V1_SW (V1 from GCAP II through Q913). 13) The TX VCO IC now creates our required output frequency with the support signals DCS_TX_VCO (DCS_SEL (U110) +TX VCO_EN (Q140) through Q130) and GSM_TX_VCO (GSM_SEL (U110) +TX VCO_EN (Q140) through Q130), to enable either GSM or DCS frequency production and the IC Power is supported by SF_OUT (MAGIC). 14) The signal is then fed out through a buffer amplifier Q320, which is switched on and off via DM_CS and supported by RF_V2 (MAGIC) 15) To prevent the output frequency from the TX VCO before stabilisation has occurred, being amplified and transmitted, there is an Isolation Diode CR320 placed. This is biased `on' by the exciter voltage from the PAC IC U350 (Power Amplifier Control IC); this allows the TX output frequency through to the Exciter Amplifier Q330 and at same time gives more or less drive to the exciter stage. 16) The signal is then fed to a two stage, wide bandwidth PA made up from Q331 and Q370, these are driven by the exciter voltage from the PAC IC, and supported by B+ and REG_B+ (Q332 / Q333 B+ regulated by TX_EN). 17) PA matching is provided using the signal TX_GSM_*DCS (TXVCO_EN + DCS_SEL through Q160) to switch on or off the diodes CR380 / 370 / 390 / 350 and 340 to match the PA between GSM and DCS using the inductive strips on the PCB. 18) The amplified signal is then fed back to the RF switch U100, as discussed in Receive, then passed to the Ant / Aux Switch J300 and transmitted through either the antenna A100 or the Aux testing port. RF: Power Control Operation
1) The PAC IC U350 (Power Amplifier Control Integrated Circuit) controls the power control of the transmitter. Below is a list of the main signals associated with the PAC IC and their purposes. 2) The RF detector (RF_IN Pin 2) provides a DC level proportional to the peak RF voltage out of the power amplifier, this is taken via an inductive strip from the output of the PA Q370. 3) DET_SW Pin 11. This pin controls the variable gain stage connected between the RF detector and the integrator. The gain of the variable stage will be unity when DET_SW is low and will be 3 when DET_SW is high (floating). 4) TX_KEY Pin 10. This signal is used to `pre-charge' the Exciter and P.A. and occurs 20µS before the start of the transmit pulse. 5) EXC Pin 7.This output drives the power control port of the exciter. An increase of this voltage will cause the exciter to increase its output power.
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V2288 Circuit Description 6) SAT_DET Pin 12. If the feedback signal from the RF detector lags too far behind the AOC signal then this output will go low, indicating that the loop in at or near saturation. This signals the DSP to reduce the AOC_DRIVE signal until SAT_DET rises. See Fig 6.1 7) AOC_DRIVE Pin 8. The voltage on this pin will determine the output power of the transmitter. Under normal conditions the control loop will adjust the voltage on EXC so that the power level presented to the RF detector results in equality of the voltage present at INT and AOC. The input level will be between 0 and 2.5V. 8) ACT Pin 9. This pin will hold a high voltage when no RF is present. Once the RF level increases enough to cause the detector to rise a few millivolts then this output will go low. In the GSM radio a resistor is routed between this point and the AOC input to cause the radio to ramp up the power until the detector goes active. Fig 6.1
DMCS goes high TX starts
TX_KEY goes high
SAT_DET goes low Linear ramp down begins
SAT_DET goes high Ramp down ceases
TX_KEY Goes low
DMCS goes low
Logic: Power Up sequence 1) Three power sources available, battery, External Power via Charger (Battery must be present to power up) a power source via the test adapter, to allow power to be applied to the unit whilst there is no battery present. 2) T2288 charger will only work with NiCd and NiMH, Lithium Ion and Alkaline batteries are not supported. 3) Battery Power Source: The unit will contain 3 X 1.2V Nickel Metal Hydride (NiMH) cells each 700mAH, type AAAL (theses are different to AAA regular batteries) part number SNN5518A. They are connected to the unit by battery contacts J605 and produce B+ through Q691 4) Charger Power Source: When the charger is connected (IRQ4 goes low), V2 (GCAP) will provide a supply onto the sense resistor within the charger, the resultant voltage drop over the resistor is sensed by the signal MAN_TEST_AD (approximately 2.4V), CHGR_SW must be high. This is sent to the GCAP II Pin A1, this decides the charging current that the charger is capable of delivering. The GCAP II then checks the MOBPORTB line (PWR_ON from COVIC U960). If the batteries are present and in usable range, PWR_ON is pulled to 6.7V and the unit will power on. The Motorola Internal Use 6
V2288 Circuit Description presence detection of the batteries is decided within the COVIC by comparing the actual battery voltage with the B+ created by the charger (Q960ąCR960ąQ691). If B+ is higher than the normal operating voltage of the batteries, PWR_ON will go low, powering the phone off. Battery voltage is sensed by B+ Pin E10 GCAP II when battery not present, or BATTERY Pin F7 GCAP II when batteries are present this is then output to Whitecap as BATT_SENSE. 5) Test Adapter Source: B+ is sent directly from the external power source i.e. replaces the battery power source entirely and therefore the unit has no requirement for the batteries to be present. 6) The GCAP II is programmed to Boost mode (5.6V) by PGB0 Pin G7 and PGM1 Pin G8 both being tied to Ground. Once B+ is applied to GCAP II Pin K5, all the appropriate voltages to supply the circuit are provided. These are: · V1 Programmed to 5.0V. V1 is at 2.775V at immediate power on, but is `boosted' to 5.0V through the switch mode power supply L901 / C901 / CR902 and C913. See Fig 6.1 for basic operation. V1 supplies the DSC bus drivers, negative voltage regulators and MAGIC. V1 is created from GCAP II Pin A6 and can be measured on C906. B+
LX Output Fig 6.1 The basic circuit operation for the Boost circuit is as follows the LX signal (GCAP II Pin B10) allows a path for B+ to charge the capacitor, when the switch is on, the capacitor then discharges through the inductor (switch off), setting up an electric field. The field then collapses setting up a back EMF to charge the capacitor, and so on and so on. The back EMF created by the inductor is greater than B+ with the +ve half of the cycle passing through the diode to charge a capacitor from where the V_BOOST voltage is taken. The frequency of the switching signal LX decides the duty cycle of the output wave and therefore the resultant voltage. V_BOOST is fed back into the GCAP. V2 Programmed to 2.775V, available whenever the radio is on and supplies most of the logic side of the board. V2 is supplied out of GCAP II Pin J2 and can be measured on either C939 or C941. V3 Programmed to 2.003V to support the Whitecap, but does support the normal 2.75V logic output from the Whitecap, it originates from GCAP II Pin B5 and can be measured on C909 or C910. VSIM1 Used to support either 3V or 5V SIM cards. Will dynamically be set to 3V upon power up, but if the card cannot be read then the SIM card is powered down and an attempt to read the card at 5V is tried. VSIM1 can be measured on C905 and is distributed from GCAP II Pin C6 (For further information, see SIM Card Operation).
· · ·
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V2288 Circuit Description VREF Programmed as V2 i.e. 2.775 and provides a reference voltage for the MAGIC IC, distributed from GCAP II Pin G9 and can be measured on C919. · -5V Used to drive display and 10V Used for RF GSM / DCS selection signals through Q160. Both voltages produced by V1 through U903 and U904. · SR_VCC Power Cut Circuit - Used to buffer the SRAM U702 voltage with a built in soft reset within the unit's software. The reason for this is to protect the user from any accidental loss of power up to 0.5 seconds i.e. If the unit is knocked, causing a slight battery contact bounce, the SR_VCC will, to the user, keep the unit running normally, whilst internally the unit resets itself. During this loss of power the unit takes it's power from a 10µF capacitor C960 (This is a replacement for the RTC battery and is charged by V2 and outputs to GCAP II Pin D6) · V1_SW See Deep Sleep Mode 7) Once the power source has been selected to power the phone on the PWR_SW must be toggled low. This can be done by pressing the Power Key S500 to create PWR_SW, which is supported by ON_2 (GCAP II Pin G5). 8) The unit will then follow on as in the sequence below:
0 50 100 150 200 250 300 350 400 450 500
·
RESET
EPROM CE
SRAM VB&LB
SPI_CE
GCAP
R/W
SPI_CE MAGIC
CLK SELECT
VCLK BFSR 1.7 after RESET, BCKLR at 1.6s
DSC_EN
DOWNLINK
V1
UPLINK
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V2288 Circuit Description On initial power up, all the backlights (DS500 DSDS11) will be on they are supported from the signal ALRT_VCC (B+ through Q903) and switched by BKLT_EN (Whitecap Pin K3) through Q907. 9) 13 MHz clock. On Power Up there are 2 different reference clocks produced. Initially, as soon as power is applied to the MAGIC IC the crystal, Y200, supported by the CRYSTAL_BASE (MAGIC Pin E1) will emit a 26MHz signal to the MAGIC IC, which will internally be divided by 2 to give our external 13MHz clock. This is then fed out of the MAGIC on Pin J6 (CLK_OUT) and distributed to Whitecap Pin H10 (CLKIN), then from Whitecap to GCAP II Pin F5 as GCAP_CLK. At the same time the 13MHz Varactor Diode CR248 is producing an output. This output is controlled in the following way: The 26MHz from Y200 is divided down to 200 kHz and fed to a phase comparator within the MAGIC. The 13MHz from CR248 is also divided down and fed in to the phase comparator, the difference in phase produces an error voltage that is fed onto the cathode of the Varactor CR248. Which regulates the output to a stable 13MHz clock. Once the software is running and the logic side of the board has successfully powered up, the CLK_SELECT signal from Whitecap Pin 1 is fed to MAGIC Pin G6. This in turn then switches the Multiplexer from the output of Y200 to the CR248 output. Phase 1 Phase 2 PLL
200kHz
Error Voltage
Y200 26MHz F F 2
F F 130 Phase Detector
F F 65
13MHz
CR248
Multiplexer MAGIC IC U913
13MHz Output to Whitecap Logic: SIM Card Interface
1) Once powered up, the SIM card is interrogated. The SIM interface is part of the Whitecap U800 and it supports both `synchronous' (Prepay card) and asynchronous, serial data transmission. Although the T2288 is programmed only for asynchronous. VSIM1 (SIM_VCC) is originally programmed to 3V but if the card is 5V then the SIM card will be powered down and VSIM1 will be reprogrammed to 5V. The signal levels for in and out of the SIM are now required to be level shifted within GCAP II U900 to 3V.these signals are:
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V2288 Circuit Description · · · Reset (Whitecap Pin E9 RST0) in to GCAP II Pin K7 LS1_IN_TG1A. This signal is then level shifted to the required voltage and fed out to SIM Contacts J803 Pin 4 from Pin J7 - LS1_OUT_TG1A. Clock: This is a 3.25MHz signal from Whitecap Pin E9 CLK0 Pin E7 to GCAP II Pin G6 LS2_IN. This signal is then level shifted to the required voltage and fed out to SIM Contacts J803 Pin 6 from Pin F6 LS2_OUT. SIM I/O Data transmission to and from SIM card; for TX, from SIM card contact SIM I/O Pin 5 through to GCAP II Pin J8 SIM I/O. Through level shifter to desired voltage and out through Pin K10 (LS3_TX_PA_B+) to Whitecap Pin F3 DAT0_TX. For RX data from Whitecap Pin B5 DATA0_RX to GCAP II, Pin H8 LS3_RX where the signal is level shifted to desired voltage and outputted on Pin J8 SIM I/O to SIM contacts Pin 5 SIM I/O. SIM_PD This signal is provided by the signal BATT_SENSE, activated by GCAP II, BATTERY Pin F7. If there are no batteries present then the unit will not power up. If batteries are present but the SIM card is either not inserted or faulty `CHECK CARD ` will be displayed. The reason behind this is to prevent the extra cost of a mechanical SIM presence detect switch and to prevent the SIM card being removed whilst connected to Aux Power.
·
Logic: Charger Circuit 1) The charging circuit contains the new COVIC U960 (Charging and Over Voltage Integrated Circuit). See COVIC Block Diagram. There are 2 charge modes either full rate charge or Trickle current charge. 2) Trickle Rate is used to safely charge a dead battery up to its usable range or to top up a charged battery. 3) Full Rate is used to charge a battery within its usable range. 4) For the circuit operation, as mentioned before the unit must first establish what type of charger is connected. The charger plug is inserted into the Charger Jack J904. This then results in IRQ4 (EXT B+_DET) being pulled low through Q961 (supported by V2). This interrupt is sent to Whitecap Pin M3. 5) Once IRQ4 is received GCAP II Pin A1 then checks the MAN_TEST_AD DC voltage level from Charger Jack Pin 4. The type of accessory connected will give a different voltage level, dependant on the value of the MANTEST resistor within. Some typical value are: · Illegal Charger - MANTEST_AD > 2.4V (unit does not beep, charge or enable backlights) · CLA - MANTEST_AD < 2.4V but > 1.7V (Unit beeps, enables backlights and starts to charge) · Easy Install Handsfree Car Kit - MANTEST_AD < 1.7V but > 0.8V (Unit beeps, enables backlights and starts to charge) · AC Charger - MANTEST_AD < 0.8V (Unit beeps, enables backlights and starts to charge) NB* CHGR_SW MUST BE HIGH FOR MANTEST_AD TO BE READ.
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V2288 Circuit Description 6) When high CHGR_SW will limit the CLA or EIHF current output to 400mA, when low MANTEST_AD the current output is limited to 900mA. The AC charger output a current of approximately 350mA. 7) When the batteries are discharged and we turn the phone on, for the first second, full rate charge is delivered, (this is due to the LX signal for V_BOOST being unstable and therefore creating a power surge). This enables the phone to consume most of the current from the charger but at the same time trickle charge the batteries up to their usable voltage level. This is achieved by setting ENABLE 'high': from Whitecap Pin L7 to COVIC Pin 5 and TRLK_SET 'low' (Whitecap Pin K4 to COVIC Pin 2). The result of this is that the signal DRV, COVIC Pin 1 opens or closes the `gate' of Q960 (very similar to the CHARGC function of other GCAP II products). The charge is then fed through CR960 and out to dual-FET Q691 to charge the battery. 8) The circuit function describing when the batteries are in the usable range and normal full rate charging is enabled is as above, however the extra current now charges the batteries and the support voltage for the phone is taken directly from the batteries. 9) For High Rate trickle charging, again the operation is as above but TRKL_SET is set `high' and ENABLE set `low'. 10) For Low rate Trickle charging TRKL_SET is set `low' and ENABLE is set `low' 11) I Sense COVIC Pin 7 is used as a control for the charging DRV signal 12) The Over Voltage protection part of the circuit works in the following way: 13) The normal operating range of the batteries is between 3V through to 4.5V and an over voltage condition would be classed at >5.1V. If a transient above this occurred then this would be sensed by the current Sense resistor R960, and fed back into the COVIC on Pin 7. This would drive ENABLE `low', enabling Trickle charge mode and reducing the current to the batteries to approximately 40mA. 14) If the transient is >6.1V then all charging stops. The over voltage comparator within the COVIC has hysterisis built in and the capacitors will begin to discharge until the voltage level is <5.1V at this point I_SENSE is reviewed again if still > 5.1V the unit begins to trickle charge. 15) Instrumental in both these operations being carried out successfully is a 10µF capacitor C970 (Situated near V_BOOST circuitry). As the transient occurs this capacitor charges up, and reduces the voltage rise to the COVIC circuit, therefore giving the COVIC more time to operate.
Logic: Deep Sleep Mode 1) Deep sleep mode is there to provide a facility to save battery life by intermittently shutting off part of the PCB. This is achieved in the following way. The signal STBY_DL is generated from Whitecap Pin F1, through a standby delay circuit CR912 and U906 and onto Q834 and Q912. This has the effect respectively of: 2) Grounding VREF which makes MAGIC inoperable 3) Grounding V2 This switches off MAGIC, Front END IC and inhibits the Transmit path through RF_V2 4) The shutdown is only for a fraction of a second and during that time the GCAP Clock supports the logic side of the unit. The GCAP clock is generated by Y900, which
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V2288 Circuit Description generates a 32.768MHz clock. This clock is output from Whitecap Pin C7 and fed directly to Whitecap Pin P4. The clock is always monitored by Whitecap and should it fail, the unit will no longer go into deep sleep mode.
Logic: Keypad Operation 1) The keypad works as a matrix supported V2. The signals inform the Whitecap upon a key press by dropping the signal `low'. Below is the Key Matrix.
KBR0 KBR1 KBR2 KBR3 KBR4 KBC0 KBC1 KBC2 KBC3 KBC4 GND KBR0 X 8 7 X X # 0 6 5 X X KBR1 8 X 1 X X 9
SCROLL UP
KBR2 7 1 X X X * 4
MAIL BOX CLEAR
KBR3 X X X X X X X X X X
VOL DOWN
KBR4 X X X X X X X X X X
FM RADIO
KBC0 # 9 * X X X X SHIFT
SCROLL DOWN
KBC1 0
SCROLL UP
KBC2 6 3
MAIL BOX
KBC3 5 2
CLEAR
KBC4 X X X X X X X X X X
VOL UP
GND X X
X VOL DOWN FM RADIO
4 X X X X X
MENU
X X
SHIFT
X X
SCROLL DOWN MENU OK
X X X X
VOL UP
X X
OK
3 2 X X
X X X
X X
X X
X X
X X
X
FM Radio: FM IC 1) The FM IC is new to any Motorola product and is incorporated into the V2288 Modulus II (R). It is controlled by the FM data bus, consisting of: · RW_AM_FM: WhiteCap output Pin M2. When low, WhiteCap signal DATA_AM_FM (Whitecap Pin N1) is configured as an input to read data from the FM IC. When high, DATA_AM_FM is configured as an output. The Whitecap shall then send appropriate data to the FM IC. · CLK_AM_FM: Whitecap output, Pin D2. This has two functions. 1st: To clock the SPI bus data (100KHz). 2nd: Tells the MO_ST output of the FM IC U1001 Pin 26 to indicate the mono/stereo or the tuned / un-tuned status. · DATA_AM_FM: WhiteCap data in/output. Refer to FM IC Block Diagram Basic FM IC Operation: Receiver function
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V2288 Circuit Description 1) The antenna signal FMin is routed from the headset ground line through the antenna matching circuit into the tuned front end on Pin 47 of the U1001. The front end and the FM Oscillator are tuned by the TUNE signal from the internal PLL circuit of the IC. 2) The output signal from the tuned front-end and the FM Oscillator are routed into the mixer stage. The output of the mixer is a 10.7 MHz IF signal; this is due to the FM Oscillator running 10.7 MHz above the antenna signal. 3) The 10,7 MHz IF signal than passes the first IF filter and the first amplifier stage. Behind the amplifier the signal path is split in two-signal path. · · The first supports the AM FM Indicator Stage that converts the IF signal to an analogue voltage. This voltage is routed to Pin 22 of the U1001 as FM_RSSI. The FM_RSSI level is corresponding to the receiver field strength. The second passes the signal to the 2nd IF filter and IF amplifier to feed into the Demodulator stage.
4) The FM demodulator stage is using the 10.7 MHz crystal Y1003 to demodulate the IF signal. The output supports three different parallel filter stages. · · · The 1st is filtering the frequency-band from 0 to 15kHz that contains the L+R information. The 2nd is filtering the frequency-band from 23 to 53kHz that contains the HELP Signal. The 3rd is filtering the 19KHz pilot tone and is working to detect the pilot to support the 38 kHz PLL/VCO stage.
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V2288 Circuit Description See Fig 4.1 for a block diagram of the transmitter stage to see how the 3 different bands are created.
STEREO MICROPHONE L R
FIG 4.1
Time and Phase Correction
L-R
L+R
Modulator
L+R
Helpsingnal
38 kHz
2f f
19kHz Pilot
U
Sum signal Help signal L+R
Pilot
L-R
0,03 5 10 15 19 20 25 30 35 38 40
L-R
45 kHz 50 55
5) The 38KHz PLL/VCO Stage needs to be phased because the amplified output is used to demodulate the HELP SIGNAL into the original L-R signal. The 2nd output of the amplifier is multiplied by 4 to get a 152KHz signal on Pin 26 of the U1001. · This 152 kHz /MO_ST signal output is used, while phasing, as a control signal for the test set. The tolerance should be +/- 2KHz. · The MO_ST part of the signal works in conjunction with the CLK_AM_FM signal to indicate the mono/stereo or tuned/not tuned status to the WhiteCap IC. (See table below) CLK_AM_FM
LOW LOW HIGH HIGH
MO_ST
LOW HIGH LOW HIGH
Result to WhiteCap PA5
stereo mono tuned not tuned
6) The L-R signal out of the mixer and the L+R signal from the 0-15KHz filter stage are feeding into the Decoder Matrix. Result of sum and difference are the left FM_L and
Motorola Internal Use
14
V2288 Circuit Description right FM_R audio signal at Pins 15 and 16 respectively from the U1001. These are then fed to the Stereo Audio IC U1500. FM Radio: Stereo Audio IC U1500 The Stereo Audio IC (sometimes referred to as JAMS IC is basically a path selector for audio and has 6 different modes of operation. For further information refer to the Stereo Audio IC document. The 6 modes of operation are: 1) Voice to Earpiece Speaker As with other GCAP II products Speech audio will be routed through the GCAP to SPKR + and 2) Voice to Mono Headset GCAP II SPKR+ will be disabled and the speech will be routed from SPKR to VC_R_IN2 to drive SPKR_R_OUT. Left Channel will be muted. 3) Voice to Stereo headset As above 4) FM Radio to Earpiece Speaker Signal routed from FM IC to JAMS, from VC_LOUT1 of JAMS the signal will be sent to the Aux Mic I/P of the GCAP II, within the GCAP the Codec is bypassed and both SPKR + and are enabled. NOT USED 5) FM Radio to Mono headset R Channel of FM IC will be routed to VC_R_IN1, which will drive SPKR_R_OUT; the left channel of JAMS will be muted. 6) FM Radio to Stereo Headset As above but in this circumstance the left channel of the FM IC and the JAMS will be enabled driving both SPKR_R_OUT and SPKR L_OUT respectively. 7) IRQ2 is used as a master-detect (Active Low) JAMS DIV_REF buffer and Comparator enabled. 8) IRQ3 determines headset type i.e. Stereo or Mono
Logic: Display 1) The display is a 96 X 64 pixel graphics display and is connected to the PCB via a 16 Pin ZIF connector J902. The LCD is controlled by: · CS1 Chip Select which originates from DP_EN_L, Whitecap Pin A11 to J902 Pin 1. · RES which originates from RESET, Whitecap Pin P2 to J902 Pin 2. · R/W which originates from R_W, Whitecap Pin P2 to J902 Pin 2. · 7 Data Lines from Whitecap DO D7 · The display is supported by 5V originating from U903 and can be measured on C963 and V2 · Also the data / command signal AO from Whitecap Pin B12.
Motorola Internal Use
15
DB Modulus III (Shark R-Look) 8485933h06
REVISIONS
GSM SERVICE SUPPORT GROUP RF SCHEMATICS DualBand Modulus III (Shark R-Look) Michael Hansen, Ralf Lorenzen, Ray Collins 04.02.00 Rev. 1.0 8485933h06 Page 1
Shark level 3 debug
issue17/02/2000
SHARK Modulus 3
Dual band level 3 debug
Version: 1.0 Prepared by _Fabrizio Alba_____________________ Date: Feb , 02 , 2000 Approved by _____________________ Total Pages: 19
- MOTOROLA INTERNAL USE ONLY -
Shark level 3 debug
issue17/02/2000
REVISION HISTORY Version
1.0
Date
23/12/1999
Name
Fabrizio Alba
Reason
First release
- MOTOROLA INTERNAL USE ONLY -
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
Supply phone by means No 3 standard 3AAAL NiMH batteries code SNN5542 and check following tests sequence
For any page see electrical diagram equivalent
Modulus 3 test sequence
Does phone power up correctly ? YES Does phone draw a lot of current ? NO Does display works correctly? YES Does backlight works correctly? YES Does keypad works correctly? YES Does phone shows "phone failure see supplier ? NO go to " 1 " PAG 02
NO
Go to " no power up " on pag. 03
YES
ON FUTURE
NO
Go to " no display " on pag.11
NO
Go to " no backlight "on pag.11
NO
Go to " no keypad " on pag.12
YES
ON FUTURE
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 1
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999 "1"
Connect phone to HP 8922 (active cell) Does phone go into service at -102dBm in GSM/DCS mode? YES Does phone initiate a call on GSM/DCS mode? YES Make a phone call from analyzer Is ringer tone udible ? YES Answer call Is audio tx working correctly? YES Is audio RX on speaker working correctly? YES Insert headset on properly connector Are audio TX & RX working correctly on headset? YES Does internal charger work correctly ? YES Not fault found - MOTOROLA CONFIDENTIAL PROPRIETARY NO NO NO NO
Modulus 3 test sequence
NO
Go to " no rx GSM/DCS " on pag.05
Go to " no tx GSM / DCS " on pag.07
Go to " no alert " on pag.12
Go to " no microphone " on pag.14
NO
Go to " no audio on speaker " on pag.13
NO
Go to " no TX/RX audio on headset " on pag.14/15
ON FUTURE
Page 2
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO POWER UP
Supply phone using No 3 standard 3AAAL NiMH batteries code SNN5542 on rear housing side and check if phone power up correctly
YES
NO
Connect on pcb a test cable code "AH20101911 " set power supply generator to 4 Vcc and check if phone power up correctly
YES
Check battery contacts on J604 , J605 for dirty , check also C1712 , C1713 , Q691 for faulty. Else check rear housing for faulty.
NO
Make a short on W.D. line on R941 side ( near C913 ) AND CHECK FOLLOWING FOLTAGES: -V_BOOST = 5,6 V on C913 -V1 =5V on C906 -V2 =2,8 V on C939 (R905)-V3 = 1,8 V on C909 -SR_VCC = 2,8 V on R722 -VRef =2,8 V on C919 SEE TIMING SEQUENCE on Pag. 16 , 17.
NO
For V_BOOST issue check L901 , C980 , C970 , C981 , CR 902 , C913 for other voltages issues check any line for short or different resistence ( compare with a good one ).
YES Check Y200 , C220 , L220 for missing , dry joint or faulty , check also for " VRef " voltage presence = 2,8 V on C213 , if not ok check line between C919 & C213. Finally check on C215 for "RF_V2 " voltage = 2,8 V presence and for " RF_V1 "voltage = 2,8 V on C217.
Does 26 MHz clock is present on L220 ? YES Go to " 2 " on pag. 03
NO
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 3
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
"2"
NO POWER UP
Does " MAGIC 13 MHz " clock is present on TP 200 or C817 ?
NO
Check for 13 MHz frequency presence on CR248 , if not ok check any components surround it for missing , dry joint or faulty ; check also V1_SW = 5 V presence on R234 ( it comes from Q913 ) . If all is ok probably U200 faulty.
YES
Does " GCAP_CLK 13MHz " is present on TP 823 or C825 ?
NO
Check following voltages before replacing U800: 2,8V=VDSS on R813 2,8V= VCC_MEMIF on R819 2V=VDD on R823 2V = VCCA on R825
YES
Is reset voltage at 2,7 V present on C820 ?
NO
REPLACE U900
YES Check for V2 = 2,8 V presence on C700 , C703 ,if they are ok replace U701
Is CE0 ,flash ic chip enable present on TP 824 ?
NO
YES Is CE2 , ram ic chip select present on TP 825 and CE3 on TP 826 ? YES HTC Check for U702 power supplies SR_VCC on C701 , R722, if not ok replace U900 , else replace U701.
NO
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 4
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
Connect on J300 connector an RF generator , set frequency equal to 947,4 MHz level -30dBm . Set pcb in test mode and digit RX test command 450062#
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO RX GSM/DCS
Is IF at 400 MHz frequency present on C498 at correct level ? YES Is RX_LO at 800 MHz frequency present on CR249 ?
NO
Go to " A " on pag .06
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NO
Check Q203 for correct bias :base = 1,7 V;collector= 2,7 V; emitter = GND .check also for any faulty on CR 249 and components surround it
YES
Check for data presence on: - R299 BDR - R299 BFSR - R287 BCLKR Note: digit 450062# for every point of measure
NO
With PCB in stand by check for data presence on SPI BUS: TP 205 TP 206 YES Does RX ACQ signal works correct whenever you digit 450062# test command , check this on TP "RX_ACQ"? See receiver timing below
NO
YES NO
YES
Check U200 for faulty
Problem could be U800,try to resolder it,after replace component.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 5
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
A NO RX GSM/DCS
Have you same issue also using DCS RX WAY ? set RF generator at 1842,8 MHz and digit 450700# test command.
NO
Is RF signal (digit 450062# ) at 947,4 MHz present on FL 472 pin 2? NO
YES
Check RF at GSM freq. presence on FL 472 IN, if it is ok replace FL 472 , else problem is FL 470 ( true only if you are sure that on DCS way everything is ok ).
YES
Check C472 , C473 , L471 for missing or dry joint ,else check C484 , C486 , L485 , L482 , R481. If all is ok replace U432 Is IF 400 MHz frequency present on FL 490 pin 5? NO
Is IF 400 MHz frequency present on U432 pin 3 & 4 ?
YES
Check Q490 for correct bias : base = 0,8 V ; collector = 1,6 v ; emitter = GND . SW_VCC comes from YES U200 , else check any components surround it for faulty or missing
YES
REPLACE FL490
REPLACE FL 472 (GSM ) FL 480 (DCS)
Is RF RX signal present on: U432 pin 18 AT 947,8 MHz frequency (GSM way digit 450062#) U432 pin 12 at 1842,8 MHz ( DCS way digit 450700#)?
NO Is RF signal ( as before) present on FL472 in using GSM way or on FL 480 IN using DCS way way ? NO Is there RF signal on C470 for GSM &DCS way? NO Is there same signal on FL 472 ( GSM WAY ) FL 480 ( DCS WAY )
NO
YES
YES YES
YES
Check on U432 pin 7 for RX VCO presence at 1347,4 MHz for GSM or at 1442,8 MHz for DCS ,if ok check U432 for correctbias,else check U253 for faulty. Note: RX_VCO250 see on Q172 RX_DCS*GSM see on Q160 V_tuning,on pin 1, see R221,U200. SEE U432 DIAGRAM ON PAG.18
Check for faulty: J300,U100,Q110. TX_EN comes from U800,RX_EN comes from U800 , -5Vcc comes from U903
REPLACE FL470
Check for GSM C472,C473,L471. for DCS C482 , C483 , L481
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 6
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO TX GSM/DCS
NOTE 1 : You can use this procedure for GSM way & DCS way. Whenever you have a signal with a simbol star ( * ) means that it is active low if you select this kind of way , while the same point of measure will be high for other way. Differences betwen GSM & DCS way are: TX_GSM*DCS used for adjust all RF TX way for GSM/DCS choise for any problem check on Q160 DCS_SEL comes out from U200 (or pin 2 U110) GSM_SEL comes out from U110 pin 4 -10 V comes out from U904. DCS_TX_VCO , GSM_TX_VCO for any problem check Q130
Connect on J300 connector an RF spectrum analyzer , set pcb in test mode and digit following test command: 110062# 1215# 40# for a test in GSM way. 110700# 1215# 40# for a test in DCS way. Check for RF signal presence at frequency = 902.4 MHz for GSM or 1747.8 MHz for DCS .
RF IS PRESENT , NEVER MIND LEVEL BUT IS DIRTY
RF IS NOT PRESENT
RF IS PRESENT BUT IS LOW
Is RF TX signal at GSM/DCS frequency present on U301 pin 4 ? NO
YES
Is RF TX GSM/DCS present on Q370 DRAIN?
NO
Go to " B " on pag.08
YES
Check on U301: pin 3 DCS_TX_VCO see on Q130 , Q140. pin 8 GSM_TX_VCO see on Q130 , Q140. pin 10 SF_OUT see on C246 ( comes from U200 9. pin6 CP TX check for this Q310 , Q311 , U310 , U200 , R305 , R306 , R307. DM_CS , TX_EN , they comes from U800 V1_SW comes from Q913
Check: L365 , L325 , L326 , C397for missing or dry joint , else check for faulty Q110 , U100. -5V cc see U903 TX_EN , RX_EN comes from U800
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 7
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
"B"
NO TX GSM/DCS
Is RF signal at 902,4 MHz ( GSM ) or at 1747,8 MHz ( DCS ) on Q331 collector
YES
Check Q370 for correct bias: drain = B+ voltages gate = 1,3 V see for this L370 , L336 , R370 presence ,else PAC IC bias on pag.09
NO
Is RF GSM/DCS signal present on Q330 collector
YES
Check R304 , L331 , C315 , and Q331 for correct bias: REG B+ = 3,3 V voltage on collector ,see for this Q332 , Q333. 0,4 V on base see for this L333 , R302 , CR330 , R387,else PAC IC bias on page 09
NO
Is RF GSM/DCS signal present on Q320 collector
YES
Check C1619 , R301 , CR320 , L320 , C326 , Q330 for correct bias: collector = 3,3 V REG B+ ,see for this Q332 , Q333; base = 1 V see R330 , PAC IC bias on pag. 09.
NO
Check Q320 for correct bias : collector = 2 V RF_V2 see on L322 , R300 base = DM_CS se on R326 , it comes from U 800 else be sure to have correct RF signal on U301 pin 1 ,if not ok go to " C " on page 07.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 8
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO TX GSM/DCS
PAC IC GND RF_IN GND PAC_EN 1 2 3 4 5 6 EXC 7 U350 14 13 12 11 10 9 8
pin 4,14 PAC_EN comes from Q150 via Q350 ( TX_EN comes from U800 ) pin 8 , 9 , 10, 11 comes from U200 if not ok check : SPI BUS on TP 205 & TP 206 for data presence with pcb in stand by. PAC_EN = 4V 217 Hz TX KEY see on TP 209 DM_CS see on TP 208. NOTE: REFER DIAGRAMS BELOW & on pag. 10 FOR TIMING TX. DET_SW TX_KEY OUT ACT AOC
TX POWER CONTROL ON U200 IC
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 9
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO TX GSM/DCS
MODULUS 2 TX TIMING on U200
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 10
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
CHECK CARD
Probably U800 faulty Supply PCB using pcb test cable code AE20101903. Set pcb in test mode and digit 38# sim test enable and check on J803 sim connector : 1= GND 2 = SIM VCC 5V SEE u900 ( C906 ) 3 = NC 4 = RESET see CR905 , R940 5 = SIM I/O see R945 , U901 , R938. 6 = CLK see R940 YES
NO Check, in order , U900 , U800 for faulty
NO DISPLAY Replace display with a new one. Is still a display issue?
NO Check on J902 display connector for presence of: 1 =data DP_EN it comes from U800 2= 2,7 V RESET it comes from U900 3= data A0 see R716 for missing 4= data R_W it comes from U800 from 5 to 12 = data see on C1714 to C1720 13 = 2,7 Vcc V2 it comes from C939 14 = GND 15 = -5 Vcc it comes from U903. If all is ok probably U800 faulty.
YES
END
NO BACKLIGHT
Supply pcb using pcb test cable code AE20101903; is a backlight issues only in any leds? Check on Display led's anode for ALRT_VCC = 3 V presence , if not ok check Q903 and conseguently U900 for faulty. Check also on Q907 gate for BKLT_EN = 2,7 Vcc , in this way on led's chatode there must be 1 V , if not ok check for R520 presence ,else replace Q907
NO
YES
Replace the faulty one
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 11
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO KEYPAD
Remove keypad membrane and check if here is any issues ( dirty , track , solder ) on key contacts from S501 to S522. Check also R500 , R501 , R502 for V2 = 2,8 Vcc presence, if all is ok probably U800 faulty. Note : for "VOL_UP " , "VOL_DOWN" keys check also CR502 , while for "PWR_ON " key check R508 for missing or unsoldered issue ,else problem could be U900.
NO ALERT
Supply pcb using "pcb test cable" cod AE20101903 , set pcb in test mode and digit test commands 432# = tone enabled on alert way ) 1513# (continuos tone ),4707# max volume . Check for "ALRT_VCC" = 3 Vcc presence on J510 alert pad and check for signal = 1,6 Vpp offset = 1,4 Vcc on J511 alert pad
YES
Check alert for faulty , else be sure you have not any intermittent problem ( check U900 for this ),or check for dirty on J510 , J511 alert pads.
NO
Check in order: ALRT_VCC presence = 3V on Q903 pin 1 , 2 , 5 , 6 , if not ok check on pin 4 for B+ presence .Note: because Q903 is positioned under test cable you are not able to check for ALRT_VCC presence on it,so you can check this on backlight leds anode. Check CR510 , C1723 , C1722 , C933 for missing , dry joint or faulty. Finally, only if you have not any issue on audio speaker, problem could be U900.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 12
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO AUDIO on SPEAKER
Power on pcb using "pcb test cable " code AE20101903 reset pcb and check on J502 & J503 speaker contacts for presence , during power up sequence , of a signal 1 Vpp offset 1,5 Vcc
NO Offset and audio are presents but low compared with a good one
YES
NO
Replace speaker on front housing
YES
END
Insert on J504 connector an headset jack ,is power on tone udible on speaker? NO Set pcb in test mode and digit following test command: 481000# , 434# , 4707# ; is 1 KHz tone present on speaker ? important: remove jack on J504 connector NO Digit 432# test command ( enabled alert way for audio use ); is 1 KHz tone present on alert pads J510 = B+ , J511=tone ?
NO
Check for 2,7 Vcc presence on VR977 without jack inserted and 0,6 Vcc with jack on; if not ok check for missing , dry joint or unsoldered issues on R976 , R977 , L1004 , VR 977 , J504 . Else problem could be U800.
Check for VAG = 1,5 Vcc presence on C940 , if not ok check in order: C940 , C938 , C926 , C925 for any faluty If they are ok problem could be U900
YES
You could have an intermittent problem , so check any components of speaker way for this (U800 , U900).
NO
YES
Digit 434# test command , check on SPI AUDIO DIGITAL: TP 828 VCLK at 512 KHz TP831 RX DATA TP830 TX DATA TP829 VFSRX at 8KHz. If all is ok replace U900 ,else problem could be U800.
Check for faulty , missing or dry joint on: R517 ,R518 , R519 ,CR500.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 13
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO AUDIO TX on microphone/headset
Supply pcb using "pcb test cable " code AE20101903 ,set pcb in test mode, digit test command: 434# audio on speaker 36# loop back on 4707# max volume Check which way doesn' t works correctly. Note: if each way doesn't works check on U900 for PRESENCE OF " SPI AUDIO BUS " : Tp 828 CK 512 KHz , Tp 831 data Tp 830 data , Tp 829 8 KHz ck. If they are not presents check on Tp 823 or C825 for 13 MHz ck , if not ok problem could be U800, else U900.
INTERNAL MIKE DOESN'T WORK.
HEADSET MIKE DOESN'T WORK.
Check for "Mic bias" = 1,4 Vcc presence on C923 , if not ok check for dry joint , misssing or unsoldered issues on R927 , R926 , C934 , C927 ;if ok check for same issues on C923 , R925 , L927. Finally problem could be U900.
Check in order: _J504 "headset jack" for faulty or unsoldered pins. _0,6 V presence on R977with jack on and 2,7 Vcc with itself off , if not correct check for V2 =2,7 Vcc presence on R976 , else check R976 , R977 , L1004 , VR 977 for missing , dry joint or unsoldered issues. _L500 , C1520 , C510 , C931 , R930 , C927 , R928 , L928 for same issues. _Mic_bias = 1 Vcc presence on C931, if not correct ,check R957 for missing ,dry joint or unsoldered issues.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 14
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
note: all the signal & voltage present in this procedure has to be clear and at correct level ; compare them with a good pcb
NOTE: check if any components mentioned is correctly positioned , has not dry joint and is not damaged . If all is ok replace it . If problem is still the same send BOARD IN htc.
NO AUDIO RX on headset , speaker ok
Supply pcb using pcb test cable cod.AE20101903, set pcb in test mode and digit test commands: 481000# 1 KHz tone enabled 434# audio on speaker / headset way 4707# max volume audio Insert on J504 headset connector an headset jack and check if 1KHz tone is udible on headset speaker
YES
Check J504 , U900 for any intermittent issue
NO
Is SPKR- signal at 0,5 Vpp , 1,4 Vcc offset present on R1506?
NO
Check SPKR- line for track between R933 and R1506. Else , check for 0,6v presence on VR 977 with jack on and 2,7 V with jack off ,in this way problem can be " HEAD_INT " line faulty,check for this VR977 , R977 , L1004 ,J504.
YES
Check for missing , dry joint or unsoldered issues on: R1506 , C611 , R961 , C951 , C952 , L1005 , J504.
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 15
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
See timing sequence below for no power up issues on pag.03
NO POWER UP TIMING SEQUENCE
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 16
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
See timing sequence below for no power up issues on pag.03
NO POWER UP TIMING SEQUENCE
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 17
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
U432 (front end+mixer)
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 18
Dual band Modulus 3 level 3 debug rev 1.0 lunedµ 20 dicembre 1999
MAGIC IC U200 PACKAGE
GCAP 2 IC U900 PACKAGE
WHITECAP IC U800 PACKAGE
- MOTOROLA CONFIDENTIAL PROPRIETARY -
Page 19
DB Modulus III (Shark R-Look) 8485933h06
REVISIONS
GSM SERVICE SUPPORT GROUP AL SCHEMATICS DualBand Modulus III (Shark R-Look) Michael Hansen, Ralf Lorenzen, Ray Collins 04.02.00 Rev. 1.0 8485933h06 Page 1
FMin
CR1020
10.7MHz
FL1001
V_STAB_A V_STAB_B
V_STAB_A
10.7MHz
FL1002
V_STAB_B
TUNE VCC TUNE V2 V2 V2 V2
CR1001
FM_TRACK1
U1001
FM_TRACK0
TP1002 TP1003
RW_AM_FM DATA_AM_FM CLK_AM_FM GCLK
Dualband Modulus III (Shark) 8485933H04_P13
CR1002
TP1004
MO_ST VCC
FM_RSSI
Q1030
TP1001 TP1000
Q1014 Q1014
FM_PILOT0 FM_PILOT1 FM_PILOT2
FM_V1_SW
V1
Q1015 Q1015
V2
FM_PILOT3 10.7MHz
Q1001 Y1003
Q1001
TP1005
FM_R
TP1006
FM_V1_SW VCC
FM_L
Q1013
ENABLE_FM
REVISIONS
GSM SERVICE SUPPORT GROUP Schematics Dualband Modulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins 07.12.99 Rev. 1.0 8485933H04 P13 Page 1
TXVCO_EN
GSM_SEL DCS_SEL
RVCO_250
Q160 Q160
TX_GSM_*DCS RX_DCS_*GSM -10V
RF_V2
RF_V2
RF_V2 SW_VCC
400MHz
FL490
Q490
U432
1800MHz
FL472
RF_V2
FL470
1900MHz DCS_SEL 900MHz
RX_EN
900MHz RF_V1 MAGIC_13MHz
FL480
RVCO_250
RF_V2 SF_OUT CLK_SELECT
TP200
GP04
Q172
B+
TX_KEY DM_CS MQSPI_CS1 MQSPI_CLK1 DX1 BDX
RVCO_250
RF_V1
Q201
Q202
RF_V2
CR248 A100
V1_SW
BCLKX
Vref
RX_ACQ RX_EN VA TX_EN BCLKR BDR BFSR GP05 GP04
U200 MAGIC
Dualband Modulus III (Shark) 8485933H04_P13
J300
U100 Q203 Q110 Q110
VB
RF_V2 RF_V1
26MHz
Y200
CR249
SF_OUT
VB -5V
VA RVCO_250 V1_SW V1_SW
AOC_DRIVE TX_KEY_OUT DET_SW
SW_VCC
RX_DCS_*GSM
B+ PAC_EN V1 TX_EN
Q150
TXVCO_EN
Q140
Q332 Q333 Q333
REG_B+ TX_EN SF_OUT TX_EN
TX_GSM_*DCS GSM_SEL TX_GSM_*DCS B+ TX_GSM_*DCS RF_V2 REG_B+ DCS_SEL DCS_TX_VCO TXVCO_EN
U110
Q130
GSM_SEL
CR390 CR380 CR340
REG_B+ DM_CS DCS_SEL DCS_TX_VCO GSM_TX_VCO
Q370 Q331 Q330
TX_GSM_*DCS
CR320
900-1785MHz
SF_OUT
GSM_TX_VCO
U301
Q320
V1_SW
CR330
TX_GSM_*DCS
CR370
V1 PAC_EN
PAC_EN
Q150
SAT_DET RF-V1
DCS_SEL
31325MHz
U253
RF_V2
Q310
Q350 CR350
TX_EN
U310 SH1 SH2 SH3 SH4 SH5 SH6 SH7 SH8 SH9
V1_SW_FL V1_SW
TX_EN DM_CS
Q311 Q311
U350
SAT_DET DET_SW TX_KEY_OUT AOC_DRIVE
REVISIONS
GSM SERVICE SUPPORT GROUP Schematics Dualband Modulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins 08.12.99 Rev. 1.0 8485933H04 P133 Page 1
TESTPOINTS
TP823 TP824 TP822 TP825 TP826 TP828 TP831 TP830 TP829 TP835 GCAP_CLK CE0 (FLASH_CS) CE1 (FLASH_0E) CE2 (RAM_LB) CE3 (RAM_UB) VCLK VDR VDX VFSRX DR2 TMS VCC_MEMIF VCCA VDDS VDD TDO TRST*
PWR_SW -5V V1 -10V
EMU1 TDI RESET EMU1 TCK
TCK V2 EMU0
U903
U904
TRST* SIM_TX TDI TMS EMU0 TDO CE1 CE0 R_W CE3 CE2 CE8 VRVA_OUT
SVEN0
CLK0 SIMPD0
RST0
DP_EN_L
SIM_RX
BCLKX
BCLKR VDDS BDR BFSR
VDD
BATT_SENSE
INT_CS A0
ADDRESS(21:0) V2 V2 SR_VCC
A20 A0
VDD
BDX
VDD
V2
V2 VREF
STBY_DL
U906 CR912 Charger Jack J904
DIG_AUD(3:0) EXTB+_DET CLK_SELECT FM_TRACK2 MO_ST CLK_AM_FM TIMING7 TIMING6 TX_EN DSC_RXD DSC_TXD DM_CS RX_EN RX_ACQ
Q834
VCC_MEMIF
U701
U702
V2
EXT_B+
TX_KEY MAN_TEST_AD CHRG_SW
VCC_MEMIF RESET
CR601
TP865 B+ STBY_DL V2 TP875 TP877 TP878 TP864 V1_SW
U800 WHITECAP
RFI RCLOCK
V2 VCCA
ON* UPLINK DOWNLINK DSC_EN DSC_EN V1_SW
KBR4 KBR3 KBR2 KBR1 OWDAT KBR0 VDDS KBC4 KBC3 KBC2 KBC1 BKLT_EN KBC0 TRKL_SET INTR_OUT1 ENABLE_FM
SR_CS
V2
Q912
Q913
VDD
MAGIC_13MHz
Q800
Q800
Dualband Modulus III (Shark) 8485933H04_P13
TP866 BATT_SENSE FM_PILOT3 FM_PILOT2 FM_PILOT1 FM_PILOT0 DATA_AM_FM RW_AM_FM EXTB+_DET
VCC_MEMIF
V1 VDDS
DATA(15:0)
Battery Contacts Q691
B+
DOWNLINK
VCC_MEMIF
STEREO_HEAD_INT HEAD_INT DSP_CLK_OUT
VDDS MQSPI_CS2 BOOM_EN PB_14 DP_ON_OFF VDD ENABLE CHRG_SW
DBGACK IRQ FIQ TSIZE TSTROBE*
V2
VCC_MEMIF
DR2 DX2 MQSPI_CLK2 MQSPI_CS0
VCCA
V3
V2
TSTATE0 TSTATE1 TSTATE2 MCLK VDD
VDD
VDD
V2
V2
RESET HEADSET_L V1 KBR2 IRQ_1 V2 V1 MAGIC_QSPI(3:0)
VSIM1 V3 UPLINK
GCAP_MQSPI(3:0)
KBR1
CR950
GCLK B+ V2 DR1 DX1 MQSPI_CLK1 MQSPI_CS1 KBR0
DI_AUD(3:0)
(not in use) FM_EARPIECE
B+
V_BOOST1
U1500 Stereo Audio IC
Y900
32,768MHz
PWR_SW V_BOOST1
WDOG
KBC3
DX2 MQSPI_CS2 MQSPI_CLK2 STEREO_HEAD_INT FM_L V2 FM_R SR_VCC SR_CS SPKR-
BATT_THERM_AD FM_RSSI MAN_TEST_AD
CR902
KBC2 KBC1 V2
Q960
EXT_B+ PWR_ON
Q691 CR960 Q962
B+
J902
KBC0 KBR4 -5V 2,75V GND Negative Supply NC
V2 V2 GCAP_CLK VCLK VDR VDX VFSRX
U900
VCO_ADJ B+ TRKL_SET
U960 Q962
ENABLE
KBR3 KBC4
PWR_ON ENABLE V2
CR502
V2 DATA(7:0) R_W R/W /RES /CS1 RESET DP_EN_L ALRT_VCC A0 Data/Command ON_2
HEAD_INT
SPKR-
VREF V2
VR977
ALRT_VCC
Q963 Q903 Q963
B+
PWR_SW VR500 BATT_THERM_AD
Q964
Audio Headset Jack
VAG
J504
ALRT_VCC STBY_DL (not in use) FM_EARPIECE MIC B+
Alert Pads J510 J511
SPKR+ SPKRVAG V2 VSIM1
J502 Speaker Pads J503
CR510
HEADSET_L FMin
SIM Port VSIM1 SIM_RX SIM_TX
SIM Block J803 SIM Vcc
VPP SIM I/O RESET CLK
CR500
BKLT_EN
REVISIONS
Q907
GSM SERVICE SUPPORT GROUP Schematics Dualband Modulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins 00.02.18 Rev. 1.2 8485933H04 P13 Page 1
SIM_TX ON2
CR905
U901
RST0 CLK0
Dualband Modulus III (Shark) 8485933H04_P13
REVISIONS
GSM SERVICE SUPPORT GROUP LEVEL 3 LAYOUT Moddulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins Page 2 of 2 12.04.00 Rev. 1.1
Dualband Modulus III (Shark) 8485933H04_P13
REVISIONS
GSM SERVICE SUPPORT GROUP LEVEL 3 LAYOUT Moddulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins Page 1 of 2 12.04.00 Rev. 1.1
REG_B+
RF_V2
DCS_TX_VCO
GSM_TX_VCO
B+
SF_OUT
RF_V2
RF_V1
STBY_DL
V1
-5V BATT_THERM_AD
D
TP
TP200 TP205 TP206 TP208 TP209 J902 1 2 3 4 5 6 7 8 DISPLAY CONN /CS1 /RES Data/Command R_W D0 D1 D2 D3 D4 D5 D6 D7 2,75V GND Negative Supply NC GND GND TP809 TP810 TP811 TP812 TP813 TP814 TP815 TP816 TP817 TP818 TP821 TP822 TP823 TP824 TP825 TP826 TP828 TP829 TP830 TP831 TP835 TP841 TP864
MAGIC 13MHz DX1 MQSPI_CLK1 DM_CS TX_KEY GND EMU1 TMS TDI EMU0 V2 TD0 TRST* TCK VCC_BATT PWR_SW CE1 GCAP_CLK CE0 CE2 CE3 VCLK VFSRX VDX VDR DR2 RX_ACQ DCS_EN EXT_B+ GND ON* UPLINK DOWNLINK 152kHz FM_RSSI RW_AM_FM DATA_AM_FM CLK_AM_FM FM_R FM_L
ALERT PADS G C
TP841
TP209
F
1
B L 26MHz
TP1006
SH5
3
XTAL_EMIT
PRSC-IN
PRE_IN
TX VCO IC 900-1785MHz
E2 8
SH7
BCLKR BFSR
10 9 1 1 2
CLK_OUT
E
6
TX_CLK
SD_TX
ALRT_VCC
ALRTOUT
SPKR+
SPKR-
SDRXG8
H10 CLKIN FM_R TP1000 TP1001 B7 GCAP_CLK
AUDIO JAMS IC
3
4
VREF
MIC CONN
E1 XTAL_BASE B1CP_TX U200 SCLK_OUTF7 A1CP_RX MAGIC SDFS G9
WHITE CAP
J9 K9 H7 H6
MICIN-J2
FM_L
A3
A7
VSIM1
5
TP831
9 10 11 12 13
J2
G7 J6
SH9
B4 BCLKR B3BCLKX D4 EFSR B6 BDX A3 BDR
11 12 20
SIM CONN
6
IPA
TP878
TP864
TP826 TP822 F5 CLK_IN TP825
BDX
SH4
TP875 TP200
BCLKX
TP877
M
GCAP
14 15 16 17 18
TP866
BDR
TP865
SRAM
COVIC IC
32kHz
BCLKX
SH6
PAC
2 7
VSIM1
SH8
BDX
TP824
V3
J803 1 2 3 4 5
SIM CONN GND SIM Vcc VPP RESET SIM I/O CLK
TP865 TP866 TP875 TP877 TP878 TP1000 TP1001 TP1002 TP1003 TP1004 TP1005
RF CONN.
Dualband Modulus III (Shark) 8485933H04_P13
A H I
FM RADIO K J
POWER JACK
FLASH/EEPROM
V1 ENABLE PWR_ON to U900 ISENSE EXT_B+ TRKL_SET SR_VCC V_BOOST1
6
B+
TX_EN
B+
VA
VB
V2
V1_SW
TP1006
RX_EN TX_EN
VA
RF_V2
SF_OUT
GSM_TX_VCO
DCS_SEL
GSM_SEL
TXVCO_EN
GSM_SEL
DCS_TX_VCO
PAC_EN
A
I
TP1004
TP1002
TP1003
K
J
FM RADIO 1800MHz 900MHz
-10V
SH1
1900MHz 900MHz
48 1 47
37 43 40 38 36
-5V
SH2
18 20 23 13 12
FRONTEND9 IC
3 4
TP821
A
11 12 15 16 13 25 24
RX ANTENNA SIGNAL AMPLIFIED IF 400MHz RX SPEAKER LINE + RX SPEAKER LINE RX VCO TUNING VOLTAGE RX VCO FEEDBACK LINE TO MAGIC HEADSET_L FMin FMin 2nd 10,7MHz FILTER IN 2nd 10,7MHz FILTER OUT FM AUDIO L FM AUDIO R
J502 J506 SPKR PAD +
B C D
VB
J503 J505 SPKR PAD L F M
E F G DISPLAY CONN
TP818
RX_DCS_*GSM
SH2
6 4 TP205
H
TP809 TP815 TP812 TP813 TP811 TP814 TP816 TP817 TP810 TP829 TP823
TP206
C
D
G
400MHz IF FILTER RX VCO IC B
1 3
I J
TP828 TP835
K L M
RVCO_250
TP830
TP208
TP1005
H FMin
E
HE AD SE
from Magic
SW_VCC
HEADSET_L
TP x
RX SIGNAL PATH TX SIGNAL PATH RX VCO SIGNAL PATH TUNING VOLTAGES 13 MHz REFERENCE CLOCK TESTPOINT
T JA CK
REVISIONS
GSM SERVICE SUPPORT GROUP 06.01.00 Rev. 1.1
RVCO_250
GP04
from Magic
SF_OUT
TXVCO_EN
TX_GSM_*DCS TXVCO_EN
-10V
DCS_SEL
RX_DCS_*GSM
RVCO_250
GSM_SEL
TX_EN
V1
LEVEL 3 SIGNAL FLOW Moddulus III (Shark) Michael Hansen, Ralf Lorenzen, Ray Collins
Page 1
MODOLUS 3 / SHARK 8485933H03_P11
REVISIONS
GSM Service Support SCHEMATICS MODULUS 3 / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen Page 4of 4 25.10.99 Rev. 1.0
MODOLUS 3 / SHARK 8485933H03_P11
REVISIONS
GSM Service Support SCHEMATICS MODULUS 3 / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen Page 2 of 4 25.10.99 Rev. 1.0
MODOLUS 3 / SHARK 8485933H03_P11
REVISIONS
GSM Service Support SCHEMATICS MODULUS 3 / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen Page 3 of 4 25.10.99 Rev. 1.0
MODOLUS 3 / SHARK 8485933H03_P11
REVISIONS
GSM Service Support SCHEMATICS MODULUS 3 / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen Page 3 of 4 25.10.99 Rev. 1.0
MODOLUS 3 / SHARK 8485933H03_P11
REVISIONS
GSM Service Support SCHEMATICS MODULUS 3 / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen Page 1 of 4 25.10.99 Rev. 1.0
Modulus III / SHARK_Version P06_v14
REVISIONS
GSM Service Support FM Radio Level 3 SCHEMATIC SHARK / MODULUS III Michael Hansen, Ray Collins, Ralf Lorenzen 23.09.99 Rev. 1.0 Ver P6.0 v14 Page 4 of 4
Modulus III / Shark_ P06_v14
REVISIONS
GSM Service Support LEVEL 3 AL SCHEMATICS MODULUS III / SHARK Michael Hansen, Ray Collins, Ralf Lorenzen 23.09.99 Rev. 1.0 Ver P6.0 _ v14 Page 2 of 4
Modulus III Shark_ P6.0_v14
REVISIONS
GSM Service Support Level 3 Layout Diagram MODULUS III SHARK Michael Hansen, Ray Collins, Ralf Lorenzen 23.09.99 Rev. 1.0 P6.0_v14 Page 1 of 4
( Keyboard )
KBR0, KBR1, KBR2, KBR3, KBR4 KBC0, KBC1, KBC2, KBC3, KBC4 BKLT_EN DP_EN_L RSTO CLKO SIM_TX SIM_RX
H2, H1, H3, G5, G3 J5, J3, J2, J1, J4 KEYPAD K3 DISPLAY A11 INTERFACE E9 E7 F3 B5
C4, H4, WHITE_CAP C!4, F10, K13,K06 P13
U700
VDDS VCC_MEMIF VDD A9, A10, K10, M8, M11 VCCA G12 ( CE ) MQSPI_CS1 N8 SPI ( SPI_CLK ) MOSPI_CLK1 K7 INTERFACE ( SPI_DATA ) DX1 M7 M E M O R Y I N T E R F A C E
V2 V3
( MAGIC SPI ) D7 - D0
J902 Display Con.
SIM INTER FACE
DATA BUS
A0
5 - 12
N3 HEAD_INT N2 STEREO_HEAD_INT A1 CLK_SELECT TX_EN C1 CTM CPU DM_CS E2 MODULE TX_KEY E1 RX_EN E3 RX_ACQ E4 RESET P2 ( SDTX ) BDX B6 ( TX_CLK ) BCLKX B3 SERIAL INTER from / to MAGIC ( SCLK_OUT ) BCLKR DSP B4 FACE ( SDFS ) BFSR D4 ( SDRX ) BDR A3 DSC_EN DSC J6 TP864 L2 FM_PILOT0 L3 FM_PILOT1 SPI FM_PILOT2 M1 FM INTERFACE L4 FM_PILOT3 MO_ST RW_AM_FM DATA_AM_FM CLK_AM_FM C2 M2 N1 D2 INTER FACE
ADDRESS BUS
SR_VCC C9 E10 B11 D9 B9 CE2 CE3 R_W V1 D6, E1 B2 U702 A1 SRAM G5 CE0 CE1 V2 RESET A5, E1, F5 2 U903 V2 RESET 1 4 U904 -5V 1 R_W DP_EN_L GND -10V -5V KBR0 - KBR4 ( WhiteCap ) KBC0 - KBC4 ( GCAP2 ) PWR_SW ( GCAP2 ) V2 V1 Q913 (Magic) SW_V1 ( GCAP2 ) ALRT_VCC ( White Cap ) BKLT_EN
3 13 2 4 1 17, 18, 14 15
U701 EPROM B3 EEPROM
B4 D7 F8
CTM F3 L7 CHARGE K4 N7 TIMER B7 P4 H10 MAGIC_13MHz ENABLE TRKL_SET CHARGE_SW STBY_DL
DEEP SLEEP CIRCUIT
KEYBOARD
BACKLIGHT
AUDIO SPI
GCAP SPI
GCAP_CLK 13 MHz
GCLK 32.768 KHz
CHARGER
CR960 EXT_B+ Q960 U960 R962 B+ B+
BATTERY CONTACTS
J605
V2
R960
MODULUS III / SHARK
TP865
B+
BATT_THERM_AD ISENSE J604
R969
CHARGER JACK J904
EXT_B+
R606
Y900
F5 C7 A7 B7 CHRG_SW MAN_TEST_AD
R604 R605
SPI INTERFACE
REAL TIME CLOCK
F6 LEVEL SHIFT J7 J8 K7 G6 K10 H8 D10
CLK RESET SIM_I/O
TRKL_SET 6 4 5 RSTO CLKO SIM_TX SIM_RX PWR_ON PWR_SW STBY_DL J900 SIM Con. 1 2 VSIM1 Mode Current TRKL_SET ENABLE
8 1 7 2 COVIC 6 3 5 4
PWR_ON ENABLE
A1 BATT_THERM_AD B3 SENSE CNTL.
U900 G_CAP2
Full Rate High Trickel Low Trikel 300mA Low High 100mA High Low 40mA Low Low
Off <1mA FMin High High 10,7 MHz 1 10,7 MHz 3 1 FL1001 FL1002
TP866
GND
V2 RESET C4 G5 Logic Control
C8 G4
VREF REG.
TP875
ON*
G9 B5 E1
VREF 2.775V for Magic V3 1,8V, for WhiteCap SR_VCC 2.775V, for SRAM V2 2.775V, for WhiteCap logic outputs, RAM, FLASH, EEPROM V1 5.0V, for DSC Bus, Negative Voltage Regulator VSIM1 3.0 or 5.0V, for SIM Card Circuit FM_PILOT0 FM_PILOT1 FM_PILOT2 FM_PILOT3 Q1014 Q1015 FM_L FM_R VCO 3 6 TUNE 9 15 16 40
3
TP877 TP878 HEAD_INT
UPLINK DOWNLINK MIC MIC
D2 C3
V3 REG.
43
36
J2 PA_DRV Interface Audio Codec H6 H7 K9 J9 SPR+ SPR-
V2 REG. V1 REG. VSIM REG.
J5 A6 C6
U1001 FM IC 10 19
38 31 30 29 22 26
RW_AM_FM (TP1002) DATA_AM_FM (TP1003) CLK_AM_FM (TP1004) FM_RSSI (TP1001) MO_ST
Q1030
STEREO_HEAD_INT AUX_MIC H3
152kHz
(TP1000)
Y1003 10,7 MHz
U1500 J504
HEADSET_R 13 19 10 V2 SPRFM_R FM_L DX2 MQSPI_CS2 MQSPI_CLK2 ALRT SPKR 12 11 9 16 15 14
H9
F7 K5 E10
VBOOST1 REG.
B10
HEADSET_L
1
Stereo Audio Headset Jack
C1026
1,2,5,6 3 4
Q903
CR902 L901 C913
Internal GCap use only (VSIM1, LS_V1) V_BOOST1
FMin (FM ANT.)
ALRT_VCC B+
ALRT_VCC
RX SIGNAL PATH TX SIGNAL PATH MAIN VCO SIGNAL PATH TUNING VOLTAGES REFERENCE CLOCK Orderable Part Non - Orderable Part
JAM IC
ALRTOUT
GSM SERVICE SUPPORT GROUP LEVEL 3 AL Block Diagram Dualband SHARK Ralf Lorenzen, Michael Hansen, Ray Collins
27.03.00 Rev. 1.3 Page1
A100
RX MID CHANNELS GSM: CH 62 -- 947,4 MHz EGSM: CH 37 -- 942,4Mhz DCS: CH 700 -- 1842,8MHz
RX LOCAL OSCILLATOR
A9
-5V
Osc. discrete circuty
Q203 1 CR249 RF_V1
800MHz D8
PLL
5 RX_EN TX_EN 2 VA J300 U100 6 2 3, 4 1 5 2 4 Q110
C8
U913 MAGIC
F7 ( SCLK_OUT ) BCLKR ( SDFS ) BFSR ( SDRX ) BDR to WhiteCap
4
VB VA
GSM
1 FL470 900-1900MHz 3 5 1 FL480 925-960MHz 1805-1880MHz 5 2 FL472 2
RF_V2 RVCO_250
400