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XR-1800R
5-3. SCHEMATIC DIAGRAM MAIN Section (1/2) · See page 18 for Waveforms. · See page 29 for IC Block Diagrams.
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XR-1800R
5-4. SCHEMATIC DIAGRAM MAIN Section (2/2) · See page 18 for Waveforms. · See page 29 for IC Block Diagrams.
(Page 27)
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XR-1800R
5-5. PRINTED WIRING BOARD PANEL Section
(Page 19)
· Semiconductor Location
Ref. No. D900 D901 D902 D903 D904 IC900 Location B-5 B-5 B-5 B-5 A-5 A-6
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XR-1800R
5-6. SCHEMATIC DIAGRAM PANEL Section · See page 18 for Waveform.
(Page 24)
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· IC Block Diagrams MAIN Board IC121 LC7216M
X OUT HCTR AMIN LCTR OUT5
13 12 11 8 9 10
20
19
18
17
16
15
14
PHASE DETECTOR CHARGE PUMP 1/2 UNIVERSAL COUNTER
REFERENCE DIVIDER
SWALLOW COUNTER 1/16, 1/17 4BIT 12BIT PROGRAMMABLE DIVIDER
SHIFT REGISTER LATCH
1
2 4
3
5
6
7
X IN
CE
DI
CL
DO
IN 0
IN 1
OUT1
OUT2
RODA ROCL
IC150 TDA7330BD-013TR
OUAL FSEL POR VCC T57
11 10
20 19 18 17 16 15 14 13 12
ARI
TM
T7
2nd ORDER ANTIALIAS FILTER + CLOCK RECOVERY PLL 1.4675kHz
8th ORDER SC-BANDPASS FILTER
COSTAS LOOP PLL 57kHz
PHASE DECODER
DIFF DECODER
TEST LOGIC VCC
1
2 4
3
5
6
7
8
OUT3
ON/OFF OSCILLATOR fx DIVIDER 9
OUT4
OSCOUT
FMIN
VDD
VSS
PD
MPXIN
FILOUT
29
OSCIN T1 T3 T4
VREF
CMP
GND
IC450 LC75372E
R10dBOUT R10dBIN RSELO
RCT2
RT1
RCT1
RT3
RT2
RIN
33 31 29 28 26 25 24 23
32 30
27
ROUT 34 RVREF RVREF + + 20 TEST + RVREF 19 VSS 18 NC RROUT 37 LATCH DECODER RVREF RVREF 38 VREF 39 LVREF 40 LVREF LROUT 41 + LVREF + + RVREF SHIFT REGISTER CONTROL 17 CL 16 DI 15 CE + RVREF 22 R2 21 R1 RVREF + RVREF
RFIN 35 RFOUT 36
LFOUT 42 LVREF 14 VDD LVREF LFIN 43 + + + 13 L1 12 L2 LVREF
LVREF LVREF LOUT 44 + LVREF
1 2 LT2 LT1 LIN L10dBOUT LCT2 LCT1 4 5 7 LT3
3
6
8 9 L10dBIN LSELO
10 11 L3 NC
30
R3 NC
+
+