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Data Sheet, Aug. 2002

CoolSET - F 1
TDA 16831-4 Off-Line SMPS Controller with 600 V Sense CoolMOS TM on Board

TM

Power Management & Supply

N e v e r

s t o p

t h i n k i n g .

TDA 16831-4 Revision History: Previous Version: Page 4 2002-08-08 1999-12-10 DS0

Subjects (major changes since last revision) Update of available types.

For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://www.infineon.com. CoolMOSTM, CoolSETTM are a trademarks of Infineon Technologies AG. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected]

Edition 2002-08-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany

© Infineon Technologies AG 2002.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide. Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life-support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

TDA 16831-4

1 1.1 1.2 1.2.1 1.2.2 1.3 2 3 3.1 3.2 3.3 3.4 3.5 3.6 4 5

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P-DIP-8-6 for Applications with POUT 40 W: TDA 16831/2/3/4 . . . . . . . P-DSO-14-11 for Applications with POUT 20 W: TDA 16831G/2G/3G . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 4 6 6 7 8

Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillator Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 13 13 14 14 15 16

Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Data Sheet

3

2002-08-08

Off-Line SMPS Controller with 600 V Sense CoolMOSTM on Board

TDA 16831-4

CoolSET

1
1.1

Overview
Features

· PWM controller + sense CoolMOS attached in one compact package · 600 V avalanche rugged CoolMOS · Typical RDSon = 0.5 ... 3.5 at Tj = 25°C · Only 4 active Pins · Standard DIP-8 Package for Output Power 40 W · Only few external components required · Low start up current · Current mode control · Input Undervoltage Lockout · Max. Duty Cycle limitation · Thermal Shutdown · Modulated Gate Drive for low EMI

P-DIP-8-4, -6 P-DIP-8-6

P-DSO-14-3, -8, -9, -11, 14

P-DSO-14-11

Type TDA 16831 TDA 16832 TDA 16833 TDA 16834 TDA 16831G TDA 16832G TDA 16833G
1)

Ordering Code Q67000-A9420 Discontiued1) Q67000-A9389 Discontiued1) Q67000-A9421 Discontiued
1)

Package P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DIP-8-6 P-DSO-14-11 P-DSO-14-11 P-DSO-14-11

Q67000-A9419

Last ordering:28.02.2003 Last delivery:31.08.2003

Data Sheet

4

2002-08-08

TDA 16831-4
Overview Device TDA 16831 TDA 16832 TDA 16833 TDA 16834 TDA 16831G TDA 16832G TDA 16833G
1)

Output Power Range/Required Heatsink1)

Vin = 85-270 VAC
10 W / no heatsink 20 W / 6 cm2 30 W / 3 cm 40 W / 3 cm
2 2

Vin = 190-265 VAC
10 W / no heatsink 20 W / no heatsink 40 W / no heatsink 40 W / no heatsink 10 W / no heatsink 20 W / no heatsink 40 W / 3 cm2

10 W / no heatsink 20 W / 8 cm2 20 W / no heatsink

TA = 70°C

Data Sheet

5

2002-08-08

TDA 16831-4
Overview

1.2 1.2.1

Pin Configurations P-DIP-8-6 for Applications with POUT 40 W: TDA 16831/2/3/4

N.C. FB N.C. D

1 2 3 4

8 7 6 5
AEP02782

GND V CC N.C. D

Figure 1

TDA 16831/2/3/4

Pin Definitions and Functions Pin 1 2 3 4 5 6 7 8 Symbol N.C. FB N.C. D D N.C. Function Not Connected PWM Feedback Input Not Connected 600 V Drain CoolMOS 600 V Drain CoolMOS Not Connected PWM Supply Voltage PWM GND and Source of CoolMOS

VCC
GND

Data Sheet

6

2002-08-08

TDA 16831-4
Overview

1.2.2

P-DSO-14-11 for Applications with POUT 20 W: TDA 16831G/2G/3G

GND FB N.C. N.C. D D D

1 2 3 4 5 6 7

14 13 12 11 10 9 8
AEP02783

GND V CC N.C. N.C. D D D

Figure 2

TDA 16831G/2G/3G

Pin Definitions and Functions Pin 1 2 3 4 5, 6, 7 11 12 13 14 Symbol GND FB N.C. N.C. D N.C. N.C. Function PWM GND and CoolMOS Source PWM Feedback Input Not Connected Not Connected 600 V Drain CoolMOS 600 V Drain CoolMOS Not Connected Not Connected PWM Supply Voltage PWM GND and Source of CoolMOS

8, 9, 10 D

VCC
GND

Data Sheet

7

2002-08-08

1.3

Figure 3
FB bandgap Drain bias
+ -

osc tff J K Q pwmpls
+

3 Q

5

+

kippl

+ -

+ -

Data Sheet

uvlo

R FB VREF

tempshutdown

VCC

+ -

Block Diagram

Block Diagram
pwmss pwmop rlogpwm pwmrmp
+ + -

biaspwm

pwmcomp

logpwm

gtdrv

R Q S Q

slogpwm

8
alogpwm v04sst csshutdown slogpwm

R Sense

GND
AEB02993

TDA 16831-4

2002-08-08

Overview

TDA 16831-4
Circuit Description

2

Circuit Description

The TDA 16831-4 is a current mode pulse width modulator with integrated sense CoolMOS transistor. It fulfills the requirements of minimum external control circuitry for a flyback application. Current mode control means that the current through the MOS transistor is compared with a reference signal derived from the output voltage of the flyback application. The result of that comparison determines the on time of the MOS transistor. To minimize external circuitry the sense resistor which gives information about MOS current is integrated. The oscillator resistor and capacitor which determine the switching frequency are integrated, too. Special efforts have been made to compensate temperature dependency and to minimize tolerances of this resistor. The circuit in detail: (see Figure 3) Start Up Circuit (uvlo) Uvlo is monitoring the external supply voltage VCC. When VCC is exceeding the on threshold VCCH = 12 V, the bandgap, the bias circuit and the soft start circuit are switched on. When VCC is falling below the off-threshold VCCL = 9 V the circuit is switched off. During start up the current consumption is about 30 µA. Bandgap (bg) The bandgap generates an internal very accurate reference voltage of 5.5 V to supply the internal circuits. Current Source (bias) The bias circuit provides the internal circuits with constant current. Oscillator (osc) The oscillator is generating a frequency twice the switching frequency fswitch = 100 kHz. Resistor, capacitor and current source which determine the frequency are integrated. The charging and discharging current of the implemented oscillator capacitor is internally trimmed, in order to achieve a very accurate switching frequency. Temperature coefficient of switching frequency is very low (see Page 18). Divider Flip Flop (tff) Tff is a flip flop which divides the oscillator frequency by one half to create the switching frequency. The maximum duty cycle is set to Dmax = 0.5.

Data Sheet

9

2002-08-08

TDA 16831-4
Circuit Description Current Sense Amplifier (pwmop) The positive input of the pwmop is applied to the internal sense resistor. With the internal sense resistor (Rsense) the sensed current coming from the CoolMOS is converted into a sense voltage. The sense voltage is amplified with a gain of 32 dB. The amplified sense voltage is connected to the negative input of the pwm comparator. Each time when the CoolMOS transistor is switched on, a current spike is superposed to the true current information. To eliminate this current spike the sense voltage is smoothed via an internal resistor capacitor network with a time constant of Td1 = 100 ns. This is the first leading edge blanking and only a small spike is left. To reduce this small spike the current sense amplifier is creating a virtual ramp at the output. This is done by a second resistor capacitor network with Td2 = 100 ns and an op-offset of 0.8 V which is seen at the output of the amplifier. When gate drive is switched off the output capacitor is discharged via pulse signal pwmpls. The oscillator signal slogpwm sets the RS-flip-flop. The gate drive circuit is switched on, when capacitor voltage exceeds the internal threshold of 0.4 V. This leads to a linear ramp, which is created by the output of the amplifier. Therefore duty cycle of 0% is possible. The amplifier is compensated through an internal compensation network. The transfer function of the amplifier can be described as Ki Vo ----- = ----------------------------------- ; p = j p × (1 + T × p) Vi the step response is described with
------- T V o = V i × K i × t on ­ T + T × e 40 K i = ----t on -t on

T = 850 ns Comparator (pwmcomp) The comparator pwmcomp compares the amplified current signal pwmrmp of the CoolMOS with the reference signal pwmin. Pwmin is created by an external optocoupler or external transistor and gives the information of the feedback circuitry. When the pwmrmp exceeds the reference signal pwmin the comparator switches the CoolMOS off.

Data Sheet

10

2002-08-08

TDA 16831-4
Circuit Description Logic (logpwm) The logic logpwm comprises a RS-flip-flop and a NAND-gate. The NAND-gate insures that CoolMOS transistor is only switched on when sosta is on and pwmin has exceeded minimum threshold and pwmin is below pwmrmp and currentshutdown is off and tempshutdown is off and tff sets the starting impulse. CoolMOS transistor is switched off when pwmrmp exceeds pwmin or duty cycle exceeds 0.5 or pwmcs exceeds Imax or silicon temperature exceeds Tmax or uvlo is going below threshold. The RS-flip-flop ensures that with every frequency period only one switch on can occur (double pulse suppression). Gate Drive (gtdrv) Gtdrv is the driver circuit for the CoolMOS and is optimized to minimize EMI influences and to provide high circuit efficiency. This is done by smoothing the switch on slope when reaching the CoolMOS threshold. Leading switch on spike is minimized then. When CoolMOS is witched off, the falling slope of the gate driver is slowed down when reaching 2 V. So an overshoot below ground can't occur. Also gate drive circuit is designed to eliminate cross conduction of the output stage. Current Shut Down (cssd) Current shut down circuit switches the CoolMOS immediately off when the sense current is exceeding an internal threshold of 100 mV at Rsense. Tempshutdown (tsd) Tempshutdown switches the CoolMOS off when junction temperature of the PWM controller is exceeding an internal threshold.

Data Sheet

11

2002-08-08

TDA 16831-4
Circuit Description

kippl, f = 200 kHz (oscillator)

pwmpls, f = 100 kHz (tff)

slogpwm (tff)

VFB
pwmrmp (pwmop) Gate Start at 0.4 V op-offset = 0.8 V

alogpwm (pwmcomp)

rlogpwm (pwmcomp)

gtrdrv

Q (logpwm)
AED02766

Figure 4
Data Sheet

Signal Diagram
12 2002-08-08

TDA 16831-4
Electrical Characteristics

3
3.1
Parameter

Electrical Characteristics
Absolute Maximum Ratings
Symbol Limit Values min. max. -0.3 0 Unit V mA V A V °C K/W P-DIP-8-6 P-DSO-14-11 Remarks Zener Voltage1) Page 14 Beware of Pmax2)

Supply Voltage Supply + Zener Current Drain Source Voltage Avalanche Current Voltage at FB Junction Temperature Storage Temperature Thermal Resistance System-Air
1) 2)

VCC ICCZ VDS IAC VFB Tj Tstg RthSA

VZ
20 600

Icsthmax
-0.3 -40 -50 5.5 150 150 90 125

t = 100 ns

Be aware that VCC capacitor is discharged before IC is plugged into the application board. Power dissipation should be observed.

3.2
Parameter

Operating Range
Symbol Limit Values min. max. Unit V °C Remarks

Supply Voltage Junction Temperature

VCC Tj

VCCH
-25

VZ
120

Data Sheet

13

2002-08-08

TDA 16831-4
Electrical Characteristics

3.3

Supply Section

-25°C < Tj < 120°C, VCC = 15 V Parameter Quiescent Current Supply Current Active Symbol Limit Values min. typ. 25 4.5 6 7 max. 80 6 7.5 8.5 12.5 V µA mA TDA 16831/2/G TDA 16833/G TDA 16834 Unit Test Conditions

ICCL ICCHA

VCC Turn-On Threshold VCC Turn-Off Threshold VCC Turn-On/Off Hysteresis VCC Zener Clamp

VCCH VCCL VCCHY VZ Controller Thermal Shutdown TjSD Thermal Hysteresis TjHy

12 8.5 16 120 9 3 17.5 135 2

19 150 °C TDA 16831/2/3/G/4

3.4

Oscillator Section

-25°C < Tj < 120°C, VCC = 15 V Parameter Accuracy Temperature Coefficient Symbol f TK f 90 Limit Values min. typ. 100 1000 max. 110 kHz ppm/°C Unit Test Conditions

Data Sheet

14

2002-08-08

TDA 16831-4
Electrical Characteristics

3.5
Parameter Duty Cycle

PWM Section
Symbol D 0 4 2 1.3 Bw Phim 0.45 3.5 3.0 5.3 3.7 600 5.5 0.2
-t on

Limit Values min. typ. max. 0.5

Unit

Test Conditions

Transimpedance VFB / IDrain1) OP Gain Bandwidth2) OP Phase Margin2)

ZPWM

V/A

TDA 16831/G TDA 16832/G TDA 16833/G/4

2 70 0.85 4.8 4.9 5.7

MHz Degree V K ppm/°C V mV/°C for D = 0 Ics = 0.95 Icsth

VFB Operating Range min. Level VFBmin VFB Operating Range max. Level VFBmax Feedback Resistance RFB Temperature Coefficient RFB RFBTK Internal Reference Voltage Vrefint Temperature Coefficient Vrefint Vreftk
1)

For discontinuous mode the VFB is described by:
-------- -------- T T I PK V FB = Z PWM × ------ × t on ­ T 1 + T 1 × e 1 + 0.6 × 1 ­ e 2 t on T1 = 850 ns; T2 = 200 ns Guaranteed by design -t on

2)

Data Sheet

15

2002-08-08

TDA 16831-4
Electrical Characteristics

3.6
Parameter

Output Section
Symbol Limit Values min. typ. max. V Unit Test Conditions

Drain Source Breakdown Voltage TA = 25°C

V(BR)DSS 600

Drain Source On-Resistance RDSon TA = 25°C Drain Source On-Resistance RDSon -25 < TA < 120°C Zero Gate Voltage Drain Current IDSS Output Capacitance Avalanche Current

3.5 1 0.5 9 2.7 1.6 0.5 25 50



TDA 16831/2/G TDA 16833/G TDA 16834



TDA 16831/2/G TDA 16833/G TDA 16834

µA pF A

VGS = 0
TDA16833

COSS IAR
0.6 1.2 2.2 2.2

Icsthma
x

tDR = 100 ns
TDA 16831/G TDA 16832/G TDA 16833/G TDA 16834

Isource Current Limit Threshold Icsth

0.9 1.8 2.9 2.9 300 70 50

1.4 2.7 4.8 4.8

A

Time Constant Icsth Rise Time Fall Time

tcsth trise tfall

ns

Data Sheet

16

2002-08-08

TDA 16831-4
Electrical Characteristics Quiescent Current versus Temperature
30
AED02767

Supply Current Active versus Temperature
6
AED02768

I CCL

µA
25

I CCH

mA 5.5

TDA 16833

20

5 TDA 16831/2

15

4.5

10

4

5

3.5

0 -25

0

25

50

75

°C 125

3 -25

0

25

50

75

°C 125

T

T

Turn On/Off Supply Voltage versus Temperature
12.5 VCC V 12 11.5 11 10.5
AED02769

Turn On/Off Hysteresis

2.9

AED02770

VCCHY

V

VCCH

2.85

2.8

2.75

10 9.5
2.7

VCCL
9
2.65

8.5 8 -25 0 25 50 75 °C 125
2.6 -25 0 25 50 75 °C 125

T
Data Sheet 17

T

2002-08-08

TDA 16831-4
Electrical Characteristics

VCC Zener Clamp
AED02771

Switching Frequency versus Temperature
110 f kHz 106
AED02772

19

VZ

V 18.5

18

104 102

17.5

100 98

17

96
16.5

94 92

16 -25

0

25

50

75

°C 125

90 -25

0

25

50

75

°C 125

T

T

Maximum Duty Cycle versus Temperature TDA 16831/2/3/G/4
50 % 49 48.5 48 47.5 47
AED02773

Operational Amplifier Phase and Amplitude versus Frequency
40
AED02774

0

A dB
30 A /dB 20

Grad -40 -60 -80

Duty-cycle

10

/Grad

-100 -120

0

46.5 46 45.5 45 -25 0 25 50 75 °C 125
-20 0 10 10 1 10 2 kHz 10 4 -10

-140 -160 -180 -200

T
Data Sheet 18

f
2002-08-08

TDA 16831-4
Electrical Characteristics Feedback Voltage Operating Range versus Temperature
5 V For I CS = 0.95 I CSTH 4 3.5 3 2.5 2 1.5 1 For D = 0 0.5 0 -25 0 25 50 75 °C 125
0 0 0.5 1 mA 1.5 2 Temp = 130 1 3 Temp = 25
AED02775

Feedback Voltage versus Feedback Current
6
AED02776

VFB

VFB

V 5

4

T

I FB

RDSon versus Temperature
AED02777

TDA 16833 Output Capacitance COSS versus VDS
100 COSS pF 80
AED02778

8

RDSON
7 6

70
5 TDA 16831 4 3 2 TDA 16833 1 0 -25

60 50 40 30 20 10
0 25 50 75 °C 125

0 40

50

60

70

80

V 100

T

VDS
19 2002-08-08

Data Sheet

TDA 16831-4
Electrical Characteristics

Isource Current Limit Threshold Icsth
versus Temperature
3.5
AED02779

Normalized Overcurrent Shutdown versus Drain Current Slope
I Drain 6 I CSTH
5 TDA 16831 4
AED02780

I CSTH A
3 2.5 2 TDA 16833

TDA 16832 3

1.5 1 0.5 0 -25

TDA 16832

2
TDA 16831

TDA 16833

1

0

25

50

75

°C 125

0

0

2

4

6

T

A / µ s 10 dI dt

Data Sheet

20

2002-08-08

TDA 16831-4
Application Circuit

4

Application Circuit

VCC
TDA 16831-4 CoolMOS AC 85... 270 VAC GND FB PWM Controller

Drain

AES02994

Figure 5

TDA 16832/2G/3G: 4 Active Pins, Version without Soft Start

Data Sheet

21

2002-08-08

TDA 16831-4
Package Outlines

5

Package Outlines
P-DIP-8-6 (Plastic Dual In-line Package)
0.38 MIN.
1.7 MAX.

4.37 MAX.

7.87 ±0.38

3.25 MIN.

2.54 0.46 ±0.1

0.25 +0.1 6.35 ±0.25 1) 8.9 ±1

0.35 8x
8 5

1 4 1) 9.52 ±0.25

Index Marking
1)

Does not include plastic or metal protrusion of 0.25 max. per side
GPD05583

Data Sheet

22

2002-08-08

TDA 16831-4
Package Outlines

P-DSO-14-11 (Plastic Dual Small Outline)
0.33 ±0.08 x 45°
1.75 MAX.

4 -0.2 1)

0.1 MIN. (1.5)

1.27 0.41 +0.1 -0.06 14

0.2 M
8

0.1 A C 14x

C
6 ±0.2

0.64 ±0.25

1 7 8.75 -0.2 1)

A

Index Marking
1)

Does not include plastic or metal protrusion of 0.15 max. per side
GPS09033

You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. Data Sheet 23

8° MAX.

0.2 +0.05

-0.01

Dimensions in mm 2002-08-08

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