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HA[3..31] HBE-[0..7] HA31 HA30 HA29 HA28 HA27 HA26 HA25 HA24 HA23 HA22 HA21 HA20 HA19 HA18 HA17 HA16 HA15 HA14 HA13 HA12 HA11 HA10 HA9 HA8 HA7 HA6 HA5 HA4 HA3 |LINK |2.SCH |3.SCH |4.SCH |5.SCH |6.SCH |7.SCH |8.SCH |9.SCH |10.SCH |11.SCH |12.SCH |13.SCH |14.SCH |15.SCH |16.SCH |17.SCH |18.SCH |19.SCH |20.SCH |21.SCH |22.SCH |23.SCH |24.SCH |25.SCH |26.SCH |27.SCH |28.SCH |29.SCH
HA[3..31] HBE-[0..7]
2,7,10 2,7 VCC2 VCC3 VCC CPU2
AL35 AM34 AK32 AN33 AL33 AM32 AK30 AN31 AL31 AL29 AK28 AL27 AK26 AL25 AK24 AL23 AK22 AL21 AF34 AH36 AE33 AG35 AJ35 AH34 AG33 AK36 AK34 AM36 AJ33
CPU1 A19 A21 A23 A25 A27 A29 E37 G37 J37 L33 L37 N37 Q37 S37 T34 U33 U37 W37 Y37 AA37 AC37 AE37 AG37 AN21 AN23 AN25 AN27 AN29 E21 E27 AJ19 AJ29 E17 E25 AJ15 AJ23 FERRFERR4 R34 S33 S35 W33 X34 W35 AL19 AN35 A37 C1 AN5 B6 B8 B10 B12 B14 B16 B18 B20 B22 B24 B26 B28 H2 H36 K2 K36 M2 M36 P2 P36 R2 R36 T2 T36 U35 V2 V36 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 VCC_3 NC NC NC NC NC NC NC NC NC NC NC NC NC INC INC GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND P55PWR VCC VCC VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC_2 VCC2DET# CPUTYP GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AN1 AN3 A7 A9 A11 A13 A15 A17 G1 J1 L1 N1 Q1 S1 U1 W1 Y1 AA1 AC1 AE1 AG1 AN9 AN11 AN13 AN15 AN17 AN19 E15 AJ11 B2 AL1 Q35 X2 X36 Z2 Z36 AB2 AB36 AD2 AD36 AF2 AF36 AH2 AJ37 AL37 AM8 AM10 AM12 AM14 AM16 AM18 AM20 AM22 AM24 AM26 AM28 AM30 AN37 E11 E13 E19 E23 E29 E31 AJ7 AJ9 AJ13 AJ17 AJ21 AJ25 AJ27 AJ31 A3 VCC2DET VCC2DET 29
C D
D
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31
4,5 6 4 2 2 2
CPURST CPUCLK A20MAHOLD BOFFBRDY-
CPURST CPUCLK A20MAHOLD BFSEL0 BOFFBRDYBRDYCBUSCHK EADSEWBEFLUSHFRCMCHOLD IGNNEINIT INTR INV KENNANMI PENRSSMISTPCLK2 R5 RP1 0/NA
AK20 AK18 H34 AK8 V4 Y33 Z4 X4 Y3 AL7 AM4 W3 AN7 Y35 AB4 AA35 AA33 AD34 U5 W5 Y5 AC33 Z34 AC35 AB34 V34 AA5 M34 N35 P34 Q33 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 K34 G35 J35 G33 F36 F34 E35 E33 D34 C37 C35 B36 D32 B34 C33 A35 B32 C31 A33 D28 B30 C29 A31 D26 C27 C23 D24 C21 D22 C19 D20 C17
RESET CLK PICCLK A20M# AHOLD BF0 BOFF# BRDY# BRDYC# BUSCHK# EADS# EWBE# FLUSH# FRCMC# HOLD IGNNE# INIT INTR/LINT[0] INV KEN# NA# NMI/LINT[1] PEN# R/S# SMI# STPCLK# WB/WT# TCLK TDI TMS TRST# D[0] D[1] D[2] D[3] D[4] D[5] D[6] D[7] D[8] D[9] D[10] D[11] D[12] D[13] D[14] D[15] D[16] D[17] D[18] D[19] D[20] D[21] D[22] D[23] D[24] D[25] D[26] D[27] D[28] D[29] D[30] D[31]
BE#[0] BE#[1] BE#[2] BE#[3] BE#[4] BE#[5] BE#[6] BE#[7] DP[0] DP[1] DP[2] DP[3] DP[4] DP[5] DP[6] DP[7] PCHK# APCHK# ADS# ADSC# M/IO# D/C# W/R# HLDA PM[0]/BP[0] PM[1]/BP[1] BP[2] BP[3]
AL9 AK10 AL11 AK12 AL13 AK14 AL15 AK16 D36 D30 C25 D18 C7 F6 F2 N5 AF4 AE5 AJ5 AM2 T4 AK4 AM6 AJ3 Q3 R4 S3 S5 AJ1 Q5 P4 AG5 AL3 AC5 AA3 AC3 AK6 AL5 U3 AG3 N33 AE35 AK2 AH4 AD4 AE3 J33 L35 AL17
HBE-0 HBE-1 HBE-2 HBE-3 HBE-4 HBE-5 HBE-6 HBE-7 1 3 5 7 1 3 5 7 RB1 2 4 6 8 2 4 6 8
VCC3
2
EADS-
RB2 4.7KX4
4 4 4,5
IGNNEINIT INTR 2 NANMI KEN-
4.7KX4 ADSADSPMIODCWR-
C
2 4,5 4 4
ADSADSPMIODCWR-
2 7 2 2 2
SMISTPCLK-
1 VCC3
WBWT-
WRWBWTBUSCHK FLUSH-
1 3 5 7 4.7KX4 RP2
2 4 6 8
Pentium MMX
BREQ FERR# IERR# PCD PWT PRDY PHIT# PHITM# HIT# HITM# CACHE# SMIACT# TDO D/P#
BFSEL1 BFSEL2
AP HLOCKDCMIO-
1 3 5 7
2 4 6 8
HITMCACHESMIACT-
4.7KX4 RP3 CACHEPENINTR RS1 3 5 7 4.7KX4 RP4 SMIFRCMCSTPCLKBRDYC1 3 5 7 4.7KX4 RP5 1 3 5 7 1KX4 R1 ADSADSPBRDYNAA
HITMCACHESMIACT-
2 2 2
26
VID3
B
2 4 6 8
B
2 4 6 8
BF2 BF1 J P 3 JP2 0 0 0 0 0 1 1 0
BF 0 JP1 0 1 1 0
RATIO 2.5 3.0 3.5 4.0
MHZ 66/166 66/200 66/233 66/266
AP LOCK# PBGNT# PBREQ# PICD[0] PICD[1] SCYC KEY
AP HLOCKHLOCK2
IGNNENMI A20MFERR-
2 4 6 8 1K 1 1 1K 1K 1 1K 1
BFSEL0 AH32
BFSEL0
25
2 R2 2 R3 2 R4 2
BFSEL1 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
BFSEL1
25
C15 D16 C13 D14 C11 D12 C9 D10 D8 A5 E9 B4 D6 C5 E7 C3 D4 E5 D2 F4 E3 G5 E1 G3 H4 J3 J5 K4 L5 L3 M4 N3
P55CT BFSEL2 BFSEL2 25
HD63 HD62 HD61 HD60 HD59 HD58 HD57 HD56 HD55 HD54 HD53 HD52 HD51 HD50 HD49 HD48 HD47 HD46 HD45 HD44 HD43 HD42 HD41 HD40 HD39 HD38 HD37 HD36 HD35 HD34 HD33 HD32 HD[0..63]
A
HD[0..63] FOR AMD-K6 BF2 BF1 JP3 JP2 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1
4
2,7
HOLD EWBEINIT
1 RN1 3 5 7 4.7KX4
1
1
1
1
2 4 6 8
VCC3
CPURST C1
INIT C2
INTR C3
NMI C4 470PF/NA 2
470PF/NA 2 2
470PF/NA 2
470PF/NA
BF0 JP1 0 1 0 1 0 1 0 1
PC CHIPS RATIO 2.5X 3.0X 2.0X 3.5X 4.5X 5.0X 4.0X 5.5X
3
Title P 5 4CT/P55CT Size B Date: D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
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VCC3 VCC VCC3 R16 8.2K D17 L10 N10 R10 U10 W10 Y10 Y11 Y13 Y15 L20 K20 K19 K17 K15 K13 K11 Y17 Y19 Y20 W20 U20 R20 N20 M12 M13 M14 M15 M16 M17 M18 N12 N13 N14 N15 N16 N17 N18 P12 P13 P14 P15 P16 P17 P18 R12 R13 R14 R15 R16 R17 R18 2 SIN1 TESTPIN# OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD3 OVDD2 OVDD2 OVDD2 OVDD2 OVDD2 OVDD2 OVDD2 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS SIS530-3 5VDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD NC NC NC NC NC NC NC NC NC NC NC NC NC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AE5 M10 P10 T10 V10 Y12 Y14 Y16 Y18 V20 T20 P20 M20 K18 K16 K14 K12 R5 R6 C5 C6 D5 D6 D7 E15 F15 R24 R25 AD15 AE15 T12 T13 T14 T15 T16 T17 T18 U12 U13 U14 U15 U16 U17 U18 V12 V13 V14 V15 V16 V17 V18
D
VCC3 2 1
D
R11 10
1 1 1 CB3 0.1uF 2 2 CT1 10uF
8,9 8,9 8,9 8,9 8,9 8,9
CKE[0..5] DQM[0..7] MA[0..14] CS#B[0..5] CS#A[0..5] MD[0..63]
CKE[0..5] DQM[0..7] MA[0..14] CS#B[0..5] CS#A[0..5] MD[0..63]
CB4 0.1uF 2 VCC3 2 1 CB5 0.1uF 2 R10 10 1
E8 B8 E9 D9 A9 E10 B10 E11 B11 D11 E12 B12 D13 F13 A13 E13 E22 B24 D24 E23 C25 E24 B26 A27 B27 C27 C29 D26 D28 D29 E27 E28 D8 C8 A8 C9 B9 D10 C10 A10 C11 A11 D12 C12 A12 C13 B13 D14 D23 A24 C24 A25 B25 D25 A26 C26 E25 B28 C28 F25 D27 G25 E26 H25
AVDD AVSS
AVSS AVDD
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
CB2 0.1uF 2 2
10uF
AG1 AG3
E17 A16
CT2
1
1
SIN2
RN9 CS#A[5] CS#A[4] CS#A[3] CS#A[2] CS#A[1] CS#A[0] CS#B[5] CS#B[4] CS#B[3] CS#B[2] CS#B[1] CS#B[0] MA[14] MA[13] MA[12] MA[11] MA[10] MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0] DQM[7] DQM[6] DQM[5] DQM[4] DQM[3] DQM[2] DQM[1] DQM[0] CKE[5] CKE[4] CKE[3] CKE[2] CKE[1] CKE[0] RAMW# SRAS# SCAS# SDCLK KOE# CCS1# GWE# BWE# ADSC# ADV# TAGWE# TA[7] TA[6] TA[5] TA[4] TA[3] TA[2] TA[1] TA[0] B22 A22 C21 E20 B21 A21 C17 B17 F16 D16 C16 B16 A18 F17 B18 C18 D18 E18 A19 B19 C19 D19 A20 B20 C20 E19 D20 C15 E16 D21 B23 B15 D15 D22 A23 E14 A15 F14 A14 B14 C14 C23 C22 E21 A17 H28 G28 G29 H26 H27 K25 E29 F26 F27 F28 J25 F29 G26 G27 J26 SIS530-1 TA7 TA6 TA5 TA4 TA3 TA2 TA1 TA0 R15 2 7 5 3 1 1 RN8 3 10 5 7 RN7 1 10 3 5 7 R19 2 R18 2 R17 2 1 RN4 3 10 5 7 1 RN5 3 10 5 7 RN6 1 3 10 5 7 1 RN3 3 10 5 7 1 3 5 7 10 CKE5 RN2 CKE4 CKE3 CKE2 CKE1 CKE0 R6 R7 R8 2 2 2
VCC3 2 1 CB6 0.1uF 2 R9 10 1 CB1 0.1uF 2 2 CT3 10uF 1 1 AJ27 AE25 AVDD AVSS
10 8 6 4 2 2 4 6 8 2 4 6 8 10 10 10
VCC3 CS#A5 CS#A4 CS#A3 CS#A2 CS#A1 CS#A0 CS#B5 CS#B4 CS#B3 CS#B2 CS#B1 CS#B0 MA14 MA13 MA12 MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0 DQM7 DQM6 DQM5 DQM4 DQM3 DQM2 DQM1 DQM0
6 1
C
1 1 1 1 1 1 1 1 1 1 1 1
530CCLK ADSMIODCWRCACHEHLOCKHITMSMIACTBRDY1 KENNABOFFAHOLD EADS-
530CCLK ADSMIODCWRCACHEHLOCKHITMSMIACTBRDYKENNABOFFAHOLD EADSHBE-7 HBE-6 HBE-5 HBE-4 HBE-3 HBE-2 HBE-1 HBE-0 HA31 HA30 HA29 HA28 HA27 HA26 HA25 HA24 HA23 HA22 HA21 HA20 HA19 HA18 HA17 HA16 HA15 HA14 HA13 HA12 HA11 HA10 HA9 HA8 HA7 HA6 HA5 HA4 HA3
AJ26 T26 V25 V29 T28 V27 U29 U25 V26 U27 V28 U24 U28 U26 T27 P29 R29 R28 R27 T25 R26 T24 T29 N24 H29 J28 K26 L27 K28 L28 L26 M25 K27 K29 P28 P27 P26 P25 N29 N27 N28 P24 N26 M28 N25 M29 M26 L29 L25 M27 J27 J29
CPUCLK ADS# M/IO# D/C# W/R# CACHE# HLOCK# HITM# SMIACT# BRDY# KEN#/INV NA# BOFF# AHOLD EADS# HBE#[7] HBE#[6] HBE#[5] HBE#[4] HBE#[3] HBE#[2] HBE#[1] HBE#[0] HA[31] HA[30] HA[29] HA[28] HA[27] HA[26] HA[25] HA[24] HA[23] HA[22] HA[21] HA[20] HA[19] HA[18] HA[17] HA[16] HA[15] HA[14] HA[13] HA[12] HA[11] HA[10] HA[9] HA[8] HA[7] HA[6] HA[5] HA[4] HA[3]
1 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
C
530-1
HOST/SDRAM/L2
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
B
B
1 10 1 10 1 10
RAMW# SRAS# SCAS# DCLK12
RAMW# SRAS# SCAS# DCLK12 KOE# CCS1# GWE# BWE# ADSC# ADV# TAGWE#
8,9 8,9 8,9 6 7 7 7 7 7 7 10
1 10
R14 R12 R13
2 2 2
1 10 1 10 1 10
KOE# CCS1# GWE# BWE# ADSC# ADV# TAGWE#
AF22 AE20 AJ23 AH23 AG23 AF21 AF23 AJ24 AH24 AG24 AF24 AJ25 AE21 AH25 AG25 AF25 AH26 AH27 AE23 AF26 AE22 AE24 AG26 AG27 AG28 AH28 AF27 AG29 AD25 AF28 AE26 AF29 AE27 AE28 AC25 AD26 AE29 AD28 AD27 AD29 AB25 AC29 AC27 AC28 AC26 AB27 AA25 AB26 AB28 AB29 AA26 AA27 AA28 Y25 AA29 Y26 Y27 W25 Y28 Y29 W27 W28 W26 W29
A
HD63 HD62 HD61 HD60 HD59 HD58 HD57 HD56 HD55 HD54 HD53 HD52 HD51 HD50 HD49 HD48 HD47 HD46 HD45 HD44 HD43 HD42 HD41 HD40 HD39 HD38 HD37 HD36 HD35 HD34 HD33 HD32 HD31 HD30 HD29 HD28 HD27 HD26 HD25 HD24 HD23 HD22 HD21 HD20 HD19 HD18 HD17 HD16 HD15 HD14 HD13 HD12 HD11 HD10 HD9 HD8 HD7 HD6 HD5 HD4 HD3 HD2 HD1 HD0
A
PC CHIPS Title 5 3 0 - 1 ( H O S T / S D R A M/L2/PWR) Size B Date:
3
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HD[0..63] HA[3..31] HBE-[0..7]
8 7
HD[0..63] HA[3..31] HBE-[0..7] 6
1,7 1,7,10 1,7
10
5
TA[0..7]
TA[0..7]
4
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 2
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VCC3CX AVDD1 11,12,27,28 13 13 C/BE#[0..3] PREQ#[0..3] AD[0..31] C/BE#[0..3] PREQ#[0..3] AD[0..31] 4,11,12,27,28 11,12,27,28 4,11,12,27,28 IDEDA0 IDEDA1 IDEDA2 IDEDA3 IDEDA4 IDEDA5 IDEDA6 IDEDA7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15 IDEDB0 IDEDB1 IDEDB2 IDEDB3 IDEDB4 IDEDB5 IDEDB6 IDEDB7 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 PGNT#[0..3] IDEDA[0..31] IDEDB[0..15] PGNT#[0..3] IDEDA[0..15] IDEDB[0..15] AVSS1 1 1 CT4 10uF 2 CB8 0.1uF 2 2 2 R41 33 L1 1 1 0-0805 2 1 CB7 0.1uF
T H E SE COMPONENTS MUST BE CLOSED TO 530 VCC3CX AVDD2 1 1 CT6 2 CB14 0.1uF 2 2 2 R42 33 L2 1 1 0-0805 2 1 CB13 0.1uF VCC3CX VCC3CX T H E SE COMPONENTS MUST BE CLOSED TO 530 Q30 NPN/NA R326 0 VCC3
D
D
AE2 AE3 AE4 AD5 AF1 AF2 AF3 AF4 AH3 AJ3 AG4 AE6 AH4 AJ4 AF5 AE7 AF7 AG7 AH7 AJ7 AF8 AG8 AF9 AH8 AG9 AH9 AJ9 AE10 AF10 AG10 AH10 AE11
AE18 AH19 AD17 AG18 AJ18 AE17 AH17 AD16 AF16 AJ17 AG17 AF17 AH18 AF18 AJ19 AG19 AG14 AE13 AH13 AD13 AJ12 AE12 AF12 AF11 AH11 AJ11 AG12 AH12 AF13 AG13 AJ13 AF14
6 4
530PCLK PCIRST# PHOLD#
PREQ#3 PREQ#2 PREQ#1 PREQ#0 530PCLK PCIRST# PHOLD# C/BE#3 C/BE#2 C/BE#1 C/BE#0 PAR FRAME# IRDY# TRDY# STOP# DEVSEL# PLOCK# ICHRDYA IDEREQA IDEIRQA CBLIDA ICHRDYB IDEREQB IDEIRQB CBLIDB VGA14M R37 R38 R39 R40 R G B RSET VREF COMP INT#A R43
IDB15 IDB14 IDB13 IDB12 IDB11 IDB10 IDB9 IDB8 IDB7 IDB6 IDB5 IDB4 IDB3 IDB2 IDB1 IDB0 IDA15 IDA14 IDA13 IDA12 IDA11 IDA10 IDA9 IDA8 IDA7 IDA6 IDA5 IDA4 IDA3 IDA2 IDA1 IDA0
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 SIN3 PGNT#3 PGNT#2 PGNT#1 PGNT#0
10uF AVSS2
2
1
VCC3
AC4 AB5 AD2 AD1 AG2 AC3 AA5 AH2 AG5 AJ6 AJ8 AE9 AH5 AJ5 AE8 AH6 AF6 AG6 AF15 AH14 AE14 AE16 AF19 AJ20 AJ21 AE19 E5 D4 C4 C3 B3 A6 B6 A5 B7 C7 E7 AB4 B2 F5 D1 C2 AVDD1 AVSS1 AVDD2 AVSS2 A3 E6 A4 B4 B5 A7
PREQ#[3] PREQ#[2] PREQ#[1] PREQ#[0] PCICLK PCIRST# PHOLD# C/BE#[3] C/BE#[2] C/BE#[1] C/BE#[0] PAR FRAME# IRDY# TRDY# STOP# DEVSEL# PLOCK# ICHRDYA IDREQA IIRQA CBLIDA ICHRDYB IDREQB IIRQB CBLIDB OSCI HSYNC VSYNC DDCDATA DDCCLK ROUT GOUT BOUT RSET VREF COMP INT#A ENVCO PLSENSE PL-DCLK PLPWDN AVDD1 AVSS1 AVDD2/3 AVSS2/3 AVDD4 AVSS4
PGNT#[3] PGNT#[2] PGNT#[1] PGNT#[0] PHLDA# BM_REQ# IIOR#[A] IIOW#[A] IDACK#[A] IDECS#A[1] IDECS#A[0] IDSAA[2] IDSAA[1] IDSAA[0] IRQ14 IRQ15 IIOR#[B] IIOW#[B] IDACK#[B] IDECS#B[1] IDECS#B[0] IDSAB[2] IDSAB[1] IDSAB[0] VCS#[1] VCS#[0] VSRAS# VSCAS# VWE# SCLK DSF VDQM[7] VDQM[6] VDQM[5] VDQM[4] VDQM[3] VDQM[2] VDQM[1] VDQM[0] VMA[11] VMA[10] VMA[9] VMA[8] VMA[7] VMA[6] VMA[5] VMA[4] VMA[3] VMA[2] VMA[1] VMA[0] PLHSYNC/VMD61 PLVSYNC/VMD60 FDDCCLK/VMD59 FDDCDAT/VMD58 FPLDEAD/VMD57 PLXLCLK/VMD56 B7/VMD55 B6/VMD54 B5/VMD53 B4/VMD52 B3/VMD51 B2/VMD50 B1/VMD49 B0/VMD48
AC5 AE1 AD4 AD3 AC1 AC2 AJ14 AD14 AG15 AG16 AH16 AJ16 AH15 AJ15 AJ10 AG11 AG20 AH20 AF20 AG22 AH22 AJ22 AH21 AG21 E1 P2 P1 R4 R3 L1 M4 F4 F3 J5 F2 T6 U2 U5 U3 N5 M3 M2 M1 N4 N3 P6 N2 N1 P4 P5 P3
PHLDA# BM_REQ# R35 R34 R33 R20 R21 R22 R23 R24 2 2 2 2 2 2 2 2 133 133 133 133 133 133 133 133 IDEIOR#A IDEIOW#A IDACK#A IDECS#A1 IDECS#A0 IDEAA2 IDEAA1 IDEAA0 IRQ14 IRQ15 IDEIOR#B IDEIOW#B IDACK#B IDECS#B1 IDECS#B0 IDEAB2 IDEAB1 IDEAB0
PHLDA# BM_REQ# IDEIOR#A IDEIOW#A IDACK#A
4 4 13 13 13 I D ECS#A[0..1] IDEAA[0..2]
Q29 NPN/NA
GPIO9
I D ECS#A[0..1] IDEAA[0..2]
13 13
C
11,12 13 13 13 13 13 13 13 13 6 10 10
PAR FRAME# IRDY# TRDY# STOP# DEVSEL# PLOCK# ICHRDYA IDEREQA IDEIRQA CBLIDA ICHRDYB IDEREQB IDEIRQB CBLIDB
C
IRQ[3..15]
530-2
PCI/IDE/VGA/FPD /SGRAM
R32 R31 R30 R29 R25 R26 R27 R28
2 2 2 2 2 2 2 2
133 133 133 133 133 133 133 133
IDECS#B[0..1] IDEAB[0..2]
IRQ[3..15] IDEIOR#B IDEIOW#B IDACK#B
4,5,14,15,16 13 13 13 I D ECS#B[0..1] IDEAB[0..2]
13 13
10 10
VGA14M HSYNC VSYNC VDDCDAT VDDCCLK 10 R 10 G 10 B
HSYNC VSYNC VDDCDAT VDDCCLK
2 2 2 2
133 133 133 133
4,11,12
B
INT#A
VCC3
2
1 0/NA
B
VCC3
COMP 1 L3
C5 1 2 FB-0805
0.1uF 2
CB9 0.1uF
CB10 0.1uF
CT5 10uF
CB11 0.1uF
2
2
1
1
1
2
1
2
C1 D3 T5 R2 R1 T1 T2 T3 T4 U1 U4 V1 U6 V2 V3 V4 V5 W1 W2 W3 W4 Y1 Y2 Y3 W5 Y4 AA1 AA2 Y5 AA3 AB1 AB2 AA4 AB3
H3 H2 L5 H1 J3 J2 L4 J1 K4 K3 M5 K2 K1 L3 N6 L2
THESE COMPONENTS MUST BE CLOSED TO 530
A
G5 D2 E4 H5 E3 E2 F1 G4 J4 G3 G2 G1 K5 H4
VREF
CB12
1
2 0.1uF
VMD63 VMD62 VMD31 VMD30 VMD29 VMD28 VMD27 VMD26 VMD25 VMD24 VMD23 VMD22 VMD21 VMD20 VMD19 VMD18 VMD17 VMD16 VMD15 VMD14 VMD13 VMD12 VMD11 VMD10 VMD9 VMD8 VMD7 VMD6 VMD5 VMD4 VMD3 VMD2 VMD1 VMD0
RSET
R36
2
1 147
G7/VMD47 G6/VMD46 G5/VMD45 G4/VMD44 G3/VMD43 G2/VMD42 G1/VMD41 G0/VMD40 R7/VMD39 R6/VMD38 R5/VMD37 R4/VMD36 R3/VMD35 R2/VMD34 R1/VMD33 R0/VMD32
SIS530-2
A
PC CHIPS Title 5 3 0 - 2 ( P C I / I D E / V G A / FPD/SGRAM) Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 3
1
of
27
8
7
6
5
4
3
2
1
RTCVDD SB5V R51 1 2 15K
R61
2
1 33K
FOR 5595_B 1-2 ONLY AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
AD[0..31] C/BE#[0..31] VCC RTCVDD SB5V VCC3 1 CB16 1 0.1uF 2 61 63 65 66 67 68 69 70 71 72 74 75 77 78 79 80 93 94 95 96 97 98 100 101 103 105 106 107 108 110 111 112 88 121 174 62 81 104 168 22 30 119 U1 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 OVDD1 OVDD2 OVDD3 OVDD4 RTCVDD KBVDD USBVDD DVDD1 DVDD2 DVDD3 2 CB17 0.1uF VCC 2 R59 1K 1
AD[0..31] C/BE#[0..3]
3,11,12,27,28 3,11,12,27,28
FOR 5595_A2 1-2 Enable 2-3 Default 11,12,27,28
D
PME#
PME# INT#A INT#B INT#C INT#D PHLDA# SERR# 5595PCLK FRAME# DEVSEL# IRDY# TRDY# STOP# PAR FERRUCLK48M
PME# MMBT3904 INT#A INT#B INT#C INT#D PHLDA# SERR# 5595PCLK FRAME# DEVSEL# IRDY# TRDY# STOP# PAR FERRUCLK48M
Q1 56 57 59 60 125 83 58 87 89 92 86 84 53 43 120 21 20 18 23 24 26 29 2 4 6 8 4.7KX4 CLK14M KBCLK PMCLK GPIO9 GPCS#0 KLOCK# SIRQ DDCDAT DDCCLK OC#0 OC#1 GPIO4 FAN2 127 129 35 31 32 128 40 55 52 54 41 42 122 124 38 39
3,11,12 11,12,27 11,12,27 11,12,28 3 11,12,28 6 3,11,12,27,28 3,11,12,27,28 3,11,12,27,28 3,11,12,27,28 3,11,12,27,28 3,11,12,27,28 1 6
INT#[A] INT#[B] INT#[C] INT#[D] PHLDA# SERR# PCLK FRAME# DEVSEL# IRDY# TRDY# STOP# GPIO[0]/PAR FERR# UCLK48M OSC32KHI/IRQ[8] OSC32KHO/RTCCS# PWRGD PSRSTB# RING PWRBT# GPIO[5]/PME#[0]
C/BE#[0] C/BE#[1] C/BE#[2] C/BE#[3] PHOLD# PCIRST# CPURST NMI INTR IGNE# A20M# INIT# SMI# STPCLK#
76 82 91 102 113 126 50 47 48 46 51 45 49 44
C/BE#0 C/BE#1 C/BE#2 C/BE#3 R53 R60 R54 R55 R56 2 2 2 2 2 147 11K 147 147 147
D
PHOLD# RSTPCI# CPURST VCC3 NMI INTR IGNNEA20MINIT SMISTPCLK-
PHOLD# RSTPCI#
3 5 CPURST 1,5
NMI INTR IGNNEA20MINIT SMISTPCLK-
1,5 1,5 1 1 1 1 1
2 R48 5.6M Y1 1
C
1 17,27 2
23 21 18
PWRGD PSRSTB# RING PWRBT# VCC
PWRGD PSRSTB# RING PWRBT# RB3 1 3 5 7 BM_REQ#
5595
POWERED BY RTCVDD/RTCVSS
UV0+ UV0UV1+ UV1-
115 116 117 118
UV0+ UV0UV1+ UV1-
UV0+ UV0UV1+ UV1-
18 18 18 18 SB5V
32.768K C7 10pF 2 C6 10pF 2 VCC R52(2-3) 1 2 3 4.7K 1 2 3 6,8,9 6,8,9 18 18 27 22 VCC R49(2-3) 1 1 2 2 3 3 HEADER 3
B
GPO[6]/CKE_S/AC PS_ON#/RTCALE GPIO[10]/PME#[1
28 25 27
-VID0 PS_ON# PME_1X R57 2 1 4.7K
-VID0 PS_ON#
26 23
2 R62 10K 1
C
1
1
3 6 20 20 25 18 19
BM_REQ# CLK14M KBCLK PMCLK GPIO9 -EXT KLOCK# SIRQ DDCDAT DDCCLK OC#0 OC#1 GPIO4 FAN2
BM_REQ# EXTSMI# CLK14M GPIO[2]/KBCLK GPIO[1]/PMCLK GPIO[3]/CPU_STO GPIO[9]/THERM#/ GPCS#[0] GPCS#[1]/KLOCK# GPIO[17]/SIRQ DDCDAT DDCCLK GPIO[7]/OC#[0]/ GPIO[8]/OC#[1] GPIO[4]/FAN[1] GPIO[11]/FAN[2]
ENABLE DLL
3 ROMKBCS# SPKR ROMKBCS# SPKR 19 18 1 2Q2 2 2N3904
R63
PCI/CPU/USB RTC/KBC/ISA
ROMKBCS# SPKR
2
36 37
1K 1 LANWK
LANWK R256 100K/NA
17
VIN0 VIN1 VIN2 VIN3
16 15 14 13
GPI[12]/VIN[0] GPI[13]/VIN[1] GPI[14]/VIN[2] GPI[15]/VIN[3]
SMRDC# SMWTC# BALE AEN BCLK RSTDRV TC SBHE# IORC# IOWC# MRDC# MWTC# RFH# IOCHRDY GPIO[16]/IOCHK# DACK#[0] DACK#[1] DACK#[2] DACK#[3] DACK#[5] DACK#[6] DACK#[7] SD[0] SD[1] SD[2] SD[3] SD[4] SD[5] SD[6] SD[7] SD[8] SD[9] SD[10] SD[11] SD[12] SD[13] SD[14] SD[15] USBVSS RTCVSS
145 144 176 138 162 130 173 181 149 148 193 195 159 141 1 192 157 169 154 194 198 205 142 137 139 134 135 140 131 133 196 197 200 202 203 206 207 208
R45 R46 R44 RB4 1 3 5 7
2 2 2
1 22 1 22 1 22
2 4 6 8 33X4
SMRDC# SMWTC# BALE AEN BCLK PIN130 TC SBHE# IORC# IOWC# MRDC# MWTC# RFH# IOCHRDY IOCHK#
SMRDC# SMWTC# BALE AEN BCLK PIN130 TC SBHE# IORC# IOWC# MRDC# MWTC# RFH# IOCHRDY IOCHK#
14,15 14,15 14,15 14,15,16 14,15 14,15,16 14,15 14,15,16 14,15,16 14,15,19 14,15,19 14,15 14,15,16 14,15
IO16# M16# ZWS# 20 KBDAT 2-3 AVALIABLE FOR VERSION DF 1-2 AVALIABLE FOR VERSION CW 14,15 14,15 14,15
IO16# M16# ZWS# KBDAT IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 2 R50 1 OPEN/0
180 182 136 33 6 7 5 4 3 2 9 8 34 11 10 191 158 132 152 199 201 204 VCC
IO16# M16# ZWS# KBDAT/IRQ[1] IRQ[3] IRQ[4] IRQ[5] IRQ[6] IRQ[7] IRQ[9] IRQ[10] IRQ[11] PMDAT/IRQ[12] IRQ[14] IRQ[15] DRQ[0] DRQ[1] DRQ[2] DRQ[3] DRQ[5] DRQ[6] DRQ[7]
DACK#0 DACK#1 DACK#2 DACK#3 DACK#5 DACK#6 DACK#7 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
1
B
VCC RB5 PHOLD# PHLDA# BM_REQ# 1 3 5 7 10KX4 2 4 6 8
5 5 20
PIN11 PIN10 PMDAT
PIN11 PIN10 PMDAT
OVSS1 OVSS2 OVSS3 OVSS4 OVSS5 OVSS6 OVSS7
DVSS1 DVSS2 DVSS3
AVDD AGND
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19
DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7
LA17 LA18 LA19 LA20 LA21 LA22 LA23
179 178 177 175 170 171 167 166 165 164 163 161 160 156 155 153 147 151 143 146
190 189 187 186 185 184 183
90 123 172
64 73 85 99 109 150 188
12 17
22 3,5,14,15,16 14,15,16
VIN[0..3] IRQ[3..15] DRQ[0..7]
VIN[0..3] IRQ[3..15] DRQ[0..7]
2 1 CB18 0.1uF
R47 10
1 1 1 CT7 10uF + 2 2
AVDD SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 LA23 LA22 LA21 LA20 LA19 LA18 LA17 CB15 0.1uF AGND AGND
6 5
19
A
114
5595
DACK#[0..7] SD[0..15] LA[17..23] SA[0..19]
DACK#[0..7] SD[0..15] LA[17..23] SA[0..19] PC CHIPS Title 5595
14,15,16 14,15,16,19,25 5,14,15 14,15,16,19
A
R58 2 0 5 AGND 1
2
PIN146 PIN143 PIN151
PIN146 PIN143 PIN151
4
5 5 5
3
Size B Date:
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 4
1
of
27
8
7
8
7
6
5
4
3
2
1
INTR IRQ[3..15] IRQ[3..15] 3,4,14,15,16 1 R66 4 4 PIN10 PIN11 PIN10 PIN11 IRQ15 IRQ14 27K 2 1 C10 0.1uF 2 Q4 MMBT3904
INTR
1,4
VCC3 2
D
D
R68 330
4 4 4
PIN146 PIN143 PIN151
PIN146 PIN143 PIN151 1,4 CPURST CPURST 1 R65 27K 2 1 C9 0.1uF
NMI
NMI
1,4 1 R67 0
1
PCIRST# 2 Q5 2N7002 2
PCIRST#
3,11,12,27,28
Q3 MMBT3904
RSTDRV
R69 200K/NA 1
VCC PIN11
C
TWO OPTIONS : A : Thermistor Circuitry B : Transistor Circuitry
2
L A YOUT FOR SOCKET 7 USES A THERMISTOR 10 MILS GROUND TRACE 10 MILS SPACE DXP 10 MILS DXP TRACE MINIMUM SPACE THERMISTOR
C
0
2
1 R73
DXN 1 R72 3.3K DXP 2
B A
C12 0.1U 2 1 RT1 R Q8 2N3904/NA
AGND DXN SIS5595B GND
10 MILS AVSS TRACE 10 MILS SPACE 10 MILS GROUND TRACE SOCKET 7
RN10 PIN10 PIN146 PIN143 PIN151 1 3 5 7 0X4 103JT-025A 4 AGND AGND 1 0.1uF/NA C11 2 2 R70 1 PIN11 10 MILS SPACE 0/NA DXP 10 MILS DXP TRACE MINIMUM SPACE VCC PIN11 1 0.1uF R71 SIS5595B 10K/NA OEN# Q7 MMBT3904/NA LA17 2 2 GND AGND 10 MILS GROUND TRACE SOCKET 7
B
2 4 6 8
DXP IRQ15 IRQ14 PCREQ#
L A YOUT FOR SOCKET 7 USES A TRANSISTOR 10 MILS GROUND TRACE
TRANSISTOR
10 MILS DXN TRACE 10 MILS SPACE
B
14,15
MASTER#
10K/NA
1 U2A 3
MASTER#
2
R76
1
SA17 VCC
0 VCC 2 OEN#
7 4 H CT125/NA 2
1 R77
1 R64 2.7K PCREQ# 2 U2B 6 SA18 1 R78
A
R75 470 RSTDRV Q6 MMBT3904 0 OEN# 1 LA18 5
R74 4
A
RSTPCI#
RSTPCI#
2 10K
1
7 4 H CT125/NA 2
10
4
PC CHIPS U2C 8 SA19 Title 5 5 9 5 V E R S I O N (B2 ONLY)
LA19 LA[17..23]
9
4,14,15
LA[17..23]
7 4 H CT125/NA 0 2
5
1 R79
4 3
Size B Date:
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 5
1
of
27
8
7
6
8
7
6
5
4
3
2
1
VCC3 1 L6 FB
D
P L A C E THESE RESISTORS AND CAPACITORS NEAR RECEIVER
D
1
1
1
1
1
1
C16 10pF/NA 1 C17
C18 10pF 1 C19
C20 10pF/NA 1 C21
C22 10pF/NA 1 C23
C24 10pF/NA 1 C25
C26 10pF/NA 1 C27
1
C28 10pF/NA 1 2 C29 10pF/NA NA
VCC3 L4 1 FB 1 1 1 1 1 1 1 2 C33 0.01UF CB20 0.01uF 2 2 CB21 100pF 2 CB22 100pF 2 CB23 100pF 2 + CE2 10uF C32 0.01UF C31 100PF 2 1 CE3 10UF + NA C30 100PF 2
2
2
2
2
2
2
10pF/NA 2 2 NA NA
10pF/NA NA NA 2
10pF/NA 2 NA NA
10pF/NA NA NA
10pF/NA NA 2 NA 2
10pF/NA NA NA
CB27 0.1uF 2 2
CB19 0.01uF
1 6 14
VDD VDD VDD
VDDS VDDS VDDS
19 30 36
U3
P L A CE THESE RESISTORS NEAR CLOCK GENERATOR IOAPIC CPU[1] CPU[2] CPU[3] PCI_F/S[1] PCI[1]/S[2] PCI[2] PCI[3] PCI[4] PCI[5] 24M_REF[3]/SIO 48MHZ/S[0] 47 43 41 40 7 8 10 11 12 13 25 26 FS1 FS2 R80 R81 R85 R107 R108 R109 R110 R111 R112 R89 R82 R83 R86 R84 R87 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 22 1 22 1 10 1 10 1 10 1 10 1 10 1 10 1 10 1 50K 1 22 1 22 1 50K 1 22 1 22 VCC3 CPUCLK 530CCLK SRAMCLK 530PCLK PCICLK1 PCICLK2 PCICLK3 PCICLK4 5595PCLK SIO24M UCLK48M
4 VCC3
C
XIN XOUT
2
R93 2.7K 2 2 1
Y2 1 14.318MHz 2 5
CPUCLK 530CCLK SRAMCLK1 530PCLK PCICLK1 PCICLK2 PCICLK3 PCICLK4 5595PCLK SIO24M UCLK48M
1 2 7 3 11 11 12,28 27 4 16 4
C
R92 2.7K 2 1 1
C13 10pF 2
1 C14 10pF
FS0
4,8,9 4,8,9
DDCCLK DDCDAT
DDCCLK DDCDAT
24 23
SCLK SDATA REF[0]/MODE REF[1]/SD REF[2] 2 46 44 SD
VCC3
B
VDDC
S D FS2 FS1 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 1 1 0 1 1 0 1 1 1 1 1 1 FOR IMI C9745 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 1 1 F O R ICS9248-59,
FS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
CPU 66.8 83.3 95 100 100 112 124 103 66.8 75 83.3 95 100 112 124 133.3
SDRAM 89 66.8 76 66.6 75 84 93 103 66.8 75 83.3 95 100 112 124 133.3
PCI 33.4 33.4 31.7 33.3 33.3 37.3 41.3 34.3 33.4 30 33.3 31.7 33.3 37.3 41.3 33.3 31.7 35 37.3 31 33.3 31 ABOVE
VGA14M CLK14M ISA14M R90 R91 2 2 1 22 1 10 DCLK[0..11] SRAMCLK2 7 DCLK0 DCLK1 DCLK2 DCLK3 DCLK4 DCLK5 DCLK6 DCLK7 DCLK8 DCLK9 DCLK10 DCLK11 DCLK12 1
VGA14M CLK14M ISA14M
3 4 14,15,27 DCLK[0..11] 8,9
3 9 16 22 27 33 39 45
VSS VSS VSS VSS VSS VSS VSS VSS
VDDI
SDRAM[0] SDRAM[1] SDRAM[2] SDRAM[3] SDRAM[4] SDRAM[5] SDRAM[6] SDRAM[7] SDRAM[8]/PD# SDRAM[9]/SDS# SDRAM[10]/PS# SDRAM[11]/CS# SDRAM[12]
38 37 35 34 32 31 29 28 21 20 18 17 15
R95 R96 R97 R98 R99 R100 R101 R102 R103 R104 R105 R106
2 2
1
10 1 2 2 10 1 1 2 10 2 10 1 2 10 10 10 2 1 R88 1 1 22 10 1 1 10 1 10
2 2 10 2 2 10
1
B
1
0 95 63.3 0 105 70 1 112 74.7 0 124 82.7 1 133.3 88.9 0 124 124 OTHERS THE SAME AS
2 VCC3 L5 1 FB 9148-37/59 IMI C9745 ICS9248-59 IW513 2
DCLK12
2
48
42
C15 10P/NA 2
1
1
CB24 0.1uF 1 CB25 100pF
1 2 2
CB26 0.1uF
VCC3 2
+ CE1 10uF
2 4 6 8
RB6 47KX4
A A
1 3 5 7
2
PC CHIPS SD FS2 FS1 FS0 S H ORT : ASYNC WITH SDRAM OPEN : SYNC WITH SDRAM 2 R94 4.7K/NA
6 5 4 3
Title C L O C K G E N E R A T O R ( I M I C 9 7 4 5 , I C S 9 2 4 8 - 5 9 ,IW513) Size B Date: D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
FS2 FS1 FS0
25 25 25
Rev 5.1 Sheet 6
1
of
27
8
7
1
8
7
6
5
4
3
2
1
1,2 1,2,10
HD[0..63] HA[3..31]
HD[0..63] HA[3..31]
D
VCC3 VCC3
D
13 25 38 64 77 89 102 128
VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18
C
62 61 60 57 56 55 54 53 51 50 49 48 47 44 43 42
A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10] A[11] A[12] A[13] A[14] A[15]
6 1 2 2 2 2 2 2
SRAMCLK1 ADSPADSC# ADV# BWE# GWE# KOE# CCS1#
SRAMCLK1 ADSPADSC# ADV# BWE# GWE# KOE# CCS1# VCC3
115 105 106 104 114 113 116 121 126 124
SRAMCLK ADSP# ADSC# ADV# BWE# GWE# OE# CE# CE[2] CE#[2] CE[3] CE#[3] MODE ZZ BW#[8] BW#[7] BW#[6] BW#[5] BW#[4] BW#[3] BW#[2] BW#[1] NC NC GND GND GND GND
10
SHA19
SHA19 R257(2-3) 1 1 2 2 3 3 HEADER 3 127 125 MODE HBE-7 HBE-6 HBE-5 HBE-4 HBE-3 HBE-2 HBE-1 HBE-0 10 SHA20 SHA20 41 63 120 119 118 117 112 111 108 107 40 52 46 59 110 123
B
VCC3 1
R115 4.7K 2
MODE
MODE
DQ[64] DQ[63] DQ[62] DQ[61] DQ[60] DQ[59] DQ[58] DQ[57] DQ[56] DQ[55] DQ[54] DQ[53] DQ[52] DQ[51] DQ[50] DQ[49] DQ[48] DQ[47] DQ[46] DQ[45] DQ[44] DQ[43] DQ[42] DQ[41] DQ[40] DQ[39] DQ[38] DQ[37] DQ[36] DQ[35] DQ[34] DQ[33] DQ[32] DQ[31] DQ[30] DQ[29] DQ[28] DQ[27] DQ[26] DQ[25] DQ[24] DQ[23] DQ[22] DQ[21] DQ[20] DQ[19] DQ[18] DQ[17] DQ[16] DQ[15] DQ[14] DQ[13] DQ[12] DQ[11] DQ[10] DQ[9] DQ[8] DQ[7] DQ[6] DQ[5] DQ[4] DQ[3] DQ[2] DQ[1] VCC VCC VCC VCC
37 36 35 34 33 32 31 30 29 28 27 24 23 22 21 20 19 18 17 16 15 12 11 10 9 8 7 6 5 4 3 2 101 100 99 98 97 96 95 94 93 92 91 88 87 86 85 84 83 82 81 80 79 76 75 74 73 72 71 70 69 68 67 66
HD63 HD62 HD61 HD60 HD59 HD58 HD57 HD56 HD55 HD54 HD53 HD52 HD51 HD50 HD49 HD48 HD47 HD46 HD45 HD44 HD43 HD42 HD41 HD40 HD39 HD38 HD37 HD36 HD35 HD34 HD33 HD32 HD31 HD30 HD29 HD28 HD27 HD26 HD25 HD24 HD23 HD22 HD21 HD20 HD19 HD18 HD17 HD16 HD15 HD14 HD13 HD12 HD11 HD10 HD9 HD8 HD7 HD6 HD5 HD4 HD3 HD2 HD1 HD0
VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ VCCQ
13 25 38 64 77 89 102 128
U4
U5 37 36 35 34 33 32 31 30 29 28 27 24 23 22 21 20 19 18 17 16 15 12 11 10 9 8 7 6 5 4 3 2 101 100 99 98 97 96 95 94 93 92 91 88 87 86 85 84 83 82 81 80 79 76 75 74 73 72 71 70 69 68 67 66 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18
62 61 60 57 56 55 54 53 51 50 49 48 47 44 43 42
A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10] A[11] A[12] A[13] A[14] A[15]
6
SRAMCLK2 ADSPADSC# ADV# BWE# GWE# KOE# CCS1#
SRAMCLK2
115 105 106 104 114 113 116 121 126 124
SRAMCLK ADSP# ADSC# ADV# BWE# GWE# OE# CE# CE[2] CE#[2] CE[3] CE#[3] MODE ZZ BW#[8] BW#[7] BW#[6] BW#[5] BW#[4] BW#[3] BW#[2] BW#[1] NC NC GND GND GND GND
R258(2-3) 1 1 2 2 3 3 HEADER 3
SHA19 VCC3 MODE HBE-0 HBE-1 HBE-2 HBE-3 HBE-4 HBE-5 HBE-6 HBE-7 127 125 41 63 120 119 118 117 112 111 108 107 40 52 46 59 110 123
SHA20
DQ[64] DQ[63] DQ[62] DQ[61] DQ[60] DQ[59] DQ[58] DQ[57] DQ[56] DQ[55] DQ[54] DQ[53] DQ[52] DQ[51] DQ[50] DQ[49] DQ[48] DQ[47] DQ[46] DQ[45] DQ[44] DQ[43] DQ[42] DQ[41] DQ[40] DQ[39] DQ[38] DQ[37] DQ[36] DQ[35] DQ[34] DQ[33] DQ[32] DQ[31] DQ[30] DQ[29] DQ[28] DQ[27] DQ[26] DQ[25] DQ[24] DQ[23] DQ[22] DQ[21] DQ[20] DQ[19] DQ[18] DQ[17] DQ[16] DQ[15] DQ[14] DQ[13] DQ[12] DQ[11] DQ[10] DQ[9] DQ[8] DQ[7] DQ[6] DQ[5] DQ[4] DQ[3] DQ[2] DQ[1] VCC VCC VCC VCC
C
B
GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ
103 90 78 65 39 26 14 1
122 109 58 45
103 90 78 65 39 26 14 1
VCC3Q
122 109 58 45
64KX64
GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ GNDQ
64KX64
VCC3Q
A
1,2
HBE-[0..7]
HBE-[0..7]
A
PC CHIPS Title T A G & P I P E L I N E B U R S T S R A M S-1 (2Mega) Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 7
1
of
27
8
7
6
5
4
3
2
1
2,9 2,9 2,9
MD[0..63] MA[0..14] DQM[0..7]
MD[0..63] MA[0..14] DQM[0..7] VCC3 VCC3 VCC3 VCC3
D
D
6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA0 MA1 MA11 MA12
34 118 35 119 36 120 37 121 38 123 126 33 117 122 39 132
A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10] A[11] A[12] A[0] A[1] BA[0] BA[1] A[13]
C
DQM7 DQM5 DQM4 DQM3 DQM1 DQM0 DQM6 DQM2
28 46 47 112 130 131 29 113 21 22 52 53 105 106 136 137
DQM[0] DQM[2] DQM[3] DQM[4] DQM[6] DQM[7] DQM[1] DQM[5] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2]
2,9 2,9
SRAS# SCAS#
SRAS# SCAS# CS#A0 CS#A1 CS#B0 CS#B1
115 111 30 114 45 129 27 48 DCLK0 DCLK1 DCLK2 DCLK3 CKE0 CKE1 42 125 79 163 128 63 83 82 165 166 167
2,9
B
RAMW#
RAMW#
4,6,9 4,6,9
DDCCLK DDCDAT
DDCCLK DDCDAT
addr = 1010000b
81 24 25 50 31 44
WP/NC NC NC NC NC/OE#0 NC/OE#2 NC NC NC NC
REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63]
147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA0 MA1 MA11 MA12
34 118 35 119 36 120 37 121 38 123 126 33 117 122 39 132
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168
DIMM2
DIMM1
A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10] A[11] A[12] A[0] A[1] BA[0] BA[1] A[13]
DQM7 DQM5 DQM4 DQM3 DQM1 DQM0 DQM6 DQM2
28 46 47 112 130 131 29 113 21 22 52 53 105 106 136 137
DQM[0] DQM[2] DQM[3] DQM[4] DQM[6] DQM[7] DQM[1] DQM[5] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2]
SRAS# SCAS# CS#A2 CS#A3 CS#B2 CS#B3 RAMW# DCLK4 DCLK5 DCLK6 DCLK7 CKE2 CKE3 DDCCLK DDCDAT VCC3
115 111 30 114 45 129 27 48 42 125 79 163 128 63 83 82 165 166 167
addr = 1010001b
81 24 25 50 31 44
WP/NC NC NC NC NC/OE#0 NC/OE#2 NC NC NC NC
REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63]
147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
C
B
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
61 62 80 108
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
61 62 80 108
A
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
SDRAM DIMM
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS S D RAM DIMM
A
PC CHIPS 2,9 2,9 6,9 2,9
8
CS#A[0..5] CS#B[0..5] DCLK[0..11] CKE[0..5]
CS#A[0..5] CS#B[0..5] DCLK[0..11] CKE[0..5]
7 6 5 4 3
Title D I M M 1 & DIMM2 Size B Date: D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 8
1
of
27
8
7
6
5
4
3
2
1
2,8 2,8 2,8
MD[0..63] MA[0..14] DQM[0..7]
MD[0..63] MA[0..14] DQM[0..7] CKE[0..5] VCC3 VCC3 VCC3
D
D
6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168
DIMM3 CKE0 CKE1 CKE2 CKE3 CKE4 CKE5 MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 HDWCLK LEADED CPUCLK MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0 MD43 MD43 MD42 MD41 MD40 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 *1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 TIME -2.5ns -2.0ns -1.5ns -1.0ns -0.5ns 0.0ns +0.5ns +1.0ns +1.5ns +2.0ns +2.5ns +3.0ns +3.5ns +4.0ns +4.5ns +5.0ns MD42 MD41 MD40 P i n Name MD62 M D 61 M D59 M D49 MD48 Function Descriptions Integrated VGA Function Slow Decoding of GUI Host Interface INT#A Control for Panel_Link Video Subsystem control by BIOS Share Memory
MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA0 MA1 MA11 MA12
34 118 35 119 36 120 37 121 38 123 126 33 117 122 39 132
A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10] A[11] A[12] A[0] A[1] BA[0] BA[1] A[13]
C
DQM7 DQM5 DQM4 DQM3 DQM1 DQM0 DQM6 DQM2
28 46 47 112 130 131 29 113 21 22 52 53 105 106 136 137
DQM[0] DQM[2] DQM[3] DQM[4] DQM[6] DQM[7] DQM[1] DQM[5] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2]
2,8 2,8
SRAS# SCAS#
SRAS# SCAS# CS#A4 CS#A5 CS#B4 CS#B5
115 111 30 114 45 129 27 48 DCLK8 DCLK9 DCLK10 DCLK11 CKE4 CKE5 42 125 79 163 128 63 83 82 165 166 167
2,8
B
RAMW#
RAMW#
4,6,8 4,6,8
DDCCLK DDCDAT
DDCCLK DDCDAT VCC3
addr = 1010010b
81 24 25 50 31 44
WP/NC NC NC NC NC/OE#0 NC/OE#2 NC NC NC NC
REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63]
147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161
10KX4R RB11 1 3 5 7 2 2 R117 10K R116 10K
2 4 6 8 1 1
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
Default Value E n able (0) F a s t Decode(0) E n able(0) E n able(0) D i sable(0) Disable (1) Slow Decode (1) Disable(1) Disable(1) Enable(1) VCC3
C
0 : NC 1 : STUFFED RESISTOR
MD62 MD61 MD59 MD49 MD48
R118 R119 R120 R121 R122
2 2 2 2 2
1 4.7K/NA 1 4.7K/NA 1 4.7K 1 4.7K/NA 1 4.7K VCC3
R123 R124 R125 R126
2 2 2 2
1 4.7K 1 4.7K/NA 1 4.7K 1 4.7K/NA
0 : NC 1 : STUFFED RESISTOR
B
VCC3 MCLK LEADED SDCLK MD39 MD39 MD38 MD37 MD36 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 *0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 TIME +0.5ns +1.0ns +1.5ns +2.0ns +2.5ns +3.0ns +3.5ns +4.0ns +4.5ns +5.0ns +5.5ns +6.0ns +6.5ns +7.0ns +7.5ns +8.0ns MD38 MD37 MD36 R127 R128 R129 R130 2 2 2 2 1 4.7K/NA 1 4.7K 1 4.7K/NA 1 4.7K/NA
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162 SDRAM DIMM
A
61 62 80 108
A
PC CHIPS 2,8 2,8 6,8 2,8 CS#A[0..5] CS#B[0..5] DCLK[0..11] CKE[0..5] CS#A[0..5] CS#B[0..5] DCLK[0..11] CKE[0..5] Title D I M M 3 & H A R D WARE TRAP Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 9
1
of
27
8
7
6
5
4
3
2
1
D
D
VCC HA19 HA20 VCC3 VCC3
1,2,7,10 VGA1 MR MG MB 1 2 1 CB28 0.1uF 1 3 5 7 2
C
HA19 HA20
1,2,7,10
FB L10 RB14 4.7KX4 VCC 1
R134 15 2
3 3 3 3
VDDCDAT HSYNC VSYNC VDDCCLK
VDDCDAT HSYNC VSYNC VDDCCLK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VGA CON 1,2,7,10
2 4 6 8
2
R137(1-2) 1 1 2 2 3 3 HEADER 3 R138(1-2) 1 1 2 2 3 3 HEADER 3 HA[3..31] HA[3..31]
R135 8.2K 1 1
2 R136 8.2K
SHA19
SHA19
7
C
SHA20
SHA20
7
1
1
1
C40 100pF
C41 100pF
C42 180pF
1 2
C43 180pF
2
2
2
HA11 HA10 HA9 HA8 HA7 HA6 HA5
VCC R139(1-2) 1 2 3 0/1-2 1 2 3
VCC3
32 3
B
A0 A1 A2 A3 A4 A5 A6 5 27 26 23 25 4 28 13 14 15 17 18 19 20 21
12 11 10 9 8 7 6
VDD WE# A[14] A[15] NC NC CE2 OE# CE1# VSS U6 64KX8
R
R 3 1 1 R131 1 2 Q9 B A V 9 9-SOT23/NA VCC 2 75 2
L7 C34 20pF
1
2 FB-0805 1 C35 20pF
MR 2 TAGWE# TAGWE# SHA19 SHA20 29 3 31 1 2 CB29 0.1UF 30 24 22 16
A[7] A[8] A[9] A[10] A[11] A[12] A[13] D[0] D[1] D[2] D[3] D[4] D[5] D[6] D[7]
HA12 HA13 HA14 HA15 HA16 HA17 HA18 TA0 TA1 TA2 TA3 TA4 TA5 TA6 TA7
B
3
G
G 3 1 1 R132 VCC 2 75 2
2
L8 C36 20pF
1
2 FB-0805 C37 20pF 2 1
MG
1
2 Q10 B A V 9 9-SOT23/NA
2 100MHz 31 ohm
TA[0..7]
TA[0..7]
3
B
B 3 1 1 R133 1 2 Q11 B A V 9 9-SOT23/NA VCC 2 75 2
L9 C38 20pF
1
2 FB-0805 C39 20pF 1
MB
A
2
A
T H E S E COMPONENT MUST BE CLOSED TO VGA CONNECTOR
PC CHIPS Title V G A CONNECTOR Size B Date: D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 10
1
of
27
8
7
6
5
4
3
8
7
6
5
4
3
2
1
3,12,27,28 3,12,27,28
PGNT#[0..3] PREQ#[0..3]
PGNT#[0..3] PREQ#[0..3]
D
D
VCC -12V
VCC +12V
VCC -12V
VCC +12V
PCI1 12 TCK TCK 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -12V TCK GROUND TD0 +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GROUND GROUND RESERVED GROUND CLK GROUND REQ# +5V AD[31] AD[29] GROUND AD[27] AD[25] +3.3V C/BE#[3] AD[23] GROUND AD[21] AD[19] +3.3V AD[17] C/BE#[2] GROUND IRDY# +3.3V DEVSEL# GROUND LOCK# PERR# +3.3V SERR# +3.3V C/BE#[1] AD[14] GROUND AD[12] AD[10] GROUND AD[08] AD[07] +3.3V AD[05] AD[03] GROUND AD[01] +5V ACK64# +5V +5V PCI32 TRST# +12V TMS TDI +5V INTA# INTC# +5V RESERVED +5V RESERVED GROUND GROUND RESERVED RESET# +5V GNTX# GROUND RESERVED AD30 +3.3V AD28 AD26 GROUND AD24 IDSEL +3.3V AD22 AD20 GROUND AD18 AD16 +3.3V FRAME# GROUND TRDY# GROUND STOP# +3.3V SDONE SBO# GROUND PAR AD15 +3.3V AD13 AD11 GROUND AD9 CBE#0 +3.3V AD6 AD4 GROUND AD2 AD0 +5V REQ64# +5V +5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 TRST# TMS TDI INT#A INT#C INT#A INT#C 3,4,11,12 4,11,12,27 TRST# TMS TDI 12 12 12 3,4,11,12 4,11,12,27 INT#A INT#C INT#A INT#C TCK 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
PCI2 -12V TCK GROUND TD0 +5V +5V INTB# INTD# PRSNT#1 RESERVED PRSNT#2 GROUND GROUND RESERVED GROUND CLK GROUND REQ# +5V AD[31] AD[29] GROUND AD[27] AD[25] +3.3V C/BE#[3] AD[23] GROUND AD[21] AD[19] +3.3V AD[17] C/BE#[2] GROUND IRDY# +3.3V DEVSEL# GROUND LOCK# PERR# +3.3V SERR# +3.3V C/BE#[1] AD[14] GROUND AD[12] AD[10] GROUND AD[08] AD[07] +3.3V AD[05] AD[03] GROUND AD[01] +5V ACK64# +5V +5V PCI32 TRST# +12V TMS TDI +5V INTA# INTC# +5V RESERVED +5V RESERVED GROUND GROUND RESERVED RESET# +5V GNTX# GROUND RESERVED AD30 +3.3V AD28 AD26 GROUND AD24 IDSEL +3.3V AD22 AD20 GROUND AD18 AD16 +3.3V FRAME# GROUND TRDY# GROUND STOP# +3.3V SDONE SBO# GROUND PAR AD15 +3.3V AD13 AD11 GROUND AD9 CBE#0 +3.3V AD6 AD4 GROUND AD2 AD0 +5V REQ64# +5V +5V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 TRST# TMS TDI INT#D INT#B INT#D INT#B 4,11,12,28 4,11,12,27
4,11,12,27 4,11,12,28
INT#B INT#D
INT#B INT#D
PCIRST# PGNT#0 R142 AD30 AD28 AD26 AD24 R_AD20 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE1 SBO#1 PAR AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 RQ642 0 1 PME#
6
PCICLK1
PCICLK1 PREQ#0
PCIRST#
3,5,12,27,28 6 PCICLK2 4,12,27,28
PCIRST# PGNT#1 R143 2 AD30 AD28 AD26 AD24 R_AD21 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE2 SBO#2 PAR AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 RQ64B
PCICLK2 PREQ#1
C
AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10
PME#
1 0
PME#
C
AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17
FRAME# TRDY# STOP#
3,4,12,27,28 3,4,12,27,28 3,4,12,27,28
IRDY# DEVSEL# 3,12 12,28 4,12,28 PLOCK# PERR# SERR#
C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR#
PAR
3,4,12,27,28
C/BE#1 AD14 AD12 AD10
B
AD8 AD7 AD5 AD3 AD1 AK64-
AD8 AD7 AD5 AD3 AD1 AK64-
C/BE#[0..3] AD[0..31]
C/BE#[0..31] AD[0..31]
VCC
A A
RN11 SDONE1 SDONE2 SBO#1 SBO#2 1 3 5 7 4.7KX4 12 12
8
2 4 6 8
AD20 AD21
2 2
R140 100 R141 100
1 1
R_AD20 PC CHIPS R_AD21 Title P C I C O N N E C T OR 1 & 2 Size B D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
AK64RQ64-
AK64Rev 5.1 Sheet 11
1
RQ64Date:
7 6 5 4 3
of
27
8
7
6
5
4
3
2
1
VCC PREQ#0 PREQ#1 PREQ#2 PREQ#3 1 RN15 3 5 7 2.7KX4 3,11,27,28
D
3,11,27,28
PREQ#[0..3] PGNT#[0..3]
PREQ#[0..3] PGNT#[0..3] VCC -12V
2 4 6 8
VCC +12V
D
TRST# 11 TCK TCK TMS TDI INT#D INT#B INT#C INT#A
TRST# TMS TDI INT#C INT#A
11 11 11 4,11,27 3,4,11
4,11,28 4,11,27
INT#D INT#B
PCIRST# 6,28 PCICLK3 PCICLK3 PGNT#2 PREQ#2 PME# AD31 AD29
C
PCIRST#
3,5,11,27,28
AD30 AD28 AD26 AD24 R_AD22 AD22 AD20 AD18 AD16 FRAME# TRDY# FRAME#
PME#
4,11,27,28
C
AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL#
3,4,11,27,28 3,4,11,27,28 3,4,11,27,28
3,4,11,27,28 3,4,11,27,28 3,11 11,28 4,11,28
IRDY# DEVSEL# PLOCK# PERR# SERR#
TRDY# STOP#
STOP# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10 PAR AD15 AD13 AD11 AD9 SDONE3 SBO#3
PAR
3,4,11,27,28
B
B
AD8 AD7 AD5 AD3 AD1 11,12 AK64-
C/BE#0 AD6 AD4 AD2 AD0 RQ6411,12
C/BE#[0..3] 3,4,11,27,28 AD[0..31]
C/BE#[0..3] AD[0..31]
VCC RB15
A
FRAME# TRDY# IRDY# DEVSEL# STOP# SERR# PERR# PLOCK# AD22 R_AD22
1 3 5 7 1 3 5 7
2 4 6 8 2 4 6 8
VCC INT#A INT#B INT#C INT#D SDONE3 SBO#3 11,12 11,12 AK64RQ645
A
RB16 2.7KX4
2.7KX4
1 RN14 3 5 7 8.2KX4 1 RN13 3 5 7 4.7KX4
VCC 2 4 6 8 2 4 6 8
4
PC CHIPS TMS TDI TRST# TCK RN12 1 3 5 7 4.7KX4
3
2 4 6 8
Title P C I C O N N ECTOR 3 Size B Date: D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 12
1
of
27
8
7
6
8
7
6
5
4
3
2
1
3
IDEDA[0..15]
IDEDA[0..15]
1
D
R153 4.7K
2
D
VCC3
IDERST# IDEDA7 IDEDA6 IDEDA5 IDEDA4 IDEDA3 IDEDA2 IDEDA1 IDEDA0 R155 R156 R157 2 2 2 2 1 75 1 75 1 75 IDEAA1 IDEAA0 IDECS#A0 1 RN16 3 5 7 1 RN17 3 33X4 5 7 33X4 2 4 6 8 2 4 6 8 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
IDE1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 HEADER 20X2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 RN18 3 5 7 1 RN19 3 33X4 5 7 33X4 2 4 6 8 2 4 6 8 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15
2 R152 1K 1
2 R151 4.7K 1
3 3 3 3 3 3
IDEREQA IDEIOW#A IDEIOR#A ICHRDYA IDACK#A IDEIRQA
IDEREQA IDEIOW#A IDEIOR#A ICHRDYA IDACK#A IDEIRQA
R150 5.6K 1
CBLIDA IDEAA2 IDECS#A1
CBLIDA
3
D1
C
VCC 2
C
13,18 3 3
IDELEDAB IDEAA[0..2] I D ECS#A[0..1]
IDELEDAB IDEAA[0..2] I D ECS#A[0..1]
1 1N4148
2 R154 470 IDERST# Q12 MMBT3904 1 14,15,16 RSTDRV RSTDRV R161 2 4.7K 1 1 R149 4.7K IDERST# IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0 R158 R159 R160 2 2 2 1 75 1 75 1 75 IDEAB1 IDEAB0 IDECS#B0 1 RN20 3 5 7 RN21 1 3 33X4 5 7 33X4 2 4 6 8 2 4 6 8 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 IDE2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 HEADER 20X2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 RN22 3 5 7 RN23 1 3 33X4 5 7 33X4 2 4 6 8 2 4 6 8 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 2
3
IDEDB[0..15]
IDEDB[0..15]
VCC3
B
B
2 R148 1K 1
2 R147 4.7K 1
3 3 3 3 3 3
IDEREQB IDEIOW#B IDEIOR#B ICHRDYB IDACK#B IDEIRQB
IDEREQB IDEIOW#B IDEIOR#B ICHRDYB IDACK#B IDEIRQB 2
R146 5.6K 1
CBLIDB IDEAB2 IDECS#B1
CBLIDB
3
D2 13,18 3
A
IDELEDAB IDEAB[0..2] I D ECS#B[0..1]
IDELEDAB IDEAB[0..2] I D ECS#B[0..1]
1 1N4148
2
3
A
PC CHIPS Title I D E C O NNECTORS Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 13
1
of
27
8
7
6
5
4
3
2
1
4,5,15 4,15,16,19 4,15,16,19,25
D
LA[17..23] SA[0..19] SD[0..15]
LA[17..23] SA[0..19] SD[0..15]
D
+12V VCC -5V -12V IOCHK# 13,15,16 RSTDRV RSTDRV IRQ9 DRQ2 4,15 4,15 4,15 4,15,16 4,15,16 ZWS# SMWTC# SMRDC# IOWC# IORC# ZWS# SMWTC# SMRDC# IOWC# IORC# DACK#3 DRQ3 DACK#1
C
IOCHK#
4,15
SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
IOCHRDY AEN
4,15,16 4,15,16
C
DRQ1 4,15 4,15 RFH# BCLK RFH# BCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK#2 TC BALE ISA14M
4,15,16 4,15 6,15,27
TC BALE ISA14M
4,15 4,15
M16# IO16#
M16# IO16# IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK#0 DRQ0 DACK#5 DRQ5 DACK#6 DRQ6 DACK#7 DRQ7
SBHE# LA23 LA22 LA21 LA20 LA19 LA18 LA17 MRDC# MWTC# SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
SBHE#
4,15
B
B
MRDC# MWTC#
4,15,19 4,15,19
5,15
MASTER#
MASTER#
DACK#[0..7] DRQ[0..7] IRQ[3..15]
A
DACK#[0..7] DRQ[0..7] IRQ[3..15]
4,15,16 4,15,16 3,4,5,15,16
A
PC CHIPS Title I S A C O N NECTOR 1 Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 14
1
of
27
8
7
6
5
4
3
2
1
VCC RB18 4,5,14 4,14,16,19 4,14,16,19,25
D
LA[17..23] SA[0..19] SD[0..15]
LA[17..23] SA[0..19] SD[0..15]
SMRDC# SMWTC# IOWC# IORC# +12V VCC -5V ISA2 -12V B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 IOCHK# SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 MWTC# MRDC# BALE IOCHK#
1 3 5 7 1 3 5 7 RB19 4.7KX4
2 4 6 8 2 4 6 8
D
4.7KX4
13,14,16
RSTDRV
RSTDRV IRQ9 DRQ2 R299 2 47 1
4,14 4,14 4,14 4,14,16 4,14,16
ZWS# SMWTC# SMRDC# IOWC# IORC#
ZWS# SMWTC# SMRDC# IOWC# IORC#
DACK#3 DRQ3 DACK#1
GROUND RESDRV +5V IRQ[9] -5V DRQ[2] -12V NOWS# +12V GROUND SMWTC# SMRDC# IOWC# IORC# DAK#[3] DRQ[3] DAK#[1] DRQ[1] REFRESH# BCLK IRQ[7] IRQ[6] IRQ[5] IRQ[4] IRQ[3] DAK#[2] TC BALE +5V OSC GROUND
IOCHK# D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0] CHRDY AEN SA[19] SA[18] SA[17] SA[16] SA[15] SA[14] SA[13] SA[12] SA[11] SA[10] SA[9] SA[8] SA[7] SA[6] SA[5] SA[4] SA[3] SA[2] SA[1] SA[0]
IOCHK#
4,14 IOCHRDY ZWS# R162 R163 2 2 1 1K 1 300
RB17 IOCHRDY AEN 4,14,16 4,14,16 RFH# M16# IO16# MASTER# 1 3 5 7 330X4
C
2 4 6 8
C
DRQ1 4,14 4,14 RFH# BCLK RFH# BCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK#2 TC BALE ISA14M
VCC RB20 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 1 3 5 7 1 3 5 7 RB21 4.7KX4 2 4 6 8 2 4 6 8 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 1 3 5 7 1 3 5 7 RB34 4.7KX4 RB35 2 4 6 8 2 4 6 8
VCC
4,14,16 4,14 6,14,27
TC BALE ISA14M
4,14 4,14
M16# IO16#
M16# IO16# IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK#0 DRQ0 DACK#5 DRQ5 DACK#6 DRQ6 DACK#7 DRQ7
B
D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18
M16# IO16# IRQ[10] IRQ[11] IRQ[12] IRQ[15] IRQ[14] DAK#[0] DRQ[0] DAK#[5] DRQ[5] DAK#[6] DRQ[6] DAK#[7] DRQ[7] +5V MASTER16# GROUND
SBHE# LA[23] LA[22] LA[21] LA[20] LA[19] LA[18] LA[17] MRDC# MWTC# D[8] D[9] D[10] D[11] D[12] D[13] D[14] D[15]
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
SBHE# LA23 LA22 LA21 LA20 LA19 LA18 LA17 MRDC# MWTC# SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
SBHE#
4,14
IRQ12 IRQ14 SBHE# LA17 IRQ15 LA18 LA19 LA20
1 3 5 7 1 3 5 7
4.7KX4 RB22
2 4 6 8 2 4 6 8
SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
1 3 5 7 1 3 5 7
4.7KX4 RB33
2 4 6 8 2 4 6 8
B
RB23 4.7KX4
RB32 4.7KX4
4.7KX4 RB24 MRDC# MWTC# 4,14,19 4,14,19 LA21 LA22 LA23 SA0 SA1 SA2 SA3 1 3 5 7 1 3 5 7 RB25 4.7KX4 2 4 6 8 2 4 6 8
4.7KX4
SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11
1 3 5 7 1 3 5 7
RB31
2 4 6 8 2 4 6 8
RB30 4.7KX4
4.7KX4
5,14
MASTER#
MASTER#
4.7KX4 RB29 SA12 SA19 SA18 SA15 SA17 SA16 SA14 SA13 RB26 DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7 1 3 5 7 1 3 5 7 RB27 4.7KX4 2 4 6 8 2 4 6 8 PC CHIPS Title 4.7KX4 Size B Date: I S A C O N NECTOR 2 D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
ISA_MODI
1 3 5 7 1 3 5 7 RB28 4.7KX4
2 4 6 8 2 4 6 8
DACK#[0..7] DRQ[0..7] IRQ[3..15]
A
DACK#[0..7] DRQ[0..7] IRQ[3..15]
4,14,16 4,14,16 3,4,5,14,16
4.7KX4
A
Rev 5.1 Sheet 15
1
of
27
8
7
6
5
4
3
8
7
6
5
4
3
2
1
VCC
VCC
1
CB30 0.1UF 2 2 R166 2 16,18 4,14,15 18 4,14,15 4,14,15 IRRXL DACK#3 IRRXH DRQ3 IOCHRDY IRRXL NA IRRXH 1
1 CB31 0.1UF
D
D
FDC1 HEADER 2X17
DTR2# CTS2# RTS2# DSR2# TX2 RX2 DCD2# RI2# DCD1# RI1# DTR1# CTS1# RTS1# U7
17 17 17 17 17 17 17 17 17 17 17 17 17
33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
DRQ3 IOCHRDY
IRSINL1 GND DACK3# SA10
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
VCC RP6 7 5 3 1
C
DSKCHG SIDE1 RDATA WPT TK00 WGATE WDATA STEP DIR MOTEB DRVSA DRVSB MOTSA INDEX NC NC REDWC
8 6 4 2 150X4R R164 2 150 1
GND
VCC
16,18 6 SIO24M 4,14,15 4,14,15 4,14,15 3,4,5,14,15 3,4,5,14,15 3,4,5,14,15
IRTX DRQ1 DACK#1 DRQ0 IRQ5 IRQ10 IRQ11
IRTX DRQ1 DACK1# DRQ0 IRQ5 IRQ10 IRQ11 SA11 SA0 SA1 SA2
24 MHz clock input
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
IOCHRDY DRQ3 IRSINH1 A10 DACK3# GND IRSINL1 DTR2# CTS2#/A12 RTS2#/IRSINH2 DSR2#/A13 SO2/IRSOUT2 SI2/IRSINL2 RLSD2#/A14 RI2#/A15 RLSD1# RI1# DTR1# CTS1# RTS1#
34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81
DENSEL# MOTEA# DRVB# DRVA# MOTEB# GND DIR# STEP# WDATA# WGATE# SIDE1# INDEX# TK00# WPT# VCC RDATA# DSKCHG# XTALO IRSOUT1 XTALI DRQ1 DACK1# DRQ0 IRQ5 IRQ10 IRQ11 A11 A0 A1 A2
DSR1# SOUT1 SIN1# AFD# STB# ERR# SLIN# INIT# VCC PD0 PD1 PD2 PD3 GND PD4 PD5 PD6 PD7 ACK# BUSY PE SLCT DACK0# RESET D7 D6 D5 D4 DRQ2 D3
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
VCC IPD0 IPD1 IPD2 IPD3 GND IPD4 IPD5 IPD6 IPD7
DSR1# TX1 RX1 AFD# STB# ERROR# SLIN# PINIT#
17 17 17 17 17 17 17 17
C
IPD[0..7]
IPD[0..7] ACK# BUSY PE SLCT DACK#0 RSTDRV
DACK0# SD7 SD6 SD5 SD4 SD3
17 17 17 17 17 4,14,15 13,14,15
DRQ2
4,14,15
B
A3 A4 A5 A6 TC DACK2# IRQ3 IRQ4 IRQ7 IRQ6 A7 A8 A9 IOR# IOW# AEN GND D0 D1 D2
B
4,14,15,19 4,14,15 4,14,15 3,4,5,14,15 3,4,5,14,15 3,4,5,14,15 3,4,5,14,15 4,14,15 4,14,15 TC DACK#2 IRQ3 IRQ4 IRQ7 IRQ6 IORC# IOWC#
SA[0..15]
SA[0..15]
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
8661
SD2 SD1 SD0 GND PIN46 IOW# IOR# SA9 SA8 SA7 IRQ6 IRQ7 IRQ4 IRQ3 DACK2# TC SA6 SA5 SA4 SA3 SD[0..7] SD[0..7] 4,14,15,19,25 VCC 1 2 3 4 5 IR1 1 2 3 4 5 CONN5 16,18 16,18 IRRXL IRTX IRRXL IRTX
for 16 bit decoder D3
A
SA15 SA14 SA13 SA12 BAEN
7
1 D4 1 1 1 D7 1 D5 D6
2 1N4148 2 1N4148 2 1N4148 2 1N4148 2 1N4148
PIN46
VCC VCC GND
A
2
PC CHIPS R165 1K Title SUPER IO Size B Date:
6 5 4 3
4,14,15
8
AEN
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 16
1
1
of
27
8
7
6
5
4
3
2
1
NRI1
D8 1 1N4148 2 2 100K
R167 1 1 1 C44 VCC .1U/NA 2 R170 4.7K SB5V JP1 LANWK 1 2 3 3PX1 LAN WAKEUP 1 2 3 NRLSD1 NTX1 GND NRTS1 NRI1 1 3 5 7 9 COM1 1 2 3 4 5 6 7 8 9 10 HEADER 2X5 2 4 6 8 10 NRX1 NDTR1 NDSR1 NCTS1 1
D
RING
4,27
R168 200K
D
NRI2
4 U8 16 16 16 16 16 16 -12V -12V 16 16 RX1 TX1 DSR1# RTS1# DTR1# CTS1# RI1# DCD1# 2 D10 1N4148 12 13 14 15 16 17 18 19 10 1 RY5 DA3 RY4 DA2 DA1 RY3 RY2 RY1 -12V GD75232 RA5 DY3 RA4 DY2 DY1 RA3 RA2 RA1 +12V 9 8 7 6 5 4 3 2 1 NRX1 NTX1 NDSR1 NRTS1 NDTR1 NCTS1 NRI1 NRLSD1
LANWK
2
2
1 C46 1000P 2
C
16 16 16 16 16 16 16 16
RX2 TX2 DSR2# RTS2# DTR2# CTS2# DCD2# RI2#
2 4 6 8
2 4 6 8
2 4 6 8
R169 2K D11 2 1N4148 1 +12V +12V 1
RB38 2KX4
RB39 2KX4
2 4 6 8
NRX2 NTX2 NDSR2 NRTS2 NDTR2 NCTS2 NRLSD2 NRI2
C
VCC
VCC 2
RB40 2KX4
RB41 2KX4
1 3 5 7
1 3 5 7
1 3 5 7
RB36 16 16
B
16 16
AFD# STB# SLIN# PINIT#
1 3 5 7 22X4R
2 4 6 8
SLCTIN# STROBE# AUTOFD# BINIT# SLCTIN# BINIT# ERROR# AUTOFD# PRN1
1 3 5 7
B
16 16
ERROR# IPD[0..7]
IPD[0..7] IPD0 IPD1 IPD2 IPD3 IPD4 IPD5 IPD6 IPD7 RB37 1 3 5 7 1 3 5 7 2 4 6 8 2 4 6 8 22X4R STROBE# PPD0 PPD1 PPD2 PPD3 PPD4 PPD5 PPD6 PPD7 ACK# BUSY PE SLCT 1 1 2 3 4 5 6 7 8 9 10 11 12 13 STB PPD0 PPD1 PPD2 PPD3 PPD4 PPD5 PPD6 PPD7 ACK BUSY PE SLCT HEADER 2X13 C45 180P
RP7
16 16 16 16
ACK# BUSY PE SLCT
22X4R
AFD ERROR INIT SLIN GND GND GND GND GND GND GND GND N/C
14 15 16 17 18 19 20 21 22 23 24 25 26
7 8 9 10
7 8 9 10
2 3 4 5
2 3 4 5
CP2 180P*8
A
CP1 180P*8
2
A
1
6
1
6
PC CHIPS VCC Title VCC GND Size B Date:
8 7 6 5 4 3
I O C ONNECTOR D o c u m e n t Number M598 F r i d a y , N o v e m b e r 1 0, 2000
2
Rev 5.1 Sheet 17
1
of
27
8
7
6
5
4
3
2
1
VCC
2 4 6 8 RP8 330X4 VCC
D
1 3 5 7
D
BZ1 BUZZER
RTCVDD J2 1 3 5 7 2 R179 51K XRST PWRBT# 2 HEADER 2X11 R173 33
C
1 3 5 7 11 13 15 17 19 21
23,25 4
XRST PWRBT#
11 13 15 17 19 21
2 4 6 8 10 12 14 16 18 20 22
2 4 6 8 10 12 14 16 18 20 22
KLOCK#
KLOCK#
4
IDELEDAB R174 1 1K 2
IDELEDAB
13
1
NOTE: NO HOLE AT PIN9
VCC
1
C
4
SPKR
SPKR
1 R172
2 R175 470K 1 4 OC#0 1 C48 .001U 2 R176 560K 1 R233 2 0(1/4 W) C54 .1U 2 1 + EC1 10U 1 1 L11 2FB-DIP VCC 2 R177 470K
B
1K
2SPK1
Q13 3904
VCC
B
4
OC#1 1 C49 .001U 2 1 2 R178 560K MUSCLKIRRXH 16
J1 4 4 UV1UV1+ UV1UV1+ 1 1 C52 47P 2 2 C53 47P 20 16 16 MUSDATAIRRXL IRTX MUSDATAIRRXL IRTX 1 10 2 11 3 12 4 13 5 14 6 15 7 16 8 17 9 18 HEADER 9X2
MUSCLKIRRXH
1
2 20 RB42 7 5 3 1 4 4 UV0UV0+ UV0UV0+ 1 C50 47P 2 2 1 C51 47P 33X4 8 6 4 2 7 5 3 1 10KX4 PC CHIPS Title USB Size B Date:
8 7 6 5 4 3
RB43 8 6 4 2 N O TE:NO HOLE AT PIN 5
A
A
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 18
1
of
27
8
7
6
5
4
3
2
1
D
D
C
C
4,14,15,16,25 4,14,15,16
SD[0..15] SA[0..19]
SD[0..15] SA[0..19] VCC 32 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30 22 24 1 31 16 U10 VCC A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 CE OE VPP PGM GND FLASH ROM 13 14 15 17 18 19 20 21 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
VCC 2 R230 4.7K ROMKBCS# MRDC# 1
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 +12V/5V
O0 O1 O2 O3 O4 O5 O6 O7
4
B
4,14,15 4,14,15
ROMKBCS# MRDC# MWTC# VCC
B
MWTC#
R183 2 0 1
1 CB32 0.1U 2 4 SIRQ SIRQ
A
+
CE4 10UF
A
PC CHIPS Title ROM Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 19
1
of
27
8
7
6
5
4
3
2
1
D
D
VCC
KBPOWER
KBPOWER
1 3 5 7 RP9 2.7KX4
C C
SB5V 2 4 6 8
VCC
R185 R186
2 2
200K 1 200K 1
PMCLK PMDAT KBCLK KBDAT
JP2 1 2 3 1 2 3 HEADER 3
PS/2 F1 KB
1 L14 4,20 KBCLK KBCLK 1 FB KBVCC L15 4,20 KBDAT KBDAT 1 FB 2 1 1 C55 GND 47P GND 2 2 C56 47P 2 1 C57 .1U 2 0
2
KBPOWER PSKB1 9 4 6 2 8 1 5 3 7 PS2-KB KBD1 1 2 3 4 5 1 2 3 4 5 KBCON
B
B
AT KB
4,20 PMDAT PMDAT 1 FB L13 1 FB 2 1 C59 47P 2 2 1 C58 47P MUSCLKL12 2 MUSDATAMUSDATA18
4,20
PMCLK
PMCLK
GND MUSCLK18
A
PS/2 MOUSE
6 . 5 . 4 2 1 4 2 1 3 Title M O U S E C ONNECTOR Size B Date:
8 7 6 5 4 3
A
TOP 6 5 3
. . . .
4,20 4,20 4,20 4,20
KBCLK KBDAT PMCLK PMDAT
KBCLK KBDAT PMCLK PMDAT
PC CHIPS
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 20
1
of
27
8
7
6
5
4
3
2
1
D
D
INT. RTC MUST CLOSE TO CHIP RTCVDD PIN
SB5V RTCVDD
1
CB33 0.01uF 2 2 JP3
C
1 CB35 0.1uF 0805 1 1 2 2 3 3 HEADER 3 D13 1 1N4148 JP1: 1-2 NORMAL 2-3 CLEAR 1 R187 51K CB34 0.1uF 0805 2 2 1 2 1N4148 D12 1 2 0 R188 1 1 BAT1 Lithium Battery 3V/60MA
C
PSRSTB# C60 0.1uF
2
PSRSTB#
4
2
B
2
1
B
A
A
PC CHIPS Title RTC Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 21
1
of
27
8
7
6
5
4
3
2
1
D
D
4
VIN[0..3]
VIN[0..3] +12V +12V VIN0 VIN1 VIN2 VIN3 3V 2.98V 3.3V 2.5V R193 R194 R189 R195 R190 R192 1 1 1 1 1 1 2 30K 1% 2 6.8K 1% 2 10K 1% 2 10K 1% 2 10K 1% 2 10K 1% VCC VCC3 VCC2 FAN1 1 2 3 CPU FAN 1 2 3
VCC
R191 4.7K
FAN2
FAN2
4
C
C
B
B
A
A
PC CHIPS Title D A T A A CQUISITION Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 22
1
of
27
8
7
6
5
4
3
2
1
D
D
+12V
-12V
-5V 23,25 EXTPG EXTPG SB5V
VCC PWR1 1 2 3 4 5 6 7 8 9 10 11 12 AT-CNT 1 1 1 1 2 3 4 5 6 7 8 9 10 11 12 1 SB5V -12V R197 2.7K/NA 11 12 13 14 15 16 17 18 19 20 1 VCC -5V PWR2 3.3V -12V COM PS-ON COM COM COM -5V 5V 5V ATX-CNT 3.3V 3.3V COM 5V COM 5V COM PW-OK 5VSB 12V 1 2 3 4 5 6 7 8 9 10 20 10 11 1
ATXVCC3
+12V -12V CE7 1 + 2 2 1 + CE6 10U 2 CE8 1 470U + 2
C
CE5 10U 2
6 7
2
VCC +12V SB5V 2 R196 10K EXTPG 1 VCC
12 EDGE
4
PS_ON#
10U 1
1
CE9 470UF 2
+
CE10 470UF 2
+
CE11 470UF
+ 2
CE12 10UF 2
1
0
1
B
2
A
8
7
+ 4
SB5V
EXTPG
23,25
CB36 0.1UF
C
B Y P A S S C A P. CLOSE TO ATX and 12P POWER CONN. ( PLACE 12PIN POWER CONN. AND ATX POWER CONN. TOGETHER )
D14 23,25 EXTPG EXTPG 2 1N4148 R198 PWRGD PWRGD 1 2 1 0 CB37 0.01UF 1 1
R200 2 4.7K 2 R199 XRST VCC
XRST
18,25
B
A
PC CHIPS Title P O W E R C O N NECTORS Size B Date:
6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 23
1
of
27
8
7
6
5
4
3
2
1
VCC3
DIMM DECOUPLING
VCC3
530 DECOUPLING SRAM DECOUPLING VCC3
CB43 1 2 0.1uF
D
CB38 1 2 0.1uF CB39 1 2 0.1uF CB40 1 2 0.1uF
CB46 1 2 0.1uF CB47 1 2 0.1uF CB92 0.01UF CB93 0.01UF
CB44 1 2 0.01uF CB45 1 2 0.01uF CB94 0.1uF 0.01UF CB95 0.1uF 0.01UF CB61 1 2 0.1uF C61 5595 DECOUPLING C C62 CB96 C
C
CB42 1 2 0.1uF CB41 1 2 0.1uF CB80 0.1UF CB81 0.1UF CB82 0.1UF
CB64 1 2
D
0.1uF CB63 1 2
CB78 1 2 0.1uF CB79 1 2 0.1uF CB83 0.1UF
CB62 1 2
VCC
C
VCC 5 VOLT DECOUPLING
0.1UF CB60 1 2 0.01uF CB97 0.1uF CB49 1 2 0.1uF CB50 1 2 0.1uF 0.1uF CB52 1 2 0.1uF CB53 1 2 0.1uF 0.01UF 0.1UF CB65 CB98 0.1uF CB66 0.1uF CB67 0.1uF CB68 0.1uF SO-DIMM VCC3
CB48 1 2
CB51 1 2
CPU 3 VOLT DECOUPLING VCC3
B
B
CB54 1 2 0.1uF CB55 1 2 0.1uF CB56 1 2 VCC2 VCC2 DECOUPLING 0.1uF CB91 CB75 1 2 1uF CB76 1 2 1uF
A
CB59 1 2 0.1uF CB58 1 2 0.1uF CB57 1 2 0.1uF CB88 1 0.01UF CB89 0.01UF 22uF +12V CE13 2 + BULK POWER DECOUPLING
CB72 1 2 1uF CB73 1 2 1uF CB74 1 2 1uF
CB69 1 2 1uF CB70 1 2 1uF CB71 1 2 1uF
0.01UF CB90 0.01UF
CB77 1 2 1uF CB84 1UF CB87 1UF
8
A
CB85 1UF CB86 1UF
PC CHIPS Title D E C O U P L I N G C A P ACITORS Size B Date:
7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 24
1
of
27
8
7
6
5
4
3
2
1
D
D
RB44 25 25 JPSEL1 JPSEL0 JPSEL1 JPSEL0 1 3 5 7 6.8KX4/NA RB47 R 2 3 2 : 0 , THE FACTOR OF MULTIPLE DEFAULT TO 2 REMOVE , THE FACTOR OF MULTIPLE DEFAULT TO 2.5 2 4 6 8 MBSELRO FS0 FS1 FS2 2 4.7KX4 6 6 6 FS0 FS1 FS2 R231 R232 0 1 RB46 1 3 5 7 1KX4 -VID1 -VID2 -VID3 2 4 6 8 1 3 5 7 8.2KX4 RB45 2 4 6 8 2 4 6 8
TO CPU
BFSEL0 BFSEL1 BFSEL2 BFSEL0 BFSEL1 BFSEL2 1 1 1
TO CLK
1 3 5 7
1 1 2 2 3 3 HEADER 3 U12A 1 74F14 U12B I N ITIAL 2X CPU INTERNAL CLOCK U11 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 4,14,15,16,19 273c SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 3 4 7 8 13 14 17 18 11 1 D1 D2 D3 D4 D5 D6 D7 D8 CLK CLR 74LS273 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 2 5 6 9 12 15 16 19 74F14 U12C MBSEL2 MBSEL1 5 74F14 6 3 4 2
-VID1 -VID2 -VID3
26 26 26
C
C
18,23,25
XRST
XRST
U12D 9 74F14 8
JPSEL0
25
VCC 2 R202 10K
PGD JPSEL1 25 2 D15 1N4148 23 VCC 4 -EXT -EXT 2 R201 R XRST 1 R203 2 BC1 180p XRST 18,23,25 1 10K 2 1K 2 1273c 3 Q16 2N3904 1 2 R204 EXTPG EXTPG XRST R205 2.2k 2 1 3 Q17 12N3904
B
1
PGD
1
B
CE14 10U
A
A
PC CHIPS Title JUMPER LESS Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 25
1
of
27
8
7
6
5
4
3
2
1
D20 2 VCC3 1 VCC3 VCC3Q
D
1 1N4001/DIP
VCC
EC8 470U 2 2
1 EC9 470U VCC3 VCC3 1 + 3 2 1 VCC3 1 1 2 3 JP4 3 2 1 1 2 3 2 CE20 470UF
D
EC10 470U 2
JP5 0-0805
0-0805
VCC
C
2
C
VCC VCC L16 1 R207 75K 1 FBX2 2 1 1 2 Q18 45N03L 2 1 3 3 1 CHOKE4.7U 2 L17 2 1 L11 TO EC29 200milX1.8inch 1
R223 1K
2
D18 1N4148 2 Q20 1 3904 1 EC3 10U 2 1
VCC2
EC4 1500U 2 2 R208 33K
EC5 1500U
EC11 1500U Q19 3 2 VCC2 1 VCC2 1
1
3
2
1
1
3
2
VCC2 1
VCC2 1 EC13 1500U EC12 1500U 2
2
R206 1K
1 D19
10C30CT
BAV99
3
B
EC6 1500U 2 2
EC7 1500U 2
1
2
8 7 6 5
U13 DRVC IPK VCC INV UC34063 DIP ONLY
SWC SWE CAP GND
1 2 3 4 1 2 C65 220P 2
1N4148 Q21 3906 R209 1K 1 1 C63 2 1000P R226 2 1 4.99K 1% R215 2 10K 1
B
+12V 2 1
1 BC2 .1U
2
2
2
2
EC2 10U 2
R210 60.4K 1% 1 1
R211 30.1K 1% 1
R212 15.0K 1% 1
R213 7.5K 1% 1 3 Q25 3904 1
2 R214 8.06K 1%
2 VID0 VID2 GND VCC
A
J3 1 2 3 4 5 6 7 8 HEADER 2X4
3 Q22 13904
2
3 Q23 13904
2
3 Q24 13904
2
VID1 VID3 VCC2 +12V 2 2 R225 10K PC CHIPS VID2VID1 VID1 VID2 -VID2 VID2 25 VID3 VID3 1 Title DC POWER Size B Date:
7 6 5 4 3
R216 10K 1 1
R217 10K
2
1 VID3-
A
-VID3
25
VID0R224 25 -VID1 VID12 10K 1 VID0
-VID0 VID0
4
D o c u m e n t Number M598 T h u r s d a y , J u l y 06, 2000
2
Rev 5.1 Sheet 26
1
of
27
8
8
7
6
5
4
3
2
1
D
D
R300 1 VCC2DET VCC2DET 2 10K 1 2
3 Q33 12N3904
C
C
+12V VCC R302 2 0 1 2 D29 1N4148 1 1 2 R310 100K 2 + 2 EC34 1 C213 .1U 2 D30 2 3 Q36 12N3904 1 VCC 1 L18 .5UH 2 R306 1K VCC3 1 Trace Width=53mil
B
C210 + EC35 1 R301 1K
2 VCC
1
2
2
R309 100K 1 1
1
+
EC36
100U/25V
1U
100U/25V
2
2
1 3 5 7
B
RP20
2 4 6 8 2
1
2 1 2 Q34 32N3906
Q35 2SD1691 L21 1 10UH 2 2 R308 5.1-1% D31 1N5820 1
1000U/10V 2
1N4148
U14 8 7 6 5 DC SC IS SE VCC TC COMP GND M C 34063(DIP) 1 2 3 4
330-8P4R RP21 1 3 5 7 330-8P4R
2 4 6 8 1
R307 1K
EC7 1 + PLACE NEAR SLOT1
1 1
2
1
C211 2 1000P 2
2
C212 220P
C214 .01U R=0.491*L/(B*W) R=0.491*1100/(1*53) =10.2m ohm I=8Amp R305 2 10K R304 4.99K-1% 1 1
1
1000U/10V
2
R303 2.74K-1% 1
A
2
A
PC CHIPS Title S w i t c h i n g P o w er for VCC3 Size B Date:
8 7 6 5 4 3
D o c u m e n t Number M598MR F r i d a y , N o v e m b e r 1 0, 2000
2
Rev 1.0 Sheet 27
1
of
29
8
7
6
5
4
3
2
1
LDVDD WOL ENABLE LDVDD RX2
D
LDVDD
LDVDD 2 1K 1 LMA2 2 R251 10K LMD0 LMA6 LMA3 LMA4 ROMCS 1 1 2 3 4
U17 CS SK DI DO 9346-SMD VCC NC NC GND 8 7 6 5 1 1 1 1 1 1 1 1 1 C220 0.1U 2 2 LDVDD L2,L3 ARE 1206 SIZE GND (Level/Pulse option) R252 2 1K 1 Low/High option) R253 2 1K/NA 1 2 C235 0.1U 2 1 C226 0.1U 1 GND D M 9102 bypass capacitors LDVDD C221 0.1U/NA 2 C222 0.1U 2 C223 0.1U/NA 2