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STV6413
Audio/Video Switch Matrix
Main Features
I²C Bus Control Standby Mode with Interrupt Signal Output Video Section
3 CVBS Inputs, 2 CVBS Outputs 3 Y/C Inputs, 2 Y/C Outputs 6 dB Gain on all CVBS/Y and C Outputs Integrated 150 W Buffers 2 RGB/FB Inputs, 1 Tri-state RGB/FB Output with 6 dB Adjustable Gain (from +3 dB to +9 dB) Video Muting on all Outputs 2 Slow Blanking Inputs/Outputs Sync Bottom Clamp on all CVBS/Y and RGB Inputs, Average Clamp on C Inputs Bandwidth: 15 MHz Crosstalk: 50 dB Minimum 3 Stereo Inputs, 3 Stereo Outputs Stereo-to-Mono Sound Capability 0/6/9 dB Selectable Gain on one Stereo Input Full Range Volume Control with Soft Control Audio Muting on all Outputs
TQFP64 (10 x 10 x 1.40 mm) (Thin Full Plastic Quad Flat Pack) Order Codes: STV6413D (Tray) STV6413DT (Tape and Reel)
Audio Section
Description
The STV6413 is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides the audio and video routings required in a two SCART set-top box design. In a TQFP64 (10 x 10 mm) package, the STV6413 is compatible with the STV6412A (TQFP64 14 x 14 mm) used for designing boards with two levels of integration.
February 2004
This is preliminary information on a new product now in development. Details are subject to change without notice.
1/28
STV6413
Table of Contents
Chapter 1
1.1
General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
I/O Pin Description ............................................................................................................ 3
Chapter 2
2.1 2.2 2.3 2.4
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Absolute Maximum Ratings ................................................................................................ 8 Thermal Data ...................................................................................................................... 8 Latch-up Data ....................................................................................................................... 8 Electrical Characteristics ...................................................................................................... 9
Chapter 3
3.1 3.2
I²C Bus Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
I²C Bus Addresses ............................................................................................................. 15 Power-on Reset -- Bus Register Initial Conditions ............................................................ 20
Chapter 4 Chapter 5 Chapter 6 Chapter 7
Input/Output Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
2/28
STV6413
General Information
1
General Information
Figure 1: STV6413 Pinout Diagram
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
LOUT_TV NC NC NC VCCB 5 BOUT_TV VCCB 4 GOUT_TV GNDB R/COUT_TV VCCB 3 Y/CVBSOUT_TV VCCB 2 COUT_VCR VCCB 1 Y/CVBSOUT_VCR 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
STV6413
ROUT_TV VCCAO LOUT_VCR ROUT_VCR LOUT_CINCH ROUT_CINCH NC GNDA VCCA RIN_TV LIN_TV CVBSIN_TV RIN_VCR LIN_VCR Y/CVBSIN_VCR GND
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DECA NC BIN_ENC LIN_ENC GIN_ENC RIN_ENC R/CIN_ENC NC CIN_ENC NC YIN_ENC GND Y/CVBSIN_ENC DECV NC VCC
1.1
I/O Pin Description
Table 1: Pin Description (Sheet 1 of 3)
Pin No.
1 2 3 4 5 6 7
Name
VCC NC DECV Y/CVBSIN_ENC GND YIN_ENC NC +5 V Supply Not connected Video Decoupling Capacitor Y/CVBS Input from Encoder Ground Y Input from Encoder Not connected
Function
3/28
General Information
Table 1: Pin Description (Sheet 2 of 3) Pin No.
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42
STV6413
Name
CIN_ENC NC R/CIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC NC DECA GND Y/CVBSIN_VCR LIN_VCR RIN_VCR CVBSIN_TV LIN_TV RIN_TV VCCA GNDA NC ROUT_CINCH LOUT_CINCH ROUT_VCR LOUT_VCR VCCAO ROUT_TV LOUT_TV NC NC NC VCCB5 BOUT_TV VCCB4 GOUT_TV GNDB R/COUT_TV Chroma Input from Encoder Not connected Red/Chroma Input from Encoder Audio Right, Input from Encoder Green Input from Encoder Audio Left, Input from Encoder Blue Input from Encoder Not Connected Audio Decoupling Capacitor Ground Y/CVBS Input from VCR SCART Audio Left, Input from VCR SCART Audio Right, Input from VCR SCART CVBS Input from TV SCART Audio Left, Input from TV SCART Audio Right, Input from TV SCART
Function
Audio Supply Voltage - or - Audio Supply Decoupling Audio Ground Not Connected Audio Right Output to Cinch Audio Left Output to Cinch Audio Right Output to VCR SCART Audio Left Output to VCR SCART Audio Output Supply Voltage - or - Main Audio Supply Voltage Audio Right Output to TV SCART Audio Left Output to TV SCART Not connected Not connected Not connected Video Output Buffer Supply Pin Blue Output to TV SCART Video Output Buffer Supply Pin Green Output to TV SCART Video Buffer Ground Red/Chroma Output to TV SCART
4/28
STV6413
Table 1: Pin Description (Sheet 3 of 3) Pin No.
43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
General Information
Name
VCCB3 Y/CVBSOUT_TV VCCB2 COUT_VCR VCCB1 Y/CVBSOUT_VCR FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR Video Output Buffer Supply Pin Y/CVBS Output to TV SCART Video Output Buffer Supply Pin Chroma Output to VCR SCART Video Output Buffer Supply Pin Y/CVBS Output to VCR SCART Fast Blanking Output to TV SCART Fast Blanking Input from VCR SCART Fast Blanking Input from Encoder
Function
External MOS Command for C_VCR bidirectional mode +5 V I²C Supply Not connected I²C Bus Clock I²C Bus Data Ground Digital Interrupt Output Slow Blanking Input/Output from TV SCART Red Input (or C Input) from VCR SCART Slow Blanking Input/Output from VCR SCART Green Input from VCR SCART +12 V Supply Blue Input from VCR SCART
5/28
General Information
Figure 2: STV6413 Block Diagram
STV6413
FBIN_ENC FBIN_VCR
FBIN_ENC FBIN_VCR FB Switch
FBOUT_TV
BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR
BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR Mute RGB Switch R/CIN_VCR CIN_ENC R/CIN_ENC Mute
3 to 9 dB BOUT_TV 3 to 9 dB GOUT_TV 3 to 9 dB R/COUT_TV 6 dB
CIN_ENC
C Switch Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute
Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC
6 dB
Y/CVBS Switch Mute CIN_ENC R/CIN_ENC Mute
Y/CVBSOUT_TV C_GATE
6 dB COUT_VCR C Switch Slow Blank Monitor Interrupt Signal IT_OUT SLB_TV SLB_VCR Y/CVBSOUT_VCR Y/CVBS Switch
CVBSIN_TV
CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute
6 dB
LIN_ENC
0/6/9 dB
LIN_ENC LIN_TV RIN_ENC RIN_TV Mute VCR Switch
Stereo/ Mono 0/6 dB 0/6 dB
LOUT_VCR ROUT_VCR ROUT_CINCH
LIN_TV
RIN_ENC RIN_TV LIN_VCR
0/6/9 dB LIN_ENC LIN_VCR LIN_TV RIN_ENC RIN_VCR RIN_TV Mute TV Switch
LOUT_CINCH
-62 dB
0/6 dB
Stereo/ Mono
LOUT_TV ROUT_TV
RIN_VCR
-62 dB
0/6 dB I²C Bus Decoder SDA SCL
6/28
STV6413
Figure 3: STV6413 Functional Diagram
General Information
AUDIO LEFT AUDIO RIGHT R/C G B FAST BLANKING CVBS SCART1 TV AUDIO LEFT AUDIO RIGHT CVBS/Y AUDIO LEFT AUDIO RIGHT SLOW BLANKING R/C G B FAST BLANKING AUDIO SWITCHES CVBS/Y AUDIO LEFT AUDIO RIGHT CVBS/Y INTERRUPT SLOW BLANKING, I/O CONTROL C AUDIO LEFT AUDIO RIGHT SLOW BLANKING SCART2 CVBS/Y SWITCHES RGB and FB SWITCHES
STV6413
R/C G B FAST BLANKING CVBS/Y C AUDIO LEFT AUDIO RIGHT Y
CINCH OUTPUT
ENCODER
CHROMA SWITCHES
MCU
7/28
Electrical Characteristics
STV6413
2
2.1
Electrical Characteristics
Absolute Maximum Ratings
Parameter
Supply voltage for Slow Blanking sections Supply voltage for Audio Drivers Supply voltage for Digital Audio sections Supply voltage for Digital sections Supply voltage for Video sections Audio pins Video pins Bus pins Slow Blanking pins
Symbol
VCC12 VCCAO VCCA VDD VCC, VCCBI
Value
13.2 13.2 10 6 6 0, VCCA 0, VCC or VCCBI 0, 5.5 0, VCC12 ±4 0 to +70 -20 to +150
Unit
V V V V V
VIN
Input Voltage at Pin (in reference to GND)
V
VESD TOPER TSTG
Maximum ESD Voltage allowed. (Human Body Model: 100 pF capacitor discharged through 1.5 kOhm serial resistor) Ambient Operating Temperature Storage Temperature
kV °C °C
2.2
Thermal Data
Parameter
Junction-to-Case Thermal Resistance Junction-to-Ambient Thermal Resistance1 Maximum Recommended Junction Temperature 48
Symbol
RthJC RthJA TJ
Value
Unit
°C/W °C/W °C
1. Measured on 4-layer application board.
2.3
Latch-up Data
At an ambient temperature of 25 °C, all pins meet the following specifications:
I trigger = 200 mA or I trigger = -200 mA. Pin 58 (IT_OUT) does not meet this specification and the trigger current must be limited to 100 mA.
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STV6413
Electrical Characteristics
2.4
Electrical Characteristics
TAMB = 25° C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 W, RGV = 50 W, RLOUTA = 10 kW, RLOUTV = 150 W (unless otherwise specified).
Supply Section
Symbol VDD VCCAO VCC VCC12
Parameter
Digital Supply Voltage Audio Operating Supply Voltage Video Operating Supply Voltage Slow Blanking Control Supply Voltage
Test Conditions
Min.
4.75
Typ.
5 12 9 5 12
Max.
5.25 12.8 9.5 5.25 12.8
Unit
V V V V
- Decoupling capacitor on VCCA - Connected to VCCA
11.2 8.5 4.75 11.2
Active Mode (All channels ON)
Symbol
IDD ICCA ICCV
Parameter
Digital Supply Current Audio Supply Current
Test Conditions
VDD = 5 V VCCAO = 12 V, No Load
Min.
Typ.
4.5 9
Max.
10 15
Unit
mA mA
Total Video Supply Current (VCC+VCCB1+VCCB2+VCCB3+VCCB4+V VCC = 5 V, No Load CCB5) 12 V Supply Current VCC12 = 12 V SLB input mode SLB output mode, No Load
43
60
mA
ICC12
0 2.5
1 4
mA
Standby Mode (All channels OFF)
Symbol
IDD ICCASTD ICCVSTD
Parameter
Digital Supply Current Audio Supply Current Total Video Supply Current
Test Conditions
VDD = 5 V VCCAO = 12 V, No Load VCC = 5 V, No Load
Min.
Typ.
4.5 3 1
Max.
10
Unit
mA mA mA
Audio Section
Symbol Parameter Test Conditions
VRIPPLE = 500 mVRMS at 100 Hz, Gain= 0 dB DECA filter cap = 47 µF DECA filter cap = 220 µF VRIPPLE = 500 mVRMS at 1 kHz, Gain = 0 dB
Min.
Typ.
Max.
Unit
SVR100
Supply Voltage Rejection
60
70 80 80
dB
SVR1K
Supply Voltage Rejection
70
dB
9/28
Electrical Characteristics
Symbol
VINDC VINAC RIN RINmatch FRANGE Flatness
STV6413
Test Conditions
VCCA = 9 V
Parameter
Input DC Level Input Signal Amplitude Input Resistance Input Resistance Matching Bandwidth
Min.
Typ.
VCCA/2
Max.
Unit
V
2 30 50 ±2 -3 dB, 0.5 VRMS, RLOAD = 10 kW, Gain = 0 dB -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB 80 70 90 74 85 VCCA/2 1 60 1 VRMS input on each input channel at 1 kHz VIN = 1 VRMS at 1 kHz input weighted CCIR 468-4 quasi peak, Gain = 0 dB BW = 20 Hz, 20 kHz Flat, Gain = 0 dB 0.5 VRMS, RLOAD = 10 kW, Gain = 0 dB -62 dB to +6 dB (see Figure 2) VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB VOUT = 0.5 VRMS at 1 kHz, LPF at 80 kHz, Volume Level Adjustment = 0 dB THD = 0.2%, 1 kHz VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB VIN = 0.5 VRMS, on one point 2.1 2 90 -0.5 -0.5 2 0.5 ±15 120 3 50 ±10
VRMS kW % kHz
Spread of Gain in Audio Band
0.5
dB dB dB dB V mV W ° deg.
CS Ci VOUT VOFF ROUT PHD
Channel Separation, from audio inputs VIN = 0.5 VRMS at 1 kHz on one input, RLOAD = 10 kW, Gain = 0 dB Between L & R of TV outputs Channel Isolation from video inputs Output DC Level DC Offset Change Output Resistance Phase Difference VIN = 1 VPP at 15 kHz on one point VCCA = 9 V Switching between inputs
ASN
S/N Ratio
80
90
dB
eNI
Equivalent RMS Input Voltage Noise
5
µV
G0 GSTEP GMATCH1 GMATCH2
0 dB Gain Gain Step Gain matching between different inputs of one output Gain matching between Left/Right outputs of one input channel Total Harmonic Distortion
+0.5
dB dB dB
-0.5
0.5
dB
THD0 THD6 THD9 VCL RL Mute
ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB Output Clipping Level Output Load Resistance Mute Suppression
0.01 0.01 0.01 2.3 2.25
0.05 0.05 0.05
%
VRMS kW dB
10/28
STV6413 Video Section
Symbol
VDCIN ICLAMP ILEAK CIN VIN DYN
Electrical Characteristics
Parameter
DC Input Level Clamping Current Input Leakage Current Input Capacitance Max Input Signal Dynamic Output Signal Bandwidth at -3 dB - Y/CVBS - RGB Spread of Gain in Video Band (15 kHz - 5 MHz) - Y/CVBS - RGB Crosstalk Isolation between Input Channel Crosstalk Isolation between Output Channel Output Resistance Gain at RGB outputs Gain matching between R, G, B
Test Conditions
Bottom Sync Pulse at VDCIN - 400 mV VIN = VDCIN +1 V
Min.
Typ.
2
Max.
Unit
V mA
1
2 1 2 10
µA pF VPP VPP
VCC = 5 V VCC = 5 V VIN = 1 VPP VIN = 1 VPPVINC = muted
1.5 3
BW
12 12
15 15
MHz
Flatness
VIN = 1 VPP VIN = 1 VPP, VINC = Muted VIN = 1 VPP at 4.43 MHz on one point VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150W 60
±0.5 ±0.5
dB
CTi
dB
CTo ROUT GRGB GRGBM
50 5 10 6.5 0.3 1.25 6.5 0.5
dB W dB dB dB dB dB V 5 5 ° deg. % dB
VIN = 1 Vpp, Gain = 6 dB VIN = 1 Vpp, Gain = 6 dB 3 dB to 6 dB VIN = 1 VPP VIN = 1 VPP Bottom sync pulse VIN = 1 VPP at 4.43 MHz VIN = 1 VPP at 4.43 MHz VIN = 1 VPP at 5 MHz on one point
5.5 -0.3 0.75 5.5 -0.5
6 0 1 6 0 0.6 1 1
GRGBSTEP Step of Gain GYCVBS GYCVBSM DCOUT DPHI DG Mute LNL VSN Gain on Y,/CVBS channels Gain matching between Y, CVBS inputs DC Output Voltage Differential Phase Differential Gain Mute Suppression Luminance non-linearity Video S/N Ratio
55 0.3 3
% dB
Refer to Note 1
65
Note: 1 S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567).
11/28
Electrical Characteristics Chroma Section
Symbol
VDCIN RIN CIN VIN DYN DCOUT CBW CTi
STV6413
Parameter
DC Input Level Input Resistance Input Capacitance Max Input Signal Dynamic Output Signal DC Output VCR Voltage Chroma Bandwidth Crosstalk Isolation between Input Channel Crosstalk Isolation between Output Channel Output Resistance Gain at OUTC Gain Matching between C inputs Mute Suppression Chroma to Luma Delay, Source Y/C Chroma to Luma Delay, Source Y/C
Test Conditions
Min.
Typ.
3
Max.
Unit
V kW pF VPP VPP V MHz
30
50 2 1.5 3 2.2
CIN = 1 VPP at -3 db VIN = 1 VPP at 4.43 MHz on one input VIN = 1 VPP at 4.43 MHz on one input, RLOAD = 150 W
10 55
dB
CTo ROUT GOUTC GCM Mute CToYdel CToYdel
50 5 10 6.5 0.5
dB W dB dB dB 20 20 ns ns
VIN = 1 Vpp VIN = 1 VPP VIN = 1 VPP at 4.43 MHz on one input VPP at 4.43 MHz,
5.5 -0.5 55
6 0
Slow Blanking Section
Symbol
Input Mode SLBlow SLBhigh IIN Input Low Level Threshold Input High Level Threshold Input Current 2.5 7.5 3.25 8.25 50 4 9 100 V V µA
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Output Mode SLBlow SLBmed SLBhigh Output Low Level (Int. TV) Output Medium Level (Ext. 16:9) Output High Level (Ext. 4:3) 0 5 10 0.02 5.75 11 1.5 6.5 12 V V V
12/28
STV6413 Fast Blanking Section
Symbol
Input Mode FBlow/high Input Low/High Level Threshold IIN Input Current 0.4
Electrical Characteristics
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
0.7 2
0.9 10
V µA
Output Mode FBLOW FBHIGH Output Low Level Output High Level At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% RLOAD = 150 W 3.0 3.4 0.5 3.8 V V
FBDEL
Fast Blanking RGB delay
15
ns
FBTRANS
FB Transitions at FB output - Rise Time - Fall Time
10 10
ns
C_Gate Function Output Section
Symbol Parameter Test Conditions Min. Typ.
20 IIN = 0 mA IIN = 1 mA 0.3 0.7
Max.
Unit
kW V
C_GATE-H Pull-up Resistor Value to VCCB1 C_GATE-L Output Low Level
Interrupt Output Section1
Symbol
IT-Leak IT-Low
Parameter
High Level Leakage Output Low Level (Active)
Test Conditions
External pull-up to 5 V IIN = 0 mA IIN = 1 mA
Min.
Typ.
Max.
10 0.3 0.7
Unit
µA V
1. When bit IT Enable is set, the interrupt is forced to a low level when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read.
13/28
Electrical Characteristics I²C Bus Characteristics
Symbol
SCL VIL VIH ILI SDA VIL VIH ILI CI tR tF VOL tF CL Timing tLOW tHIGH tSU,DAT tHD,DAT tSU,STO tBUF tHD,STA tSU,STA Clock Low Period Clock High Period Data Setup Time Data Hold Time Setup Time from Clock High to Stop Start Setup Time following a Stop Start Hold Time Start Setup Time following Clock Low to High Transition 4.7 4 250 0 4 4.7 4 4.7 340 Low Level Input Voltage High Level Input Voltage Input Leakage Current Input Capacitance Input Rise Time Input Fall Time Low Level Output Voltage Output Fall Time Load Capacitance 1.5 V to 3 V 3 V to 1.5 V IOL = 3 mA 3 V to 1.5 V VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10 10 1 300 0.4 250 400 Low Level Input Voltage High Level Input Voltage Input Leakage Current VIN = 0 to 5.5 V -0.3 2.3 -10 0 1.5 5.5 10
STV6413
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V V µA
V V µA pF µs ns V ns pF
µs µs ns ns µs µs µs µs
Figure 4: I²C Bus Timing
SDA
tBUF tLOW tF
SCL
tHD,STA tR tHD, DAT tHIGH tSU, DAT
SDA (Start, Stop)
tSU, STA tSU, STO
14/28
STV6413
I²C Bus Selection
3
I²C Bus Selection
Data transfers follow the usual I²C format; i.e. after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC's I²C bus decoder enables the automatic incrementation mode in write mode. String Format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge)
S Slave Address 0 A Sub-address A Data A P
Read only mode
S Slave Address 1 A Data A P
Slave Address
Address Value A7 1 A6 0 A5 0 A4 1 A3 0 A2 1 A1 1
Auto Increment Mode
S Slave Address 0 A Sub-address A Data0 A Data1 A ... Data n A P
Sub-address
Sub-address +1
Sub-address + N
3.1
I²C Bus Addresses
Write Address: 1001 0110 = 96(hex), Read Address: 1001 0111 = 97(hex)
Table 2: Input Signal Summary (Write Mode)
Reg. Add.
Audio 00h 01h Video 02h 03h
Data d7 d6 d5 d4 d3 d2 d1 d0
TV Stereo Mono VCR Stereo Mono
TV 0/6 dB Not Used (See Note 1)
TV Volume-62 dB to 0 dB - 2 dB steps VCR Audio Switch Control CINCH Audio Gain
Soft Volume Mode
TV/CINCH Audio Switch Control
VCR Chroma muted RGB and FB Tri-state
VCR Video and Chroma Switch Control RGB Gain
TV Chroma muted
TV Video and Chroma Switch Control Fast Blanking Mode/Input Selection
RGB Switch Control
15/28
I²C Bus Selection
Table 2: Input Signal Summary (Write Mode) Reg. Add.
Miscellaneous 04h IT Enable SLB Mode Not Used (See Note 1) VCR-C Output Control VCR-C Gate Control Not Used (See Note 1) Not Used (See Note 1)
STV6413
Data d7 d6 d5 d4 d3 d2 d1 d0
TV R or C Output Selection
05h Standby 06h
VCR Slow Blanking
TV Slow Blanking
ENC Audio Input Gain 0/6/9 dB
VCR R/C sub ENC R/C sub Clamp Clamp
Not Used (See Note 1)
TV Outputs
CINCH Outputs
VCR Outputs
Not Used (See Note 1)
TV Inputs
VCR Inputs
ENC Inputs
Note: 1 At register address 06h, bits marked "Not Used" must be set to "1". All other bits marked "Not Used" must be set "0".
Table 3: TV Audio Output Reg. Add. Data Description Bits d7
Soft Volume Change Level Adjustment 00h 6 dB Extra Gain TV Stereo or Mono Mode 1 1 X X 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X 0 dB +6 dB 0 = Stereo 1 = Mono 1 5 X X X X
Comments d6
X X X X
d5
X X 0 1
d4
X X 0 1
d3
X X 0 1
d2
X X 0 1
d1
X X 0 1
d0
0 1 X X Active Disabled 0 dB -62 dB (-2 dB/step)
16/28
STV6413
Table 4: Audio Selection & VCR Audio Output Reg. Add. Data Description Bits d7
X X X X X X X X X X X X X X 0 1
I²C Bus Selection
Comments d6
X X X X X X X X X X X X X X X X
d5
X X X X X X X X X X 0 0 1 1 X X
d4
X X X X X X X X X X 0 1 0 1 X X
d3
X X X X X X X X 0 1 X X X X X X
d2
0 0 0 0 1 1 1 1 X X X X X X X X
d1
0 0 1 1 0 0 1 1 X X X X X X X X
d0
0 1 0 1 0 1 0 1 X X X X X X X X Muted Encoder L/R selected VCR L/R selected Not allowed TV L/R selected Not allowed Not allowed Not allowed 0 dB Follow TV Gain Muted Encoder L/R selected TV L/R selected Not allowed 0 = Stereo 1 = Mono
TV & CINCH Audio Output Selection
3
01h
CINCH Audio Gain
1
VCR Audio Output Selection
2
VCR Stereo or Mono Mode
1
Table 5: TV & VCR Video Selection Reg. Add. Data Description Bits d7
X X X X X X X X X X X X X X X X X X 0 1
Comments d6
X X X X X X X X X X 0 0 0 0 1 1 1 1 X X
d5
X X X X X X X X X X 0 0 1 1 0 0 1 1 X X
d4
X X X X X X X X X X 0 1 0 1 0 1 0 1 X X
d3
X X X X X X X X 0 1 X X X X X X X X X X
d2
0 0 0 0 1 1 1 1 X X X X X X X X X X X X
d1
0 0 1 1 0 0 1 1 X X X X X X X X X X X X
d0
0 1 0 1 0 1 0 1 X X X X X X X X X X X X Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR Not allowed Not allowed Not allowed Not allowed Chroma defined by d2d1d0 Chroma force to mute Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & Chroma muted Not allowed Not allowed Not allowed Not allowed Chroma defined by d6d5d4 Chroma force to mute
TV Video Output Selection
3
TV Chroma Output Control 02h
1
VCR Video Output Selection
3
VCR Chroma Output Control
1
17/28
I²C Bus Selection
Table 6: RGB & Fast Blanking Outputs Reg. Add. Data Description Bits d7
X X X X X X X X X X X X X X 0 RGB and FB Control 1 1 X X X X X X X
STV6413
Comments d6
X X X X X X X X X X X X 0 1 X
d5
X X X X X X X X 0 0 1 1 X X X
d4
X X X X X X X X 0 1 0 1 X X X
d3
X X X X 0 0 1 1 X X X X X X X
d2
X X X X 0 1 0 1 X X X X X X X
d1
0 0 1 1 X X X X X X X X X X X
d0
0 1 0 1 X X X X X X X X X X X FB forced to low level FB forced to high level FB from Encoder FB from VCR Muted RGB_ENC selected RGB_VCR selected Not allowed +6 dB gain +5 dB gain +4 dB gain +3 dB gain +0 dB extra gain +3 dB for weak input signals RGB and FB outputs high impedance state RGB and FB outputs active
Fast Blanking Control
2
RGB Selection
2
03h 2 RGB Gain 1
Table 7: Miscellaneous Control Reg. Add. Data Description Bits d7
R/C TV Output Selection C_Gate Output Control 1 1 X X X X X 04h C_VCR Output Control 1 X Slow Blanking Mode 1 X X 0 1 X 0 1 X X X X X X X 1 X X X X X X X X X 0 0 0 0 0 0 0 0 0 0 X X X X X
Comments d6
X X X X X
d5
X X X X X
d4
X X X X 0
d3
X X 0 1 X
d2
0 0 0 0 0
d1
0 0 0 0 0
d0
0 1 X X X Red signal selected Chroma signal selected High level Low level Tri-state mode (high impedance) Active Normal Mode SLB TV is driven by SLB VCR No interrupt flag IT enable
IT Enable
1
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STV6413
Table 8: Slow Blanking & Inputs Control Reg. Add. Data Description Bits d7
Encoder R/Csub Clamp VCR R/Csub Clamp Encoder Input Level Adjustment 05h Slow Blanking TV SCART 2 1 1 X X X X X X X X X X X 0 0 1 1
I²C Bus Selection
Comments d6
X X X X X X X X X X X 0 1 0 1
d5
X X X X X X X 0 0 1 1 X X X X
d4
X X X X X X X 0 1 0 1 X X X X
d3
X X X X 0 0 1 X X X X X X X X
d2
X X X X 0 1 0 X X X X X X X X
d1
X X 0 1 X X X X X X X X X X X
d0
0 1 X X X X X X X X X X X X X Bottom level clamp Average level clamp Bottom level clamp Average level clamp 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs Input mode only Output < 2 V Output 16/9 format Output 4/3 format Input mode only Output < 2 V Output 16/9 format Output 4/3 format
2
Slow Blanking VCR SCART
2
Table 9: Standby Modes Reg. Add. Data Description Bits d7
ENC Inputs VCR Inputs TV Inputs VCR Outputs CINCH Outputs TV Outputs 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Comments d6
X X X X X X X X X X 0 1 1
d5
X X X X X X X X 0 1 X X 1
d4
X X X X X X 0 1 X X X X 1
d3
1 1 1 1 1 1 1 1 1 1 1 1 1
d2
X X X X 0 1 X X X X X X 1
d1
X X 0 1 X X X X X X X X 1
d0
0 1 X X X X X X X X X X 1 Inputs active Inputs disabled Inputs active Inputs disabled Inputs active Inputs disabled Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Audio & Video Outputs ON Audio & Video Outputs OFF Only I²C bus and slow blanking detection parts are supplied.
06h
Full Stop
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I²C Bus Selection
Table 10: Output Signals (Read Mode) Reg. Add. Data Description Bits d7
Slow Blanking TV SCART 2 X X X X X X X X
STV6413
Comments d6
X X X X X X X X
d5
X X X X X X X X
d4
X X X X X X 0 1
d3
X X X 0 1 1 X X
d2
X X X 1 0 1 X X
d1
0 1 1 X X X X X
d0
1 0 1 X X X X X Input < 2 V Input 16/9 format Input 4/3 format Input < 2 V Input 16/9 format Input 4/3 format No change since read One change has been detected (refer to Note 1)
Slow Blanking VCR SCART
2
Interrupt Flag
1
Note: 1 The Interrupt Flag will be cleared when this register is read. To prepare for a new interrupt, a "1" must be re-written in the IT Enable bit (Reg. 04, d7).
3.2
Power-on Reset -- Bus Register Initial Conditions
Power-on Reset is active when the supply VDD is less than 3.5 volts. Non-significant bits (X) are pre-set to "0".
Reg. Add.
00h 01h 02h 03h 04h 05h 06h
Data Comments d7
0 0 0 0 0 0 0
d6
0 0 0 0 0 0 0
d5
0 0 0 0 0 0 0
d4
0 0 0 0 0 0 0
d3
0 0 0 0 0 0 0
d2
0 0 0 0 0 0 0
d1
0 0 0 0 0 0 0
d0
0 0 0 0 0 0 0 Audio TV and Cinch outputs are in Stereo Mode, 0 dB Gain Adjustment. TV, Cinch and VCR audio outputs are muted. VCR output is in Stereo Mode. VCR, TV video outputs are muted. Fast Blanking is forced to `0'. RGB outputs are muted and in high impedance. C_GATE is high. C_VCR is high impedance. Encoder and VCR R/Csub Bottom Level Clamp, RGB outputs 6 dB Gain, and Slow Blanking parts are in read mode. All internal blocks are ON.
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STV6413
Figure 5: Volume Control Characteristics
I²C Bus Selection
0
± 0.5 dB
18
31
Step Number
-36
± 0.5 dB
+ 2 dB -62 dB - 0.5 dB
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Input/Output Groups
STV6413
4
Input/Output Groups
Figure 6: Bottom Clamped Video Inputs (Pins 4, 6, 12, 14, 18, 21, 62 and 64)
Figure 9: Fast Blanking Inputs (Pins 50 and 51)
VCC 5 V
VCC 5 V
VCCB1 5 V
2 V + VD
15 kW tri Protected Pad Protected Pad
tri
Figure 7: R/C Clamped Video Inputs (Pins 10 and 60)
Figure 10: Average Clamped Video Inputs (Pin 8)
R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above.
VCC 5 V VCC 5 V IB 25 kW 25 kW 3V
tri
Protected Pad
Figure 8: Fast Blanking Output (Pin 49)
Figure 11: Cgate Logical Output (Pin 52)
VCCB1 5 V VCC 5 V
VCC 5 V
VCC 5 V
18 kW
50 W
Protected Pad
Protected Pad
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STV6413
Input/Output Groups
Figure 12: Video Outputs (Pins 38, 40, 42, 44, 46 and 48)
VCC 5 V VCCB1,2 ...7 5 V
Figure 15: Audio Outputs (Pins 27, 28, 29, 30, 32 and 33)
VCCAO 12 V
IB 60 W
Protected Pad
Protected Pad
Figure 13: Audio Inputs (Pins 11, 13, 19, 20, 22 and 23)
Figure 16: Interrupt Output (Pin 58)
VCCA 9 V VDD 5 V 50 kW VCC/2 40 W IB Float
Protected Pad Protected Pad
Figure 14: Slow Blanking I/O (Pins 59 and 61)
Figure 17: I²C Bus (SDA) (Pin 56)
VCC 12 V VDD 5 V VCC12 12 V Acknowledge 10 kW 25 kW 110 kW Float
55 kW
Protected Pad Protected Pad
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Input/Output Groups
STV6413
Figure 18: I²C Bus (SCL) (Pin 55)
VDD 5 V
Float
10 kW
Protected Pad
Figure 19: Power Supply Connection
VCCB1
VCCB2
VCCB3
VCCB4
VCCB5
VCCA0
VCCA
VCC
VCC12
VDD
Float
47
45
43
39
37
31 12 V
24 10 V 25 17
1
63 12 V
53 5V
41 GNDP
5
57 GDD
GNDA GNDref GNDV
These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode.
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STV6413
Application Diagram
5
Application Diagram
Figure 20: STV6413 Application Diagram
STV6413
Note:
For more details refer to STV6412A Application Note.
25/28
Package Mechanical Data
STV6413
6
Package Mechanical Data
Figure 21: 64 Pin, Thin Full Plastic Quad Flat Pack (TQFP)
0.10mm .004 seating plane
L1
L
K
mm Dim. Min.
A A1 A2 b C D D1 E E1 e K L L1 N 64 0° 0.45 0.05 1.35 0.17 0.09 12.00 10.00 12.00 10.00 0.50 3.5° 0.60 1.00 Number of Pins ND 16 7° 0.75 0° 0.018 1.40 0.22
Inches Max.
1.60 0.15 1.45 0.27 0.20 0.002 0.053 0.007 0.004 0.472 0.394 0.472 0.394 0.020 3.5° 0.024 0.039 NE 16 7° 0.030 0.055 0.009
Typ.
Min.
Typ.
Max.
0.063 0.006 0.057 0.011 0.008
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STV6413
Revision History
7
Revision History
Main Changes
First Issue Pin List updated. STV6413 Product Preview updated to Datasheet. Order codes updated. Note added to Section 2.2: Thermal Data on page 8. Test Conditions updated for Total Harmonic Distortion values in Section : Audio Section on page 9. Modification of Note 1 on page 16.
Revision
1.0 1.1 1.2 1.3
Date
Sept. 2001 Dec. 2001 March 2002 July 2002
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Revision History
STV6413
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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