1.Remove the two screws A attaching the top cover on both sides of the body. 2.Remove the three screws B attaching the top cover on the back of the body. 3.Remove the top cover from the body by lifting the rear part of the top cover. ATTENTION: Do not break the front panel tab fitted to the top cover. JT102,JT103
Lug wire
B Ax2 Fig.1 B C
Mechanism assembly
B
CN4
Removing the mechanism assembly (see Fig.2,3)
* Prior to performing the following procedure, remove the top cover. * There is no need to remove the front panel assembly. 1.Remove the three screws C attaching the mechanism assembly on the bottom chassis. 2.Remove the two screws F attaching the lug wire and main board on the bottom chassis. 3.The servo control board is removed from the connector CN512 and CN513 connected with the main board respectively. 4.Remove the mechanism assembly by lifting the rear part of the mechanism assembly.
F
Main board
C Fig.2
F
Servo control board
Mechanism assembly
Removing the servo control board (see Fig.4)
* Prior to performing the following procedure, remove the top cover and mechanism assembly. 1.Disconnect the card wire from connector CN201 and CN202 on the servo control board respectively. 2.Disconnect the flexible wire from connector CN101 on the servo control board from pick-up. < ATTENTION > At this time, please extract the wire after short-circuited of two places on the wire in part a with solder. Please remove the solder two places of part a after connecting the wire with CN101 when reassembling. 3.Two places in hook b are removed, the servo control board is lifted, and it is removed. Fig.4
Hook b Hook b
CN513
Fig.3
CN512
Main board
CN202 CN201 CN101
Servo control board
1-6
XV-S500BK/XV-S502SL
Removing the rear panel (see Fig.5)
*Prior to performing the following procedure, remove the top cover. 1.Remove the nine screws D attaching the rear panel on the back of the body. D D D Fig.5 D D Rear panel
Removing the front panel assembly (see Fig.6,7)
* Prior to performing the following procedure, remove the top cover. * There is no need to remove the mechanism assembly. 1.Remove the one screw E attaching the front panel assembly on the bottom chassis. 2.Disconnect the wire from JT102, JT103 and CN4 on the main board respectively. 3.Hook c and d are removed respectively, and the front panel assembly is removed. Hook d Hook c
Front panel assembly
Hook d E
Fig.6
JT102,JT103
Mechanism assembly
CN4
Removing the main board (see Fig.7)
* Prior to performing the following procedure, remove the top cover, mechanism assembly and rear panel.
F
F 1.Disconnect the wire from JT102, JT103 and CN4 on the main board respectively. 2.Remove the four screws F attaching the main board on the bottom chassis. Main board Fig.7 F F
1-7
XV-S500BK/XV-S502SL
Removing the clamper assembly (See Fig.1)
1. Remove the four screws A attaching the clamper assembly. 2. Move the clamper in the direction of the arrow to release the two joints a on both sides. ATTENTION: When reattaching, fit the clamper to the two joints a.
Joint a Joint a
A
A
A
A
Removing the tray (See Fig.2 and 3)
Prior to performing the following procedure, remove the clamper assembly. 1. Push b of the slide cam into the slot on the left side of the loading base until it stops. 2. Draw out the tray toward the front. ATTENTION: Before reattaching the tray, slide the part c of the slide cam to the right as shown in Fig.3.
Fig.1
Clamper base Push b Tray
Fig.2
Part c
Slide cam
Fig.3
1-8
XV-S500BK/XV-S502SL
Removing the traverse mechanism assembly (See Fig.4 and 5)
Prior to performing the following procedure, remove the clamper assembly and the tray. 1. Remove the four screws B attaching the traverse mechanism assembly. ATTENTION: Before reattaching the traverse mechanism assembly, pass the card wire extending from the spindle motor board through the notch d of the elevator.
B
Traverse mechanism assembly
B
B
Fig.4
B
B
Traverse mechanism assembly
B
Removing the elevator (See Fig.6 and 7)
Prior to performing the following procedure, remove the clamper assembly, the tray and the traverse mechanism assembly. 1. Extend each bar e inside of the loading base outward and detach the elevator shaft. ATTENTION: When reattaching, first fit the two shafts on the front of the elevator to the slots f of the slide cam. Fig.5
Elevator e
Elevator Notch d
Shafts Elevator Elevator
Slide cam
Elevator
Loading base Slots f e
Fig.7
Fig.6
1-9
XV-S500BK/XV-S502SL Removing the motor assembly (See Fig.8 and 9)
Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly and the elevator. 1. Remove the belt from the pulley. 2. Remove the screw C attaching the motor assembly. 3. Turn over the body and remove the screw D attaching the motor assembly. 4. Release the two tabs g retaining the motor board.
Motor assembly
Belt
C
Fig.8
Tabs g
D
Motor assembly
Loading base
Fig.9
1-10
XV-S500BK/XV-S502SL
Pulley gear Pulley gear bracket Idle gear Pulley gear Idle gear
E
Pulley gear bracket Tads h
Pulley gear
Motor assembly
Fig.10
Slide cam
Removing the Idle gear / pulley gear / middle gear / slide cam (See Fig.10 to 12)
Prior to performing the following procedure, remove the clamper assembly, the tray, the traverse mechanism assembly, the elevator and the motor assembly. 1. Press the two tabs h inward and pull out the idle gear. 2. Remove the screw E attaching the pulley gear bracket. Slide the pulley gear bracket in the direction of the arrow and pull out the pulley gear. 3. Slide the slide cam in the direction of the arrow to release the two joints i and remove upward. 4. Remove the middle gear.
Joint i
Middle gear
Joint i
Fig.11
Slide cam Middle gear
Loading base
Fig.12
1-11
XV-S500BK/XV-S502SL
(See Fig.13)
1. Unsolder the two soldering j on the spindle motor board. 2. Remove the two screws F attaching the feed motor assembly.
F
Notch k
Pickup
Removing the feed motor (See Fig.13 to 15)
Prior to performing the following procedure, remove the feed motor assembly. 1. Remove the screw G attaching the thrust spring. ATTENTION: When reattaching the thrust spring, make sure that the thrust spring presses the feed gear (M) and the feed gear (E) reasonably. 2. Remove the feed gear (M). 3. Pull out the feed gear (E) and the lead screw.
Soldering j
Spindle motor Spindle motor board
Fig.13
Feed gear (M) Thrust spring
G
Lead screw Feed gear (E)
4. Remove the two screws H attaching the feed motor. ATTENTION: When reattaching, pass the two cables extending from the feed motor through the notch k of the feed holder as shown in Fig.13.
Fig.14
Feed motor
Feed holder
Fig.15
H
1-12
XV-S500BK/XV-S502SL Removing the pickup (See Fig.16 and 17)
1. Remove the screw I attaching the T spring (S) and the shaft holder. Remove also the plate.
Pickup Joint n Shaft holder
I
ATTENTION: When reattaching, make sure that the T spring (S) presses the shaft.
Plate
2. Pull out the part l of the shaft upward. Move the part m in the direction of the arrow and detach from the spindle base. 3. Disengage the joint n of the pickup and the shaft in the direction of the arrow. T spring (S) 4. Pull out the shaft from the pickup.
Part l
Part m
Fig.16
Actuator
5. Remove the two screws J attaching the actuator. 6. Disengage the joint of the actuator and the lead spring. Pull out the lead spring.
Actuator
J
Lead spring
Lead spring
Pickup
Shaft Spring
Pick-up
Shaft
Fig.17
The spring must be under the shaft when you install pick-up.
K
Shaft Shaft holder
Removing the shaft holder / shaft (See Fig.18)
1. Remove the screw K attaching the shaft holder. 2. Remove the shaft.
Fig.18
1-13
XV-S500BK/XV-S502SL Removing the spindle motor assembly (See Fig.19 to 21)
1. Remove the three screws L attaching the spindle motor on the bottom of the mechanism base. ATTENTION: When reattaching, pass the card wire extending from the spindle motor board through the notch of the spindle base. 2. Remove the three screws M attaching the spindle base.
L
Spindle motor
L
Fig.19
Spindle motor assembly
Spindle base
L
Fig.20
M M
Spindle base
Mechanism base
Fig.21
1-14
XV-S500BK/XV-S502SL
Adjustment method
(1) Test mode setting method
1) Take out the disc and close the tray. 2) Unplug the power plug. 3) Insert power plug into outlet while pressing both "PLAY" key and "STOP" key of the main body. 4) The player displays "TEST " on the FL display. " " means the player version. 5) When the power supply is turned off, test mode is released. The mode changes as follows whenever the "CHOICE" key of remote controller is pushed in test mode.
TEST_ _ _
---------------------------- Becomes test mode -------------------- Version of microcomputer
FL display becomes all lighting --- Confirmation of FL display CHECK --------------------------------- Check mode EXPERT -------------------------------- Not use mode
(2) Initialization method
Please initialize according to the following procedures when microprocessor or pick-up is exchanged and when the up-grade is done. 1) Makes to test mode. 2) "PAUSE" key of the main body is pushed. 3) A green progressive indicator lights when about a few seconds pass. Then, it is initialization completion. *Please make scan mode test mode in the state of interlaced scan mode. (State of progressive indicator turning off)
(3) Method of displaying version of microcomputer
1) Makes to test mode and initializes 2) When "CHOICE" key of remote controller is pushed once, the figure is displayed on the FL display as follows. FL Display
FL Display microcomputer (IC2) Front end microcomputer (IC401)
__33_39_25__
Decoder part (IC509)
POWER key
STOP key PLAY key (for test mode) (for test mode)
CHOICE key (switch of mode)
FL Display
PROGRESSIVE Indicator (for initialize)
PAUSE key (for initialize)
1-15
XV-S500BK/XV-S502SL (4) Display of current value of laser
1) Makes to test mode and initializes. 2) When "CHOICE" key of remote controller is pushed three times, It is displayed on the FL display, "CHECK". 3) Afterwards, the laser current value can be switched by pushing the key to remote controller without turning on the disc. Remote controller "4" key --- Laser of CD Remote controller "5" key --- Laser of DVD FL Display (example) As for the current value of the laser, the figure displayed on the FL display becomes a current value as it is by "mA" unit. becomes 42 mA if displayed as 42.
0042
0000
Laser current value
4) The laser output stops if the "STOP" key to remote controller is pushed. It can be judged it is simply good if the displayed current value of the laser is smaller than that of the undermentioned value. Moreover, there must be a deteriorated possibility and the pick-up must exchange the pick-up more than the undermentioned value. Laser current value of CD ------ 49 mA or less Laser current value of DVD ---- 64 mA or less
(5) Display of jitter value
1) Makes to test mode and initializes. 2) When "CHOICE" key of remote controller is pushed three times, It is displayed on the FL display, "CHECK". 3) The test disk (VT-501) is inserted, and the "PLAY" key to the main body is pushed. 4) The jitter value is displayed on the FL display as follows. FL Display (example)
0042
1CB4
Jitter value
The jitter value is displayed by the hexadecimal number.
In the following cases, please "Flap adjustment of the pick-up guide shaft" referring to the following page. Before using the TEST disc VT-501, careful check it if there is neither damage nor dirt on the read surface.
< In the following cases, please adjustment >
* When you exchange the pick-up * When you exchange the spindle motor * When the reading accuracy of the signal is bad (There is a block noise in the screen etc..)
4 key (laser of CD) 5 key (laser of DVD) POWER key UP key (for firmware upgrade) CHOICE key (switch of mode) FL Display STOP key (laser OFF) PROGRESSIVE Indicator (for initialize) PAUSE key (for initialize) STOP key (for test mode) PLAY key (for test mode and jitter value)
1-16
XV-S500BK/XV-S502SL
(6) Upgrading of firmware
1) The power supply is turned on pushing the "POWER" key. 2) The up-grade disc is inserted. 3) When FL display of the main body changes from "READING" into "UPGRADE", cursor "UP" key ( remote controller is pushed. 4) The up-grade starts if the entire screen becomes blue and it is displayed, "Upgrade progress". 5) The tray opens automatically, the up-grade disc is removed. 6) The up-grade ends if the tray closes automatically, and the screen returns to the normal screen. 7) Please confirm the version of the microcomputer after makes to test mode and initializes.
) of
Firmware upgrade Disc ... press UP
Upgrade progress...
NO DISC
After inserting the up-grade disc
Upgrading (blue screen)
When up-grade is completed
The disc for the up-grade is usually one piece. The disc becomes two pieces according to the version. In that case, please note the undermentioned content.
* The up-grade is done by using the STEP1 disc according to "1)" and "4)" of the above-mentioned procedure. * The tray opens automatically after a few seconds and exchange for the disc of STEP2, please. * The tray closes automatically. There is only about five second time that the tray opens this time, and replace the disc quickly between those, please. ATTENTION When the tray shuts with the STEP1 disc left for the tray The up-grade starts again and exchange for the STEP2 disc, please when the tray opens automatically. When the tray closes with there no disc in the tray Because the tray opens automatically, the disc of STEP2 is put on the tray. The power supply is turned off once pushing the "POWER" key. The up-grade starts when the "POWER" key is pushed afterwards. * After the up-grade ends, the STEP2 disc is removed because the tray opens automatically. * Afterwards, it is the same as 6),7) of the above-mentioned procedures.
(7) Display of region code
1) Makes to the stand-by state. 2) The "POWER" key is pushed while pushing the "BACK SKIP" key and the "FORWARD SKIP" key to the main body. 3) Region code is displayed on the FL display as follows.
FL Display
REGION__
= Region code
1-17
XV-S500BK/XV-S502SL
Flap adjustment of the pick-up guide shaft
Assistance board (Connect to main board)
XV-S40 MAIN CONNECT
Extension cord
XV-S40 CONTROL CONNECT
Assistance board (Connect to servo control board)
Stud One is not used though it is one set which consists of four units.
Servo control board Stud Mechanism assembly Servo control board Shaft Hook Mechanism assembly
Extension cord Assistance board Stud
Assistance board Main board
Adjustment screw c
1-18
XV-S500BK/XV-S502SL
Attention when pick-up is exchanged
Switch actuator 1.Flexible wire, pick-up spring, switch actuator, and lead spring are removed from an old pick-up (broken the one). < Guide > Flexible wire, pick-up spring and switch actuator, lead spring are removed without each decomposing while assembled. 2.The above-mentioned parts are installed in a new pick-up (non-defective article). 3.A flexible wire is inserted in the connector which has taken side with the pick-up, and solder is put up to short land part "a" two places on a flexible wire. 4.The electrostatic breakdown protection circuit attached to the pick-up is cut. < ATTENTION > Please cut the electrostatic breakdown protection circuit attached to the pick-up after solder is put up to two places on a flexible wire short land part "a" of the insertion of a flexible wire this time in the connector without fail. The procedure might be mistaken and if solder has not surely adhered to two places on a flexible wire short land part "a", the laser diode in the pick-up be destroyed again. Lead spring
Pick-up
Pick-up spring Flexible wire
Electrostatic breakdown protection circuit
Flexible wire Connector
Short land part "a"
5.The pick-up is installed in the traverse mechanism. 6.A flexible wire is connected with connector CN101 on the servo control board by installing the traverse mechanism in the loading mechanism. 7.Solder in two places on a flexible wire in part "a" is removed. < ATTENTION > Please remove solder in two places in part "a" after connecting a flexible wire with connector CN101 on the servo control board without fail this time. When the procedure is mistaken, the laser diode in the pick-up might be destroyed. Please remove solder in two places in part "a" surely.
Electrostatic breakdown protection circuit
Cutting part
Short land part "a" CN101 Servo control board 1-19
XV-S500BK/XV-S502SL
Confirm method of operation
Please confirm the operation of the undermentioned item after doing the repair and the upgrade of the firmware.
The EEPROM is initialized. Refer to the initialization method. Opening picture check (Power ON) It should be display "JVC" Muting working The noise must not be had to the performance beginning when you push "PLAY" button or at ON/STANDBY. FL Display The mark and the logo, etc. displayed by each operation must be displayed correctly. FL Display should light correctly without any unevenness. All Function button All function buttons should worked correctly with moderate click feeling. Open and close movement of tray When press OPEN/CLOSE button the tray should move smoothly without any noise. Remote controller unit working Check the correctly operation in use of remote controller unit. Reading of TOC Be not long in the malfunction. Search Both forward-searches and backward-searches should be able to be done. Do not stop be searching or after the search. Skip Both forward-skip and backward-skip should be able to be done. Do not stop be after the skip. Playback Do not find abnormality etc. of tone quality and the picture quality. Most outside TITLE playback check Play VT-501 TITLE 59 CHAPTER 1 , check normal playback.
1-20
XV-S500BK/XV-S502SL
Troubleshooting
Servo volume
Press OPEN /CLOSE key
Is tray operation correct?
N
Confirmation of tray drive circuit and circuit in surrounding
Y
Is the traverse moving N along the innermost perimeter for SW detection? See "(3) Traverse movement error" in "Check points for individual errors"
Y
"NO DISC" message appears Y immediately after vertical movement of the pick-up lens
See "(2) Disk detection, distinction error" in "Check points for individual errors"
N
The state that DISC does not rotate continues for several seconds, and becomes NO DISC or an error display afterwards. The rotation of DISC becomes high-speed and abnormal, and becomes NO DISC or an error display afterwards.
Y
See "(1) Spindle startup error" in "Check points for individual errors"
N
Is focus retraction OK?
A N
See "(4) Focus ON error" in "Check points for individual errors"
FE
OFF ON Even when it retracts correctly, if it is out of focus and makes repeated retries with a clicking sound, it is in error.
Two layers of DVD only. Is the inter-layer jump OK? N FE LO Y LI (8) Inter-layer jump error
Y
Is tracking retraction OK?
TE
OFF ON If TE waveform reappears or fails to converge after the TE retraction, it is in error.
N See "(5) Tracking ON error" in "Check points for individual errors"
Has the disc information N been collected? (7) Address read Stop will result error Y N Check (9),(10),(11), and
Y
Is the spindle servo locked correctly?
Is the RF OUT waveform locked correctly?
N See "(6) Spindle CLV error" in "Check points for individual errors"
Is playback possible? Y OK !
(12) items in "Check points for individual errors"
Y A
1-21
XV-S500BK/XV-S502SL
Check points for each error
(1) Spindle start error 1.Defective spindle motor *Are there several ohms resistance between each pin of CN201 "5-6","6-7","5-7"? (The power supply is turned off and measured.) *Is the sign wave of about 100mVp-p in the voltage had from each terminal? [ CN201"9"(H1-),"10"(H1+),"11"(H2-),"12"(H2+),"13"(H3-),"14"(H3+) ] 2.Defective spindle motor driver (IC251) *Has motor drive voltage of a sine wave or a rectangular wave gone out to each terminal(SM1~3) of CN201"5,6,7" and IC251"2,4,7"? *Is FG pulse output from the terminal of IC251"24"(FG) according to the rotation of the motor? *Is it "L(about 0.9V)" while terminal of IC251"15"(VH) is rotating the motor? 3.Has the control signal come from servo IC or the microcomputer? *Is it "L" while the terminal of IC251"18"(SBRK) is operating? Is it "H" while the terminal of IC251"23"(/SPMUTE) is operating? *Is the control signal input to the terminal of IC251"22"(EC)? (changes from VHALF voltage while the motor is working.) *Is the VHALF voltage input to the terminal of IC251"21"(ECR)? 4.Is the FG signal input to the servo IC? *Is FG pulse input to the terminal of IC301"69"(FG) according to the rotation of the motor?
(2) Disc Detection, Distinction error (no disc, no RFENV) * Laser is defective. * Front End Processor is defective (IC101). * APC circuit is defective. --- Q101,Q102. * Pattern is defective. --- Lines for CN101 - All patterns which relate to pick-up and patterns between IC101 * IC101 --- For signal from IC101 to IC301, is signal output from IC101 "20" (ASOUT) and IC101 "41"(RFENV) and IC101 "22" (FEOUT)?
1-22
XV-S500BK/XV-S502SL
(3) Traverse movement NG 1.Defective traverse driver *Has the voltage come between terminal of CN101 "1" and "2" ? 2.Defective BTL driver (IC201) *Has the motor drive voltage gone out to IC201"17" or "18"? 3.Has the control signal come from servo IC or the microcomputer? *Is it "H" while the terminal of IC201"9"(STBY1) ? *TRSDRV Is the signal input? (IC301 "67") 4.TRVSW is the signal input from microcomputer? (IC401 "50") (4) Focus ON NG * Is FE output ? --- Pattern, IC101 * Is FODRV signal sent ? (R209) --- Pattern, IC301 "115" * Is driving voltage sent ? IC201 "13", "14" --- If NG, pattern, driver, mechanical unit . * Mechanical unit is defective. (5) Tracking ON NG * When the tracking loop cannot be drawn in, TE shape of waves does not settle. * Mechanical unit is defective. Because the self adjustment cannot be normally adjusted, the thing which cannot be normally drawn in is thought. * Periphery of driver (IC201) Constant or IC it self is defective. * Servo IC (IC301) When improperly adjusted due to defective IC. (6) Spindle CLV NG * IC101 -- "35"(RF OUT), "30"(ARF-), "31(ARF+). * Does not the input or the output of driver's spindle signal do the grip? * Has the tracking been turned on? * Spindle motor and driver is defective. * Additionally, "IC101 and IC301" and "Mechanism is defective(jitter)", etc. are thought.
(7) Address read NG * Besides, the undermentioned cause is thought though specific of the cause is difficult because various factors are thought. Mechanism is defective. (jitter) IC301, IC401. The disc is dirty or the wound has adhered. (8) Between layers jump NG (double-layer disc only) Mechanism defective Defect of driver's IC(IC201) Defect of servo control IC(IC301)
1-23
XV-S500BK/XV-S502SL
(9) Neither picture nor sound is output 1.It is not possible to search *Has the tracking been turned on? *To "(5) Tracking ON NG" in "Check points for each error" when the tracking is not normal. *Is the feed operation normal? To "(3) traverse movement NG" in "Check points for each error" when it is not normal. Are not there caught of the feeding mechanism etc? (10) Picture is distorted or abnormal sound occurs at intervals of several seconds. Is the feed operation normal? Are not there caught of the feeding mechanism etc? (11) Others The image is sometimes blocked, and the image stops. The image is blocked when going to outer though it is normal in surroundings in the disk and the stopping symptom increases. There is a possibility with bad jitter value for such a symptom.
(12) CD During normal playback operation a) Is TOC reading normal? Displays total time for CD-DA. Shifts to double-speed mode for V-CD. YES b)Playback possible? NO *--:-- is displayed during FL search. According to [It is not possible to search ] for DVD(9), check the feed and tracking systems. *No sound is output although the time is displayed.(CA-DA) DAC, etc, other than servo. *The passage of time is not stable, or picture is abnormal.(V-CD) *The wound of the disc and dirt are confirmed.
1-24
XV-S500BK/XV-S502SL
Description of major ICs
74LCX373MTC-X(IC512,IC513)
1.Pin layout
OE Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 LE
2.Pin function Symbol
D0~D7 LE OE Q0~Q7
3.Truth table Description
Data inputs Latch enable input Output enable input 3-State latch outputs LE X H H L INPUTS OE H L L L Dn X L H X OUTPUTS Qn Z L H Q0
H = HIGH Voltage level L = LOW Voltage level Z = High impedance X = Immaterial Q0 = Previous Q0 before HIGH to LOW transition of latch enable
BA5983FM-X (IC201) : 4CH Driver
1.Block diagram
28 Vcc 10k 10k 20k Level Shift 10k 10k 10k 10k 10k STAND BY CH1/2/3 Vcc
10k
27
26
25
24
23
22
30
21
20
19 Vcc
18
10k
17
10k
16
10k
15
10k
STAND BY CH4 20k
10k
10k 10k
10k
Level Shift
Level Shift Level Shift 10k 10k
10k 10k
10k
10k
1
2
3
4
5
6
7
29
8
9
10
11
12
13
14
2.Pin function
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Symbol BIAS IN OPIN1(+) OPIN1(-) OPOUT1 OPIN2(+) OPIN2(-) OPOUT2 GND STBY1 PowVcc1 VO2(-) VO2(+) VO1(-) VO1(+) VO4(+) I/O I I I O I I O I O O O O O Description Input for Bias-amplifier Non inverting input for CH1 OP-AMP Inverting input for CH1 OP-AMP Output for CH1 OP-AMP Non inverting input for CH2 OP-AMP Inverting input for CH2 OP-AMP Output for CH2 OP-AMP Substrate ground Input for CH1/2/3 stand by control Vcc for CH1/2 power block Inverted output of CH2 Non inverted output of CH2 Inverted output of CH1 Non inverted output of CH1 Non inverted output of CH4 Pin No. 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol VO4(-) VO3(+) VO3(-) PowVcc2 STBY2 GND OPOUT3 OPIN3(-) OPIN3(+) OPOUT4 OPIN4(-) OPIN4(+) PreVcc I/O O O O I O I I O I I Description Inverted output of CH4 Non inverted output of CH3 Inverted output of CH3 Vcc for CH3/4 power block Input for Ch4 stand by control Substrate ground Output for CH3 OP-AMP Inverting input for CH3 OP-AMP Non inverting input for CH3 OP-AMP Output for CH4 OP-AMP Inverting input for CH4 OP-AMP Non inverting input for CH4 OP-AMP Vcc for pre block Connect to ground Connect to ground
1-25
XV-S500BK/XV-S502SL
AN8703FH-V (IC101) : Frontend processor
1.Pin layout 64 1 16 17 32 49 48 33
2.Pin function
Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
I/O I LPC1 O LPC01 I LPC2 O LPC02 VFOSHORT I I TBAL I FBAL O POFLT I DTRD IDGT STANDBY SEN SCK STDI RSCL JLINE TEN TEOUT AGCBAL ASOUT FEN FEOUT AGCOFST MON AGCLVL GND2 VREF2 VCC2 VHALF DFLTON DFLTOP DCFLT GND3 I I I I I I I I O I O I O I O O O O O I -
Symbol
Description
Laser input terminal (DVD) Laser drive signal output terminal (DVD) Laser input terminal (CD) Laser drive signal output terminal (CD) VFOSHORT control terminal Tracking balance control terminal Focus balance control terminal Track detection threshold level terminal Data slice part data read signal input terminal (For RAM) Data slice part address part gate signal input terminal( For RAM) Standby mode control terminal SEN(Serial data input terminal) SCK(Serial data input terminal) STDI(Serial data input terminal) Standard electric current terminal Electric current setting terminal of JLine
Reversing input terminal of tracking error output AMP.
Pin No.
Symbol RFDIFO RFOUT VCC3 RFC DCRF OFTR BDO RFENV BOTTOM PEAK AGCG AGCO TESTSG RFINP RFINN VIN5 VIN6 VIN7 VIN8 VIN9 VIN10 VCC1 VREF1 VIN1 VIN2 VIN3 VIN4 GND1 VIN11 VIN12 HDTYPE
Tracking error signal output terminal Offset adjusting terminal 1 Full adder signal output terminal Focus error output amplifier reversing input terminal Focus error signal output terminal Offset adjusting terminal 2 Non connect Output amplitude adjustment for DRC Connect to GND VREF2 voltage output terminal Power supply terminal 5V VHALF voltage output terminal Reversing output terminal of filter AMP. Filter AMP. output terminal Capacity connection terminal for filter output Connect to GND
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
I/O O O O O O O O O O I I I I I I I O I I I I I I O
Description
Non connect Connect to TP103 Power supply terminal 3.3V Filter for RF delay correction AMP. All addition amplifier capacitor terminal OFTR output terminal BDO output terminal RF envelope output terminal Bottom envelope detection filter terminal Peak envelope detection filter terminal AGC amplifier gain control terminal AGC amplifier level control terminal TEST signal input terminal RF signal positive input terminal RF signal negative input terminal Internal four-partition (CD) RF input 1 Internal four-partition (CD) RF input 2 Internal four-partition (CD) RF input 3 Internal four-partition (CD) RF input 4 External two-partition (DVD) RF input 2 External two-partition (DVD) RF input 1 Power supply terminal 5V VREF1 voltage output terminal Internal four-partition (DVD) RF input 1 Internal four-partition (DVD) RF input 2 Internal four-partition (DVD) RF input 3 Internal four-partition (DVD) RF input 4 Connect to GND 3 beam sub input terminal 2 (CD) 3 beam sub input terminal 1 (CD) HD Type selection
1-26
XV-S500BK/XV-S502SL BA6664FM-X (IC251) : 3Phase Motor Driver
1.Pin layout
NC A3 NC A2 NC NC A1 1 2 3 4 5 6 7 28 27 26 25 24 23 22 RNF VM GSW Vcc FG PS EC
29
30
GND H1+ H1H2+ H2H3+ H3-
8 9 10 11 12 13 14
21 20 19 18 17 16 15
ECR FR FG2 SB CNF BR VH-
2.Block diagram
RNF
28
DRIVER
A3
27
TSD GAIN SWITCH
VM GSW
2
A2
26 25
VCC
GAIN CONTROL
4
A1
VCC + -
CURRENT SENSE AMP
7
GND
TL
HALL AMP
24
PS
TOROUE SENSE AMP
FG PS EC
23
+ -
8
H1+
+ -
22 21
VCC ECR
9
H1-
+ + + + + R D Q CK Q VCC
10
H2+
20
FR
11
H2-
19
SHORT BRAKE
FG2 SB
12
H3+
18 17
CNF
13
H3-
BRAKE MODE Hall Bias
16 15
BR VH
14
1-27
XV-S500BK/XV-S502SL
3.Pin function
Pin No. BA6664FM-X
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Symbol NC A3 NC A2 NC NC A1 GND H1+ H1H2+ H2H3+ H3VH BR CNF SB FG2 FR ECR EC PS FG VCC GSW VM RNF
I/O O O O I I I I I I I I I I O O O O -
Description Non connect Output 3 for spindle motor Non connect Output 2 for spindle motor Non connect Non connect Output 1 for spindle motor Connect to ground Positive input for hall input AMP 1 Negative input for hall input AMP 2 Positive input for hall input AMP 2 Negative input for hall input AMP 2 Positive input for hall input AMP 3 Negative input for hall input AMP 3 Hall bias terminal Non connect Capacitor connection pin for phase compensation Short brake terminal Non connect Non connect Torque control standard voltage input terminal Torque control voltage input terminal Start/stop switch (power save terminal) FG signal output terminal Power supply for signal division Gain switch Power supply for driver division Resistance connection pin for output current sense Connect to ground Connect to ground
1-28
XV-S500BK/XV-S502SL K4S643232E-TC60(IC505):DRAM
1.Block diagram I/O control LWE LDQM
Data input register Bank select Row buffer refresh counter 512K x 32 512K x 32 512K x 32 512K x 32 Row decoder Sense AMP
Output buffer
Address register LRAS CLK
DQI
CLK ADD
Column decoder Latency & burst length Programming register
LCBR
LRAS
Col. buffer
LCKE LCBR LWE
LCAS Timing register
LWCBR
LDQM
CKE
CS
RAS
CAS
WE
DQM
2.Pin function Symbol
CLK CS CKE A0~A10 BA0,1 RAS CAS WE
Description
System clock signal input Chip select input Clock enable Address Bank select address Row address strobe Column address strobe Write enable
Symbol
DQM0~3 DQ0~31 VDD VSS VDDQ VSSQ NC
Description
Data input/output mask Data input/output Power supply terminal Connect to ground Power supply terminal Connect to ground Non connect
1-29
XV-S500BK/XV-S502SL MM1568AJ-X (IC801) : Video driver
1.Pin layout and block diagram
Vcc1 CIN MUTE1 VIN YC MIX YIN BIAS GND1 NC 1
BIAS 150kohm
34 Vcc2
2 3
sync tip clamp
4dB
LPF 6.75MHz
2dB
75ohm Driver
33 COUT 32 GND2
4 5
sync tip clamp
4dB
LPF 6.75MHz
2dB
75ohm Driver
31 VOUT 30 VSAG
6 7 8 9 BIAS
4dB
LPF 6.75MHz 2dB
75ohm Driver
29 GND2 28 YOUT 27 YSAG 26 GND2
GND1 10 NC 11
2dB
75ohm Driver
25 CYOUT 24 CYSAG
13.5MHz
CYIN 12
sync tip clamp
4dB
Bias 150kohm
LPF 2dB LPF 13.5MHz
75ohm Driver
23 GND2 22 CbOUT 21 CbSAG 20 GND2
CLP 13 CbIN 14
Bias 150kohm
4dB
MUTE2 15 CrIN 16
Bias 150kohm
4dB
LPF 13.5MHz
2dB
75ohm Driver
19 CrOUT 18 CrSAG
GND2 17
2.Pin function
Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1-30
Symbol VCC1 CIN MUTE1 VIN YCMIX YIN BIAS GND1 TRAP GND1 NC SYIN CLIP CBIN MUTE2 CRIN GND2
Function Power supply terminal Chrominance input terminal Using of MUTE and power saving Video input (composite) Y/C Mix select Video input (Y) Bias terminal Connect to ground Non connect Connect to ground Non connect Luminance input Input clamp select Component input Using of MUTE and power saving Component input Connect to ground
Pin No.
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
Symbol CROUTa CROUTb GND2 CBOUTa CBOUTb GND2 CYOUTa CYOUTb GND2 YOUTa YOUTb GND2 VOUTa VOUTb GND2 COUT VCC2
Function Signal output SAG Correction Connect to ground Signal output SAG Correction Connect to ground Signal output SAG Correction Connect to ground Signal output SAG Correction Connect to ground Signal output SAG Correction Connect to ground Chrominance output Power supply terminal
XV-S500BK/XV-S502SL MN101C35DLE (IC2) : System controller
1.Pin layout 100 1 76 75
25 26 2.Pin function (1/2)
Pin No. 1 2 3~7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
51 50
Symbol
RS232COUT RS232CIN NC VDD OSC2 OSC1 VSS XI XO MMOD VREFPOWERSW NC NC PROINT KEY1 KEY2 RGB NTB VREF+ S500/SA600 RESET AVCO AVCI POWERON TCLOSE TOPEN LMMUTE SWOPEN SWUPDN REMO NC CS NC TXD RXD SCK INT NC RESET DISCSET DISCSTP
I/O
O I I I I I I I I I I O I O O O O I I I I O I I O O O I
Description
Unused Unused Unused Power supply terminal (+5V) Clock output terminal Clock input terminal Connect to ground Connect to ground Non connect Connect to ground Connect to ground Power switch input terminal Non connect Destination switch (Ver.E and other version are judged. ) SCAN mode switch detection input from S802 Operation switch detection input (S2,S3,S7) Operation switch detection input (S4~S6) RGB switch detection input from S801 NTB switch detection input from S801 Power supply terminal (+5V) Model switch detect (S500 or SA600 is distinguished. ) Reset input terminal AV Compulink output terminal AV Compulink input terminal Power ON signal output Tray close instruction output terminal Tray open instruction output terminal LMMUTE signal output Tray open switch detection signal input terminal Elevator UP/DOWN switch detection signal input terminal Remote controller signal input terminal Non connect Serial communications interrupt input Non connect Serial communications data output Serial communications data input Serial communications clock input Serial communications interrupt output Non connect LSI reset signal output Mechanism state signal output Mechanism state signal input
1-31
XV-S500BK/XV-S502SL
2.Pin function (MN101C35DLE 2/2)
Pin No. 47 48 49 50 51 52~64 65~88 89~91 92 93 94~99 100
Symbol
P67 P66 P65 P64 P63 P62~P70 P87~PB3 NC INT/PRG MUTE NC VPP
I/O
O O O O O O O -
Description
Standby LED control signal output (RED) Standby LED control signal output (GREEN) Progressive LED control signal output (RED) Progressive LED control signal output (GREEN) Unused FL Grid control signal output FL Segment control signal output Non connect Unused Audio muting control signal output Non connect Power supply terminal for FL display
MM1565AF-X (IC951) : 500mA Regulator
1.Block diagram Vin Bias Cont
Thermal shutdown Current limiter
Vo
Driver
Reference
GND Cn 2.Pin function Pin No. 1 2 3 4 5 6 7 Symbol Vout NC GND Cn Cout Sub Vin Function Output terminal Non connect Connect to ground Noise decrease terminal Control terminal Substrate (Connect to ground) Input terminal
1-32
XV-S500BK/XV-S502SL
MN102L62GLF1 (IC401) : Unit CPU
Pin function
Pin No.
Symbol
WAIT RE SPMUTE WEN LMMUTE CS1 CS2 HDTYPE DRVMUTE SBRK LSIRST WORD A0 A1 A2 A3 VDD SYSCLK VSS XI XO VDD OSCI OSCO MODE A4 A5 A6 A7 A8 A9 A10 A11 VDD A12 A13 A14 A15 A16 A17 A18 A19 VSS A20 DISCSTP HUGUP TCLOSE WOBBLEF1L HFMON TRVSW
I/O
I O O O O O O O O I O O O O I O I O O O O O O O O O O O O O O O O O I
Function
Micon wait signal input Read enable Spindle muting output to IC251 Write enable Non connect Chip select for SODC Non connect HD Type selection Driver mute Short brake terminal LSI reset Bus selection input Address bus 0 for CPU Address bus 1 for CPU Address bus 2 for CPU Address bus 3 for CPU Power supply Non connect Ground Not use (Connect to vss) Non connect Power supply Clock signal input(13.5MHz) Clock signal output(13.5MHz) CPU Mode selection input Address bus 4 for CPU Address bus 5 for CPU Address bus 6 for CPU Address bus 7 for CPU Address bus 8 for CPU Address bus 9 for CPU Address bus 10 for CPU Address bus 11 for CPU Power supply Address bus 12 for CPU Address bus 13 for CPU Address bus 14 for CPU Address bus 15 for CPU Address bus 16 for CPU Address bus 17 for CPU Non connect Non connect Ground Non connect Mechanism state signal output Connect to pick-up Non connect HFM Control output to Q103 Detection switch of traverse inside
Pin No.
Symbol
SWUPDN MECHA_H/V DISCSET VDD FEPEN SLEEP BUSY REQ VSS EPCS EPSK EPDI EPDO VDD SCLKO S2UDT U2SDT CPSCK P74/SBI1 SDOUT NMI ADSCIRQ ODCIRQ DECIRQ CSSIRQ ODCIRQ2 ADSEP RST VDD TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 TEST8 VSS D0 D1 D2 D3 D4 D5 D6 D7
I/O
I O O O O O I O O I O O I O I I I I I I I I I I I I I I I I I I I/O I/O I/O I/O I/O I/O I/O I/O
Function
Non connect Connect to ground Mechanism state signal input Power supply Serial enable signal for FEP Standby signal for FEP Non connect Communication request Connect to TP405 Non connect Ground EEPROM chip select EEPROM clock EEPROM data input EEPROM data output Power supply Communication clock Communication input data Communication output data Clock for ADSC serial Not use (Pull down) ADSC serial data output Not use (Pull up) Not use (Pull up) NMI Terminal Interrupt input of ADSC Interrupt input of ODC Interrupt input of ZIVA Not use (Pull down) Interruption of system control Address data selection input Reset input Power supply Test signal 1 input Test signal 2 input Test signal 3 input Test signal 4 input Test signal 5 input Test signal 6 input Test signal 7 input Test signal 8 input Ground Data bus 0 of CPU Data bus 1 of CPU Data bus 2 of CPU Data bus 3 of CPU Data bus 4 of CPU Data bus 5 of CPU Data bus 6 of CPU Data bus 7 of CPU
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
1-33
XV-S500BK/XV-S502SL
MN103S26EGA (IC301) : Super optical disc controller
1.Terminal layout 176 1 133 132
44 45 88
89
2.Block diagram
Analog
DVD-ROM Formatter
CD-PRE
DMA I/F
ECC
Host I/F MPEG I/F
High speed IO bus
ATAPI
Servo I/O (core 1 I/O)
CGEN
Instruction memory (40KB)
DMA
32 bit CPU core
Servo core (core 2) RAM
BCU DRAMC
MODE
Data memory (6KB)
General purpose IO bus
2Mbit DRAM
CIRC
WDT
16 bit timer x 2
SYSTEM I/F
INTC
3.Pin function (1/4)
Pin No. 1,2 3 4 5 6 7 8 9~17 18 19 20 21 22~30 31 32 33 34 35
Symbol
NINT0,1 VDD3 VSS NINT2 WAITDOC NMPST DASPST CPUADR17~9 VDD18 VSS DRAMVDD18 DRAMVSS CPUADR8~0 VDD3 VSS DRAMVDD3 NCS NWR
I/O
O O O O I I I I I
Description
Interruption of system control 0,1 Power supply terminal for I/O(3.3V) Connect to ground Interruption of system control 2 Wait control of system control Reset of system control (Non connect) Setting of initial value of DASP signal System control address Power supply terminal for I/O (1.8V) Connect to ground Power supply terminal for DRAM (1.8V) Connect to ground for DRAM System control address Power supply terminal for I/O (3.3V) Connect to ground Power supply terminal for DRAM (3.3V) System control chip select Writing system control
1-34
XV-S500BK/XV-S502SL
3.Pin function (MN103S26EGA : 2/4)
Pin No. 36 37~44 45 46 47 48 49 50 51 52 53~56 57 58 59 60 61~64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
Symbol
NRD CPUDT7~0 CLKOUT1 MMOD NRST MSTPOL SCLOCK SDATA OFTR BDO PWM1~4 VDD3 DRAMVDD18 DRAMVSS VSS PWM5~8 TBAL FBAL TRSDRV SPDRV FG TILTP TILT TILTN TX DTRD IDGT VDD18 VSS VDD3 OSCI1 OSCO1 VSS TSTSG VFOSHORT JLINE AVSSD ROUT LOUT AVDD VCOF TRCRS CMPIN LPFOUT LPFIN AVSS HPFOUT FPFIN CSLFLT RFDIF AVDDC PLFLT2
I/O
I I/O I I I I I O O O O I O I O O O O I I I I I I
Description
Read signal input from system controller System control data Non connect Test mode switch signal System reset Master terminal polarity switch input Non connect Non connect Off track signal input Drop out signal input Non connect Power supply terminal for I/O (3.3V) Power supply terminal for DRAM (1.8V) Connect to ground for DRAM Connect to ground Non connect Tracking balance adjustment output Focus balance adjustment output Traverse drive output Spindle drive output Motor FG input Non connect Non connect Non connect Digital output signal (Non connect) Non connect Non connect Power supply terminal for I/O (1.8V) Connect to ground Power supply terminal for I/O (3.3V) Oscillation input 16.9MHz Oscillation output 16.9MHz Connect to ground Calibration signal VFO short output J-line setting output Connect to ground for analog circuit Non connect Non connect Power supply terminal for analog circuit (3.3V) JFVCO control voltage Input signal for track cross formation Non connect Non connect Pull-up to VHALF Connect to ground for analog circuit Non connect HPF input Pull-up to VHALF Non connect Power supply terminal for analog circuit (3.3V) Connect to capacitor 2 for PLL
1-35
XV-S500BK/XV-S502SL
3.Pin function (MN103S26EGA : 3/4)
Pin No. 101 102 103 104 105 106 107,108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136,137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154
Symbol
PLFLT1 AVSS RVI VREFH PLPG VHALF DSLF2,1 AVDD NARF ARF JITOUT AVSS DAC0 DAC1 AVDD AD0 AD1 AD2 AD3 AD4 AD5 AD6 TECAPA VDD3 VSS MONI0 MONI1 MONI2 MONI3 NEJECT NTRYCTL NDASP NCS3FX NCS1FX DA2,0 NPDIAG DA1 NIOCS16 INTRQ NDMACK VDD3 VSS IORDY NIORD NIOWR DMARQ HDD15 HDD0 HDD14 VDD18 PO UATASEL
I/O
I I I I I I I O O O I I I I I I I I/O I/O I/O I I I/O I/O I/O O I I/O I/O I/O I/O I I
Description
Connect to capacitor 1 for PLL Connect to ground for analog circuit Connect to resistor for VREF reference current source Reference voltage input (2.2V) Non connect Reference voltage input (1.65V) Connect to capacitor 2,1 for DSL Power supply terminal for analog circuit (3.3V) Equivalence RFEquivalence RF+ Output for jitter signal monitor Connect to ground for analog circuit Tracking drive output Focus drive output Power supply terminal for analog circuit (3.3V) Focus error input Phase difference/3 beams tracking error AS : Full adder signal RF envelope input DVD laser current control terminal CD laser current control terminal Non connect Power supply terminal for I/O (3.3V) Connect to ground Connect to TP306 Connect to TP307 Connect to TP308 Connect to TP309 Eject detection Tray close detection ATAPI drive active / slave connect I/O ATAPI host chip select ATAPI host chip select ATAPI host address 2,0 ATAPI slave master diagnosis input ATAPI host address 1 Non connect ATAPI host interruption output ATAPI host DMA characteristic Power supply terminal I/O (3.3V) Connect to ground NOn connect ATAPI host read Non connect Non connect ATAPI host data 15 ATAPI host data 0 ATAPI host data 14 Power supply terminal for I/O (1.8V) Connect to ground Connect to ground
1-36
XV-S500BK/XV-S502SL
3.Pin function (MN103S26EGA : 4/4)
Pin No. 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171~173 174 175 176
Symbol
VSS VDD3 HDD1 HDD13 HDD2 HDD12 HDD3 VDD3 VSS HDD11 HDD4 HDD10 HDD5 HDD9 VDD3 VSS HDD6~8 VDDH NRESET MASTER
I/O
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I
Description
Connect to ground Power supply terminal for I/O (3.3V) ATAPI host data 1 ATAPI host data 13 ATAPI host data 2 ATAPI host data 12 ATAPI host data 3 Power supply terminal for I/O (3.3V) Connect to ground ATAPI host data 11 ATAPI host data 4 ATAPI host data 10 ATAPI host data 5 ATAPI host data 9 Power supply terminal for I/O (3.3V) Connect to ground ATAPI host data 6~8 Reference power supply for ATAPI (5.0V) ATAPI host reset input ATAPI master / slave select
1-37
XV-S500BK/XV-S502SL
MN35505-X (IC703) : DAC
1.Terminal layout
M5 DIN LRCK BCK M3 DVDD2 CKO DVSS2 M2 M1 OUT1C AVDD1 OUT1D AVSS1
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
M6 M4 M8 M7 DVDD1 VCOF XIN XOUT DVSS1 M9 OUT2C AVDD2 OUT2D AVSS2
2. Pin function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol M5 DIN LRCK BCK M3 DVDD2 CKO DVSS2 M2 M1 OUT1C AVDD1 OUT1D AVSS1 AVSS2 OUT2D AVDD2 OUT2C M9 DVSS1 XOUT XIN VCOF DVDD1 M7 M8 M4 M6 I/O I I I I I I I O O O O I I I I Description Control signal for DAC Digital data input L and R clock for DAC Bit clock for DAC Control signal for DAC Power supply terminal Non connect Connect to ground Control signal for DAC Control signal for DAC Analog output 1 Power supply terminal Analog output 1 Connect to ground Connect to ground Analog output 2 Power supply terminal Analog output 2 Control signal for DAC Connect to ground Non connect Non connect VCO Frequency Power supply D+5V Connect to ground Connect to ground Control signal for DAC Clock for control signal
1-38
XV-S500BK/XV-S502SL
NDV8601VWA-BB(IC501):AV Decoder
1.Pin layout 240 1 181 180
60 61
121 120 digital audio audio DAC Video I/O port
2.Block diagram
digital audio
Audio output processor
Audio DSP
MPEG Video decoder
Video output processor
NTSC PAL SCART encoder
Video
serial peripherals
Serial port controller
XBUS controller
XBUS
DVD data
DVD,A/V port + CSS
Demux engine
SDRAM controller
RISC uProcessor + cache
SDRAM 3.Pin function (1/4)
Pin No.
1 2,3 4 5 6 7~9 10 11 12,13 14 15,16 17 18 19 20,21 22 23 24 25,26 27 28 29
Symbol VDDio MD10,11 VDD MD12 VSSio MD13~15 VDDio DQM1 MA9,8 VSSio MA7,6 VSS MA5 VDDio MA4,3 MCLK VSSio CKE MA2,1 VDDio MA0 MA10
I/O I/O I/O I/O O O O O O O O O O O
Description Power supply terminal 3.3V SDRAM Data bus terminal Power supply terminal 1.8V SDRAM Data bus terminal Connect to ground SDRAM Data bus terminal Power supply terminal 3.3V SDRAM Data byte enable SDRAM Address bus terminal Connect to ground SDRAM Address bus terminal Connect to ground SDRAM Address bus terminal Power supply terminal 3.3V SDRAM Address bus terminal SDRAM Clock output Connect to ground SDRAM Clock enable output SDRAM Address bus terminal Power supply terminal 3.3V SDRAM Address bus terminal SDRAM Address bus terminal
1-39
XV-S500BK/XV-S502SL
3.Pin function (NDV8601VWA-BB 2/4)
Pin No.
30 31 32,33 34 35 36 37 38 39 40 41 42 43 44 45,46 47 48 49 50~52 53 54~56 57 58~61 62 63,64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
1-40
Symbol MA11 VSSio MA12,13 VDD CS0 VDDio RAS CAS WE VSSio DQM0 DQM2 MD16 VDDio MD17,18 VSS MD19 VSSio MD20~22 VDDio MD23~25 VSSio MD26~29 VDDio MD30,31 DQM3 CS1 VSSD SPDIF VSSio AIN AOUT3 AOUT2 AOUT1 AOUT0 VDDio PCMCLK VDD ACLK LRCLK SRST RSTP VSSio RXD1 SSPIN1 VSS SSPOUT1 SSPCLK1 SSPCLK0 VDD SSPIN0
I/O O O O O O O O I/O I/O I/O I/O I/O I/O I/O O O O I O O O O O O O O I I I/O I/O I/O I/O I/O
Description Non connect Connect to ground SDRAM Address bus, reserved for terminal compatibility with 64Mb SDRAM Power supply terminal 1.8V SDRAM Primary bank chip select Power supply terminal 3.3V SDRAM Command bit SDRAM Command bit SDRAM Command bit Connect to ground SDRAM Data byte enable SDRAM Data byte enable SDRAM Data bus terminal Power supply terminal 3.3V SDRAM Data bus terminal Connect to ground SDRAM Data bus terminal Connect to ground SDRAM Data bus terminal Power supply terminal 3.3V SDRAM Data bus terminal Connect to ground SDRAM Data bus terminal Power supply terminal 3.3V SDRAM Data bus terminal SDRAM Data byte enable SDRAM Extension bank chip select Connect to ground S/PDIF Digital audio output terminal Connect to ground Digital audio input for digital micro; can be used as GPIO Serial audio output data to audio DAC for left and right channels for down-mix Serial audio output data to audio DAC for surround left and right channels Serial audio output data to audio DAC for center and LFE channels Serial audio output data to audio DAC for left and right channels Power supply terminal 3.3V Audio DAC PCM sampling clock frequency, common clock for DACs and ADC Power supply terminal 1.8V Audio interface serial data clock, common clock for DACs and AD converter Left / right channel clock, common clock for DACs and ADC Active low RESET signal for peripheral reset RESET_Power : from system, used to reset frequency synthesizer and rest of chip Connect to ground UART1 Serial data input from external serial device, used for IR receiver SSP1 Data in or 16X clock for USART function in UART1 Connect to ground SSP1 Data out or UART1 data-terminal-ready signal SSP1 Clock or UART1 clear-to -send signal SSP0 Clock or request-to-send function in UART1 Power supply terminal 1.8V SSP0 Data in or 16X clock for USART function in UART0
XV-S500BK/XV-S502SL
3.Pin function (NDV8601VWA-BB 3/4)
Pin No.
91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126~131 132 133,134 135 136~139 140 141~144 145 146 147 148~153 154 155 156 157,158 159
Symbol VDDio SSPOUT0 TXD0 RXD0 CTS0 RTS0 VSSio CXI CXO OSCVSS OSCVDD MVCKVDD SCEN MVCKVSS ACLKVSS SCMD ACLKVDD VDDDAK VSSDAC Cr/R IOM C/Cb/B VAA3 Y/G VSSA VREF VAA CVBS/C RSET COMP VSS VCLK VSYNC HSYNC VDDio VI07~02 VSSio VI01,00 VDD AD31~28 VDDio AD27~24 PWE3 AD23 VSSio AD22~17 VDDio AD16 PWE2 AD15,14 VDD
I/O I/O I/O I I/O I/O I O I I O O O O O O O I/O I/O I/O I/O I/O I/O I/O I/O -
Description Power supply terminal 3.3V SSP0 Data out or UAR