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BLOCK DIAGRAM - SCHEMA SYNOPTIQUE - BLOCKSCHALTBILD - SCHEMA A BLOCCHI - ESQUEMA DE BLOQUES
CVBSOUT_AV2_CTRL
CVBSOUT_AV1_CTRL
TEA6415C
FE6233
MA_Tuner MA_Tuner_CVBS
'L'=YC 'H'=CVBS
MA_TUNER_CVBS AV1_Y_OUT
Y
I2 C
0xC2H
MM 1507 Mux/Drv
cv
+
MM1511
CHR
AV1_CHR_OUT
Master_Mute AUDIO_STBY RESET_AUDIO CVBSOUT_AV1_CTRL CVBSOUT_AV2_CTRL
IR
TV KB
CVBS_OUT 19
AV1_CVBS_OUT AV1_CVBS/Y_IN AV1_CHR_IN
Scart 1
FULL SCART
'L'=YC 'H'=CVBS
MUX
Y
AV2_Y_OUT CHR
RGB+FB Scart1
Flat Panel Display
Video Decoder SAA7117A
32.11 MHz
MM 1507 Mux/Drv
19 CVBS_OUT
cv
+
MM1511
AV2_CHR_OUT
I2 C
0x40/ 0x48H 5 channel LVDS signal LVDS OUT
AV1_CVBS/YC Scart1
AV2_CVBS_OUT AV2_CVBS/Y_IN AV2_CHR_IN
Scart 2
HALF SCART
AV2_CVBS/YC Scart2
MUX
FAV_CVBS/YC FAV
FAV_CVBS/Y_IN
CVBS SVHS
FAV_CHR_IN FRONT CINCH
MA_Tuner_CVBS
H-port 8 bits I-port 8 bits H+V+Clock
16-bits YCbCr/ 24-bits RGB H+V+Clock
CH0
RGB+FB Scart1, AV1_CVBS/YC Scart1 AV2_CVBS/YC Scart2 FAV_CVBS/YC FAV
I2 C
0x06H
I2 C INTERBOARD CONNECTION
VGA_Right_Audio, VGA_Left_Audio Comp_Right_Audio, Comp_Left_Audio Card Reader_Right_Audio, Card Reader_Left_Audio Master_Mute AUDIO_STBY RESET_AUDIO YPbPr_VGA_SEL VGA_Right_Audio VGA_Left_Audio Comp_Right_Audio Comp_Left_Audio COMP_YPbPr
0x98/ 0x99H
ADC MST9883C
CH1
LCD/Plasma TV Controller PW118B
14.318 MHz
Audio Block Diagram
LINE_O/P_L LINE_O/P_R
64kbit EEPROM
16bits data 21bits address 32bits data 12bits address
I2 C 0x80, 82, 9AH
FSAV330 Mux
VGA_TX, VGA_RX
I2 C
0xA0
VGA_RGB
RS232 DRV
DDR Frame Buffer 4M x 32 Bits x 4 banks
Comp IN
Audio Cinch Output
VGA
I2 C
Audio Jack
2kbit EEPROM 0xA0H
Flash Memory 32Mbit M29W320EB70N6
MT46V16M16-6T 256Mbit (166MHz)
MT46V16M16-6T 256Mbit (166MHz)
EFC031E I/O Concept
EFC031-IFC130-IFC230 First issue 12/05