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INDEX CPU (SOCKET 7) CLOCK GENERATOR MTXC HOST INTERFACE MTXC SYSTEM INTERFACE CACHE 1 CACHE 2 DIMM 1 DIMM 2 SYSTEM BIOS, TSOP PIIX4 1 PIIX4 2 IDE INTERFACE ULTRA IO CONTROLLER PARALLEL PORT KB, FLOPPY, & COM PORTS USB PORT INTERFACE FAN & FRONT PANEL CONNECTORS POWER SUPPLY PCI SLOTS #1 & #2 PCI SLOTS #3 & #4 ISA SLOT #1 ISA SLOT #2 ISA SLOT #3 PULL-UP RESISTORS DECOUPLING CAPS CPU VOLTAGE REGULATORS APPENDIX: SYSTEM BIOS, DIP APPENDIX: COAST MODULE Intel Corporation
Title
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4 5 6 7 8 9 10 11 12
3
13 14 15 16 17 18 19 20 21
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22 23 24 25 26 27 28 29
1
TX DESKTOP INDEX
Size Date:
A B C
Document Number Thursday, December 19, 1996
D
Rev 2.1 Sheet 1 of
E
29
1
2
3
4
5
6
7
8
CPUVCORE
4,6 HD[63..0] AN17 AN15 AN13 AN11 AN9 AN19 AJ11 AG1 AA1 AC1 AE1 A11 A13 A15 A17 E15 B2 W1 G1 Q1 A7 U14 A9 N1 S1 U1 Y1 J1 L1
HA[31:3] 4,6
A
B
CPUVIO 8 RP20-1 1 4.7K 6 RP32-33 4.7K 8 RP35-11 4.7K 8 RP32-11 4.7K 7 RP32-22 4.7K 5 RP35-44 4.7K R53 330 R55 330
HA20M# HSMI# HIGNNE# HINTR HNMI HSTPCLK# HRESET HINIT
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
K34 G35 J35 G33 F36 F34 E35 E33 D34 C37 C35 B36 D32 B34 C33 A35 B32 C31 A33 D28 B30 C29 A31 D26 C27 C23 D24 C21 D22 C19 D20 C17 C15 D16 C13 D14 C11 D12 C9 D10 D8 A5 E9 B4 D6 C5 E7 C3 D4 E5 D2 F4 E3 G5 E1 G3 H4 J3 J5 K4 L5 L3 M4 N3
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
P54C/P55
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 ADSC#
AL35 AM34 AK32 AN33 AL33 AM32 AK30 AN31 AL31 AL29 AK28 AL27 AK26 AL25 AK24 AL23 AK22 AL21 AF34 AH36 AE33 AG35 AJ35 AH34 AG33 AK36 AK34 AM36 AJ33 AM2 AL9 AK10 AL11 AK12 AL13 AK14 AL15 AK16 Q5 AJ1 AL5 AK6 AF4
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
HADSC# 6
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE VCORE
5V_SUPPLY:
3 RP43-36 4.7K 1 RP43-1 8 4.7K 3 RP38-36 4.7K 1 RP38-18 4.7K 4 RP43-4 5 4.7K 2 RP43-27 4.7K 4 RP38-4 5 4.7K 2 RP38-2 7 4.7K
VCORE
VCORE
SOCKET 7
VCORE
AN1,AN3 A19,A21,A23,A25,A27,A29,AA37,AC37 AE37,AG37,AJ19,AJ29,AN21,AN23,AN25 AN27,AN29,E21,E27,E37,G37,J37,L33 L37,N37,Q37,S37,T34,U33,U37,W37,Y37
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE
VCORE VCORE VCORE VCORE VCORE
VCORE
A
BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7# FERR# BREQ HITM# HIT# PCHK# HLDA AP LOCK# APCHK# PRDY PCD PWT CACHE# ADS# D/C# W/R# M/IO SCYC FRCMC# IERR# SMIACT# PM0/BP0 PM1/BP1 BP2 BP3 TCK TDO TDI TMS TRST# PICCLK PICD0 PICD1 PHITM# PHIT# PBGNT# PBREQ# BF0 BF1 U/O# CPUTYP UPVRM# VCC2DET
HBE#0
HBE#1 HBE#2 HBE#3 HBE#4 HBE#5 HBE#6 HBE#7 HBE#[7:0] 4,6 HFERR# 12 HHITM# 4 CPUVIO
B
AJ3 AK2 AH4 AE5 AC5 AG5 AL3 U3 AJ5 AK4 AM6 T4 AL17 Y35 P4 AG3 Q3 R4 S3 S5 M34 N33 N35 P34 Q33 H34 J33 L35 AC3 AA3 AD4 AE3 Y33 X34 AE35 Q35 AH32 AL1
HAP
8 RP21-1 1 4.7K
HLOCK# 4
HCACHE# 4 HADS# 4 HD/C# 4 HW/R# 4,6 HM/IO# 4
HFRCMC#
6 RP35-3 3 4.7K HSMIACT# 4
HDP0 HDP1 HDP2 HDP3 HDP4 HDP5 HDP6 HDP7
D36 D30 C25 D18 C7 F6 F2 N5 AK18
DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7 CLK BOFF# A20# INTR NMI IGNNE# KEN# FLUSH# AHOLD EADS# BRDY# RESET INV NA# BUSCHK# WB/WT# INIT SMI# R/S# PEN# STOPCLK# HOLD EWBE# BRDYC#
CPU_IO_VCC:
** THIS TABLE IS FOR JUMPER CONFIGURATION BELOW. BUS/CORE FREQUENCY RATIO 2/5 1/3 1/2 2/3
C
BF1 0 0 1
CPUVIO
BF0 0 1 0 1
C
3 HCLKCPU 4 HBOFF# 12 HA20M# 12 HINTR 12 HNMI 12 HIGNNE# 4 HKEN# 4 HAHOLD 4 HBRDY# 12 HRESET 4 HNA# 3 RP21-3 6 4.7K 12 HINIT HHOLD 12 HSMI# 2 RP35-2 7 4.7K HPEN# HBUSCHK# 2 RP20-2 7 HWB/WT# 4.7K 2 RP21-2 7 4.7K 4 HEADS# HFLUSH#
CPU_CORE_VCC:
A7,A9,A11,A13,A15,A17,AA1,AC1,AE1,AG1 AJ11,AN9,AN11,AN13,AN15,AN17,AN19,B2 E15,G1,J1,L1,N1,Q1,S1,U1,W1,Y1
R58 330 R61 330
12 HSTPCLK# HEWBE# R39 330
Z4 AK8 AD34 AC33 AA35 W5 AN7 V4 AM4 X4 AK20 U5 Y5 AL7 AA5 AA33 AB34 AC35 Z34 V34 AB4 W3 Y3
GND:
A3,AB2,AB36,AB4,AD2,AD36,AF2,AF36,AH2 AJ7,AJ9,AJ13,AJ17,AJ21,AJ25,AJ27,AJ31 AJ37,AL37,AM8,AM10,AM12,AM1 4,AM16,AM18 AM20,AM22,AM24,AM26,AM 28,AM30,AN37,B6 B8,B10,B12,B14,B16,B18,B20,B22,B24,B26 B28,E11,E13,E19,E23,E29,E31,H2,H36,K2 K36,M2,M36,P2,P36,R2,R36,T2,T36,U35,V2 V36,W3,X2,X36,Z2,Z36
1 HBF0 HBF1
JB1 2 4 6 VCC2DET 27 JB3
1 3 5
HBRDYC#
P55C_0
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for the misuse of this information.
Intel Corporation
Title
TX DESKTOP P54C/P55
Size Date: Document Number Thursday, December 19, 1996 Sheet
8
Rev 2.1 2 of 29
1
2
3
4
5
6
7
A
B
C
D
E
CLKVCC3A
C232 C242 0.1UF C225 0.1UF
4
C220 22UF
4
If IMISC652 is used: Install R163 Do Not Install R98
+3_3V L13 1 12 OSCPIIX4 R98 33 14 OSCUIO R100 33 OSCIOR FBS01L 2 CLKVCC3A
C217 0.1UF C226 0.1UF C231 C223 0.1UF 0.1UF
C227 0.1UF C216 + 0.1UF 47UF
40 46 VDDQ2 VDDQ2
34 28 21 15 7 25 48 HCLKCPUR 2 R105 33 1 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDD VDD HCLKMTXC 5
22,23,24 OSC
R102 33 R163 33
OSCR
OSCPIIX4R XTAL1 XTAL2
2 1 47 4 5 6 18 SMBDPU 8,9,12 SMBCLK 19 20 22 23 HCLKDIMM7R HCLKDIMM0R 26 27 45 44
REF0 REF1 CPU3_3 XTAL_IN XTAL_OUT MODE SEL_66/60 SDATA SDCLK 48/24_MHZ 48/24_MHZ
3
CPUCLK0 CPUCLK1 CPUCLK2 CPUCLK3 SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5
42 41 39 38 36 35 33 32 30 29 8 9 11 12 13 14 16
R108 HCLKSRAM1R HCLKDIMM5R HCLKDIMM1R HCLKDIMM2R HCLKDIMM3R HCLKDIMM4R HCLKDIMM6R PCLKPIIXR PCLK0R PCLK1R PCLK2R PCLK3R PCLKMTXCR R111 R131 R122 R121 R125 R129 R133 R101 R104 R109 R110 R120 R124 1 1 1 1 1
33 33 22 22 22 22 22 22 47 2 33 2 33 2 33 2 33 2 47
HCLKCPU 2 HCLKSRAM1 6
3
Y3 +3_3V C214 10pf J18 2 1 JMP_3P 14.318MHz C215 10pf R45 10K CLKSEL0
HCLKDIMM5 HCLKDIMM1 HCLKDIMM2 HCLKDIMM3 HCLKDIMM4 HCLKDIMM6
9 8 8 8 9 9
3
HCLK J18
66MHz 60MHz 1-2 2-3
PCICLK_F PCICLK0 PCICLK1 PCI_STP#/SDRAM7 PCICLK2 CPU_STP#/SDRAM6 PCICLK3 PCICLK4 IOAPIC0 PCICLK5 PWR_DWN# U18 IMISC671A
PCLKPIIX4 12 PCLK0 20 PCLK1 20 PCLK2 21 PCLK3 21 PCLKMTXC 5
HCLKDIMM0R
R114
22
HCLKDIMM0 8
R130 12 CLK48M 22
CLK48MR
R132
22
HCLKDIMM7 9
8,9,12 SMBDATA
2
2
R128 1 0
SMBDPU
2
NOTE:
Install w/ 671 Device Do not Install w/ 652 Device
1
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
A B
SYSTEM CLOCKS
C D
Intel Corporation
Title
TX DESKTOP SYSTEM CLOCKS
Size Document Number Sheet
E
Rev 2.1 3 of 29
Date: Thursday, December 19, 1996
A
B
C
D
E
HD[63..0]
4
HD[63..0] 2,6
2,6 HA[31..3]
HA[3..31]
4
U13A CPUVIO
R49
22K
HA26
CPUVIO 2-3 60 MHz J17 1
3
1-2 66 MHz
2 3 MTXCCLKSEL JMP_3P
R46 4.7K
HA27
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
V11 Y11 U8 T11 Y8 V8 V7 Y7 W7 U7 Y6 V6 W6 U6 Y5 W5 V5 U5 V9 U10 U9 W10 W9 V10 Y9 Y10 U11 W11 W8
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31
MTXC
PART 1 OF 2 HOST INTERFACE
2,6 HBE#[7..0]
HBE#[7..0]
HBE#0 HBE#1
HBE#2 HBE#3 HBE#4 HBE#5 HBE#6 HBE#7
K2 K3 K4 L1 L2 L3 L4 M1
BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7#
2 HADS# 2 HBRDY# 2 HNA# 2 HAHOLD 2 HEADS# 2 HBOFF# 2 HHITM# 2 HM/IO# 2 HLOCK# 2 HCACHE#
2
2 HKEN# 2 HSMIACT# 2,6 HW/R# 2 HD/C#
T5 M5 N5 L5 R5 P5 T8 H5 G5 J5 K5 T10 T9 T7
ADS# BRDY# NA# AHOLD EADS# BOFF# HITM# M/IO# HLOCK# CACHE# KEN#/INV SMIACT# W/R# D/C#
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
Y1 Y3 Y2 Y4 W1 W2 V1 R1 U1 W3 V3 W4 T1 V4 U3 V2 U4 T2 U2 R3 T4 R2 T3 P1 R4 P3 P2 N1 P4 N3 N2 N4 M3 M2 K1 M4 J2 J1 J4 H1 H2 G2 J3 G4 H4 G1 H3 F2 F1 G3 F4 F3 E1 E4 E2 D1 E3 D3 D2 C1 C2 C3 B1 A1
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
3
2
MTXC
1
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
A B C D
Intel Corporation
Title
TX DESKTOP MTXC MICRO CONTROLLER
Size Document Number Sheet
E
Rev 2.1 4 of 29
Date: Thursday, December 19, 1996
A
B
C
D
E
5VREF
+3_3V 8,9 MD[0..63] T13 F14 P15 E12 F15 R15 VCCP VCCP VCCP VCCP VCCP VCCP E14 N16 R16 P16 F5 L16 +3_3V +3_3V +3_3V C273 0.1uF
AD[31..0] 11,20,21
G6 R6 R7 F6
U13B
VCC_CPU VCC_CPU VCC_CPU VCC_CPU
VCC VCC
VCC5REF
VCCPSUS VCCPSUS
VCCSUS
4
3
2
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
H17 J16 J17 L17 H18 H19 L20 K19 F18 D20 C19 R20 B18 B16 B15 E13 H16 H20 G18 F20 M19 N19 M20 J20 E19 E17 D18 A19 C17 A17 D16 B14 G17 F17 K17 G16 G19 L18 L19 K18 F19 E18 C20 A20 D17 C16 D15 C14 F16 E16 G20 N20 J18 M17 K20 J19 E20 D19 B20 B19 A18 B17 C18 C15
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
MTXC
PART 2 OF 2 PCI,DRAM,CACHE
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 RAS#0 RAS#1 RAS#2 RAS#3 RAS#4 RAS#5 CAS#0 CAS#1 CAS#2 CAS#3 CAS#4 CAS#5 CAS#6 CAS#7 MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 CKE CKEB KRQAK SRASA# SCASA# SRASB# SCASB# CADV# CADS# CCS# COE# GWE# BWE# TWE# MWEA# MWEB#
A15 A14 B13 A13 C12 B12 A12 C11 A11 C10 B10 A10 C9 B9 A9 C8 C7 B7 A7 C6 B6 A6 C5 B5 D6 C4 B4 A4 B3 A3 B2 A2 Y20 P18 R17 N17 V19 M16 U18 W20 V20 T17 T19 U19 P17 T18 V15 V16 Y17 T14 U15 Y16 W18 Y18 W19 U17 U16 Y19 U20 W16 V17 N18 P19 P20 M18 W12 U12 W13 V12 V13 Y12 Y13 R18 V18 U14 Y14 V14 T12 W15 Y15 U13 W14 T20 K16 R19 E10 W17 T15
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
MRAS#0 MRAS#1 MRAS#2 MRAS#3 MRAS#R4 MRAS#R5 MCAS0#R MCAS1#R MCAS2#R
4
+3_3V D3 1 2 BAT54C 3 + C167 1uF R73 1K
+5V
5VREF
5VREF 12
MRAS#[3..0] 8,9
3
MRAS#R[5..4] 8,9 RP34 5 4 6 3 7 2 8 1 10 5 6 7 8 8 RP71-1 1 10 6 RP71-3 3 10 2 R113 1 10 7 RP69-22 10 RP69-3 6 3 10 6 RP72-3 3 10 RP29 4 3 2 1 10
MCAS#[7..0] 8,9
MCAS#5 MCAS#0 MCAS#2 MCAS#1
MCAS3#R MCAS4#R MCAS5#R MCAS6#R MCAS7#R
MAR0 MAR1 MAR2 MAR3 MAR4 MAR5 MAR6 MAR7 MAR8 MAR9 MAR10 MAR11 MABR0 MABR1
MCAS#6 MCAS#3 MCAS#4 MCAS#7 MAA0 MAA1 MA2 MA3 MA4 MA5 MA6
MA7 MA9 MA10 MA11
2
5 RP69-4 4 10 2 R107 1 10 7 RP71-2 2 10 5 RP71-4 4 10 5 RP72-4 4 10 8 RP69-11 10 7 RP72-22 10
MAA0 8 MAA1 8 MA[11..2] 8,9
MA8
8 RP72-11 10 1 R157 1 2 10 R156 2 10 CADV# 6
MAB0 9 MAB1 9 KRQAK 6 MSRASA# 8 MSCASA# 8 MSRASB# 9 MSCASB# 9
11,20,21 11,20,21 11,20,21 11,20,21 11,20,21,25 DEVSEL# 11,20,21,25 TRDY# 20,21,25 PLOCK#
C/BE0# C/BE1# C/BE2# C/BE3#
C/BE0# C/BE1# C/BE2# C/BE3#
B11 B8 A8 A5 E6 E9 E7 E8 E11 E5 D7 D9 D11 D13 D8 D10 D12 D14 D4 D5 A16 C13
C/BE#0 C/BE#1 C/BE#2 C/BE#3 FRAME# DEVSEL# IRDY# TRDY# STOP# LOCK# REQ#0 REQ#1 REQ#2 REQ#3 GNT#0 GNT#1 GNT#2 GNT#3 PHOLD# PHOLDA# PAR CLKRUN# GND: E15,J9,J10,J11,J12,K9,K10,K11,K12, L9,L10,L11,L12,M9,M10,M11,M12,T6,T16
MSRASA#R 1 R159 2 10 MSCASA#R MSRASB#R 1 R158 2 10 MSCASB#R
11,20,21,25 FRAME# 11,20,21,25 IRDY# 11,20,21,25 STOP# 11,20,25 11,20,25 11,21,25 11,21,25 20,25 20,25 21,25 21,25 PREQ0# PREQ1# PREQ2# PREQ3# PGNT0# PGNT1# PGNT2# PGNT3#
CADS# 6 CCS# 6 COE# 6 CGWE# 6 CBWE# 6 MWEA#R MWEB#R 1 R48 2 10 CTWE# 6 1 R47 2 10 MWEA# 8 MWEB# 9 CTAG[7..0] 6
+3_3V
R75 1K
11,25 PHOLD# 11,25 PHLDA# 11,20,21,25 PAR
11,20,21 CLKRUN#
1
TIO0 TIO1 TIO2 TIO3 TIO4 TIO5 TIO6 TIO7 SUSCLK HCLKIN SUS_STAT# PCLKIN TEST# RST#
CTAG0 CTAG1 CTAG2 CTAG3 CTAG4 CTAG5 CTAG6 CTAG7
SUSCLK 12 HCLKMTXC 3 SUSTAT1# 12 PCLKMTXC 3 PCIRST# 6,11,20,21 TESTIN# R65 10K +3_3V
1
MTXC
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
Intel Corporation
Title
TX DESKTOP MTXC MICRO CONTROLLER
Size Document Number Sheet
E
Rev 2.1 5 of 29
Date: Thursday, December 19, 1996
A B C D
1
2
3
4
5
6
7
8
NOTE: PIN 16, 38, 39, 42, 43 & 66 are no connects for PB SRAM
2,4 HD[63..0] 2,4 HA[31..3] 2,4 HBE#[7..0]
5 CCS#
A
5 COE# 5 CADV# 2 HADSC#
HA18
A
2 R112 0 1
5 CADS# 5 CBWE# 5 CGWE#
STUFF FOR 512K
U17 37 HA3 36 HA4 35 HA5 34 HA6 33 HA7 32 HA8 HA9 100 HA10 99 HA11 82 HA12 81 HA13 44 HA14 45 HA15 46 HA16 47 HA17 48 XA18
B
U16 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 VDD1 VDD2 NC NC NC NC FTNC ZZ 52 53 56 57 58 59 62 63 68 69 72 73 74 75 78 79 2 3 6 7 8 9 12 13 18 19 22 23 24 25 28 29 16 66 51 80 1 30 14 43 64 CRPU2 LNF2D 2 RP67-27 10K CZZ 12 1 RP67-18 10K
49 93 94 95 96 89 98 97 86 83 84 85 87 88
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 BWE1# BWE2# BWE3# BWE4# CLK CE# CE2 OE# ADV# ADSP# ADSC# BWE# GWE# NC NC NC CE3# LBO#
HBE#4 HBE#5 HBE#6 HBE#7
3 HCLKSRAM1 +3_3V R82 10k CRPU1
HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
VDD1A VDD2A
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17
XA18 HBE#0 HBE#1 HBE#2 HBE#3 HCLKSRAM1
37 36 35 34 33 32 100 99 82 81 44 45 46 47 48 49 93 94 95 96 89 98 97 86 83 84 85 87 88
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 BWE1# BWE2# BWE3# BWE4# CLK CE# CE2 OE# ADV# ADSP# ADSC# BWE# GWE# NC NC NC CE3# LBO#
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 VDD1 VDD2 NC NC NC NC FTNC ZZ
52 53 56 57 58 59 62 63 68 69 72 73 74 75 78 79 2 3 6 7 8 9 12 13 18 19 22 23 24 25 28 29 16 66 51 80 1 30 14 43 64
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31
VDD1B VDD2B
B
PCIRST#D HW/R#D LNF1D
38 39 42 92 31
+3_3V
PCIRST#C HW/R#C RNF1C
38 39 42 92 31
CRPU2 RNF2C CZZ
C
C
CBURST_SEQ2 CRPD3
CPUVIO PBSRAM 64KX32 CTAG[7:0] 5 U12 10 9 8 7 6 5 4 3 25 24 21 23 2 26 1 27 20 2 2 R52 1 4.7K R59 1 4.7K A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 WE# 2 2 2 2 CE# OE# SRAM32KX8 +3_3V 1 5,11,20,21 PCIRST# 1 2 1 2 R79 0 R88 1 RNF1C 0 Size 2 R86 0 R85 1 PCIRST#C 0 5 KRQAK LNF1D Title 2 PCIRST#D C205 0.01uF C208 C201 0.01uF 1 1 C202 1uF 1 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 11 12 13 15 16 17 18 19 CTAG0 CTAG1 CTAG2 CTAG3 CTAG4 CTAG5 CTAG6 CTAG7 1 PBSRAM 64KX32
**Optional DRAM CACHE
VDD1B 1 1 R92 0 VDD2B R94 0
+5V
2 2
1 1 1 1
R56 4.7K R57 4.7K R54 4.7K R60 4.7K
2 2 2 2
HA28 HA29 HA30 HA31
HA13 HA14 HA15 HA17 HA7 HA5 HA12 HA10 HA9 HA8 HA16 HA6 HA11 HA18
R97 220 2
C207
2
2 C204 0.01uF
C200
2
2 C209 1uF 1
**Optional DRAM CACHE
VDD1A VDD2A 1 1 R93 0 R95 0
+5V
0.01uF 1 1
3.3uF 1
2 2,4 HW/R# 2 2 1
1
R43 0
2
CA18
R80 0
2 HW/R#D
CACHE SIZE
INSTALL
R87 1 HW/R#C 0 R78 10K
D
0 256K
D
R64 R60 R60 R57 R59 R53 R43 R56 R52 R54 R55
HA30 HA31
5 CTWE#
+3_3V
22
3.3uF 1
RNF2C
1
R89 1K
2
LNF2D 2
1
512K
*NOTE:
CPUVIO
R43 is for 512K Cache only.
2 R91 1 10K
R64 10K 2
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for the misuse of this information.
Intel Corporation TX DESKTOP CACHE 1
Document Number Sheet 6
8
Rev 2.1 of 29
Date: Thursday, December 19, 1996
1 2 3 4 5 6 7
A
B
C
D
E
4
4
3
3
THIS PAGE INTENTIONALY LEFT BLANK
2
2
1
1
Intel Corporation
Title
CACHE 2
Size Date:
A B C D
Document Number Thursday, December 19, 1996
E
Rev 2.1 Sheet 7 of 29
A
B
C
D
E
5,9 MD[63..0]
+3_3V
4
4
124 110 102 90 41 40 26 18 6
146 62
168 157 143 133 84 73 59 49
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15
MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47
3
2 3 4 5 7 8 9 10 11 13 14 15 16 17 19 20 86 87 88 89 91 92 93 94 95 97 98 99 100 101 103 104 33 117 34 118 35 119 36 120 37 121 38 122 39 123 126 22 24 25 105 106 108 109
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA0 BA1 A11 A12 NC NC NC NC NC NC NC
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CK2 CK3 NC NC NC NC NC NC NC NC NC CKE1 NC NC NC NC NC RFU SA0 SA1 SA2 SDA SCL /S0 /S1 /S2 /S3 /WE0 /CAS /RAS CKE0 A13 CK1
55 56 57 58 60 65 66 67 69 70 71 72 74 75 76 77 139 140 141 142 144 149 150 151 153 154 155 156 158 159 160 161 79 163 80 164 81 61 134 135 136 137 147 63 21 50 51 52 53 145 165 166 167 82 83 30 114 45 129 27 111 115 128 132 125
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23
MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
3
VCC VCC VCC VCC VCC VCC VCC VCC VCC
NC NC
VCC VCC VCC VCC VCC VCC VCC VCC
MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 5 MAA0 5 MAA1 5,9 MA[11..2] MAA0 MAA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MRAS4A# MRAS5A#
MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 HCLKDIMM1 3 HCLKDIMM0 3
DIMM 0
(BANK 0)
NC: +3_3V:
62,146 6,18,26,40,41,49,59, 3 7 84,90,102,110,124,13 3 143,157,168
MPAR7A MPAR3A MPAR0A MPAR2A MPAR4A
+3_3V
GND:
1,12,23,31,32,43,44,54, 4 6 68,78,85,96,107,116,127,1 38 148,152,162
5,9 MRAS#R[5..4] MRAS#R4 MRAS#R5 2 R62 10 1 2 R67 1 10
MPAR1A MPAR5A MPAR6A 5,9 MCAS#[7..0] MCAS#0 MCAS#1 MCAS#2 MCAS#4 MCAS#5 MCAS#6 MCAS#7 MCAS#3 5 MWEA# 3 HCLKDIMM3
2
2
28 29 46 47 112 113 130 131 48 42 44 31
DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 DU CK0 DU DU
SMBDATA 3,9,12 SMBCLK 3,9,12 MRAS#0 MRAS#1 MWEA# MSCASA# 5 MSRASA# 5
MRAS#[3..0] 5,9
U5 DIMM REV A
+3_3V
MPDED0#
HCLKDIMM2 3 R50 100
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 162 152 148 138 127 116 107 96 85 78 68 64 54 43 32 23 12 1
1
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
Intel Corporation
Title
TX DESKTOP DIMM 0
Size Document Number Sheet
E
Rev 2.1 8 of 29
Date: Thursday, December 19, 1996
A B C D
A
B
C
D
E
5,8 MD[63..0] +3_3V
4
4
124 110 102 90 41 40 26 18 6
146 62
168 157 143 133 84 73 59 49
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15
MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47
3
2 3 4 5 7 8 9 10 11 13 14 15 16 17 19 20 86 87 88 89 91 92 93 94 95 97 98 99 100 101 103 104 33 117 34 118 35 119 36 120 37 121 38 122 39 123 126 22 24 25 105 106 108 109
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BA0 BA1 A11 A12 NC NC NC NC NC NC NC
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CK2 CK3 NC NC NC NC NC NC NC NC NC CKE1 NC NC NC NC NC RFU SA0 SA1 SA2 SDA SCL /S0 /S1 /S2 /S3 /WE0 /CAS /RAS CKE0 A13 CK1
55 56 57 58 60 65 66 67 69 70 71 72 74 75 76 77 139 140 141 142 144 149 150 151 153 154 155 156 158 159 160 161 79 163 80 164 81 61 134 135 136 137 147 63 21 50 51 52 53 145 165 166 167 82 83 30 114 45 129 27 111 115 128 132 125
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23
MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 HCLKDIMM6 3 HCLKDIMM7 3
VCC VCC VCC VCC VCC VCC VCC VCC VCC
NC NC
VCC VCC VCC VCC VCC VCC VCC VCC
DIMM 1
(BANK 1)
NC: +3_3V:
62,146 6,18,26,40,41,49,59, 3 7 84,90,102,110,124,13 3 143,157,168
3
MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 5 MAB0 5 MAB1 5,8 MA[11..2] MAB0 MAB1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MRAS4B# MRAS5B#
GND:
1,12,23,31,32,43,44,54, 4 6 68,78,85,96,107,116,127,1 38 148,152,162
5,8 MRAS#R[5..4] MRAS#R4 MRAS#R5 2 R63 10 1 2
MPAR7B MPAR3B MPAR0B MPAR2B MPAR4B +3_3V
+3_3V
R66 10
1
MPAR1B MPAR5B MPAR6B 5,8 MCAS#[7..0] MCAS#0 MCAS#1 MCAS#2 MCAS#4 MCAS#5 MCAS#6 MCAS#7 MCAS#3 5 MWEB# 3 HCLKDIMM4
2
2
28 29 46 47 112 113 130 131 48 42 44 31
DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 DU CK0 DU DU
SMBDATA 3,8,12 SMBCLK 3,8,12 MRAS#2 MRAS#3
MRAS#[3..0] 5,8
U6 DIMM REV A
MWEB#
MSCASB# 5 MSRASB# 5 MPDED1# HCLKDIMM5 3
+3_3V
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 162 152 148 138 127 116 107 96 85 78 68 64 54 43 32 23 12 1 R51 100
1
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
A B C D
Intel Corporation
Title
TX DESKTOP DIMM 1
Size Document Number Sheet
E
Rev 2.1 9 of 29
Date: Thursday, December 19, 1996
A
B
C
D
E
J11
MODE POS. 2-3 NORMAL RECOVERY 1-2
Note: The X denotes a don't care.
MODE
4
J7
1-2 2-3 X 2-3
J6
4
J1 SA16/17 +5V 14 5 7 74HCT14 U2C 6 SA16/17# 3 2 1
Program Device Plug -N- Play Non-Plug-N-Play Not Used
+12V J7 +5V
1-2 1-2 2-3 2-3
+5V
INSTALL SA16 IF 1M FLASH
+12V 1 R2 0 2 SA16 1 2 3 FL5VPU R9 8.2K 1
Install for BX
R3 8.2K J6
INSTALL SA17 IF 2M FLASH
1
R1 0
2
SA17 C1 C2 0.1uF BIOSMSB 0.1uF
FL_VPP FL_PNPPU
2 3
11,14,22,23,24,25 SA[19..0]
3
Install for BC
U1 U3 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 40 1 2 3 4 5 6 36 7 8 14 15 16 17 18 19 20 21 9 24 22 10 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 WE# OE# CE# PWD# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DU VCC VCC GND GND NC NC NC NC 25 26 27 28 32 33 34 35 12 30 31 23 39 13 29 37 38 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 +5V SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 2 3 29 28 4 25 23 26 27 5 6 7 8 9 10 11 12 31 24 22 30 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 WE# OE# CE# RP# DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 13 14 15 17 18 19 20 21 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 +5V VCC GND 32 16
R4 0
3
+5V C19 0.1uF
VPP
11
VPP
1
P28F001BX-T
2
E28F002BC-T
2
11,22,23,24,25 MEMW# 11,22,23,24,25 MEMR# FL2MPU
OPTIONAL 2MB FLASH
12 ROMCS#
14 XD[7..0]
1
1
Intel Corporation Title TX DESKTOP FLASH BIOS Size Date:
A B C D
Document Number Thursday, December 19, 1996 Sheet
E
Rev 2.1 10 of 29
A
B
C
D
E
5,20,21 AD[31..0] DDS[15..0] 13 U15A
4
AD18
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3# 5,20,21 CLKRUN#
B10 A10 D9 C9 B9 A9 D8 E8 B8 A8 D7 C7 B7 A7 D6 E6 E4 C4 B4 A4 D3 E3 C3 B3 E2 C2 B2 A2 D1 E1 C1 B1
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
IDE SIGNALS
DDS0 DDS1 DDS2 DDS3 DDS4 DDS5 DDS6 DDS7 DDS8 DDS9 DDS10 DDS11 DDS12 DDS13 DDS14 DDS15 CS3S# CS3P# CS1S# CS1P#
E15 B15 D14 C14 A14 C13 A13 C12 D12 B13 D13 B14 E14 A15 C15 D15 C18 H16 B18 H17 U11 T11 W11 Y11 T10 W10 U9 V9 Y9 T8 W8 U7 V7 Y7 V6 Y6 T5 W5 U4 V4
DDS0 DDS1 DDS2 DDS3 DDS4 DDS5 DDS6 DDS7 DDS8 DDS9 DDS10 DDS11 DDS12 DDS13 DDS14 DDS15
IDECS13# IDECS03# IDECS11# IDECS01# 13 13 13 13 SA[19..0] 10,14,22,23,24,25
4
PCI BUS INTERFACE
R72
3
220
5,20,21 5,20,21 5,20,21 5,20,21
C8 C6 D4 D2 C10 E5 A5 A3 B5 B6 A1 B12 A12 A6 D5 C5 E10 A11 B11 C11 C17 B17 A18 G19 A17 F18 A16 F17 F16 G20 C16 B16 D16 G16 G18 G17
C/BE#0 C/BE#1 C/BE#2 C/BE#3 CLOCKRUN# DEVSEL# FRAME# IDSEL IRDY# PAR PCIRST# PHOLD# PHOLDA# SERR# STOP# TRDY# REQ0# REQ1# REQ2# REQ3# DAS0 DAS1 DAS2 PDDACK# SDDACK# PDREQ# SDREQ# PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY DAP0 DAP1 DAP2 DDP0 DDP1 DDP2 DDP3 DDP4 DDP5 DDP6 DDP7 DDP8 DDP9 DDP10 DDP11 DDP12 DDP13 DDP14 DDP15 PIIX4
5,20,21,25 DEVSEL#
PIIX4
ISA/EIO SIGNALS
PXIDSEL
5,20,21,25 PAR
5,20,21,25 FRAME# 5,20,21,25 IRDY# 5,6,20,21 PCIRST# 5,25 PHOLD# 5,25 PHLDA# 20,21,25 SERR# 5,20,21,25 STOP# 5,20,21,25 TRDY# 5,20,25 PREQ0# 5,20,25 PREQ1# 5,21,25 PREQ2# 5,21,25 PREQ3# 13 DAS0 13 DAS1 13 DAS2 13 IDEDACK0# 13 IDEDACK1# 13 IDEDRQ0 13 IDEDRQ1 13 IDEIOR0# 13 IDEIOW0# 13 IDEIORDY0 13 IDEIOR1# 13 IDEIOW1#
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
SA0 SA1 SA2
SA3 SA4
SA19
SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18
SD[15..0] 14,22,23,24,25
3
V3 W3 U2 T2 W2 Y2 T1 V1 W16 T16 Y17 V17 Y18 W18 Y19 W19 Y15 T14 W14 U13 V13 Y13 T12 Y12 V15 U15 W4 U3 T7 U10 Y1 W7 V12 Y3 W12 W1 Y5 T4 T3 Y4
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
LA17 LA18 LA19 LA20 LA21 LA22 LA23 MEMCS16# 22,23,24,25
LA[23..17] 22,23,24,25
2
13 IDEIORDY1 13 DAP0 13 DAP2 13 DDP[15..0] 13 DAP1
GPO1/LA17 GPO2/LA18 GPO3/LA19 GPO4/LA20 GPO5/LA21 GPO6/LA22 GPO7/LA23
2
IDE SIGNALS
DDP0 DDP1 DDP2 DDP3 DDP4 DDP5 DDP6 DDP7 DDP8 DDP9 DDP10 DDP11 DDP12 DDP13 DDP14 DDP15
F20 E18 E20 D18 D20 C20 B20 A20 A19 B19 C19 D19 D17 E19 E17 F19
MEMCS16# MEMR# MEMW# SMEMR# SMEMW# SYSCLK GPO0/BALE GPI0/IOCHK# REFRESH# IOCS16# ZEROWS# SBHE# RSTDRV IOR# IOW# IOCHRDY AEN
MEMR# 10,22,23,24,25 MEMW# 10,22,23,24,25 SMEMR# 22,23,24,25 SYSCLKR SMEMW# 22,23,24,25 R76 SYSCLK 22,23,24 BALE 22,23,24,25 33 IOCHK# 22,23,24,25 REFRESH# 22,23,24,25 IOCS16# 22,23,24,25 ZEROWS# 22,23,24,25 SBHE# 22,23,24,25 RSTISA 14,22,23,24 IOR# 14,22,23,24,25 IOW# 14,22,23,24,25 IOCHRDY 14,22,23,24,25 AEN 14,22,23,24
+5V 14 1 7
1
U2A 2 IDERST# 13
74HCT14
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for the misuse of this information.
A B C D
Intel Corporation
Title
TX DESKTOP PIIX4 (SOUTHBRIDGE)
Size Document Number Rev 2.1 Date: Thursday, December 19, 1996 Sheet
E
11
of
29
A
B
C
D
E
+3_3V SB3V
R15 R6 F15 E11 F6
T6 P15 R7 G6 F14 F5 E16 E12 E9
K5 N16 R16
U15B
4
14,22,23,24 14,22,23,24 14,22,23,24 14,22,23,24 22,23,24 22,23,24 22,23,24
DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7#
U14 W6 Y10 V5 T15 V16 W17 W15 U6 V2 U5 Y16 U16 U17 PIIXREQA# PIIXREQB# PIIXREQC# M1 N2 P3 N1 P2 P4 V10 J17 H18 PIIXAPICRQ# K18 H20 J20 T9 W9 U8 V8 Y8 Y20 U1 U12 W13 T13 V14 Y14 PIIXSIRQ PIRQ0# PIRQ1# PIRQ2# PIRQ3# J19 R3 R4 P5 G1 K20 M19 K19 L17 L18 L19 P1 L20 P20 J18 N20 M20 M18 K17 V18 R17 R18 M4 M3 M2 L1 K2 K1 R20 N19 L16 P17 L3 V11 D11
DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7# DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7 REQA#/GPI2 REQB#/GPI3 REQC#/GPI4 GNTA#/GPO9 GNTB#/GPO10 GNTC#/GPO11
USB
USBP1+ USBP1USBP0+ USBP0OC0 OC1 EXTSMI# SUSA# GPO15/SUSB# GPO16/SUSC#
F1 H2 G2 H3 J1 J2 V20 W20 V19 U18 R1 R2 K16 T17 T18 H19 U19 M17 U20 P16 T20 R19 N17 P18
USBP1+R USBP1-R USBP0+R USBP0-R USBOC0# USBOC1# EXTSMI
17 17 17 17 17 17
4
VCC VCC VCC VCC VCC
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP
VCCUSB VCCSUS VCCSUS
STB5V U20A
14,22,23,24,25 14,22,23,24,25 14,22,23,24,25 14,22,23,24,25 22,23,24,25 22,23,24,25 +3_3V 22,23,24,25
DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7 1 RP42-1 8 RP42-2 2 7 10K 3 RP42-3 6 10K 10K
PS-ON C238 0.01UF
14 1 7
2
PS_ON# 19
POWER MGMT.
14,22,23,24 T/C 4 RP55-4 5 10K
3
TC APICACK#/GPO12 APICCS#/GPO13 APICREQ#/GPI5 IRQ0/GPO14 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8/GPI6 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 SERIRQ/GPI7 PIRQA# PIRQB# PIRQC# PIRQD# SLP# CPURST FERR# IGNNE# INIT INTR A20GATE# NMI SMI# STPCLK# RCIN# A20M# PWROK SPKR TEST# CONFIG1 CONFIG2 XOE#/GPO23 XDIR#/GPO22 BIOSCS# RTCALE/GPO25 RTCCS#/GPO24 KBCCS#/GPO26 RTCX2 RTCX1 VBAT SUSCLK 48Mhz OSC PCICLK
DMA/IRQ SIGNALS
GPO17/CPU_STP# GPO18/PCI_STP# GPO19/ZZ GPO20/SUS_STAT1# GPO21/SUS_STAT2# GPI8/HCT# GPI9/BATLOW# RSMRST# PWRBT# GPI10/LID SMBDATA SMBCLK GPI11/SMBALERT# GPI12/RI#A
74HCT14
CZZ 6 SUSTAT1# 5 PIIXTHRM# PIIXBATLO# RSMRST# 19 PWRBT# 18 PIIXLID
PIIXAMBAL# PIIX_RI#
SMBDATA 3,8,9 SMBCLK 3,8,9 PIIX_RI# 14 SB3V +3_3V
+3_3V
14,25 IRQ1 14,22,23,24,25 IRQ3 14,22,23,24,25 IRQ4 14,22,23,24,25 IRQ5 14,22,23,24,25 IRQ6 14,22,23,24,25 IRQ7 14,25 IRQ8 14,22,23,24,25 IRQ9 14,22,23,24,25 IRQ10 14,22,23,24,25 IRQ11 14,22,23,24,25 IRQ12 13,14,22,23,24,25 IRQ14 13,14,22,23,24,25 IRQ15 3 RP55-3 6 10K 20,21,25 20,21,25 20,21,25 20,21,25
2 RP62-27 8.2K
R115 8.2K
U22 7 6 A0 A1 A2 +3_3V 1 SDA SCL LM75 VCC 8 2 OS 3
3
THPU
5
PIIX4
VREF
J16 C193
5VREF 5
+3_3V
GPO/GPI/GPIO/SCAN
SB3V
2
R77 1K PIIXTEST#
2 HRESET 2 HFERR# 2 HIGNNE# 2 HINIT 2 HINTR 14 A20GATE 2 HNMI 2 HSMI# 2 HSTPCLK# 14 KBRESET# 2 HA20M# 19 PWROK 18 SPKR PIIXCONF1 PIIXCONF2
GPI1 GPI13 GPI14 GPI15 GPI16 GPI17 GPI18 GPI19 GPI20 GPI21
P19 L2 J3 L5 K3 K4 H1 H4 H5 G3
PIIX_GPI1 PIIXGPI13 PIIXGPI14 PIIXGPI15 PIIXGPI16 PIIXGPI17 PIIXGPI18 PIIXGPI19 PIIXGPI20 PIIXGPI21
0.1UF 5 RP66-4 4 8.2K 6 RP68-3 3 8.2K 7 RP70-2 2 8.2K 5 RP68-4 4 8.2K 2 RP66-2 7 8.2K
5 RP70-4 4 8.2K 6 RP70-3 3 8.2K 8 RP70-1 1 8.2K RP68-2 2 7 8.2K 8 RP68-1 1 8.2K
THERMAL DEVICES DO NOT STUFF
CPU INTERFACE
SB3V GPO0 GPO8 GPO27 GPO28 GPO29 GPO30 G4 T19 G5 F2 F3 F4 FAN-ON 18 PIIXGPO27 PIIXGPO28 PIIXGPO30 EXTSMI PIIX_RI# R81 8.2K PIIXTHRM# 1 RP66-1 8 8.2K 4 RP62-4 5 8.2K 2 RP58-2 7 8.2K PIIXLID PIIXAMBAL# 3 RP58-3 6 8.2K 1 RP58-1 8 8.2K PIIXBATLO# MCCS# N4 PIIXCONF1 L4 N5 PIIXPCS1 PIIXCONF2 3 RP62-3 6 8.2K 1 RP62-1 8 8.2K 4 RP58-4 5 8.2K +3_3V
2
SMBCLK
SYSTEM/TEST
DO NOT STUFF
R83 1M 2 1 C197 22pF
14 XOE# 14 XDIR# 10 ROMCS#
X-BUS
RTCX2 RTCX1
14,19 VBAT3V 5 SUSCLK 3 CLK48M 3 OSCPIIX4 3 PCLKPIIX4
Y2 C196 32.768KHz 22pF
GND: D10,E7,E13,J9,J10,J11,J12,K9,K10,K11,K12, L9,L10,L11,L12,M9,M10,M11,M12 VSSUSB: J5
N/C N/C N/C N/C N/C N/C
J4 N18 N3 M16 M5 R5
PROG CHIP SEL.
PCS0# PCS1#
PIIX4 C256 0.1uF
1
1
Intel Corporation
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
A B C D
Title
TX DESKTOP PIIX4 (SOUTH BRIDGE)
Size Document Number Sheet
E
Rev 2.1 12 of 29
Date: Thursday, December 19, 1996
A
B
C
D
E
IDE CONNECTORS
11 DDP[15..0]
PRIMARY IDE CONNECTOR
11 IDERST#
4
R154 33 3 RP57-36 33 3 RP61-36 33 1 RP65-18 33 RP65-45 4 33 1 R90 5.6K 2 DDP7 DDP6 DDP5 DDP4 DDP3 DDP2 DDP1 DDP0 1 RP59-1 8 33 IRQ14 4 RP59-4 5 33 3 RP63-3 6 33 4 RP63-4 5 33 1 RP61-18 33 3 RP65-36 33 2 RP60-27 33 2 RP64-2 7 33 3 RP60-36 33 2 RP59-27 33 R147 47 3 RP59-3 6 33
IDERSTP#R
J21 DDP7R DDP6R DDP5R DDP4R DDP3R DDP2R DDP1R DDP0R IDEDRQ0R IDEIOW0#R IDEIOR0#R IDEIORDY0R IDEDACK0#R IDEIRQ0R DAP1R DAP0R IDECS01#R 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DDP8R DDP9R DDP10R DDP11R DDP12R DDP13R DDP14R DDP15R 7 RP57-22 33 7 RP61-2 2 33 5 RP61-4 4 33 8 RP64-1 1 33 5 RP57-4 4 33 7 RP65-2 2 33 8 RP60-1 1 33 5 RP60-4 4 33 DDP8 DDP9 DDP10 DDP11 DDP12 DDP13 DDP14 DDP15
4
+5V
+5V
R151 1K R150
R141 10K
11 IDEDRQ0 11 IDEIOW0# 11 IDEIOR0#
11 IDEIORDY0
IDESELA
1
47 11 IDEDACK0# 12,14,22,23,24,25 IRQ14 11 DAP1 11 DAP0 11 IDECS01#
DAP2R
8 RP63-1 1 33 7 RP63-2 2 33
DAP2 11
R149 470 2
18 HD_ACTA#
HEADER 20X2
IDECS03#R
IDECS03# 11
3
3
11 DDS[15..0]
SECONDARY IDE CONNECTOR
IDERST# 2 R84 5.6K +5V 1 DDS7 DDS6 DDS5 DDS4 DDS3 DDS2 DDS1 DDS0 1 RP54-1 8 33 3 RP54-3 6 33 4 RP54-4 5 33 3 RP56-3 6 33 3 RP50-3 33 4RP51-4 33 1RP52-1 33 3RP52-3 33 1 RP57-1 33 2RP54-2 33 6 5 8 6 8 7 R155 33 1 RP50-1 33 2RP51-2 33 4RP52-4 33 3RP53-3 33 8 7 5 6 DDS7R DDS6R DDS5R DDS4R DDS3R DDS2R DDS1R DDS0R IDEDRQ1R IDEIOW1#R IDEIOR1#R IDEIORDY1R IDEDACK1#R IDEIRQ1R DAS1R DAS0R IDECS11#R
IDERSTS#R
J20 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DDS8R DDS9R DDS10R DDS11R DDS12R DDS13R DDS14R DDS15R RP50-2 7 33 8RP51-1 33 6 RP51-3 33 5 RP53-4 33 2 1 3 4 5 RP50-4 4 33 7RP52-2 2 33 7 RP53-2 2 33 8 RP53-11 33 DDS8 DDS9 DDS10 DDS11 DDS12 DDS13 DDS14 DDS15
2
+5V
2
R153 1K R152 11 IDEIORDY1
R140 10K
11 IDEDRQ1 11 IDEIOW1# 11 IDEIOR1# IRQ15
IDESELB
1
47 11 IDEDACK1# 12,14,22,23,24,25 IRQ15 11 DAS1 11 DAS0 11 IDECS11#
R96 47 1 RP56-1 8 33
DAS2R
7 RP56-2 2 33 5 RP56-4 4 33
DAS2 11
R148 470 2
18 HD_ACTB#
HEADER 20X2
IDECS13#R
IDECS13# 11
1
1
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
A B C D
Intel Corporation
Title
TX DESKTOP IDE CONNECTORS
Size Document Number Sheet
E
Rev 2.1 13 of 29
Date: Thursday, December 19, 1996
1
2
3
4
5
6
7
8
ULTRA IO
A
Install only when RTC in UIO is used.
R42 0 UIOBAT UIOXTAL 1 UIOXTAL 2 3 OSCUIO 11,22,23,24,25 IOR# 11,22,23,24,25 IOW# 11,22,23,24 AEN 11,22,23,24 RSTISA 11,22,23,24,25 IOCHRDY SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 12,22,23,24 T/C OSCUIO DRQ0 DRQ1 DRQ2 DRQ3 12,22,23,24 12,22,23,24 12,22,23,24 12,22,23,24 +5V U19A R25 12,25 IRQ8 0 UIOIRQ8 2 14 1 7 7407 DACK0# DACK1# DACK2# DACK3# IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 UIOIRQ8B IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 4 RP42-4 5 10K PWRLED1 4 3 2 1 4.7K 16 16 16 16 KBCLK# KBDAT# MSCLK# MSDAT# XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 10 XD[7..0] 12 XOE# 12 XDIR# R14 1K UIOBUT# IDE1_IRQ 121 122 124 22 68 69 70 80 90 72 73 74 75 76 77 78 79 89 82 84 86 88 81 83 85 87 67 66 65 64 63 62 61 59 58 57 56 55 54 41 42 43 44 45 46 47 48 49 50 51 52 53 27 28 29 26 23 24 25 30 31 34 33 32 92 91 94 93 111 112 113 114 115 116 117 118 119 120
+5V
A
139 21 60 101 125
12,19 VBAT3V
U10 VBAT XTAL1 XTAL2 14CLOCKI IOR# IOW# AEN RSTDRV IOCHRDY SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 TC DRQ0 DRQ1 DRQ2 DRQ3 DACK0 DACK1 DACK2 DACK3 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8/IRQ8# IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12/CS SA13/HDCS2# SA14/HDCS3# SA15/IDE2_IRQ IDE1_IRQ IDE1_OE# HDCS0# HDCS1# IOROP# IOWOP# IDE_A0 IDE_A1 IDE_A2 KCLK KDAT MSCLK MSDAT RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 ROMCS# ROMOE# FDC37C93X
14CLK01 14CLK02 14CLK03 16CLK 24CLK INDEX# DIR# STEP# WDATA# WGATE# TRK0# WPT# RDATA# SIDE1# DSKCHG# MTR0# MTR1# DRVSEL0# DRVSEL1# DRVDEN0 DRVDEN1 MEDID0 MEDID1 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLIN# INIT# AFD# STB# BUSY ACK# PE SLCT ERR# RXD1 TXD1 RTS1# CTS1# DTR1# DSR1# DCD1# RI1# RXD2 TXD2 RTS2# CTS2# DTR2# DSR2# DCD2# RI2# GP10/IRQIN GP11/IRQIN GP12/IRRX GP13/IRTX GP14/RS GP15/WS GP16/JOYRS GP17/JSWS GP20/IDE2_OE GP21/EEDIN GP22/EDOUT GP23/EECLK GP24/EEEN GP25/8024_P21
37 38 39 36 35 14 9 10 11 12 15 16 17 13 18 4 7 6 5 2 3 20 19 138 137 136 135 134 133 132 131 140 141 143 144 128 129 127 126 142 145 146 148 149 150 147 152 151 155 156 158 159 160 157 154 153 96 97 98 99 100 102 103 104 105 106 107 108 109 110 2 INDEX# 16 DIR# 16 STEP# 16 WDATA# 16 WGATE# 16 TRK0# 16 WPT# 16 RDATA# 16 SIDE1# 16 DSKCHG# 16 MOTEA# 16 MOTEB# 16 DRVSA# 16 DRVSB# 16 REDWC# 16 DRATE0 16
VCC VCC VCC VCC VCC
Y1 2 R40 1M 1 32.768KHz
C257 0.1uF
2 1
11,22,23,24,25 SD[15..0]
Install for 935 only. 2 2 R16 1K R17 1K 1 1
C78 22pF
C85 22pF 12,22,23,24,25 DRQ[7..0]
2
R18 0
1
IRR3/MODE 18
MEDID0 MEDID1 PD0R PD1R PD2R PD3R PD4R PD5R PD6R PD7R
Install for 935FR only.
C37 22pF
B
12,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,22,23,24,25 12,13,22,23,24,25 12,13,22,23,24,25
PD0R PD1R PD2R PD3R PD4R PD5R PD6R PD7R SLIN#R 15 INIT#R 15 AFD#R 15 STB#R 15 BUSY 15 ACK# 15 PE 15 SLCT 15 ERR# 15 RX0 16 TX0 16
15 15 15 15 15 15 15 15
B
INSTALL FOR 370 CONFIG.
2 R24 10K 1 +5V
Install only when RTC in UIO is used.
10,11,22,23,24,25 SA[19..0]
2
R23 1 1K
INSTALL FOR 3F0 CONFIG.
RTS0# 16 CTS0# DTR0# DSR0# DCD0# 16 16 16 16 RI0# 16 RX1 16 TX1 16 RTS1# 16 CTS1# 16 DTR1# 16 DSR1# 16 DCD1# 16 RI1# 16 +5V U19B 14 3 7 7407 IRTX 18 IRRX 18 +5V 2 R41 0 PWRLED# 18
C
4
PIIX_RI#R
2
R123 1 0
+5V
+5V
PIIX_RI# 12
RP23
C
R160 10K
5 6 7 8
1 R166 10K
Install for 935 only.
KBRESET# 12 KBLOCK# 18
Install for 935FR only.
PWRLED1
R15 0
+5V: 21,60,101,125,139 GND: 1,8,40,71,95,123,130
R164 1 10K
A20GATE +5V
12
Install for 935FR only.
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for the misuse of this information.
Intel Corporation
Title
TX DESKTOP ULTRA IO /
Size Date: Document Number Thursday, December 19, 1996 Sheet
8
Rev 2.1 14 of 29
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
A
A
14 PD0R 14 PD1R 14 PD2R
B
PD0R PD1R PD2R PD3R PD4R PD5R PD6R PD7R
14 PD3R 14 PD4R 14 PD5R 14 PD6R 14 PD7R
1 RP12-18 33 2 RP12-27 33 3 RP12-36 33 RP12-45 4 33 1 RP15-18 33 2 RP15-27 33 RP15-36 3 33 4 RP15-45 33
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
B
+5V
+5V
RP18-4 1K
RP18-2 1K
RP18-1 1K
RP18-3 1K
RP4-1 1K
RP4-3 1K
RP3-1 1K
RP2-4 1K
RP1-4 1K
RP1-2 1K
RP2-2 1K
RP4-4 1K
RP4-2 1K
RP1-3 1K
RP2-1 1K
RP1-1 1K
RP2-3 1K
8 1
8 1
5 4
7 2
8 1
6 3
8 1
5 4
5 4 J3 STB# 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 27 D-SUB 25
7 2
7 2
5 4
7 2
8 1
6 3
6 3
6 3
14 STB#R
C
1 RP10-1 8 33 PD1 PD3 PD5 PD7 14 SLCT
14 BUSY 14 ERR# 14 SLIN#R 4 RP10-4 5 33 180pF CP5-1 180pF CP5-3 180pF CP1-4 180pF CP2-1 180pF CP1-1 180pF CP2-4 180pF CP4-1 180pF CP3-1 180pF CP4-3 1 8 1 8 1 8 3 6 1 8 3 6 1 8 4 5 4 5 SLIN#
PD0 PD2 PD4 PD6 ACK# PE AFD# INIT# 180pF CP5-2 180pF CP2-2 180pF CP4-4 180pF CP4-2 180pF CP1-3 180pF CP2-3 180pF CP1-2 180pF CP5-4
C
ACK# 14 7RP10-2 2 6RP10-3 3 33 33 PE 14 AFD#R 14 INIT#R 14
2 7
2 7
4 5
2 7
4 5
2 7
3 6
3 6
PARALLEL PORT CONNECTOR
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
Intel Corporation
Title
TX DESKTOP PARALLEL HEADER
Size Document Number Sheet 15 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
1 2 3 4 5 6 7
1
2
3
4
5
6
7
8
+12V
C45 0.1UF
A
+5V U8 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
COM PORT 0
J5-1 DCD0# 14 RX0 14 DSR0# 14 DTR0# 14 TX0 14 CTS0# 14 RTS0# 14 RI0# 14
A
SP_DCD0 SP_RXD0 SP_DSR0 SP_DTR0 SP_TXD0 SP_CTS0 SP_RTS0 SP_RI0
VCC+ RA RA RA DY DY RA DY RA VCC-
VCC RY RY RY DA DA RY DA RY GND
SP_DCD0 SP_RXD0 SP_TXD0 SP_DTR0
1 6 2 7 3 8 4 9 5 2 2 2 2 4 4 4 4 SP_RI0 SP_CTS0 SP_RTS0 SP_DSR0
GD75232SOP -12V CP6-2 100pF 7 CP7-2 100pF 7 CP8-2 100pF 7 CP9-2 100pF 7
CP9-4 DB9_DUL 19 20 100pF 5
CP8-4 100pF 5
CP7-4 100pF 5
CP6-4 100pF 5
+12V
C21 0.1UF U4 SP_DCD1 SP_RXD1 SP_DSR1 SP_DTR1 SP_TXD1 SP_CTS1 SP_RTS1 SP_RI1 1 2 3 4 5 6 7 8 9 10 VCC+ RA RA RA DY DY RA DY RA VCCVCC RY RY RY DA DA RY DA RY GND 20 19 18 17 16 15 14 13 12 11 DCD1# 14 RX1 14 DSR1# 14 DTR1# 14 TX1 14 CTS1# 14 RTS1# 14 RI1# 14 +5V
COM PORT 1
J5-2
SP_DCD1 SP_RXD1 SP_TXD1 SP_DTR1
10 15 11 16 12 17 13 18 14 1 1 1 1 3 3 3 3 SP_RI1 SP_CTS1 SP_RTS1 SP_DSR1
B
B
GD75232SOP -12V CP6-1 100pF 8 +5V CP7-1 100pF 8 CP8-1 100pF 8 CP9-1 100pF 8
CP9-3 DB9_DUL 21 22 100pF 6
CP8-3 100pF 6
CP7-3 100pF 6
CP6-3 100pF 6
F3 1.0 AMP
+5V KB5V
4
3
2
1
2 L6 FBHS04B
RP6-4 1K
RP6-3 1K
RP6-2 1K
RP6-1 1K
R19 1K
FLOPPY CONNECTOR
C
5
6
7
8
C
1
J4 KBDAT_FB# KB5V_FB KBCLK_FB# MSDAT_FB# 1 2 3 4 5 6 7 8 9 10 11 12 17 16 15 14 13 DIM6_DUL 14 DSKCHG# 14 SIDE1# 14 RDATA# 14 WPT# 14 TRK0# 14 WGATE# 14 WDATA# KBF1 14 STEP# 14 DIR# 14 MOTEB# 14 DRVSA# 14 DRVSB# 14 MOTEA# 14 INDEX# 14 DRATE0 14 REDWC# 1 KBF2 2 L11 FBHS01K L12 2 FBHS04B
14 KBDAT#
2 FBHS01K 2 FBHS01K 2 FBHS01K 2 FBHS01K
L9 1
J19 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
L7
14 KBCLK#
1
14 MSDAT#
L10 1
14 MSCLK#
L8 1
MSCLK_FB# 470pf 470pf 470pf 470pf 470pf C14 C16 C13 C15 C24
HEADER 17X2
1
D
D
Intel Corporation
Title
TX DESKTOP COM_PORT
Size Date:
1 2 3 4 5 6 7
Document Number Thursday, December 19, 1996 Sheet
8
Rev 2.1 16 of 29
1
2
3
4
5
6
7
8
+5V F1 1.0 AMP L4 USBVFB0 1 R11 470K 2 2
A
2
1 FBHS04B C20 + 150uF
USBV0 C8 0.1uF
A
12 USBOC0#
R12 C29 0.001uF 560K 1 J2-1 USBV0 12 USBP0-R 12 USBP0+R 2 R68 33 1 2 R70 33 1 USBP0USBP0+ USBG0 1 2 3 4 VCC S DATADATA+ S GND USB_CON_0.0 10 9 1 1 R8 15K R5 15K 1
C159 50pf
C162 50pf 2
L1 FBHS04B
B
2
B
C3 0.1uF 2
+5V F2 USBVFB1 1.0 AMP 1 R10 470K 2 2 2 L5 1 FBHS04B C10 + 150uF C9 0.1uF USBV1
12 USBOC1# C30 0.001uF
C
R13 560K 1 J2-2 USBV1 12 USBP1-R 12 USBP1+R 1 2 R69 1 33 2 R71 1 33 C160 50pF 2 C7 L2 0.1uF FBHS04B 2 2 2 R7 15K 1 USBP1USBP1+ USBG1 5 6 7 8 VCC S DATADATA+ S GND 1 USB_CON_0.0 R6 15K 1 12 11 USBGND C163 50pF L3 FBHS01L
C
D
D
USB PORT INTERFACE
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX DESKTOP UNIVERSAL SERIAL BUS (USB)
Size Document Number Sheet 17 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
A
A
SB3V
R119 4.7K STB5V STB5V U21B 12 PWRBT# 4 14 3 7 7407 POWER-ON# 8 U20D 14 9 7 74HCT14 R144 510K POWER-ON
+12V
B
B
+5V U2B 12 FAN-ON 14 3 7 4
STB5V U21A FAN-ON# 14 1 7 7407 2 FAN-ONV
R20 4.7k Q1A 2
P-CHANNEL MOSFET
Si9933DY
1
74HCT14
7 8 +5V J23 FAN-CON 14 IRRX 14 IRTX 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 CON26
FAN CONNECTOR
J15 1 2 JP2 +5V
14 IRR3/MODE
12,19,25 SB3V
R143
C
HDLED HARDDRV
220
C
14 PWRLED# R142 220 14 KBLOCK#
PLED
HARDDRV 1
R137 2 68
SPK4 SPK3
+5V U19F 13 HD_ACTA# 14 13 7 7407 12 10 U19E 14 11 7 7407
+5V
SPK2 1 R139 2 68 R127 HD_ACTB# 13 12 SPKR 1 2.2K 2 SPK1 Q5 2N3904 C249 0.1uF 2 BZ1
+5V
1 BUZZER
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX_DESKTOP FAN & FRONT PANEL CONNECTORS
Size Document Number Sheet 18 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
DO NOT REPRODUCE
A
A
+5V +3_3V +12V 5 +5V RP26-4 10K 2 4 6 8 10 12 14 16 18 20 4
STB5V STB5V U20C U20B 6 PWROK# 14 3 7 4 PWROK5V
J16 1 3 5 7 9 11 13 15 17 19
PWRGD1
1
R116 2 100
PWRGD2
STB5V
14 5 7
PS_ON# 12
74HCT14
74HCT14 2 R117 8.2K
B
-5V -12V 1 R145 56 SB3V 2 C234 .1UF
C229 .01uF
1 PWROK 12 1 R118 8.2K 2
B
D4 1 3 D5 MMBZ5226BL 1 VBAT 2 R161 1 1K BAT54C 2 3 VBAT3V 12,14
VBATRA
+ C230 10UF
2
1
J22
4 3 2 1
BAT_G
BT1 BATTERY 3
HEADER 4
EXTERNAL BATTERY
C C
STB5V U20E R99 22K C192 1UF RSMRST#0 14 11 7 10 RSMRST#1
STB5V U20F 14 13 7 R103 12 RSMRST#2 2 8.2K 74HCT14 74HCT14 2 1 RSMRST# 12
R106 8.2K 1
D
D
Intel Corporation
Title THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
1 2 3 4 5 6
TX DESKTOP POWER SUPPLY
Size Document Number Sheet 19 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
PCI SLOTS #1 & #2
PCI CONNECTOR #1 PCI CONNECTOR #2
+3_3V
A
+3_3V
A
+5V -12V J11 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
+12V
+5V+3_3V -12V
+5V
+12V
+5V+3_3V
J12 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
12,21,25 PIRQ1# 12,21,25 PIRQ3# C56 0.1UF C60 0.1UF PCIA0 PCIA1
PIRQ0# 12,21,25 PIRQ2# 12,21,25 CLKRUN# 5,11,21
12,21,25 PIRQ2# 12,21,25 PIRQ0# C57 0.1UF C61 0.1UF PCIB0 PCIB1
PIRQ1# 12,21,25 PIRQ3# 12,21,25 CLKRUN# 5,11,21
PCIRST# 5,6,11,21 3 PCLK1 PGNT0# 5,25 5,11,25 PREQ1#
PCIRST# 5,6,11,21 PGNT1# 5,25
3 PCLK0 5,11,25 PREQ0# AD31 AD29
B
AD30 AD28 AD26 AD24
PCIA2 2 1 R32 220 5,11,21 C/BE3#
AD31 AD29 AD27 AD25 AD23 AD21 AD19 AD17 5,11,21 C/BE2# FRAME# 5,11,21,25 5,11,21,25 IRDY# TRDY# 5,11,21,25 5,11,21,25 DEVSEL# STOP# 5,11,21,25 5,21,25 PLOCK# SDONE 21,25 21,25 PERR# SBO# 21,25 11,21,25 SERR# PAR 5,11,21,25 5,11,21 C/BE1#
AD30 AD28 AD26
B
AD27 AD25 5,11,21 C/BE3# AD23 AD21 AD19 AD17 5,11,21 C/BE2# 5,11,21,25 IRDY# 5,11,21,25 DEVSEL# 5,21,25 PLOCK# 21,25 PERR# 11,21,25 SERR# 5,11,21 C/BE1# AD14 AD12 AD10
AD24
PCIB2 1
R33 2 220
AD29
AD22 AD20 AD18 AD16
AD22 AD20 AD18 AD16
FRAME# 5,11,21,25 TRDY# 5,11,21,25 STOP# 5,11,21,25 SDONE 21,25 SBO# 21,25
AD15 AD13 AD11 AD9
AD15 AD13 AD11 AD9
PAR 5,11,21,25
AD14 AD12 AD10
AD8 AD7
C
C/BE0# 5,11,21
AD5 AD3 AD1 25 ACK64S0#
AD6 AD4 AD2 AD0
REQ64S0# 25 25 ACK64S1#
AD8 AD7 AD5 AD3 AD1
C/BE0# 5,11,21
AD6 AD4 AD2 AD0
REQ64S1# 25
C
PCI CONNECTOR
PCI CONNECTOR
5,11,21 AD[31..0]
D D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for th e misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX DESKTOP PCI SLOTS 1 & 2
Size Document Number Sheet 20 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
PCI SLOTS #3 & #4
PCI CONNECTOR #3
A
PCI CONNECTOR #4
A
+3_3V +12V +5V+3_3V
+3_3V +12V +5V+3_3V
+5V -12V J13 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
+5V -12V J14 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
12,20,25 PIRQ3# 12,20,25 PIRQ1# C58 0.1UF C62 0.1UF PCIC0 PCIC1
PIRQ2# 12,20,25 PIRQ0# 12,20,25 CLKRUN# 5,11,20
12,20,25 PIRQ0# 12,20,25 PIRQ2# C59 0.1UF C63 0.1UF PCID0 PCID1
PIRQ3# 12,20,25 PIRQ1# 12,20,25 CLKRUN# 5,11,20
PCIRST# 5,6,11,20 3 PCLK3 PGNT2# 5,25 5,11,25 PREQ3#
PCIRST# 5,6,11,20 PGNT3# 5,25
3 PCLK2 5,11,25 PREQ2#
B
AD31 AD29 AD27 AD25 5,11,20 C/BE3# AD23 AD21 AD19 AD17 5,11,20 C/BE2# 5,11,20,25 IRDY# 5,11,20,25 DEVSEL# 5,20,25 PLOCK# 20,25 PERR# 11,20,25 SERR# 5,11,20 C/BE1# AD14 AD12 AD10
AD30 AD28 AD26 AD24
PCIC2 1 220 R34 2 5,11,20 C/BE3#
AD31 AD29 AD27 AD25 AD23 AD21 AD19 AD17 5,11,20 C/BE2# FRAME# 5,11,20,25 5,11,20,25 IRDY# TRDY# 5,11,20,25 5,11,20,25 DEVSEL# STOP# 5,11,20,25 5,20,25 PLOCK# SDONE 20,25 20,25 PERR# SBO# 20,25 11,20,25 SERR# PAR 5,11,20,25 5,11,20 C/BE1#
AD30 AD28 AD26 AD24
PCID2 1 220 R38 2
B
AD31
AD22 AD20 AD18 AD16
AD22 AD20 AD18 AD16
FRAME# 5,11,20,25 TRDY# 5,11,20,25 STOP# 5,11,20,25 SDONE 20,25 SBO# 20,25
AD15 AD13 AD11 AD9
AD15 AD13 AD11 AD9
PAR 5,11,20,25
AD14 AD12 AD10
C
C
AD8 AD7 AD5 AD3 AD1 25 ACK64S2#
C/BE0# 5,11,20
AD6 AD4 AD2 AD0
REQ64S2# 25 25 ACK64S3#
AD8 AD7 AD5 AD3 AD1
C/BE0# 5,11,20
AD6 AD4 AD2 AD0
REQ64S3# 25
PCI CONNECTOR
PCI CONNECTOR
D
D
5,11,20 AD[31..0]
Intel Corporation
Title
TX DESKTOP PCI SLOTS 3 & 4
Size Date:
1 2 3 4 5 6
Document Number Sheet 21 of
8
Rev 2.1 29
Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
A
ISA SLOT#1
SD[15..0] 11,14,23,24,25 +5V J8 11,14,23,24 RSTISA -5V 12,14,23,24,25 IRQ9 -12V +12V 12,14,23,24,25 DRQ2 11,23,24,25 ZEROWS# 11,23,24,25 SMEMW# 11,23,24,25 SMEMR# 11,14,23,24,25 IOW# 11,14,23,24,25 IOR# 12,14,23,24 DACK3# 12,14,23,24,25 DRQ3 12,14,23,24 DACK1# 12,14,23,24,25 DRQ1 11,23,24,25 REFRESH# 11,23,24 SYSCLK 12,14,23,24,25 IRQ7 12,14,23,24,25 IRQ6 12,14,23,24,25 IRQ4 12,14,23,24 DACK2# 12,14,23,24 T/C 11,23,24,25 BALE 3,23,24 OSC 12,14,23,24,25 IRQ5 12,14,23,24,25 IRQ3 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 IOCHK# 11,23,24,25 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY 11,14,23,24,25 SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 AEN 11,14,23,24
A
B
B
SA[19..0] 10,11,14,23,24,25 SBHE# 11,23,24,25 LA23 11,23,24,25 LA22 11,23,24,25 LA21 11,23,24,25 LA20 11,23,24,25 LA19 11,23,24,25 LA18 11,23,24,25 LA17 11,23,24,25 MEMR# 10,11,23,24,25 MEMW# 10,11,23,24,25 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
11,23,24,25 MEMCS16# 11,23,24,25 IOCS16# 12,14,23,24,25 IRQ10 12,14,23,24,25 IRQ11 12,14,23,24,25 IRQ12 12,13,14,23,24,25 IRQ15 12,13,14,23,24,25 IRQ14 12,14,23,24 DACK0# 12,14,23,24,25 DRQ0 12,23,24 DACK5# 12,23,24,25 DRQ5 12,23,24 DACK6# 12,23,24,25 DRQ6 12,23,24 DACK7#
C
12,23,24,25 DRQ7 23,24,25 MASTER#
C
CON_ISA16B
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX DESKTOP ISA SLOT#1
Size Document Number Sheet 22 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
A
A
ISA SLOT#2
SD[15..0] 11,14,22,24,25 +5V J9 11,14,22,24 RSTISA -5V 12,14,22,24,25 IRQ9 -12V +12V 12,14,22,24,25 DRQ2 11,22,24,25 ZEROWS# 11,22,24,25 SMEMW# 11,22,24,25 SMEMR#
B
11,14,22,24,25 IOW# 11,14,22,24,25 IOR# 12,14,22,24 DACK3# 12,14,22,24,25 DRQ3 12,14,22,24 DACK1# 12,14,22,24,25 DRQ1 11,22,24,25 REFRESH# 11,22,24 SYSCLK 12,14,22,24,25 IRQ7 12,14,22,24,25 IRQ6 12,14,22,24,25 IRQ5 12,14,22,24,25 IRQ4 12,14,22,24,25 IRQ3 12,14,22,24 DACK2# 12,14,22,24 T/C 11,22,24,25 BALE 3,22,24 OSC
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
IOCHK# 11,22,24,25 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY 11,14,22,24,25 SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 AEN 11,14,22,24
B
SA[19..0] 10,11,14,22,24,25 SBHE# 11,22,24,25 LA23 11,22,24,25 LA22 11,22,24,25 LA21 11,22,24,25 LA20 11,22,24,25 LA19 11,22,24,25 LA18 11,22,24,25 LA17 11,22,24,25 MEMR# 10,11,22,24,25 MEMW# 10,11,22,24,25 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
C
11,22,24,25 MEMCS16# 11,22,24,25 IOCS16# 12,14,22,24,25 IRQ10 12,14,22,24,25 IRQ11 12,13,14,22,24,25 IRQ15 12,13,14,22,24,25 IRQ14 12,14,22,24 DACK0# 12,14,22,24,25 DRQ0 12,22,24 DACK5#
C
12,14,22,24,25 IRQ12
12,22,24,25 DRQ5 12,22,24 DACK6# 12,22,24,25 DRQ6 12,22,24 DACK7# 12,22,24,25 DRQ7 22,24,25 MASTER#
CON_ISA16B
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX DESKTOP ISA SLOT#2
Size Document Number Sheet 23 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
1
2
3
4
5
6
7
8
A
A
ISA SLOT#3
SD[15..0] 11,14,22,23,25 +5V J10 11,14,22,23 RSTISA -5V 12,14,22,23,25 IRQ9 -12V +12V
B
12,14,22,23,25 DRQ2 11,22,23,25 ZEROWS# 11,22,23,25 SMEMW#
11,22,23,25 SMEMR# 11,14,22,23,25 IOW# 11,14,22,23,25 IOR# 12,14,22,23 DACK3# 12,14,22,23,25 DRQ3 12,14,22,23 DACK1# 12,14,22,23,25 DRQ1 11,22,23,25 REFRESH# 11,22,23 SYSCLK 12,14,22,23,25 IRQ7 12,14,22,23,25 IRQ6 12,14,22,23,25 IRQ5 12,14,22,23,25 IRQ4 12,14,22,23,25 IRQ3 12,14,22,23 DACK2# 12,14,22,23 T/C 11,22,23,25 BALE 3,22,23 OSC
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
IOCHK# 11,22,23,25 SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY 11,14,22,23,25 SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 AEN 11,14,22,23
B
SA[19..0] 10,11,14,22,23,25 SBHE# 11,22,23,25 LA23 11,22,23,25 LA22 11,22,23,25 LA21 11,22,23,25 LA20 11,22,23,25 LA19 11,22,23,25 LA18 11,22,23,25 LA17 11,22,23,25 MEMR# 10,11,22,23,25 MEMW# 10,11,22,23,25 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
C
11,22,23,25 MEMCS16# 11,22,23,25 IOCS16# 12,14,22,23,25 IRQ10 12,14,22,23,25 IRQ11 12,14,22,23,25 IRQ12 12,13,14,22,23,25 IRQ15
C
12,13,14,22,23,25 IRQ14 12,14,22,23 DACK0# 12,14,22,23,25 DRQ0 12,22,23 DACK5# 12,22,23,25 DRQ5 12,22,23 DACK6# 12,22,23,25 DRQ6 12,22,23 DACK7# 12,22,23,25 DRQ7 22,23,25 MASTER#
CON_ISA16B
D
D
This drawing contains information which has not been verified for manufacturing an end user product Intel is not responsible for he t misuse of this information.
1 2 3 4 5 6
Intel Corporation
Title
TX DESKTOP ISA SLOT#3
Size Document Number Sheet 24 of
8
Rev 2.1 29
Date: Thursday, December 19, 1996
7
A
B
C
D
E
+5V
10,11,14,22,23,24 SA[19:0] 7 RP13-22 SA0 10K 6 RP26-33 SA1 10K 7 RP26-22 SA2 10K 5 RP25-44 SA3 10K 6 RP25-33 SA4 10K 7 RP25-22 SA5 10K 8 RP25-11 SA6 10K 6 RP24-33 SA7 10K 8 RP24-11 SA8 10K 7 RP22-22 SA9 10K 5 RP19-44 SA10 10K 6 RP19-33 SA11 10K 7 RP19-22 SA12 10K 8 RP19-11 SA13 10K 5 RP13-44 SA14 10K 6 RP13-33 SA15 10K 8 RP13-11 SA16 10K 5 RP11-44 SA17 10K 6 RP11-33 SA18 10K 7 RP11-22 SA19 10K 12,13,14,22,23,24 IRQ[15:0] 2 RP55-27 10K 5 RP24-44 10K 7 RP24-22 10K 5 RP22-44 10K 6 RP22-33 10K 8 RP22-11 10K 1 RP55-18 10K 5 RP5-4 4 10K 7 RP33-22 10K 6 RP33-33 10K 5 RP33-44 10K 7 RP39-22 10K 8 RP39-11 10K IRQ1 IRQ3 IRQ4 IRQ5 IRQ6
+5V 11,14,22,23,24 SD[15:0] 8 RP11-1 1 SD0 10K 5 RP7-4 4 SD1 10K 6 RP7-3 3 SD2 10K 7 RP7-2 2 SD3 10K 8 RP7-1 1 SD4 10K 6 RP5-3 3 SD5 10K 7 RP5-2 2 SD6 10K 8 RP5-1 1 SD7 10K 8 RP45-1 1 SD8 10K 7 RP45-2 2 SD9 10K 6 RP45-3 3 SD10 10K 5 RP45-4 4 SD11 10K 8 RP49-1 1 SD12 10K 7 RP49-2 2 SD13 10K 6 RP49-3 3 SD14 10K 5 RP49-4 4 SD15 10K +5V 8 RP9-1 2.7K 7 RP9-2 2.7K 6 RP9-3 2.7K 5 RP9-4 2.7K +5V 1 2 3 4 PIRQ0# PIRQ1# PIRQ2# PIRQ3# PIRQ0# 12,20,21 PIRQ1# 12,20,21 PIRQ2# 12,20,21 PIRQ3# 12,20,21
+5V
+5V
8
RP26-1 1 10K
BALE 11,22,23,24 IOR# 11,14,22,23,24 IOW# 11,14,22,23,24 MEMR# 10,11,22,23,24 MEMW# 10,11,22,23,24 SMEMR# 11,22,23,24 SMEMW# 11,22,23,24 SBHE# 11,22,23,24 +3_3V
2 8 8 6 5
R165 1 1K RP8-1 1 330 RP27-1 1 330 RP27-3 3 330 RP27-4 4 330
REFRESH# 11,22,23,24 ZEROWS# 11,22,23,24
4
4 RP47-45 10K 2 RP47-27 10K 6
4
MASTER# 22,23,24 MEMCS16# 11,22,23,24 IOCS16# 11,22,23,24 IOCHRDY 11,14,22,23,24 IOCHK# 11,22,23,24
3 RP31-36 2.7K 8 RP31-11 2.7K 2 RP30-27 2.7K 5 RP30-44 2.7K +5V
ACK64S3# ACK64S2# ACK64S1# ACK64S0#
ACK64S3# 21 ACK64S2# 21 ACK64S1# 20 ACK64S0# 20 5
RP39-3 3 10K RP39-4 4 10K
3 RP47-36 10K 1 RP47-18 10K 8
4 RP44-45 1K 2 R74 4.7K 1
4 RP31-45 2.7K 7 RP31-22 2.7K 1 RP30-18 2.7K 6 RP30-33 2.7K +5V
REQ64S3# REQ64S2# REQ64S1# REQ64S0#
REQ64S3# 21 REQ64S2# 21 REQ64S1# 20 REQ64S0# 20
RP33-1 1 10K
2 RP41-2 7 2.7K 6 RP37-3 3 2.7K
PAR 5,11,20,21 PERR# 20,21 SERR# 11,20,21 PLOCK# 5,20,21 STOP# 5,11,20,21 DEVSEL# 5,11,20,21
8 5
RP48-1 1 10K RP48-4 4 10K
PHOLD# 5,11 PHLDA# 5,11
11,22,23,24 LA[23:17] 5 RP36-44 10K 7 RP36-22 10K 8 RP36-11 10K 5 RP28-44 10K 6 RP28-33 10K 7 RP28-22 10K 8 RP28-11 10K LA17 LA18 LA19 LA20 LA21 LA22 LA23
12,14,22,23,24 DRQ[7:0] 1 RP46-1 5.6K 4 RP16-4 5.6K 3 RP16-3 5.6K 1 RP16-1 5.6K 2 RP46-2 5.6K 3 RP46-3 5.6K 4 RP46-4 5.6K 8 5 6 8 7 6 5 DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7
3 RP41-3 6 2.7K 5 RP37-4 4 2.7K
1 RP41-1 8 2.7K 1 RP40-1 8 2.7K 2 RP40-2 7 2.7K 3 RP40-3 6 2.7K 4 RP40-4 5 2.7K 7 8 RP37-2 2 2.7K RP37-1 1 2.7K
3
3
TRDY# 5,11,20,21 IRDY# 5,11,20,21 FRAME# 5,11,20,21 SBO# 20,21 SDONE 20,21
+5V IRQ7 8 IRQ8 7 IRQ9 6 IRQ10 5 IRQ11 IRQ12 IRQ14 5 IRQ15 6 7 8 RP17-4 4 10K RP17-3 3 10K RP17-2 2 10K RP17-1 1 10K PGNT0# PGNT1# PGNT2# PGNT3# PGNT0# 5,20 PGNT1# 5,20 PGNT2# 5,21 PGNT3# 5,21 +3_3V RP14-1 1 10K RP14-2 2 10K RP14-3 3 10K RP14-4 4 10K PREQ0# PREQ1# PREQ2# PREQ3# PREQ0# 5,11,20 PREQ1# 5,11,20 PREQ2# 5,11,21 PREQ3# 5,11,21
SB3V
2
2
1
1
Intel Corporation
Title
TX DESKTOP PULL-UPS
Size Date:
A B C D
Document Number Thursday, December 19, 1996
E
Rev 2.1 Sheet 25 of 29
A
B
C
D
E
+3_3V
+3_3V
+12V
CPUVCORE MH1
+5V
2 1 C210 0.1uF
4
3
1 C33 1 C131 1 C32 1 C130 1 C31 1 C99 1 C129 1 C98 1 C22 1 C183 2 C248 1 C17 2 C71 2 C64 1 C87 2 C25 2 C27 2 C243 1 C184 2 C51 2 C34
2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF
1 2 C116 0.1uF 2 C188 2 C194 2 C195 1 C107 1 C218 1 C221 2 C93 2 C102 2 C66 1 C94 1 C199 2 C166 2 C92 2 C181 1 C136 1 C165 1 C75 1 C156 1 C106 2 C172 1 C211 2 C44 1 C65 2 C76 2 C169 2 C117 2 C135 1 C203 1 C43 2 C164 2 C190 1 C182 1 C81 1 C212 1 C83 1 C177 1 C191 2 C161 1 C198 1 C138 2 C189 2 C186 2 C158 1 C105 1 C176 1 C79 1 C180 1 C101 1 C133 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 2 0.1uF 1 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF
1 2 C97 0.01uF 1 2 C80 0.01uF 1 2 C84 0.01uF 1 2 C82 0.01uF 2 1 C134 0.01uF 1 2 C170 0.01uF 2 1 C171 0.01uF 1 2 C179 0.01uF 2 1 C69 0.01uF 1 2 C49 0.01uF 1 2 C213 0.01uF 1 2 C137 0.01uF 2 1 C187 0.01uF
1 C4 1 C23
2 10uF 2 10uF
-12V
1 2 C143 1uF 2 1 C128 1uF 2 1 C104 1uF 1 2 C151 1uF 2 1 1uF C124 2 1 C145 1uF 1 2 C127 1uF 2 1 C155 1uF 1 2 C112 1uF 1 2 C144 1uF 1 2 C118 1uF 2 1 C157 1uF 1 2 C113 1uF CPUVIO
C5 2 1 10uF
1 2 C142 1uF 1 2 C122 1uF 2 1 C103 1uF 1 2 C141 1uF 1 2 C114 1uF 1 2 C115 1uF 1 2 C153 1uF 2 1 C123 1 C121 1 C146 1 C152 1 C154 1 C271 1 C270 1uF 2 1uF 2 1uF 2 1uF 2 1uF 2 220uF 2 220uF
1
MOUNT-HOLE MH2 1
4
MOUNT-HOLE MH3 1
-5V
MOUNT-HOLE MH4 1
C6 2 1 10uF
MOUNT-HOLE MH5 1
1 2 C206 0.01uF 2 1 C173 0.01uF +3_3V
STB5V
+5V 2 C26 2 C35 1 C88 1 C42 1 C40 2 C28 1 C18 1 C100 2 C237 1 0.01uF 1 0.01uF 2 0.01uF 2 0.01uF 2 0.01uF 1 0.01uF 2 0.01uF 2 0.01uF 1 0.01uF
1 C68 2 C95 2 C168 2 C174 1 C132 2 C222 2 C219
2 0.001uF 1 0.001uF 1 0.001uF 1 0.001uF 2 0.001uF 1 0.001uF 1 0.001uF
1 2 C50 0.1uF 1 2 C250 0.1uF
CPUVCORE
+5V
1 2 C258 0.1uF
+3_3V +3_3V 2 C264 2 C265 1 C263 1 C262 1 C261 1 C260 2 C259 1 0.1uF 1 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 1 0.1uF
+5V
1 C126 1 C108 1 C109 1 C110 1 C111 1 C147 1 C148 1 C149 1 C150 1 C120 1 C119 1 C139 1 C140
2 220uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF 2 0.1uF
MOUNT-HOLE
3
MH6 1
MOUNT-HOLE MH7 1
MOUNT-HOLE MH8 1
2
1 C89 1 C175 1 C86 1 C90 1 C185
2 10uF 2 10uF 2 10uF 2 10uF 2 10uF
+5V STB5V U21C 14 5 7 7407 U21D 14 9 7 7407 U21E 14 11 7 7407 U21F 14 13 7 7407 12 10 14 13 7 8 14 11 7 6 14 9 7 U2D 8
+5V U19C 14 5 7 7407 U19D 10 14 9 7 7407 8 6
MOUNT-HOLE MH9 1
2
+3_3V
CPUVCORE
+5V
2 1 C268 0.1uF 2 1 C267 0.1uF +3_3V CPUVIO
74HCT14 U2E
MOUNT-HOLE MH10 1
1 C96 2 C36 1 C41 2 C52 +5V
2 0.001uF 1 0.001uF 2 0.001uF 1 0.001uF
MOUNT-HOLE
2 1 C266 0.1uF
74HCT14 U2F 12
74HCT14
1
1 C11 1 C178 1 C47 1 C48 1 C125 1 C12 1 C38
2 10uF 2 10uF 2 10uF 2 10uF 2 10uF 2 10uF 2 10uF
1
Intel Corporation
Title TX Desktop Decoupling Capacitor s Size Document Number Sheet
E
Rev 2.1 26 of 29
Date: Thursday, December 19, 1996
A B C D
A
B
C
D
E
U9 VOUT +5V 3 VIN ADJ LT1587 220uF 1 R27 178 1 2 C70 0.33uF C77 + 220uF 3 +12V D2 1N4148_SMT C39 C46 0.1uF 1 R22 2 1K VROAP 3 + LT1006 5 4 2 1 D1 1N4148_SMT VROAN 2 U7 6 1 VROAOUT 7 8 2 2 R21 1K 1 VRVADJ1 1 2 2 R28 110 1 R29 2 470 VRVIO2
4
CPUVIO
SEE NOTE 1
4
C53 +
0.1uF
R162 3.3M 3 2
C272 0.1uF
3
3
+12V U11 LT1580 5 VCONT VIN SENSE + SEE NOTE 2 VOUT 3 ADJ C74 22uF 4 1 VRSENSE C72 1uF CPUVCORE 1 R37 2 2
+ + C54 220uF
C55 220uF
VRFETD2 2 R36 107 VRVADJ2 1 1 +5V
C67 .33UF
2 2 R35 432 VRFETD1 4 2 2 1 1 R31 10K 2 Q3 R26 191 1 3
+5V
R30 10K 1 R44 10K 2 C91 + 100UF + C73 220UF Q2 2N7002
2
2
1 ZVN4206
VRGATEC
2N3904
2 Q4
VCC2DET 2
Resistors are implemented as copper traces on inter layer: For 1oz. copper: Note 1: trace widths are 50 mils, 1.24" long. Note 2: trace widths are 50 mils, 0.83" long.
1 1
Intel Corporation
Title
TX DESKTOP VOLTAGE REGULATOR
Size Document Number Sheet
E
Rev 2.1 27 of 29
Date: Thursday,