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440LX CUSTOMER REFERENCE DESIGN
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TITLE
COVER SHEET BLOCK DIAGRAM SLOT1 CONN. CLK SYNTHESIZER PAC DIMM SOCKETS PIIX4 ULTRA I/O AGP CONN. PCI CONN. ISA CONN. IDE CONN. USB CONN FLASH BIOS PARALLEL SERIAL/FLOPPY KEYBD/MOUSE VRM PWR CONN GTL TERMINATION PCI/AGP PULLUPS ISA PULLUPS PAC DECOUP BULK DECOUP VREF PAGE REVISION HISTORY
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THESE SCHEMATICS ARE PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL, SCHEMATIC OR SAMPLE.
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein. Intel disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this specification. Intel does not warrant or represent that such use will not infringe such rights. I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation.
*Third-party brands and names are the property of their respective owners. Copyright * Intel Corporation 1996
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INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title Size A Date: Document Number Intel 440LX PCIset Sheet
D
1
Rev 1.4 1
E
of
33
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B
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1
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8
VRM VTT GEN.
PG. 25
A
KLAMATH 'SLOT 1' CONNECTOR
PG. 3,4
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PR ODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
CLOCK ITP CON.
PG. 5
A
ADDR ADDR
CNTL CNTL
DATA
HOST BUS
DATA CNTL
GTL TERM.
PG. 27
MEMORY
3 DIMM MODULES PGS. 9-11
AGP CONN.
ADDR/DATA
PAC
82443LX 492 BGA
ADDR
CNTL
AGP SIDEBAND PG. 15
B
PG. 6-8
DATA
B
ADD/DATA
CNTL
PCI BUS
ADD/DATA PG. 20 2 USB CONN. CNTL PGS. 16,17 2 PCI IDE CONNECTORS
USB
USB
PCI CONN
PCI CONN
PCI CONN
PCI CONN
PG. 19 CNTL
SECONDARY IDE
PRIMARY IDE
PIIX4 82371AB
324 BGA PGS. 12,13
CNTL
ADDR/DATA
ADDR/DATA
C
C
CONTROL
ADDR
CNTL
DATA
ISA BUS
PG 18 ADDR CNTL DATA
ADDR
ADDR
FLASH BIOS
PG. 21
DATA
X-BUS
KEYBOARD PG. 24
ISA CONN
ISA CONN
ULTRA I/O
PG.14 CNTL
MOUSE PG.24
D
DATA
D
FLOPPY CONN. PG. 23
PARA. CONN. PG. 22
SER. CONN. PG .23 SER. CONN. RESET, POWER CONNECTORS PG. 26
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title DECOUPLING CAPACITORS PGS. 30-32 Intel 440LX PCIset Block Diagram Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 2
8
ISA, PCI RESISTORS
PG. 28,29
Rev 1.4 o f 33
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2
3
4
5
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7
A
B
C
D
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VCCVID VTT
VTT J1A B01 B02 B03 B04 B05 B06 B07 B08 B09 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73
EMI FLUSH# SMI# INIT# VCC_VTT STPCLK# TCK SLP# VCC_VTT TMS TRST# RESERVED VCC_VID THRMDA THRMDC LINT[1] VCC_VID PICCLK BP#[2] RESERVED 100/66# PICD[1] PRDY# BPM#[1] VCC_VID DEP#[2] DEP#[4] DEP#[7] VCC_VID D#[62] D#[58] D#[63] VCC_VID D#[56] D#[50] D#[54] VCC_VID D#[59] D#[48] D#[52] EMI D#[41] D#[47] D#[44] VCC_VID D#[36] D#[40] D#[34] VCC_VID D#[38] D#[32] D#[28] VCC_VID D#[29] D#[26] D#[25] VCC_VID D#[22] D#[19] D#[18] EMI D#[20] D#[17] D#[15] VCC_VID D#[12] D#[7] D#[6] VCC_VID D#[4] D#[2] D#[0] VCC_VID VCC_VTT GND VCC_VTT IERR# A20M # GND FERR# IGNNE# TDI GND TDO PWRGOOD TESTHI1 GND THERMTRIP# RESERVED LINT[0] GND PICD[0] PREQ# BP#[3] GND BPM#[0] BINIT# DEP#[0] GND DEP#[1] DEP#[3] DEP#[5] GND DEP#[6] D#[61] D#[55] GND D#[60] D#[53] D#[57] GND D#[46] D#[49] D#[51] GND D#[42] D#[45] D#[39] GND RESERVED D#[43] D#[37] GND D#[33] D#[35] D#[31] GND D#[30] D#[27] D#[24] GND D#[23] D#[21] D#[16] GND D#[13] D#[11] D#[10] GND D#[14] D#[9] D#[8] GND D#[5] D#[3] D#[1]
4
28 FLUSH# 13,28 SMI# 6,13,28 HINIT# 13,28 STPCLK# 5 TCK 13,28 SLP# 5 TMS 5 TRST#
25,28 LINT1 5 PICCLK
28 PICD1 5,27 PRDY#0
3
HD#62 HD#58 HD#63 HD#56 HD#50 HD#54 HD#59 HD#48 HD#52 HD#41 HD#47 HD#44 HD#36 HD#40 HD#34 HD#38 HD#32 HD#28 HD#29 HD#26 HD#25 HD#22 HD#19 HD#18 HD#20 HD#17 HD#15 HD#12 HD#7 HD#6 HD#4 HD#2 HD#0 EMI_PD3 EMI_PD2 EMI_PD1
2
A01 A02 A03 A04 A05 A06 A07 A08 A09 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73
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IERR_PU 28 A20M# 25,28 FERR# 13,28 IGNNE# 25,28 TDI 5 TDO 5 POWERGOOD 26 TESTHI_PU 28 THERMTRIP# 28 LINT0 25,28 PICD0 28 PREQ#0 5
3
HD#61 HD#55 HD#60 HD#53 HD#57 HD#46 HD#49 HD#51 HD#42 HD#45 HD#39 HD#43 HD#37 HD#33 HD#35 HD#31 HD#30 HD#27 HD#24 HD#23 HD#21 HD#16 HD#13 HD#11 HD#10 HD#14 HD#9 HD#8 HD#5 HD#3 HD#1
2
SLOT1_0.7
SLOT 1a
8,27 HD#[63:0]
1
R3 0
R4 0
R5 0
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title SLOT 1 (PART I) Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
1
Rev 1.4 3 of 33
A
B
C
D
A
B
C
D
E
VCCVID VCC
4
VCC3 J1B
4
5,6,27 HRESET#
HA#29 HA#26 HA#24 HA#28 HA#20 HA#21 HA#25 HA#15 HA#17 HA#11 HA#12 HA#8 HA#7
3
HA#3 HA#6 HREQ#0 HREQ#1 HREQ#4 6,27 HLOCK# 6,27 DRDY# 6,27 RS#0 6,27 HIT# 6,27 RS#2
VID3 VID0
R220 R222
0 0
RV3 RV0
B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121
RESET# BREQ1# FRCERR# VCC_VID A#[35] A#[32] A#[29] EMI A#[26] A#[24] A#[28] VCC_VID A#[20] A#[21] A#[25] VCC_VID A#[15] A#[17] A#[11] VCC_VID A#[12] A#[8] A#[7] VCC_VID A#[3] A#[6] EMI S_O# REQ#[0] REQ#[1] REQ#[4] VCC_VID LOCK# DRDY# RS#[0] VCC_5 HIT# RS#[2] RESERVED VCC_3 RP# RSP# AP#[1] VCC_3 AERR# VID[3] VID[0] VCC_3
GND BCLK BREQ0# BERR# GND A#[33] A#[34] A#[30] GND A#[31] A#[27] A#[22] GND A#[23] RESERVED A#[19] GND A#[18] A#[16] A#[13] GND A#[14] A#[10] A#[5] GND A#[9] A#[4] BNR# GND BPRI# TRDY# DEFER# GND REQ#[2] REQ#[3] HITM# GND DBSY# RS#[1] RESERVED GND ADS# RESERVED AP#[0] GND VID[2] VID[1] VID[4]
A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118 A119 RV2 A120 RV1 A121 RV4
CPUHCLK 5 BREQ#0 6,27
HA#30 HA#31 HA#27 HA#22 HA#23 HA#19 HA#18 HA#16 HA#13 HA#14 HA#10 HA#5
3
HA#9 HA#4 BNR# 6,27 BPRI# 6,27 HTRDY# 6,27 DEFER# 6,27 HREQ#2 HREQ#3 HITM# 6,27 DBSY# 6,27 RS#1 6,27 ADS# 6,27
R221 R223 R224 0 0 0
VID2 VID1 VID4
NOTE : U25 IS DEFAULT NO STUFF DEVICE. LM75 IS 3.3 VOLT THERMAL SENSOR.
2
SLOT1_0.7
2
SLOT 1b
6,27 HA#[31:3] 6,27 HREQ#[4:0] 25 VID[4:0] EMI_PD5 R6 0 EMI_PD4 VID0 R7 0 VID1 2 3 JP16 1 VID2 2 3 JP17 1 VID3 2 3 JP18 1 VID4 2 3 SEL_VID4 SEL_VID3 SEL_VID2 2 3 JP15 1 SEL_VID1 VCC JP14 1 SEL_VID0 R207 8.2K 5,9,10,11,13,28 SMBDATA R209 8.2K 5,9,10,11,13,28 SMBCLK 13,28 THERM# 1 2 3 4 R210 8.2K
LOCATE NEAR THE CPU AND PAC. SLAVE ADDRESS = 1001100b
VCC3 U25 SDAT SCLK OTS GND LM75_0.1 VCC3 SA0 SA1 SA2 8 7 6 5
VCC3
R208 8.2K
TW_PU1
NOTE : JP14 - JP18 , R207 AND R209 - R212
1
R211 8.2K
ARE DEFAULT NO-STUFF
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title SLOT 1 (PART II) Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
1
R212 8.2K
Rev 1.4 4 of 33
A
B
C
D
A 10
B
C
VCC3 VCC3
D
VCC2.5
E
F
G
H
I
VCC3 VCC3
J
VCC3
10
6 14 19 30 36
U20 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ3 VDDQ2 VDDQ2 C1 VDD XTLI1 Y1 14.318 4 XTALIN REFOUT IOAPIC0 IOAPIC1 2 47 46 R_IO_XTALIN R_ACLK0 R170 R198 33 22 IO_XTALIN 2 XTALIN
VDD VDD VDD VDD
1 8 13 18
U1
42 48
1
R10 10K
R11 10K
9
13 16 16 17 17 7 PX4PCLK PCONNCLK1 PCONNCLK2 PCONNCLK3 PCONNCLK4 PACPCLK
10pF C3 10pF R171 R172 R174 R176 R178 R180
SEL0 SEL1
9 10 7 6
RS0
RS1
XTLO1 R_PCLKF R_PCLK0 R_PCLK1 R_PCLK2 R_PCLK3 R_PCLK4
5 7 8 10 11 12 13 15 44 43 41 40 23 24
PICCLK 3
9
XTALOUT PCI_F PCI0 PCI1 PCI2 PCI3 PCI4 PCI5 CPU0 CPU1 CPU2 CPU3 SDATA SCLOCK
3 R194 R195 R196 R197 22 C1 22 C2 22 C3 22 C4 17 19 20 14 15 12
XTALOUT 0.5X AUDIO 1X AUDIO SREF0 REF1 REF2 48MHz 48MHz 24MHz CKIO
VCC3
33 33 33 33 33 33
48 SSOP
GND GND GND
8
15 AGPHCLK
R190
33
R_CCLK3
4,9,10,11,13,28 SMBDATA
SEL_66/60# GND GND GND GND GND GND GND GND MODE
26 25 MPU
FSEL1 R16 10K VCC3
R15 8.2K
7
4,9,10,11,13,28 SMBCLK
4 11 16
4 CPUHCLK 6 PACHCLK
R185 R187
33 33
R_CCLK0 R_CCLK1
SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5/PWR_DWN# SDRAM6/CPU_STOP# SDRAM7/PCI_STOP# SDRAM8 SDRAM9 SDRAM10 SDRAM11
38 37 35 34 32 31 29 28 21 20 18 17
R_DCLK0 R_DCLK1 R_DCLK2 R_DCLK3 R_DCLK4 R_DCLK5 R_DCLK6 R_DCLK7 R_DCLK8 R_DCLK9 R_DCLK10 R_DCLK11
R173 R175 R177 R179 R181 R182 R183 R184 R186 R188 R189 R191
22 22 22 22 22 22 22 22 22 22 22 22
13 OSC0 DIMMHCLK0 9 18 OSC1 DIMMHCLK1 9 14 OSC3 DIMMHCLK2 9 DIMMHCLK3 9 DIMMHCLK4 10 13 48MHz DIMMHCLK5 10 DIMMHCLK6 10 DIMMHCLK7 10 DIMMHCLK8 11 DIMMHCLK9 11 DIMMHCLK10 11 DIMMHCLK11 11 VCC3
20 SSOP
R14 10K OE 5 RO1
8
7
R_CCLK2
CK3D_0.9
SLAVE ADDR. = 1101010b
6
VCC2.5 R192 33 VCC2.5
3 9 16 22 27 33 39 45
NOTE :
6
ITP_CLK
5
R27 4,6,27 HRESET# 240 26 DBRESET# 3 TCK 3 TMS
R18 100
R19 150
OPTIONAL ITP TEST CONNECTOR
J2 ITP_RST 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
R20 330
R21 150
R22 330
R23 330
5
4
ITP_PON
BSEN_PU1 R_PRDY#0 R28 240
TDI 3 TDO 3 TRST# 3 PREQ#0 3 PRDY#0 3,27
4
VTT
R29 1K 5%
R30 470
3
ITP CONN
3
2
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title CLOCK SYNTHESIZER Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 5 of 33 Rev 1.4
2
1 A B C D E F G
1
H
I
J
A
B
C
D
E
VTT
4,27 HA#[31:3]
4
U3-1 HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31 M26 N26 N23 N24 M25 M24 N25 M23 L24 L25 L23 M22 K22 K25 K24 L22 J26 J24 J25 H25 J23 H23 K21 G26 H24 J21 G25 H21 H22 K26 P26 P24 A13 L26 R24 V25 R22 R26 U26 U25 B25 P23 T24 W26 U22 P25 R23 T23 T25 R25 HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# CPURST# ADS# BNR# INIT# BREQ0# BPRI# DBSY# DEFER# DRDY# HIT# HITM# HLOCK# HTRDY# RS#0 RS#1 RS#2 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
F23 U24
MAA[10:0] 10,11 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 AC13 AE13 AB12 AD13 AC14 AD15 AC15 AD16 AC17 AE17 AA18 AE18 AE19 AF19 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
4
VCC3 PINS: C3, E13, F20, G6, L11, M11, N11, P11, P12, P22, R3, R4, R11-13, T11-16, AD3, AD12, AD24
VTT VTT
MAA11 10,11 MAA12 10,11 MAA13 10,11 MAB[10:0] 9
82443LX
492 BGA
3
DRAM INTERFACE
4,5,27 4,27 4,27 3,13,28 4,27 4,27 4,27 4,27 4,27 4,27 4,27 4,27 4,27
HRESET# ADS# BNR# HINIT# BREQ#0 BPRI# DBSY# DEFER# DRDY# HIT# HITM# HLOCK# HTRDY# RS#0 RS#1 RS#2
RCSA6# RCSA7# SCAS3# SRAS3# RCSB0# RCSB1# RCSB2# RCSB3# RCSB4# / RCSB5# / RCSB6# / RCSB7# /
MAB0 MAB1 / MAB2 / MAB3 / MAB4 / MAB5 / MAB6 / MAB7 / MAB8 / MAB9 MAB10 MAB11 MAB12 MAB13
AD14 AF14 AE14 AB14 AE15 AF15 AA19 AF16 AB19 AE16 AF18 AD18 AB18 AD17
MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13
HOST INTERFACE
3
MAB11 9 MAB12 9 MAB13 9 RCSA#[1:0] 11
RCSA0# RCSA1# RCSA2# RCSA3# RCSA4# RCSA5# CDQA0# CDQA1# CDQA2# CDQA3# CDQA4# CDQA5# CDQA6# CDQA7# CDQB1# CDQB5#
AB20 AE20 AF20 AC20 AC19 AB17 AD9 AC9 AF21 AD21 AD11 AE11 AE21 AC21 AF12 AE12
RCSA#0 RCSA#1 RCSA#2 RCSA#3 RCSA#4 RCSA#5 CDQA#0 CDQA#1 CDQA#2 CDQA#3 CDQA#4 CDQA#5 CDQA#6 CDQA#7
RCSA#[3:2] 10 RCSA#[5:4] 9
CDQA#[7:0] 9,10,11
4,27 RS#[2:0]
2
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
NOTE :
CDQB#1 9 CDQB#5 9
2
4,27 HREQ#[4:0]
MUST USE CMOS BUFFER TO AVOID OVERIDE OF INTERNAL PULLDOWN ON CKE SIGNAL.
U22 2 3 4 5 6 7 8 9 19 1 A1 A2 A3 A4 A5 A6 A7 A8 G DIR 74LVC245 R_CKEBUF R164 8.2K B1 B2 B3 B4 B5 B6 B7 B8 18 17 16 15 14 13 12 11
MISC
5 PACHCLK 9,12,15,16,17 PCIRST# 25 CRESET# VCC3 R31 8.2K 13 VREF5V VCC3 R32 8.2K R236
1
T2 AE2 V23 U23 R_TS1 AE25
HCLKIN RSTIN# CRESET# ECC_ERR# TESTIN#
SRAS0# SRAS1# SRAS2# VSS PINS: SCAS0# SCAS1# SCAS2# CKE WE#0 WE#1 WE#2 WE#3
AF11 AC10 AF13 AD10 AE9 AF10 AD20 AF8 AE10 AF9 AC12 CKE
SRAS#0 SRAS#1 SRAS#2 SCAS#0 SCAS#1 SCAS#2
11 10 9 11 10 9
B2
A1, A26, AA6, AA7-10, AA17, AA20, AA21, AB5, AB13, AB22, AF1, AF26, C15, E5, E22, F6, F8, F9, F17, REF5V F19, F21, G21, H6, J6, K6, L12-16, M12-16, N22, N12-16, P13-16, R5, R14-16 , T4, U21, V6, W6, W21
B_CKE0 B_CKE1 B_CKE2 B_CKE3 B_CKE4 B_CKE5
11 11 10 10 9 9
JP2 1 2 3 PAC_1.0
WE#0 11 WE#1 10 WE#2 9
VCC3
82443LXa
NOTE: CKE IS PULLED DOWN BY DEFAULT FOR CONFIGURATION 2. SCHEMATICS WITH CONFIGURATION 1 NEED A PULL-UP TO VCC3
5.6K
NOTE : JP2 DEFAULT = 2-3 FOR MAX IOQ DEPTH.
JP2 1-2 2-3
IOQ DEPTH
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PAC HOST AND DRAM INTERFACES Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
1
1 MAX
26 ECCERR#
Rev 1.4 6 of 33
A
B
C
D
A
B
C
D
E
12,16,17 AD[31:0]
U3-2 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 H4 G4 G5 F4 E3 F5 E4 D4 E6 D5 C2 F7 C1 B3 B1 B4 C8 D7 B8 E8 D8 C9 B9 E9 D9 D10 C10 F10 B10 E10 B11 E11 C4 A2 A7 A9 C7 C6 A6 B6 A5 A3 C5 A4 B5 E7 A8 V24 REQ#0 REQ#1 REQ#2 REQ#3 REQ#4 GNT#0 GNT#1 GNT#2 GNT#3 GNT#4 A12 E12 C13 B13 D13 A11 D11 C11 B12 D12 C12 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# FRAME# DEVSEL# IRDY# TRDY# STOP# PAR PERR# SERR# PLOCK# PHLD# PHLDA# WSC# REQ0# REQ1# REQ2# REQ3# REQ4# GNT0# GNT1# GNT2# GNT3# GNT4# GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 GC/BE0# GC/BE1# GC/BE2# GC/BE3# GFRAME# GDEVSEL# GIRDY# GTRDY# GSTOP# GPAR GPERR# GSERR# GREQ# GGNT# PIPE# SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DBF# ST0 ST1 ST2 ADSTB-A ADSTB-B SBSTB AGPREFV AB2 GAD0 AB1 GAD1 AA3 GAD2 AA2 GAD3 AA1 GAD4 Y2 GAD5 W5 GAD6 W3 GAD7 W1 GAD8 V5 GAD9 V3 GAD10 V1 GAD11 V2 GAD12 U6 GAD13 U4 GAD14 T5 GAD15 N5 GAD16 N4 GAD17 N3 GAD18 N2 GAD19 M4 GAD20 L5 GAD21 M2 GAD22 L4 GAD23 L1 GAD24 K5 GAD25 K2 GAD26 J3 GAD27 J1 GAD28 J2 GAD29 H2 GAD30 H1 GAD31 W2 U5 M1 L2 P1 N1 P5 U2 R1 P2 P4 P3 G1 D2 AC1 E2 E1 F2 F1 G3 J5 K4 J4 W4 F3 D1 H5 Y1 K1 G2 T1 ST0 ST1 ST2 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3
GAD[31:0] 15
VCC3 PINS : C3, E13, F20, G6, L11, M11, N11, P11, P12, P22, R3, R4, R11-13, T11-16, AD12, AD3, AD24
4
4
82443LX
492 BGA
PCI INTERFACE
3
3
12,16,17 C/BE#[3:0]
AGP INTERFACE
GC/BE#[3:0] 15
12,16,17,28 12,16,17,28 12,16,17,28 12,16,17,28 12,16,17,28 12,16,17 16,17,28 12,16,17,28 16,17,28
FRAME# DEVSEL# IRDY# TRDY# STOP# PAR PERR# SERR# PLOCK#
GFRAME# 15,28 GDEVSEL# 15,28 GIRDY# 15,28 GTRDY# 15,28 GSTOP# 15,28 GPAR 15,28 GPERR# 15,28 GSERR# 15,28 GREQ# 15,28 GGNT# 15,28 PIPE# 15,28 SBA[7:0] 15
2
12,28 PHLD# 12,28 PHLDA#
2
PCI ARB.
NOTE : REQ#4 IS UNUSED. PULLED UP ONLY.
16,17,28 REQ#[4:0]
VSS PINS :
16,17,28 GNT#[4:0] 5 PACPCLK
A1, A26, AA6, AA7-10, AA17, AA20, AA21, AB5, AB13, AB22, AF1, AF26, C15, E5, E22, F6, F8, F9, F17, F19, F21, G21, H6, PCLKIN J6, K6, L12-16, M12-16, N22, N12-16, P13-16, R5, R14-16 , T4, U21, V6, W6, W21 PAC_1.0
RBF# 15,28 ST[2:0] 15
ADSTB-0 15,28 ADSTB-1 15,28 SBSTB 15,28 AGP_REFV 32 INTEL CORPORATION
1
82443LXb
PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PAC PCI AND AGP INTERFACES Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 7
E
1
Rev 1.4 of 33
A
B
C
D
A
B
C
D
E
9,10,11 MD[63:0]
U3-3 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 Y3 Y5 AA5 AB4 AB6 AD1 AC5 AE1 AE3 AF3 AF4 AE5 AD6 AF6 AC7 AB8 AF23 AC22 AC23 AF25 AD25 AC24 AC26 AB23 AA22 AA24 AA25 Y22 Y24 Y25 W24 W25 AB3 AA4 AC2 Y6 AC4 AD2 AB7 AF2 AD4 AE4 AD5 AF5 AE6 AD7 AE7 AF7 AE23 AF24 AD23 AE26 AD26 AC25 AB24 AB25 AB26 Y21 AA26 W22 Y26 W23 V22 V21 AD8 AE8 AF22 AB21 AC8 AB9 AE22 AD22 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 PAC_1.0 HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# G22 G23 F25 G24 F24 F26 E25 E24 F22 E26 D25 C25 D26 B26 E23 D24 B24 A25 A23 A22 A24 B23 B22 D23 D22 C22 B21 A21 D20 E21 D21 C21 E20 B20 A19 A20 B19 D19 C20 F18 E18 C18 D17 E19 C19 B18 B17 E17 C17 A17 B15 D16 D18 C16 E16 D15 A14 B16 C14 A16 A15 D14 E15 B14 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 HD#[63:0] 3,27
VCC3 PINS : C3, E13, F20, G6, L11, M11, N11, P11, P12, P22, R3, R4, R11-13, T11-16, AD12, AD3, AD24
4
4
82443LX
492 BGA
MEMORY DATA BUS
3
HOST DATA BUS
3
2
2
VSS PINS :
9,10,11 MECC0 9,10,11 MECC[7:1]
A1, A26, AA6, AA7-10, AA17, AA20, AA21, AB5, AB13, AB22, AF1, AF26, C15, E5, E22, F6, F8, F9, F17, F19, F21, G21, H6, J6, K6, L12-16, M12-16, N22, N12-16, P13-16, R5, R14-16 , T4, U21, V6, W6, W21 GTL_REF GTL_REF
C24 T22
PAC_GTLREF1 32 PAC_GTLREF2 32
82443LXc
INTEL CORPORATION
1
1
PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PAC DATA BUSES Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
A B C D
Rev 1.4 Sheet
E
8
of
33
A
B
C
D
E
DIMM CONNECTOR 0
VCC3 VCC3 8,10,11 MD[63:0] 6 18 26 40 41 90 102 110 124 49 59 73 84 133 143 157 168 J3
4
VCC VCC VCC VCC VCC VCC VCC VCC VCC
DIMM CONN. 0
DIMM CONN. 1
DIMM CONN. 2
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
VCC VCC VCC VCC VCC VCC VCC VCC
PAC AND DIMM SOCKET LOCATIONS.
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB13 MAB12
2 3 4 5 7 8 9 10 11 13 14 15 16 17 19 20 86 87 88 89 91 92 93 94 95 97 98 99 100 101 103 104 33 117 34 118 35 119 36 120 37 121 38 123 126 132 28 29 46 47 112 113 130 131
NOTE: EDO PINS NAMES, IF THEY ARE DIFFERENT FROM SDRAM, APPEAR ON THE INSIDE. DIFFERENT PIN NAMES DO NOT NECESSARILY DENOTE DIFFERENT FUNCTIONALITY.
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC NC NC NC NC NC
55 56 57 58 60 65 66 67 69 70 71 72 74 75 76 77 139 140 141 142 144 149 150 151 153 154 155 156 158 159 160 161 134 135 146 147 164 62 128 63 21 22 52 53 105 106 136 137 165 166 167 82 83 30 114 45 129 27 111 115 42 125 79 163
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
4
MAB[13:0]
PAC
MAA[13:0]
3
3
6 MAB[10:0]
6 MAB13 6 MAB12 6,10,11 6 6,10,11 6,10,11 6,10,11 6 6,10,11 6,10,11 CDQA#0 CDQB#1 CDQA#2 CDQA#3 CDQA#4 CDQB#5 CDQA#6 CDQA#7
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) A11 A13 A12 DU A13 DU DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 BA0 BA1 NC NC NC NC NC NC NC NC NC NC NC NC NC A11 A12 /CAS0 /CAS1 /CAS2 /CAS3 /CAS4 /CAS5 /CAS6 /CAS7
DU DU DU NC
CKE0 CKE1 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 SA0 SA1 SA2 SDA SCL
B_CKE4 6 B_CKE5 6 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 MECC0 8,10,11 MECC[7:1] 8,10,11
SLAVE ADDRESS = 1010000b
2
2
6 MAB11
MAB11 MAB12
122 39 24 25 31 44 48 50 51 61 80 81 109 108 145
SMBDATA 4,5,10,11,13,28 SMBCLK 4,5,10,11,13,28 RCSA#4 6 RCSA#5 6
6 WE#2 VCC3
/OE0 /OE2 /WE2
/RAS0 /RAS1 /RAS2 /RAS3 DU DU DU DU DU DU
/S0 /S1 /S2 /S3 /WE0 /CAS /RAS CK0 CK1 CK2 CK3
SCAS#2 6 SRAS#2 6 DIMMHCLK0 DIMMHCLK1 DIMMHCLK2 DIMMHCLK3 5 5 5 5
U14C 6,12,15,16,17 PCIRST# 5 6 74ALS05
8.2K
SDRAM/EDO DIMM
1
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
R237
1
B_PCIRST 10,11
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title FIRST DIMM SOCKET Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
Rev 1.4 9 of 33
A
B
C
D
A
B
C
D
E
DIMM CONNECTOR 1
VCC3 VCC3 8,9,11 MD[63:0]
4 4
6 18 26 40 41 90 102 110 124
J4 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13 MAA12 CDQA#0 CDQA#1 CDQA#2 CDQA#3 CDQA#4 CDQA#5 CDQA#6 CDQA#7 6,11 MAA11 MAA11 MAA12 2 3 4 5 7 8 9 10 11 13 14 15 16 17 19 20 86 87 88 89 91 92 93 94 95 97 98 99 100 101 103 104 33 117 34 118 35 119 36 120 37 121 38 123 126 132 28 29 46 47 112 113 130 131 122 39 24 25 31 44 48 50 51 61 80 81 109 108 145 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
49 59 73 84 133 143 157 168
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) A11 A13 A12 DU A13 DU DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 BA0 BA1 NC NC NC NC NC NC NC NC NC NC NC NC NC A11 A12
NOTE: EDO PINS NAMES, IF THEY ARE DIFFERENT FROM SDRAM, APPEAR ON THE INSIDE. DIFFERENT PIN NAMES DO NOT NECESSARILY DENOTE DIFFERENT FUNCTIONALITY.
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC NC NC NC NC NC
55 56 57 58 60 65 66 67 69 70 71 72 74 75 76 77 139 140 141 142 144 149 150 151 153 154 155 156 158 159 160 161 134 135 146 147 164 62 128 63 21 22 52 53 105 106 136 137 165 166 167 82 83 30 114 45 129 27 111 115 42 125 79 163
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
VCC VCC VCC VCC VCC VCC VCC VCC VCC
3
VCC VCC VCC VCC VCC VCC VCC VCC
3
6,11 MAA[10:0]
DU DU DU NC
CKE0 CKE1 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 SA0 SA1 SA2 SDA SCL
B_CKE2 6 B_CKE3 6 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 R_SA0 R33 4.7K SMBDATA 4,5,9,11,13,28 SMBCLK 4,5,9,11,13,28 RCSA#2 6 RCSA#3 6 MECC0 8,9,11 MECC[7:1] 8,9,11
6,11 MAA13 6,11 MAA12 6,9,11 CDQA#[7:0]
2
/CAS0 /CAS1 /CAS2 /CAS3 /CAS4 /CAS5 /CAS6 /CAS7
VCC3
2
SLAVE ADDRESS = 1010001b
9,11 B_PCIRST 6 WE#1
/OE0 /OE2 /WE2
/RAS0 /RAS1 /RAS2 /RAS3 DU DU DU DU DU DU
/S0 /S1 /S2 /S3 /WE0 /CAS /RAS CK0 CK1 CK2 CK3
SCAS#1 6 SRAS#1 6 DIMMHCLK4 DIMMHCLK5 DIMMHCLK6 DIMMHCLK7 5 5 5 5
SDRAM/EDO DIMM
1
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title SECOND DIMM SOCKET Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
Rev 1.4 10 of 33
A
B
C
D
A
B
C
D
E
DIMM CONNECTOR 2
VCC3 VCC3
4
8,9,10 MD[63:0] 6 18 26 40 41 90 102 110 124 49 59 73 84 133 143 157 168
4
J5 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13 MAA12 CDQA#0 CDQA#1 CDQA#2 CDQA#3 CDQA#4 CDQA#5 CDQA#6 CDQA#7 6,10 MAA11 MAA11 MAA12 2 3 4 5 7 8 9 10 11 13 14 15 16 17 19 20 86 87 88 89 91 92 93 94 95 97 98 99 100 101 103 104 33 117 34 118 35 119 36 120 37 121 38 123 126 132 28 29 46 47 112 113 130 131 122 39 24 25 31 44 48 50 51 61 80 81 109 108 145 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10(AP) A11 A13 A12 DU A13 DU DQMB0 DQMB1 DQMB2 DQMB3 DQMB4 DQMB5 DQMB6 DQMB7 BA0 BA1 NC NC NC NC NC NC NC NC NC NC NC NC NC A11 A12
NOTE: EDO PINS NAMES, IF THEY ARE DIFFERENT FROM SDRAM, APPEAR ON THE INSIDE. DIFFERENT PIN NAMES DO NOT NECESSARILY DENOTE DIFFERENT FUNCTIONALITY.
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC NC NC NC NC NC
55 56 57 58 60 65 66 67 69 70 71 72 74 75 76 77 139 140 141 142 144 149 150 151 153 154 155 156 158 159 160 161 134 135 146 147 164 62 128 63 21 22 52 53 105 106 136 137 165 166 167 82 83 30 114 45 129 27 111 115 42 125 79 163
MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
VCC VCC VCC VCC VCC VCC VCC VCC VCC
3
VCC VCC VCC VCC VCC VCC VCC VCC
3
6,10 MAA[10:0]
DU DU DU NC
CKE0 CKE1 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 SA0 SA1 SA2 SDA SCL
B_CKE0 6 B_CKE1 6 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7 MECC0 8,9,10 MECC[7:0] 8,9,10
6,10 MAA13 6,10 MAA12 6,9,10 CDQA#[7:0]
2
/CAS0 /CAS1 /CAS2 /CAS3 /CAS4 /CAS5 /CAS6 /CAS7
VCC3
2
R_SA1
R166 4.7K
SLAVE ADDRESS = 1010010b
SMBDATA 4,5,9,10,13,28 SMBCLK 4,5,9,10,13,28 RCSA#0 6 RCSA#1 6
9,10 B_PCIRST 6 WE#0
/OE0 /OE2 /WE2
/RAS0 /RAS1 /RAS2 /RAS3 DU DU DU DU DU DU
/S0 /S1 /S2 /S3 /WE0 /CAS /RAS CK0 CK1 CK2 CK3
SCAS#0 6 SRAS#0 6 DIMMHCLK8 5 DIMMHCLK9 5 DIMMHCLK10 5 DIMMHCLK11 5
SDRAM/EDO DIMM
1
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
1
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title THIRD DIMM SOCKET Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
Rev 1.4 11 of 33
A
B
C
D
A
B
C
D
E
U4A AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 7,16,17 AD[31:0] R36 1K 7,16,17 C/BE#[3:0] 7,16,17,28 DEVSEL# 7,16,17,28 FRAME# 7,16,17,28 IRDY# 7,16,17 PAR 6,9,15,16,17 PCIRST# 7,28 PHLD# 7,28 PHLDA# 7,16,17,28 SERR# 7,16,17,28 STOP# 7,16,17,28 TRDY# 28 28 28 28 19 PU_REQ#0 PU_REQ#1 PU_REQ#2 PU_REQ#3 SDA[2:0] C/BE#0 C/BE#1 C/BE#2 C/BE#3 CLKRUN# R_AD18 B10 A10 D9 C9 B9 A9 D8 E8 B8 A8 D7 C7 B7 A7 D6 E6 E4 C4 B4 A4 D3 E3 C3 B3 E2 C2 B2 A2 D1 E1 C1 B1 C8 C6 D4 D2 C10 E5 A5 A3 B5 B6 A1 B12 A12 A6 D5 C5 E10 A11 B11 C11 SDA0 SDA1 SDA2 C17 B17 A18 G19 A17 F18 A16 F17 F16 G20 C16 B16 D16 G16 G18 G17 F20 E18 E20 D18 D20 C20 B20 A20 A19 B19 C19 D19 D17 E19 E17 F19 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 CLOCKRUN# DEVSEL# FRAME# IDSEL IRDY# PAR PCIRST# PHOLD# PHOLDA# SERR# STOP# TRDY# REQ0# REQ1# REQ2# REQ3# SDA0 SDA1 SDA2 PDDACK# SDDACK# PDREQ SDREQ PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY PDA0 PDA1 PDA2 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PIIX4_14 SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SCS3# PCS3# SCS1# PCS1# SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15 LA17 LA18 LA19 LA20 LA21 LA22 LA23 E15 B15 D14 C14 A14 C13 A13 C12 D12 B13 D13 B14 E14 A15 C15 D15 C18 H16 B18 H17 U11 T11 W11 Y11 T10 W10 U9 V9 Y9 T8 W8 U7 V7 Y7 V6 Y6 T5 W5 U4 V4 V3 SD0 W3 SD1 U2 SD2 T2 SD3 W2 SD4 Y2 SD5 T1 SD6 V1 SD7 W16SD8 T16 SD9 Y17 SD10 V17 SD11 Y18 SD12 W18SD13 Y19 SD14 W19SD15 SD[16:0] 14,18,29 Y15 LA17 T14 LA18 W14LA19 U13 LA20 V13 LA21 Y13 LA22 T12 LA23 Y12 V15 U15 W4 U3 T7 U10 Y1 W7 V12 Y3 W12 W1 Y5 T4 T3 Y4 LA[23:17] 18,29 MEMCS16# 18,29 MEMR# 18,21,29 MEMW# 18,21,29 SMEMR# 18 SMEMW# 18 SYSCLK 18 BALE 18 IOCHK# 18,29 REFRESH# 18,29 IOCS16# 18,29 ZEROWS# 18,29 SBHE# 18 RSTDRV 14,26 IOR# 14,18,29 IOW# 14,18,29 IOCHRDY 14,18,29 AEN 14,18 INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PIIX4 (PART I) Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
A B C D 1
IDE SIGNALS
4
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15 SDD[15:0] 19 SCS3# 19 PCS3# 19 SCS1# 19 PCS1# 19 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA[19:0] 14,18,21,29
4
AD18
VCC3 R35 100
PCI BUS INTERFACE
3
3
PIIX4
ISA/EIO SIGNALS
2
19 19 19 19 19 19 19 19 19 19
PDDACK# SDDACK# PDREQ SDREQ PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY
2
PDA0 PDA1 PDA2 PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
19 PDA[2:0]
IDE SIGNALS
MEMCS16# MEMR# MEMW# SMEMR# SMEMW# SYSCLK BALE IOCHK# REFRESH# IOCS16# ZEROWS# SBHE# RSTDRV IOR# IOW# IOCHRDY AEN
1
19 PDD[15:0]
Rev 1.4 Sheet
E
12
of
33
A
B
C
D
E
VCC3
VCC3
3V_STBY VCC3
F6 E11 F15 R6 R15
U4B 14,18 DACK#[3:0] DACK#0 DACK#1 DACK#2 DACK#3 DACK#5 DACK#6 DACK#7 U14 W6 Y10 V5 T15 V16 W17 W15 U6 V2 U5 Y16 U16 U17 M1 N2 P3 N1 P2 P4 14,18 TC 28 APICREQ# V10 J17 H18 K18 H20 J20 T9 W9 U8 V8 Y8 Y20 U1 U12 W13 T13 V14 Y14 PIRQ#A PIRQ#B PIRQ#C PIRQ#D J19 R3 R4 P5 G1 K20 M19 K19 L17 L18 L19 P1 L20 P20 J18 N20 M20 M18 K17 V18 R17 R18 M4 M3 M2 L1 K2 K1 RTCX2 RTCX1 L16 R20 N19 P17 L3 V11 D11 DACK0# DACK1# DACK2# DACK3# DACK5# DACK6# DACK7# DREQ0 DREQ1 DREQ2 DREQ3 DREQ5 DREQ6 DREQ7 REQA#/GPI2 REQB#/GPI3 REQC#/GPI4 GNTA#/GPO9 GNTB#/GPO10 GNTC#/GPO11
E9 E12 E16 F5 F14 G6 R7 P15 T6
R16 N16 K5
4
18 DACK#[7:5]
USB
USBP1+ USBP1USBP0+ USBP0OC0 OC1 EXTSMI# SUSA# GPO15/SUSB# GPO16/SUSC#
F1 H2 G2 H3 J1 J2 V20 W20 V19 U18 R1 R2 K16 T17 T18 H19 U19 M17 U20 P16 T20 R19 N17 P18
VCC VCC VCC VCC VCC
VCCSUS VCCSUS VCCUSB
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP
USBP1+ 20 USBP1- 20 USBP0+ 20 USBP0- 20 OC#0 20 OC#1 20 EXTSMI# 26,28 SUSC# C5 0.01 uF
4
5VSB
14,18,29 14,18,29 14,18,29 14,18,29 18,29 18,29 18,29
DRQ0 DRQ1 DRQ2 DRQ3 DRQ5 DRQ6 DRQ7
DMA SIGNALS
14 U5A 1 7 74HCT14 2 B_SUSC# 26
28 REQ#A 28 REQ#B 28 REQ#C
POWER MGMT.
TC APICACK#/GPO12 APICCS#/GPO13 APICREQ#/GPI5 IRQ0/GPO14 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8/GPI6 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 SERIRQ/GPI7 PIRQA# PIRQB# PIRQC# PIRQD# SLP# CPURST FERR# IGNNE# INIT INTR A20GATE NMI SMI# STPCLK# RCIN# A20M# PWROK SPKR TEST# CONFIG1 CONFIG2 XOE#/GPO23 XDIR#/GPO22 BIOSCS# RTCALE/GPO25 RTCCS#/GPO24 KBCCS#/GPO26 VBAT RTCX2 RTCX1 SUSCLK 48Mhz OSC PCICLK
DMA/IRQ SIGNALS
GPO17/CPU_STP# GPO18/PCI_STP# GPO19/ZZ GPO20/SUS_STAT1# GPO21/SUS_STAT2# GPI8/THERM# GPI9/BATLOW# RSMRST# PWRBT# GPI10/LID SMBDATA SMBCLK GPI11/SMBALERT# GPI12/RI#A
THERM# 4,28 BATLOW# 28 RSMRST# 26 PWRBT# 26 LID 28 SMBDATA 4,5,9,10,11,28 SMBCLK 4,5,9,10,11,28 SMBALERT# 28 RI#A 28 2 D1
VCC3
1
VCC
3
14,29 14,18,29 14,18,29 14,18,29 14,18,29 14,18,29 14,29 14,18,29 14,18,29 14,18,29 14,18,29 14,18,19,29 14,18,19,29 28 15,16,17,28 15,16,17,28 16,17,28 16,17,28 GPI7 PIRQ#A PIRQ#B PIRQ#C PIRQ#D
IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ#8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15
IRQ SIGNALS
VREF
J16 + C6 1.0 uF C7 0.1 uF
3
PIIX4
GPI1 GPI13 GPI14 GPI15 GPI16 GPI17 GPI18 GPI19 GPI20 GPI21 P19 L2 GPI13 J3 GPI14 L5 GPI15 K3 GPI16 K4 GPI17 H1 GPI18 H4 GPI19 H5 GPI20 G3 GPI21 GPI1 28
MMBD354LT1
R37 1K
3
VREF5V 6
GPO/GPI/GPIO/SCAN
3,28 SLP# 3,28 25,28 3,6,28 25,28 14,28 25,28 3,28 3,28 14,28 25,28 26 26 28 28 FERR# PX4_IGNNE# HINIT# PX4_INTR A20GATE PX4_NMI SMI# STPCLK# KBRST# PX4_A20M# PWROK SPKR TEST# PX4_CFG1
GPI[21:13] 28
CPU INTERFACE
GPO0 GPO8 GPO27 GPO28 GPO29 GPO30 G4 T19 G5 F2 F3 F4 GPO8 GPO27 GPO28 1 1 1 FAN_ON 26 TP2 TP3 TP4
2
3V_STBY
2
D2
R_CFG2
SYSTEM/TEST
2
1
R165 8.2K MMBD354LT1 VB2 R38 1K 3 3
14 XOE# 14 XDIR# 21 BIOSCS# RTC_BAT 14 2 PX4_VBAT
JP19 1 3 CMOS_CLR C8 0.1 uF
X-BUS
N/C N/C N/C N/C N/C N/C
J4 N18 N3 M5 M16 R5
MMBD354LT1
GND: D10,E7,E13,J9,J10,J11,J12,K9,K10,K11,K12 L9,L10,L11,L12,M9,M10,M11,M12 VSSUSB: J5 MCCS# N4 L4 N5 PGCS#0 PGCS#1 1 1 TP5 TP6
R234 0 Y3 2
R235 0 1
5 48Mhz 5 OSC0 5 PX4PCLK
R232 1 2 D3 1K
PROG CHIP SEL.
PGCS0# PGCS1#
PIIX4_14
32.768KHz
1
1 VB1
C9 22pF
C10 22pF INTEL CORPORATION
1
BT1 2
CLEAR CMOS
JP19 CONFIG 1 -2 2 - 3 NORMAL CLEAR CMOS
PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PIIX4 (PART II) Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
Rev 1.4 13 of 33
A
B
C
D
1
2
3
4
5
6
7
8
NOTE: NS6 IS DEFAULT NO-STUFF
13 RTC_BAT NS3 R199 32.763KHz
A
NS6
0
U8 R_RTCBAT SIO_XTAL1 SIO_XTAL2 121 122 124 22 68 69 70 80 90 72 73 74 75 76 77 78 79 89 DRQ0 DRQ1 DRQ2 DRQ3 DACK#0 DACK#1 DACK#2 DACK#3 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 B_IRQ#8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 82 84 86 88 81 83 85 87 67 66 65 64 63 62 61 59 58 57 56 55 54 41 42 43 44 45 46 47 48 49 50 51 52 53 27 28 29 26 23 24 25 30 31 34 33 32 92 91 94 93 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 111 112 113 114 115 116 117 118 119 120 VBAT XTAL1 XTAL2 14CLOCKI IOR# IOW# AEN RSTDRV IOCHRDY SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 TC DRQ0 DRQ1 DRQ2 DRQ3 DACK0 DACK1 DACK2 DACK3 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 IRQ8# IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 14CLK01 14CLK02 14CLK03 37 38 39 36 35 14 9 10 11 12 15 16 17 13 18 4 7 6 5 2 3 20 19 138 137 136 135 134 133 132 131 140 141 143 144 128 129 127 126 142 145 146 148 149 150 147 152 151 155 156 158 159 160 157 154 153 96 97 98 99 100 102 103 104 105 106 107 108 109 110 TP092 TP091 IRRX IRTX TP073 TP072 TP087 TP075 R_GP21 TP071 TP070 TP069 1 1 1 1 1 1 1 1 1
TP076 TP077 TP088
1 1 1
TP7 TP8 TP9 INDEX# 23 DIR# 23 STEP# 23 WDATA# 23 WGATE# 23 TRK0# 23 WPT# 23 RDATA# 23 SIDE1# 23 DSKCHG# 23 MOTEA# 23 MOTEB# 23 DRVSA# 23 DRVSB# 23 REDWC# 23 DRATE0 23 1 TP10 PDR[7:0] 22
1M
NS4 22 pF
NS5 22 pF
5 OSC3 12,18,29 IOR# 12,18,29 IOW# 12,18 AEN 12,26 RSTDRV 12,18,29 IOCHRDY 12,18,29 SD[15:0]
VCC PINS : 21, 60, 101, 125, 139
16CLK 24CLK INDEX# DIR# STEP# WDATA# WGATE# TRK0# WPT# RDATA# SIDE1# DSKCHG# MTR0# MTR1# DRVSEL0# DRVSEL1# DRVDEN0 DRVDEN1 MEDID0 MEDID1 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLIN# INIT# AFD# STB# BUSY ACK# PE SLCT ERR# RXD1 TXD1 RTS1# CTS1# DTR1# DSR1# DCD1# RI1# RXD2 TXD2 RTS2# CTS2# DTR2# DSR2# DCD2# RI2# GP10/IRQIN GP11/IRQIN GP12/IRRX GP13/IRTX GP14/RS GP15/WS GP16/JOYRS
A
DO NOT INSTALL NS3, NS4 & NS5
13,18 TC 13,18,29 DRQ[7:0]
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
TP090 IRR4_MODE PDR0 PDR1 PDR2 PDR3 PDR4 PDR5 PDR6 PDR7
13,18 DACK#[3:0]
13,18,29 IRQ[7:0]
FDC37C932FR 160 PIN QFP
VCC INSTALL FOR 370 CONFIG. REMOVE FOR 3F0 CONFIG. R41 SLIN#R 22 INIT#R 22 AFD#R 22 STB#R 22 BUSY 22 ACK# 22 PE 22 SLCT 22 ERR# 22 RX0 23 TX0 23 RTS0# 23 CTS0# 23 DTR0# 23 DSR0# 23 RLSD0# 23 RI0# 23 RX1 23 TX1 23 RTS1# 23 CTS1# 23 DTR1# 23 DSR1# 23 RLSD1# 23 RI1# 23 TP15 TP17 TP20 TP22 TP24 TP25 KBRST# TP26 TP27 TP28 A20GATE 13,28 10K R42 1K INSTALL FOR 3F0 CONFIG. REMOVE FOR 370 CONFIG.
B
13,29 IRQ#8
B
6
5 U24C 74AS07
13,18,29 13,18,29 13,18,29 13,18,29 13,18,19,29 13,18,19,29 12,18,21,29 SA[19:0]
IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15
VCC
R43 8.2K
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12/CS SA13/HDCS2# SA14/HDCS3# SA15/IDE2_IRQ IDE1_IRQ IDE1_OE# HDCS0# HDCS1# IOROP# IOWOP# IDE_A0 IDE_A1 IDE_A2 KCLK KDAT MSCLK MSDAT RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 ROMCS# ROMOE# FDC37C932FR_1.2
VCC C11 470pF
JP4
C
VCC RP1 1 2 3 4 4.7K 24 24 24 24 KBCLK# KBDAT# MSCLK# MSDAT# 8 7 6 5
TP12 TP13 TP14 TP16 TP18 TP19 TP21 TP23
1 1 1 1 1 1 1 1
SIO_PU2 TP080 TP081 TP082 TP083 TP084 TP079 TP078 TP085
KEY
6 5 4 3 2 1 INFRARED HDR
C
C12 470pF C14 0.1 uF 13,28
C13 470pF C15 0.1 uF
GP17/JSWS GP20/IDE2_OE GP21/EEDIN GP22/EDOUT GP23/EECLK GP24/EEEN GP25/8042_P21
GND PINS : 1, 8, 40, 71, 95, 123, 130
R162 8.2K
VCC
21 XD[7:0] 13 XOE# 13 XDIR#
D
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title I/O CONTROLLER (ULTRA I/ O) Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 14
8
D
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
ULTRA I/O
2 3 4 5 6
Rev 1.4 of 33
1
7
A
B
C
D
E
7 SBA[7:0] 7 ST[2:0] VCC3 VCC3 VCC J6 VCC3 +12V VCC3
B1 R204 B2 4.7K
4
SPARE 5V 5V USB+ GND INTB# CLK REQ# VCC3.3 ST0 ST2 RBF# GND SPARE SBA0 VCC3.3 SBA2 SB_STB GND SBA4 SBA6
12V SPARE RESERVED USBGND INTA# RST# GNT# VCC3.3 ST1 RESERVED PIPE# GND SPARE SBA1 VCC3.3 SBA3 RESERVED GND SBA5 SBA7
A1 A2 A3 A4 A5
R203 4.7K
4
B3 B4 B5
20 USBAGP+ 2 1 U24A 74AS07 5 AGPHCLK 7,28 GREQ# B_PIRQB#
USBAGPB_PIRQA# 3
20 U24B 4 PIRQ#A 13,16,17,28
13,16,17,28 PIRQ#B
B6 B7 B8 B9 ST0 ST2 B10 B11 B12 B13 B14 SBA0 B15 B16 SBA2 B17 B18 B19 SBA4 SBA6 B20 B21
A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 SBA5 SBA7 SBA3 SBA1 PIPE# 7,28 ST1 74AS07 PCIRST# 6,9,12,16,17 GGNT# 7,28
7,28 RBF#
7,28 SBSTB
3
3
GAD31 GAD29
B26 B27 B28
AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 Vddq3.3 AD21 AD19 GND AD17 C/BE2# Vddq3.3 IRDY# SPARE GND SPARE VCC3.3 DEVSEL# Vddq3.3 PERR# GND SERR# C/BE1# Vddq3.3 AD14 AD12 GND AD10 AD8 Vddq3.3 AD_STB0 AD7 GND AD5 AD3 Vddq3.3 AD1 SMBCLOCK
AD30 AD28 VCC3.3 AD26 AD24 GND RESERVED GC/BE3# Vddq3.3 AD22 AD20 GND AD18 AD16 Vddq3.3 FRAME# SPARE GND SPARE VCC3.3 TRDY# STOP# SPARE GND PAR AD15 Vddq3.3 AD13 AD11 GND AD9 C/BE0# Vddq3.3 RESERVED AD6 GND AD4 AD2 Vddq3.3 AD0 SMBDATA
A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GAD30 GAD28
GAD27 GAD25
B29 B30 B31
GAD26 GAD24
7,28 ADSTB-1 GAD23
B32 B33 B34 GAD21 GAD19 B35 B36 B37 GAD17 GC/BE#2 B38 B39 B40
GC/BE#3
GAD22 GAD20
GAD18 GAD16
7,28 GIRDY#
B41 B42 B43 B44 B45
GFRAME# 7,28
7,28 GDEVSEL#
2
B46 B47
GTRDY# 7,28 GSTOP# 7,28
2
7,28 GPERR#
B48 B49
7,28 GSERR# GC/BE#1
B50 B51 B52 GAD14 GAD12 B53 B54 B55 GAD10 GAD8 B56 B57 B58
GPAR 7,28 GAD15
GAD13 GAD11
GAD9 GC/BE#0
7,28 ADSTB-0 GAD7
B59 B60 B61 GAD5 GAD3 B62 B63 B64 GAD1 B65 B66
GAD6
GAD4 GAD2
GAD0
1
AGP_CONN_1.3
1
7 GAD[31:0] 7 GC/BE#[3:0] INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title ACCELERATED GRAPHICS PORT (AGP) CONNECTOR Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
A B C D
Rev 1.4 Sheet
E
15
of
33
1
2
3
4
5
6
7
8
DO NOT REPRODUCE
VCC3 VCC3 -12V VCC VCC +12V
PCI CONNECTORS 1 AND 2
VCC3 VCC3 -12V VCC VCC +12V
VCC
VCC
R216 5.6K
R217 5.6K
A
A
J7 17 PTCK B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 -12V TCK GND TDO +5V +5V INTBINTDPRSNT1RSV PRSNT2GND GND RSV GND CLK GND REQ+5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE-(3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE-(2) GND IRDY+3.3V DEVSELGND LOCKPERR+3.3V SERR+3.3V C/BE-(1) AD(14) GND AD(12) AD(10) GND KEY AD8 AD7 AD5 AD3 AD1 PU1_REQ64# AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64+5V +5V PCI_CONN C/BE-(0) +3.3V AD(06) AD(04) GND AD(02) AD(00) +5V REQ64+5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 AD6 AD4 AD2 AD0 PU1_ACK64# AD8 AD7 AD5 AD3 AD1 PU2_REQ64# B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 TRST+12V TMS TDI +5V INTAINTC+5V RSV +5V RSV GND GND RSV RESET+5V GNTGND RSV AD(30) +3.3V AD(28) AD(26) GND AD(24) IDSEL +3.3V AD(22) AD(20) GND AD(18) AD(16) +3.3V FRAMEGND TRDYGND STOP+3.3V SDONE SBOGND PAR AD(15) +3.3V AD(13) AD(11) GND AD(09) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PTRST# 17 PTMS 17 PTDI 17 PIRQ#A 13,15,17,28 PIRQ#C 13,17,28 PTCK R218 5.6K PIRQ#C PIRQ#A PRSNT#21 PRSNT#22 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
J8 -12V TCK GND TDO +5V +5V INTBINTDPRSNT1RSV PRSNT2GND GND RSV GND CLK GND REQ+5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE-(3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE-(2) GND IRDY+3.3V DEVSELGND LOCKPERR+3.3V SERR+3.3V C/BE-(1) AD(14) GND AD(12) AD(10) GND KEY AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64+5V +5V PCI_CONN C/BE-(0) +3.3V AD(06) AD(04) GND AD(02) AD(00) +5V REQ64+5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 AD6 AD4 AD2 AD0 PU2_ACK64# TRST+12V TMS TDI +5V INTAINTC+5V RSV +5V RSV GND GND RSV RESET+5V GNTGND RSV AD(30) +3.3V AD(28) AD(26) GND AD(24) IDSEL +3.3V AD(22) AD(20) GND AD(18) AD(16) +3.3V FRAMEGND TRDYGND STOP+3.3V SDONE SBOGND PAR AD(15) +3.3V AD(13) AD(11) GND AD(09) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PTRST# PTMS PTDI PIRQ#B PIRQ#D R219 5.6K
13,15,17,28 PIRQ#B 13,17,28 PIRQ#D
PRSNT#11 PRSNT#12
PCIRST# 6,9,12,15,17 5 PCONNCLK2 GNT#0 7,28 7,28 REQ#1 AD30 AD28 AD26 AD24 R_AD26 AD22 AD20 AD18 AD16 FRAME# 7,12,17,28 TRDY# 7,12,17,28 STOP# 7,12,17,28 SDONE_P1 SBO_P1 AD15 AD13 AD11 AD9 PAR 7,12,17 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10
PCIRST# GNT#1 7,28 AD30 AD28 AD26 AD24 R_AD27 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE_P2 SBO_P2 PAR AD15 AD13 AD11 AD9
B
5 PCONNCLK1 7,28 REQ#0 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 7,12,17,28 IRDY# 7,12,17,28 DEVSEL# 7,17,28 PLOCK# 7,17,28 PERR# 7,12,17,28 SERR# C/BE#1 AD14 AD12 AD10
B
C
C
7,12,17 C/BE#[3:0]
7,12,17 AD[31:0]
C16 PRSNT#11 VCC 0.1 uF RP71 SDONE_P1 SDONE_P2 SBO_P1 SBO_P2 1 2 3 4 5.6K
D
VCC PRSNT#12 8 7 6 5 PRSNT#21
C17 PU1_ACK64# 0.1 uF PU1_REQ64# C18 2.7K PU2_ACK64# 0.1 uF R53 C19 PRSNT#22 2.7K 0.1 uF PU2_REQ64# R50
R48 AD26 2.7K R52 2.7K AD27
R49 R_AD26 100 R51 R_AD27 100
D
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PCI CONNECTORS 1 & 2 Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 16
8
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PR ODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
Rev 1.4 o f 33
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
DO NOT REPRODUCE
VCC3 VCC3 -12V VCC +12V VCC
A
PCI CONNECTORS 3 AND 4
VCC3 VCC3 -12V VCC +12V VCC
A
J9 16 PTCK B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 -12V TCK GND TDO +5V +5V INTBINTDPRSNT1RSV PRSNT2GND GND RSV GND CLK GND REQ+5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE-(3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE-(2) GND IRDY+3.3V DEVSELGND LOCKPERR+3.3V SERR+3.3V C/BE-(1) AD(14) GND AD(12) AD(10) GND KEY AD8 AD7 AD5 AD3 AD1 PU3_REQ64# AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64+5V +5V PCI_CONN C/BE-(0) +3.3V AD(06) AD(04) GND AD(02) AD(00) +5V REQ64+5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 AD6 AD4 AD2 AD0 PU3_ACK64# AD8 AD7 AD5 AD3 AD1 PU4_REQ64# B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 TRST+12V TMS TDI +5V INTAINTC+5V RSV +5V RSV GND GND RSV RESET+5V GNTGND RSV AD(30) +3.3V AD(28) AD(26) GND AD(24) IDSEL +3.3V AD(22) AD(20) GND AD(18) AD(16) +3.3V FRAMEGND TRDYGND STOP+3.3V SDONE SBOGND PAR AD(15) +3.3V AD(13) AD(11) GND AD(09) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PTRST# 16 PTMS 16 PTDI 16 PIRQ#C 13,16,28 PIRQ#A 13,15,16,28 PIRQ#A PIRQ#C PRSNT#41 PRSNT#42 PTCK B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
J10 -12V TCK GND TDO +5V +5V INTBINTDPRSNT1RSV PRSNT2GND GND RSV GND CLK GND REQ+5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE-(3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE-(2) GND IRDY+3.3V DEVSELGND LOCKPERR+3.3V SERR+3.3V C/BE-(1) AD(14) GND AD(12) AD(10) GND KEY AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64+5V +5V PCI_CONN C/BE-(0) +3.3V AD(06) AD(04) GND AD(02) AD(00) +5V REQ64+5V +5V A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 C/BE#0 AD6 AD4 AD2 AD0 PU4_ACK64# TRST+12V TMS TDI +5V INTAINTC+5V RSV +5V RSV GND GND RSV RESET+5V GNTGND RSV AD(30) +3.3V AD(28) AD(26) GND AD(24) IDSEL +3.3V AD(22) AD(20) GND AD(18) AD(16) +3.3V FRAMEGND TRDYGND STOP+3.3V SDONE SBOGND PAR AD(15) +3.3V AD(13) AD(11) GND AD(09) A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 PTRST# PTMS PTDI PIRQ#D PIRQ#B
13,16,28 PIRQ#D 13,15,16,28 PIRQ#B
PRSNT#31 PRSNT#32
5 PCONNCLK3 7,28 REQ#2 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 7,12,16,28 IRDY# 7,12,16,28 DEVSEL# 7,16,28 PLOCK# 7,16,28 PERR# 7,12,16,28 SERR# C/BE#1 AD14 AD12 AD10
PCIRST# 6,9,12,15,16 5 PCONNCLK4 GNT#2 7,28 7,28 REQ#3 AD30 AD28 AD26 AD24 R_AD29 AD22 AD20 AD18 AD16 FRAME# 7,12,16,28 TRDY# 7,12,16,28 STOP# 7,12,16,28 SDONE_P3 SBO_P3 AD15 AD13 AD11 AD9 PAR 7,12,16 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10
PCIRST# GNT#3 7,28 AD30 AD28 AD26 AD24 R_AD31 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE_P4 SBO_P4 PAR AD15 AD13 AD11 AD9
B
B
C
C
7,12,16 C/BE#[3:0]
7,12,16 AD[31:0]
C20 PRSNT#31 VCC 0.1 uF C21 PRSNT#32 RP72 SDONE_P3 SDONE_P4 SBO_P3 SBO_P4
D
R54 PU3_ACK64# AD29 R56 PU3_REQ64# 2.7K PU4_ACK64# 2.7K 100 R57 2.7K AD31 R58 R_AD31 100
D
R55 R_AD29
VCC 0.1 uF 8 7 6 5 C22 PRSNT#41 0.1 uF
1 2 3 4 5.6K
R59 C23 PRSNT#42 2.7K 0.1 uF PU4_REQ64#
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PCI CONNECTORS 3 & 4 Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 17
8
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PR ODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
Rev 1.4 o f 33
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
ISA SLOTS
VCC
A
R60 1K VCC R61 1K VCC
A
VCC J11 26 BRSTDRV 13,14,29 IRQ9 13,14,29 DRQ2 12,29 ZEROWS# 12 SMEMW# 12 SMEMR# 12,14,29 IOW# 12,14,29 IOR# 13,14 DACK#3 13,14,29 DRQ3 13,14 DACK#1 13,14,29 DRQ1 12,29 REFRESH# 12 SYSCLK 13,14,29 IRQ7 13,14,29 IRQ6 13,14,29 IRQ5 13,14,29 IRQ4 13,14,29 IRQ3 13,14 DACK#2 13,14 TC 12 BALE 5 OSC1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 GND IOCHK# BRSTDRV SD7 VCC SD6 IRQ9 SD5 -5V SD4 DREQ2 SD3 -12V SD2 ZEROWS# SD1 +12V SD0 GND IOCHRDY SMEMW# AEN SMEMR# SA19 IOW# SA18 IOR# SA17 DACK3# SA16 DREQ3# SA15 DACK1# SA14 DREQ1 SA13 REFRESH# SA12 SYSCLK SA11 IRQ7 SA10 IRQ6 SA9 IRQ5 SA8 IRQ4 SA7 IRQ3 SA6 DACK2# SA5 TC SA4 BALE SA3 VCC SA2 OSC SA1 GND SA0 MEMCS16# SBHE# IOCS16# LA23 IRQ10 LA22 IRQ11 LA21 IRQ12 LA20 IRQ15 LA19 IRQ14 LA18 DACK0# LA17 DREQ0 MEMR# DACK5# MEMW# DREQ5 SD8 DACK6# SD9 DREQ6 SD10 DACK7# SD11 DREQ7 SD12 VCC SD13 MASTER# SD14 GND SD15 CON_ISA16C C24 47pF A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 IOCHK# 12,29 SD7 12,14,29 SD6 12,14,29 SD5 12,14,29 SD4 12,14,29 SD3 12,14,29 SD2 12,14,29 SD1 12,14,29 SD0 12,14,29 IOCHRDY 12,14,29 AEN 12,14 SA19 12,29 SA18 12,29 SA17 12,21,29 SA16 12,21,29 SA15 12,14,21,29 SA14 12,14,21,29 SA13 12,14,21,29 SA12 12,14,21,29 SA11 12,14,21,29 SA10 12,14,21,29 SA9 12,14,21,29 SA8 12,14,21,29 SA7 12,14,21,29 SA6 12,14,21,29 SA5 12,14,21,29 SA4 12,14,21,29 SA3 12,14,21,29 SA2 12,14,21,29 SA1 12,14,21,29 SA0 12,14,21,29 SBHE# 12 LA23 12,29 LA22 12,29 LA21 12,29 LA20 12,29 LA19 12,29 LA18 12,29 LA17 12,29 MEMR# 12,21,29 MEMW# 12,21,29 SD8 12,29 SD9 12,29 SD10 12,29 SD11 12,29 SD12 12,29 SD13 12,29 SD14 12,29 SD15 12,29 BRSTDRV -5V -12V +12V IRQ9 DRQ2 ZEROWS# SMEMW# SMEMR# IOW# IOR# DACK#3 DRQ3 DACK#1 DRQ1 REFRESH# SYSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK#2 TC BALE NS2 TBD OSC1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 J12 GND IOCHK# BRSTDRV SD7 VCC SD6 IRQ9 SD5 -5V SD4 DREQ2 SD3 -12V SD2 ZEROWS# SD1 +12V SD0 GND IOCHRDY SMEMW# AEN SMEMR# SA19 IOW# SA18 IOR# SA17 DACK3# SA16 DREQ3# SA15 DACK1# SA14 DREQ1 SA13 REFRESH# SA12 SYSCLK SA11 IRQ7 SA10 IRQ6 SA9 IRQ5 SA8 IRQ4 SA7 IRQ3 SA6 DACK2# SA5 TC SA4 BALE SA3 VCC SA2 OSC SA1 GND SA0 MEMCS16# SBHE# IOCS16# LA23 IRQ10 LA22 IRQ11 LA21 IRQ12 LA20 IRQ15 LA19 IRQ14 LA18 DACK0# LA17 DREQ0 MEMR# DACK5# MEMW# DREQ5 SD8 DACK6# SD9 DREQ6 SD10 DACK7# SD11 DREQ7 SD12 VCC SD13 MASTER# SD14 GND SD15 CON_ISA16C A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 IOCHK# SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0 IOCHRDY AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 SBHE# LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMR# MEMW# SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
-5V -12V +12V
B
B
C
12,29 MEMCS16# 12,29 IOCS16# 13,14,29 IRQ10 13,14,29 IRQ11 13,14,29 IRQ12 13,14,19,29 IRQ15 13,14,19,29 IRQ14 13,14 DACK#0 13,14,29 DRQ0 13 DACK#5 13,29 DRQ5 13 DACK#6 13,29 DRQ6 13 DACK#7 13,29 DRQ7 29 RMASTER#
NOTE :
DEFAULT NO STUFF. THIS CAP USED TO FILTER NOISE ON TC SIGNAL.
MEMCS16# IOCS16# IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK#0 DRQ0 DACK#5 DRQ5 DACK#6 DRQ6 DACK#7 DRQ7 RMASTER#
C
ISA 0
ISA 1
C25 47pF
D
D
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title ISA SLOTS Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
1 2 3 4 5 6 7
THIS DRAWING CONTAINS INFORMTION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
Rev 1.4 Sheet 18
8
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33
1
2
3
4
5
6
7
8
A
A
IDE CONNECTORS
12 SDD[15:0]
12 PDD[15:0]
J13 R62 26 BRSTDRV# 33 RP2 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 1 2 3 4 5 6 7 8 33 R64 1K R66 12 PDREQ 12 PDIOW# R70 12 PDIOR# 33 12 PIORDY RP6 12 PDDACK# 13,14,18,29 IRQ14 PDA1 PDA0 1 2 3 4 33 R76 12 PCS1# 26 IDEACTP#
C
J14 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 R_PDA2 R_PCS3# R74 33 R77 33 26 IDEACTS# 12 SDA[2:0] PCS3# 12 12 SCS1# PDA2 PRI_PD1 R72 12 SIORDY 470 12 SDDACK# 13,14,18,29 IRQ15 1 2 3 4 33 R78 33 R_SCS1# RP7 SDA1 SDA0 8 7 6 5 RSDACK# RIRQ15 R_SDA1 R_SDA0 12 SDREQ 33 R69 33 12 SDIOW# R71 12 SDIOR# 33 DD8#1 DD9#1 DD10#1 DD11#1 DD12#1 DD13#1 DD14#1 DD15#1 1 2 3 4 5 6 7 8 33 R65 1K R67 R_SDDREQ# R_SDIOW# R_SDIOR# RP3 16 15 14 13 12 11 10 9 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 VCC 1 2 3 4 5 6 7 8 33 RP4 16 15 14 13 12 11 10 9 BRSTDRV# R63 33 R_BRSTDRV#2 DD7#2 DD6#2 DD5#2 DD4#2 DD3#2 DD2#2 DD1#2 DD0#2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 R_SDA2 R_SCS3# R75 33 R79 SCS3# 12 33
C
R_BRSTDRV#1 DD7#1 DD6#1
1 3 5 7 9 11 13 15 17 19
DD8#2 DD9#2 DD10#2 DD11#2 DD12#2 DD13#2 DD14#2 DD15#2 1 2 3 4 5 6 7 8 33 RP5 16 15 14 13 12 11 10 9 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
B
VCC
16 15 14 13 12 11 10 9
DD5#1 DD4#1 DD3#1 DD2#1 DD1#1 DD0#1
B
R_PDDREQ# 33 R68 33 R_PDIOW# R_PDIOR#
21 23 25 27 29
SEC_PD1
R73 470
8 7 6 5
RPDACK# RIRQ14 R_PDA1 R_PDA0
31 33 35
SDA2
R_PCS1#
37 39
33
12 PDA[2:0] PRIMARY IDE CONN. R80 5.6K
SECONDARY IDE CONN. R81 5.6K
D
D
INTEL CORPORATION THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PCI IDE CONNECTORS Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
1 2 3 4 5 6 7
Rev 1.4 Sheet 19
8
o f
33
A
B
C
D
E
F1 VCC 1.5-2.0A
4
USB_PWR0 R82 470K
4
13 OC#0 C26 0.001uF R83 560K 1 L1 2 USBV0 1 2 3 4 2 J33 VCC 5 DATADATA+ 6 GND USB_CON_0.0 L4 BLM31A700S 1 L2 1 2 USBV1 1 2 3 4 2 J34 VCC 5 DATADATA+ 6 GND USB_CON_0.0 L3 BLM31A700S R89 R90 27 C32 C33 C34 C35 47pF 47pF 47pF 47pF R92 15K R93 15K R94 15K R95 15K R_USBD1+ DO NOT STUFF R_USBD1R97 0 USBAGPNOTE: USE PIIX4 APPLICATION NOTE FOR LAYOUT GUIDELINES INTEL CORPORATION
1 3
F2 VCC 1.5-2.0A USB_PWR1 R84 470K
C28 BLM31A700S 120 uF (TANTALUM)
+
USBD0C29 0.1 uF USBD0+ USBG0
5
UGND0
6 2 L12 BLM31A700S 1 5 UGND1 6 2 L13 BLM31A700S 1
13 OC#1 C27 0.001uF R85 560K
C37 470 pF
3
+
BLM31A700S C30 120 uF (TANTALUM) USBD1C31 0.1 uF USBD1+ USBG1
13 USBP013 USBP0+
R86 27 R87 27 R88 27
C36 470 pF
13 USBP12
0
13 USBP1+
R91 0
2
R96 0
1
USBAGP+
15
15
PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title USB HEADER Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
A B C D
1
Rev 1.4 Sheet 20
E
of
33
1
2
3
4
5
6
7
8
SYSTEM ROM
A A
MODE NORMAL
U21A 1 2 74HCT14 SA17 3 B_SA17 J16 1 2 J_SA17
J16
1-2 2-3
RECOVERY
FLASH SOCKET
B
12,14,18,29 SA[19:0] SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 40 1 2 3 4 5 6 36 7 8 14 15 16 17 18 19 20 21 9 24 22 10
U9 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 WE# OE# CE# RP# DU 12
XD[7:0] 14
B
MODE JP17 PROG BOOT 1-2 BLOCK PROG DEV 1-2 (incl. boot block) PnP 2-3 WRITE PROT 2-3
JP18 2-3 1-2 1-2 2-3
VCC +12V
R100 8.2K J17 1 2 R_RP# 3
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 NC NC NC NC VPP
25 26 27 28 32 33 34 35 13 29 37 38 11
XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 +12V J18 1 FL_VPP 2 3 FL1MPU
12,18,29 MEMW# 12,18,29 MEMR# FL2MPU
E28F002BC-T
TSOP SOCKET
C C
C38 0.01 uF C39 0.01 uF
13 BIOSCS#
D
D
INTEL CORPORATION THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title SYSTEM ROM Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
1 2 3 4 5 6 7
Rev 1.4 Sheet 21
8
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33
1
2
3
4
5
6
7
8
C40 180pF
A A
C41 180pF C42 180pF VCC
C43 180pF D4 IN4148 C44 180pF
PAR5VOL TS RP8 14 PDR[7:0] 5 6 7 8 RP9 PDR0
B
4 3 2 1 1K
C45 180pF C46 180pF STB# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK# BUSY PE SLCT
PARALLEL HEADER
J19 1 3 5 7 9 11 13 15 17 19 21 23 25 2 4 6 8 10 12 14 16 18 20 22 24 26 AFD# ERR# INIT# SLIN#
B
14 AFD#R 14 STB#R 14 INIT#R
5 6 7 8 33
4 3 2 1 RP10 5 6 7 8 RP11 1K 4 3 2 1 33 RP12 1 2 3 4 RP13 1K 4 3 2 1 33 RP14 5 6 7 8 1K 4 3 2 1 C54 180pF 8 7 6 5 C52 180pF 4 3 2 1 C48 180pF
C47 180pF
PDR3 PDR2 14 SLIN#R PDR1 5 6 7 8
C49 180pF C50 180pF
C51 180pF
PDR7 PDR6 PDR5 PDR4
C
5 6 7 8
C53 180pF
C
14 ERR# 14 SLCT 14 PE 14 BUSY 14 ACK# RP15 1 2 3 4 1K 8 7 6 5
C55 180pF
C56 180pF
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
D D
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title PARALLEL PORT Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
1 2 3 4 5 6 7
Rev 1.4 Sheet 22
8
of
33
A
B
C
D
E
4
4
+12V U10 SP_DCD0 SP_DSR0 SP_RXD0 SP_RTS0 SP_TXD0 SP_CTS0 SP_DTR0 SP_RI0 1 2 3 4 5 6 7 8 9 10 VCC+ RA RA RA DY DY RA DY RA VCCVCC RY RY RY DA DA RY DA RY GND 20 19 18 17 16 15 14 13 12 11
VCC J20 RLSD0# 14 DSR0# 14 RX0 14 RTS0# 14 TX0 14 CTS0# 14 DTR0# 14 RI0# 14 SP_DCD0 SP_DSR0 SP_RXD0 SP_RTS0 SP_TXD0 SP_CTS0 SP_DTR0 SP_RI0 1 2 3 4 5 6 7 8 9 10 C57 100pF C58 100pF C59 100pF C60 100pF
COM 0 HEADER
GD75232SOP -12V
3
3
C61 100pF
C62 100pF
C63 100pF
C64 100pF
+12V U11 SP_DCD1 SP_DSR1 SP_RXD1 SP_RTS1 SP_TXD1 SP_CTS1 SP_DTR1 SP_RI1 1 2 3 4 5 6 7 8 9 10 VCC+ RA RA RA DY DY RA DY RA VCCVCC RY RY RY DA DA RY DA RY GND 20 19 18 17 16 15 14 13 12 11
VCC J21 RLSD1# 14 DSR1# 14 RX1 14 RTS1# 14 TX1 14 CTS1# 14 DTR1# 14 RI1# 14 SP_DCD1 SP_DSR1 SP_RXD1 SP_RTS1 SP_TXD1 SP_CTS1 SP_DTR1 SP_RI1 1 2 3 4 5 6 7 8 9 10 C65 100pF C66 100pF C67 100pF C68 100pF
2
COM 1 HEADER
GD75232SOP -12V
2
VCC RP16 5 6 7 8 1K R101 1.0K J22 14 DSKCHG# 14 SIDE1# 14 RDATA# 14 WPT# 14 TRK0# 14 WGATE# 14 WDATA# 14 STEP# 14 DIR# 14 MOTEB# 14 DRVSA# 14 DRVSB# 14 MOTEA# 14 INDEX# 14 DRATE0 14 REDWC# TP29 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 4 3 2 1
C69 100pF
C70 100pF
C71 100pF
C72 100pF
FLOPPY INTERFACE HEADER
1
1
INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title SERIAL AND FLOPPY Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet
E
1
TP094
Rev 1.4 23 of 33
A
B
C
D
1
2
3
4
5
6
7
8
A
A
VCC
STUFFING OPTION F3 1.25A F4 1.35A
KB5V
2 L5
B B
BLM31A700S 1 L6 14 KBDAT# 2 1 KBDAT_FB # TP30 BLM31A700S L7 14 KBCLK# 2 1 KBCLK_FB # TP31 1 TP096 1 TP095 KBSIGND KB5V_F B
J23 1 2 3 4 5 6 7 8 9
KEYBOARD CONNECTOR
BLM31A700S
L8 14 MSDAT# 2 1 MSDAT_FB # TP32 BLM31A700S L9 14 MSCLK# 2 1 MSCLK_FB # TP33 1 TP098 1 TP097
J24 1 2 3 4 5 6 7 8 9
MOUSE CONNECTOR
BLM31A700S
C
C73 470pf
C74 470pF
C75 470pF
C76 470pF
C
C77 0.1 uF
KBSHGND 1 L10 BLM31A700S
1
L11
BLM31A700S 2
D
2
D
INTEL CORPORATION THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION. PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title KEYBOARD/MOUSE INTERFACE Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998
1 2 3 4 5 6 7
Rev 1.4 Sheet 24
8
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33
1
2
3
4
5
6
7
8
4 VID[4:0] VCCVID +12V
A
+12V VCC A1 A2 A3 A4 A5 A6 VCC B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 1 2 3 4 B14 B15 KL_CFG1 B16 B17 B18 KL_CFG3 B19 B20 KL_CFG4 U13 2 4 6 8 11 13 15 17 1 19 VCC3 2 74ALS05 +12V VTT V25_G1 1 2 VR2 S/D VIN GND FB IPOS INEG GATE COMP 8 7 6 5 V25_R1 V25_R2 R206 LT1575_0.1 C101 1.0 uF V25_R3 R106 1.30K 1% R107 1.21K 1% C103 2200pF V2R 100 C102 1.0 uF CERAMIC X7R C104 0.01 uF + C79 22 uF 16V 20% INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title DC-DC CONVERTER CONNECTORS Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 25
8 D
J25 5Vin 5Vin 5Vin 12Vin RES. ISHARE VID0 VID2 VID4 VCCp Vss VCCp Vss VCCp Vss VCCp Vss VCCp Vss VCCp VRM8_1.3 5Vin 5Vin RES. 12VIN RES. OUTEN VID1 VID3 PWRGD Vss VCCp Vss VCCp Vss VCCp Vss VCCp Vss VCCp Vss
VCC3
VCC3
A
R102 10K
R103 10K Processor Core Freq : LINT[1] System Bus Freq JP8 2 L L L L L L LINT[0] JP7 L L L L H H IGNNE# JP6 L H L H L H A20M# JP5 L L H H L L
ROE1 VID1 VID3 VCCVID VCC3 VRM_PWRGD 26
3 4 Reserved 5/2 7/2 Reserved 8 7 6 5 RP17 4.7K 2
VID0 VID2 VID4
A7 A8 A9 A10 A11 A12
All Other Combinations, HLLL-HHHL H H H H
B
B
A13 A14 A15 A16 A17 A18 A19 A20
U12A JP5 JP6 JP7 IGNE_PB JP8 74F07 U12C 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 18 16 14 12 9 7 5 3 LINT0_PB 5 74F07 U12D LINT1_PB 9 74F07 8 LINT1 3,28
C
A20_PB
1 74F07 U12B 3
2
A20M# 3,28
KL_CFG2
4
IGNNE# 3,28
C
13,28 PX4_A20M# 13,28 PX4_IGNNE# 13,28 PX4_INTR 13,28 PX4_NMI 6 CRESET# CRESET_BF# U14A 1 R105 330
1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1G 2G
6
LINT0 3,28
74FCT3244
VCC3
2.5V REGULATOR
4 2
VTT REGULATOR
VCC3 VR1 VOUT 3 VIN GND C80 10uF 20% 16V LT1585-1.5 + NOTE : VOLTAGE REGULATOR SHOULD BE LOCATED NEAR THE PAC 1 2
3 + C78 22 uF 16V 20% C100 1.0 uF CERAMIC X7R 4
R205 10 C82 1.0 uF
Q2 V2G 1 MMFT3055EL 3
VCC2.5
D
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
1 2 3 4 5 6
Rev 1.4 of 33
7
1
2
3
4
5
6
7
8
DO NOT REPRODUCE
BRSTDRV# 19
+12V VCC R238
R108 220
POWER LED HEADER
J27
8.2K 2
1
CPU FAN HEADER
Q3A SI9933DY
USE AMP P/N 640456-3 HEADER OR EQUIVALENT.
J26
U21B 12,14 RSTDRV
A
U21C 4 5 6 74HCT14 SPEAKER VCC R109 68 R110 SPK2 68 BUZZ2 TP888 J28 1 2 3 4 U21D 13 FAN_ON 9 8 74HCT14 BRSTDRV 18 C84 470pF
8 B_FON#
3
7
PON key
1 2 3
FON C83 0.1 uF
74HCT14
3 2 1
SENSE +12V GND
A
640456-3
U24D FON# 9 8
KEY
TP34
74AS07 U12E
R112 13 SPKR 2.2K SPK1 Q1 MMBT3904L C85 0.1 uF
6 ECCERR#
11 74F07
10
EXTSMI#
13,28
VCC
VCC
VCC 3V_STBY
5VSB
5VSB
R114 10K
R115 10K HARD DRIVE LED CONNECTOR
R116 470
14 U5B S1 PB1 3 7 R117 500K 74HCT14 4 PB2
14 1 7
U27A 2 7407
PWRBT#
13
B
B
SW PUSHBUTTON J30 ILPU1 1 2 3 4 4 HEADER JP10 PON_JMP
U6A 19 IDEACTP# 19 IDEACTS# 1 3 2 74ALS08 C87 470pF C88 470pF IDE_LED
VCC3
R119 240
3V_STBY VCC2.5
VCC3
5 DBRESET#
R200 4.7K U14B
R118 330 4 POWERGOOD 3
R121 4.7K U26A 25 VRM_PWRGD R122 JP_RST 100 1 2 13 74HC10 13 B_SUSC# 12 PG4 13 74F07 U12F 12 PG5
3
74ALS05 5VSB
C
C
14 U5C 5 7 6 74HCT14 PG6 R239 8.2K R240 8.2K PWROK 13
RESET SWITCH HEADER
J32
S2
C90 0.01 uF
C89 10uF
(+3.3V)
VCC3 VCC J31 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20
+12V
VCC3
PG3
(+5.0V)
R169 8.2K U21E PG1 11 10 74HCT14 PG2 13 U21F 12 74HCT14
5VSB
3V_STBY
5VSB
5VSB
R123 56 3 D5
D
14 U5D -5V 9 -12V 8 74HCT14 R_RSMRST# C91 1.0 uF BRSM1
14 U5E 11 7 74HCT14 R242 8.2K INTEL CORPORATION PCI COMPONENTS DIVISION 1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630 Title FRONT PANEL Size Document Number Custom Intel 440LX PCISET Date: Thursday, May 07, 1998 Sheet 26
8
10
RRST1
R241 8.2K
RSMRST# 13
D
MMBZ5226BL SOT-23
C98 0.01 uF
C99 10uF
7 R125 22K
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
1 2 3 4 5 6
1
Rev 1.4 of 33
7
1
2
3
4
5
6
7
8
GTL+ TERMINATION RESISTORS
VTT RP18 HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 RP24 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 RP30 HD#16 HD#17 HD#18 HD#19 1 2 3 4 8 7 6 5 56 ohm 1 2 3 4 8 7 6 5 56 ohm 1 2 3 4 VTT 1 2 3 4 8 7 6 5 56 ohm 1 2 3 4 VTT HD#20 HD#21 HD#22 HD#23 VTT RP21 8 7 6 5 56 ohm 1 2 3 4 RP19 8 7 6 5 56 OHM 1 2 3 4 VTT RP25 HD#25 HD#26 HD#27 HD#28 VTT RP27 8 7 6 5 56 ohm HD#29 HD#30 HD#31 HD#32 RP31 HD#33 HD#34 HD#35 HD#36 1 2 3 4 8 7 6 5 56 OHM 1 2 3 4 8 7 6 5 56 OHM 1 2 3 4 VTT HD#37 HD#38 HD#39 HD#40 VTT RP22 8 7 6 5 56 OHM HD#41 HD#42 HD#43 HD#44 RP26 HD#45 HD#46 HD#47 HD#48 VTT RP28 8 7 6 5 56 OHM HD#49 HD#50 HD#51 HD#52 RP32 HD#53 HD#54 HD#55 HD#56 1 2 3 4 8 7 6 5 56