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DME SWITCHER

DFS-700A DFS-700AP DFS-700 DFS-700P
DIGITAL/ANALOG INPUT BOARD

BKDF-701
ANALOG COMPOSITE INPUT BOARD

BKDF-702/702P
DIGITAL MULTI EFFECTS BOARD

BKDF-711
3D VIDEO MAPPING EFFECTS BOARD

BKDF-712
SERVICE MANUAL
Volume 1 1st Edition (Revised 2)

! WARNING
This manual is intended for qualified service personnel only. To reduce the risk of electric shock, fire or injury, do not perform any servicing other than that contained in the operating instructions unless you are qualified to do so. Refer all servicing to qualified service personnel.

! WARNUNG
Die Anleitung ist nur für qualifiziertes Fachpersonal bestimmt. Alle Wartungsarbeiten dürfen nur von qualifiziertem Fachpersonal ausgeführt werden. Um die Gefahr eines elektrischen Schlages, Feuergefahr und Verletzungen zu vermeiden, sind bei Wartungsarbeiten strikt die Angaben in der Anleitung zu befolgen. Andere als die angegeben Wartungsarbeiten dürfen nur von Personen ausgeführt werden, die eine spezielle Befähigung dazu besitzen.

! AVERTISSEMENT
Ce manual est destiné uniquement aux personnes compétentes en charge de l'entretien. Afin de réduire les risques de décharge électrique, d'incendie ou de blessure n'effectuer que les réparations indiquées dans le mode d'emploi à moins d'être qualifié pour en effectuer d'autres. Pour toute réparation faire appel à une personne compétente uniquement.

DFS-700A/700AP/700/700P

Table of Contents
Manual Structure
Purpose of this manual .............................................................................................. 5 Related manuals ......................................................................................................... 5 Contents ..................................................................................................................... 6

1. Operating Instructions Please refer to the instruction manual. 2. Service Overview
2-1. Installation ................................................................................................... 2-1 2-1-1. Operating Environment .............................................................. 2-1 2-1-2. Power Supply Specifications ...................................................... 2-1 2-1-3. Power Supply Cord .................................................................... 2-1 2-1-4. Installation Space ....................................................................... 2-2 2-1-5. Matching Connector and Cable .................................................. 2-3 2-1-6. Signal Input/Output .................................................................... 2-4 2-1-7. Rack Mounting ........................................................................... 2-7 2-1-8. Installing Optional Board ........................................................... 2-9 2-2. Removal of Cabinet ................................................................................... 2-10 2-3. Location of Main Parts .............................................................................. 2-11 2-4. Circuit Description .................................................................................... 2-12 2-4-1. Processor .................................................................................. 2-12 2-4-2. Control Panel ............................................................................ 2-19 2-5. Replacement of Board ............................................................................... 2-21 2-5-1. Replacement of Plug-in Board ................................................. 2-21 2-5-2. Replacement of Board .............................................................. 2-21 2-6. Replacement of Switching Regulator ........................................................ 2-23 2-7. Replacement of DC Fan ............................................................................ 2-24 2-8. Replacement of Main Parts on Control Panel ........................................... 2-25 2-8-1. Replacement of Fader Assembly ............................................. 2-25 2-8-2. Replacement of Rotary Encoder .............................................. 2-26 2-8-3. Replacement of Joystick .......................................................... 2-26 2-8-4. Replacement of Vacuum Fluorescent Display ......................... 2-27 2-9. Fuse/IC Link Replacement ........................................................................ 2-28 2-10. Switch, Indicators, and Volume Controls on Board ................................. 2-29 2-10-1. Control Panel ............................................................................ 2-29 2-10-2. Processor .................................................................................. 2-30 2-11. Error Indication ......................................................................................... 2-43 2-12. Periodic Inspection .................................................................................... 2-44 2-12-1. Periodic Replacement Parts ...................................................... 2-44 2-12-2. Filter Cleaning .......................................................................... 2-44
DFS-700A/700AP/700/700P

1

2-13. Fixtures/Measuring Instruments ................................................................ 2-44 2-13-1. Fixtures ..................................................................................... 2-44 2-13-2. How to Use Extension Board ................................................... 2-45 2-13-3. Measuring Instruments ............................................................. 2-45

3. Self-diagnosis
3-1. Confirmation of Version ............................................................................. 3-2 3-1-1. Execution .................................................................................... 3-2 3-1-2. Viewing the Version .................................................................. 3-3 Check Mode ................................................................................................ 3-3 3-2-1. Activation and Termination ....................................................... 3-3 3-2-2. Basic Operation .......................................................................... 3-4 3-2-3. Checking .................................................................................... 3-5 Troubleshooting .......................................................................................... 3-9

3-2.

3-3.

4. Electrical Alignment
4-1. 4-2. 4-3. Adjustment Sequence .................................................................................. 4-1 Preparation for Adjustment ......................................................................... 4-5 OPM-39/OPM-45 Board Adjustment (For NTSC) ..................................... 4-6 4-3-1. +5 V DC Voltage Adjustment ................................................... 4-6 4-3-2. +3.3 V DC Voltage Adjustment ................................................ 4-6 4-3-3. SDI VCO Free-running Frequency Adjustment ........................ 4-6 4-3-4. PGM OUT Component Y Gain Adjustment .............................. 4-7 4-3-5. PGM OUT Component R-Y Gain Adjustment .......................... 4-7 4-3-6. PGM OUT Component B-Y Gain Adjustment .......................... 4-8 4-3-7. PGM OUT Component Y/C Delay Adjustment ........................ 4-8 4-3-8. Composite SC Leak Balance Adjustment .................................. 4-9 4-3-9. Composite Y Gain Adjustment .................................................. 4-9 4-3-10. Composite Modulation AXIS Adjustment ............................... 4-10 4-3-11. Composite Y/C Delay Adjustment ........................................... 4-11 4-3-12. Composite C Gain Adjustment ................................................ 4-11 4-3-13. Composite Burst Level Adjustment ......................................... 4-12 4-3-14. S VIDEO Y Gain Adjustment .................................................. 4-12 4-3-15. S VIDEO C Gain Adjustment .................................................. 4-13 4-3-16. Black Burst OUT SC Leak Balance Adjustment ..................... 4-13 4-3-17. Black Burst OUT SC Phase Adjustment .................................. 4-14 4-3-18. Black Burst OUT SYNC Level Adjustment ............................ 4-14 4-3-19. Black Burst OUT Burst Level Adjustment .............................. 4-15 4-3-20. INT SC Frequency Adjustment ................................................ 4-15 4-3-21. INT SCH Phase Adjustment .................................................... 4-16 4-3-22. INT Black Burst OUT SCH Phase Adjustment ....................... 4-17 4-3-23. GEN Lock H Phase Adjustment .............................................. 4-18 4-3-24. GEN Lock SC Phase Adjustment ............................................ 4-19

2

DFS-700A/700AP/700/700P

4-4.

4-5.

4-3-25. PVW OUT Video Gain Adjustment ........................................ 4-20 4-3-26. DSK EXT Key Clamp Level Adjustment ................................ 4-20 4-3-27. DSK EXT Key Gain Adjustment ............................................. 4-21 OPM-39P/OPM-45P Board Adjustment (For PAL) ................................. 4-22 4-4-1. +5 V DC Voltage Adjustment ................................................. 4-22 4-4-2. +3.3 V DC Voltage Adjustment .............................................. 4-22 4-4-3. SDI VCO Free-running Frequency Adjustment ...................... 4-22 4-4-4. PGM OUT Component Y Gain Adjustment ............................ 4-23 4-4-5. PGM OUT Component R-Y Gain Adjustment ........................ 4-23 4-4-6. PGM OUT Component B-Y Gain Adjustment ........................ 4-24 4-4-7. PGM OUT Component Y/C Delay Adjustment ...................... 4-24 4-4-8. Composite SC Leak Balance Adjustment ................................ 4-25 4-4-9. Composite Y Gain Adjustment ................................................ 4-25 4-4-10. Composite Modulation AXIS Adjustment ............................... 4-26 4-4-11. Composite Y/C Delay Adjustment ........................................... 4-27 4-4-12. Composite C Gain Adjustment ................................................ 4-27 4-4-13. Composite Burst Balance Adjustment ..................................... 4-28 4-4-14. Composite Burst Level Adjustment ......................................... 4-28 4-4-15. S VIDEO Y Gain Adjustment .................................................. 4-29 4-4-16. S VIDEO C Gain Adjustment .................................................. 4-29 4-4-17. Black Burst OUT SC Leak Balance Adjustment ..................... 4-30 4-4-18. Black Burst OUT Burst Balance Adjustment .......................... 4-30 4-4-19. Black Burst OUT SC Phase Adjustment .................................. 4-31 4-4-20. Black Burst OUT SYNC Level Adjustment ............................ 4-31 4-4-21. Black Burst OUT Burst Level Adjustment .............................. 4-32 4-4-22. INT SC Frequency Adjustment ................................................ 4-32 4-4-23. INT SCH Phase Adjustment .................................................... 4-33 4-4-24. INT Black Burst OUT SCH Phase Adjustment ....................... 4-34 4-4-25. Preread ON PGM OUT SCH Phase Adjustment ..................... 4-35 4-4-26. Preread ON PGM OUT Burst Start Adjustment ...................... 4-36 4-4-27. GEN Lock H Phase Adjustment .............................................. 4-37 4-4-28. GEN Lock SC Phase Adjustment ............................................ 4-38 4-4-29. PVW OUT Video Gain Adjustment ........................................ 4-39 4-4-30. DSK EXT Key Clamp Level Adjustment ................................ 4-39 4-4-31. DSK EXT Key Gain Adjustment ............................................. 4-40 IPM-96/96P Board Adjustment ................................................................. 4-41 4-5-1. SDI VCO Free-running Frequency Adjustment ...................... 4-41 4-5-2. Component Y Level Adjustment ............................................. 4-42 4-5-3. Component Chroma Level Adjustment ................................... 4-43 4-5-4. Input Y/C Delay Adjustment ................................................... 4-45 4-5-5. Video Input Phase Adjustment ................................................. 4-46 4-5-6. RGB Converted Y Level Adjustment ...................................... 4-47 4-5-7. RGB Converted Chroma Level Adjustment ............................ 4-48

DFS-700A/700AP/700/700P

3

4-6.

4-7.

4-8.

VIF-19/19P Board Adjustment ................................................................. 4-50 4-6-1. Composite Y Level Adjustment ............................................... 4-50 4-6-2. S VIDEO Clamp DC Level Adjustment .................................. 4-52 4-6-3. SYNC Separate Adjustment ..................................................... 4-54 4-6-4. H Lock Loop Adjustment ......................................................... 4-55 4-6-5. Burst Delay Adjustment ........................................................... 4-57 4-6-6. Composite Input Y Gain Adjustment ....................................... 4-59 4-6-7. Composite Input Chroma Level Adjustment ........................... 4-61 4-6-8. S VIDEO Input Gain Adjustment ............................................ 4-63 4-6-9. Composite Input Y/C Delay Adjustment ................................. 4-65 4-6-10. S VIDEO Input Y/C Delay Adjustment ................................... 4-69 4-6-11. Video Input Phase Adjustment ................................................. 4-73 VIF-20/20P Board Adjustment ................................................................. 4-74 4-7-1. SDI VCO Free-running Frequency Adjustment ...................... 4-74 4-7-2. Component Y Level Adjustment ............................................. 4-75 4-7-3. Component Chroma Level Adjustment ................................... 4-76 4-7-4. Input Y/C Delay Adjustment ................................................... 4-78 4-7-5. Video Input Phase Adjustment ................................................. 4-79 Adjusting the Power Supply Voltage ........................................................ 4-80

4

DFS-700A/700AP/700/700P

Manual Structure
Purpose of this manual
This manual is the service manual Vol.1 of the DME Switcher DFS-700A/700AP/ 700/700P and their optional boards. The service manuals (Vol.1 and Vol.2) are intended for use by trained system and service engineers, and describes the information on installing, maintenance, and detailed service. This manual (Vol.1) describes the service overviews, diagnosis, and electrical alignment.

Related manuals
Besides this Service Manual Vol.1, the following manuals are available for the DFS-700A/700AP/700/700P. . Service Manual Vol.2 Part No. 9-967-898-XX (for J, UC, CE) Contains the spare parts, semiconductor pin assingments, block diagrams, schematic diagrams, and board layouts. . "Semiconductor Pin Assignments" CD-ROM (Available on request) This "Semiconductor Pin Assignments" CD-ROM allows you to search for semiconductors used in B&P Company equipment. Semiconductors that cannot be searched for on this CD-ROM are listed in the service manual for the corresponding unit. The service manual contains a complete list of all semiconductors and their ID Nos., and thus should be used together with the CD-ROM. Part number: 9-968-546-XX

DFS-700A/700AP/700/700P

5

Contents
This manual is organized by following sections. Section 1 Operating Instructions Please refer to the operating instructions supplied with this unit. Section 2 Service Overview This section explains the information that is required for installing (the operating conditions, power supply and power cords, installaion of the optional board, rack mounting, adaptive connectors), outline of the board circuit, replacement of the parts, switch setting on the board, error indication, and tools and adjustment equipment. Section 3 Self-diagnosis This section explains the activation (termination) of the check mode in this unit, the basic operation, and the check method. Section 4 Electrical Alignment This section explains the adjustment of the OPM-39/OPM-45, IPM-69, VIF-19, and VIF-20 boards.

6

DFS-700A/700AP/700/700P

Section 2 Service Overview
2-1. Installation
2-1-1. Operating Environment
Operating temperature Performance temperature Humidity 0 dC to 40 dC 5 dC to 35 dC 10 to 90 % (No condensation)

2-1-3. Power Supply Cord
For customers in the U.S.A. and Canada 1 Power cord, 125 V 10 A (2.4 m): 1-557-377-11 For customers in Europe 2 Power cord, 250 V 10 A (2.5 m): 1-590-910-11 w Use a supplied power cord only. Be sure to use a recommended power cord to avoid fire and/or an electric shock. c Ground the unit for your safety. Be sure to attach a ground wire to avoid an electric shock.

To prevent overheating of the DFS-700A/700AP/700/ 700P, ensure that there is good air circulation around the unit. c Install in a stable location. Installation on unstable or tilting surface may cause the unit fall off, resulting in injury.

2-1-2. Power Supply Specifications
Power voltage Power frequency Power consumption Rush current AC 100 V to 240 V 50/60 Hz 200 W (Boards installed) AC 230 V IN : 13 A AC 240 V IN : 24 A

n AC power supply is required a capacity which is commensurate with rush current. If the capacity of the AC power supply is not enough, the breaker of AC power of a supply side may operate or this unit may not operate normally.

DFS-700A/700AP/700/700P

2-1

2-1. Installation

2-1-4. Installation Space
m . The rear side must be at least 400 mm away from the walls for ventilation and maintenance. . Do not stop the fan or block the ventilator because this unit is air-cooled by the fan on the rear side. If not, a failure or trouble may occur.

520

26.5

440

132.4

17.5

375 465 482

57.2

(The illustration indicates DFS-700.)

2-2

DFS-700A/700AP/700/700P

61
Unit: mm

380

2-1. Installation

2-1-5. Matching Connector and Cable
When connecting cable to the connectors, match those connectors or equivalent with each other as listed below.
DFS-700A/700AP/700/700P side connector Connector Function Name DIGITAL I/O PGM OUT SDI INPUTS CLEAN OUT ANALOG I/O PGM OUT 1, 2 1 to 8 Connector BNC BNC BNC 3-BNC 3-BNC S VIDEO, Plug (F) 3-BNC 3-BNC BNC S VIDEO, Plug (F) BNC BNC BNC D-sub, Plug 25P (F) D-sub, Plug 25P (F) D-sub, Plug 9P (F) USB B-type (R) Receptacle Matching Connector and Cable Connector BNC BNC BNC 3-BNC 3-BNC S VIDEO, Plug (M) 3-BNC 3-BNC BNC S VIDEO, Plug (M) BNC BNC BNC D-sub, Plug 25P (M) D-sub, Plug 25P (M) D-sub, Plug 9P (M) USB B-type (P) Plug 1-560-651-00 Sony Parts No. 1-569-370-12 1-569-370-12 1-569-370-12 1-569-370-12 1-569-370-12 YC-30 V (3 m) 1-569-370-12 1-569-370-12 1-569-370-12 YC-30 V (3 m) 1-569-370-12 1-569-370-12 1-569-370-12 (*)

VIDEO INPUTS

DSK KEY IN BLACK BURST OUT GPI/T PANEL TALLY EDITOR TERMINAL

COMPOSITE 1, 2 PVW COMPONENT 1, 2 (Y, R-Y, B-Y) S VIDEO 1, 2 COMPONENT 5/1 to 8/4 (Y, R-Y, B-Y) COMPONENT/COMPOSITE 5 to 8 (Y/V, R-Y, B-Y) REF. VIDEO(Loop-through) S VIDEO 5 to 8 (Loop-through) 1 to 3 1, 2

(*) This Connector is attached to the cable of 10 m. (Sony parts No: 1-765-378-51)

DFS-700A/700AP/700/700P

2-3

2-1. Installation

2-1-6. Signal Input /Output
The input and output signals of the connectors on the rear panel are as described below. PGM OUT 1, 2 Connector: BNC Output voltage: 800 mV p-p Output impedance: 75 Z PGM OUT COMPOSITE 1, 2 Connector: BNC Output voltage: 1.0 V p-p Output impedance: 75 Z PGM OUT S VIDEO 1, 2 (S terminal 4-pin, Female)
­ EXT VIEW ­ 4 3

BLACK BURST OUT 1, 2, 3 Connector: BNC Output voltage: Sync/Burst: 0.286 V p-p (NTSC) Sync/Burst: 0.300 V p-p (PAL) Output impedance: 75 Z DSK KEY IN (Loop-through) Connector: BNC Input voltage: 1.0 V p-p (Sync: approx 0.3 V p-p) Input impedance: High impedance or 75 Z (with termination 75 Z ON/OFF switch) SDI INPUTS 1 to 8 Connector: BNC Input voltage: 800 mV p-p Input impedance: 75 Z *SDI 5 to SDI 8 require BKDF-701. VIDEO INPUTS S VIDEO 5 to 8 (S terminal 4-pin, Female) *BKDF-702/702P is required.
­ EXT VIEW ­

2

1

Pin No. 1 2 3 4

Signal Y GND C GND Y C

Function Ground of luminance output Ground of chrominance output Luminance output Chrominance output Pin No. 1 2 3 Signal Y GND C GND Y C

4

3

2

1

Function Ground of luminance input Ground of chrominance input Luminance input Chrominance input

PGM OUT COMPONENT 1, 2 Connector: 3-BNC
Signal Y R-Y B-Y Function Luminance output Chrominance R-Y output Chrominance B-Y output

4

VIDEO INPUTS COMPONENT 5/1 to 8/4 Connector: 3-BNC 1 When the 8/4 input is set to YUV.
Connector Y R-Y B-Y Function Y: Luminance input

PVW OUT Connector: BNC Output voltage: 1.0 V p-p Output impedance: 75 Z CLEAN OUT Connector: BNC Output voltage: 800 mV p-p Output impedance: 75 Z

Color-difference signal R-Y: Chrominance input Color-difference signal B-Y: Chrominance input

2 The 8/4 input when the 8/4 input is set to RGB. (Other inputs are the same as in step 1.)
Connector Y R-Y B-Y Function Y: RGB signal G input (with Sync)

R-Y: RGB signal R input B-Y: RGB signal B input
DFS-700A/700AP/700/700P

2-4

2-1. Installation

VIDEO INPUTS COMPONENT/COMPOSITE 5 to 8 Connector: BNC 1 When BKDF-701 is installed
Connector Y/V R-Y B-Y Function Y: Luminance input

PANEL (D-sub 25-pin, Female) (Processor)
­ EXT VIEW ­ 13 1

R-Y: Chrominance input B-Y: Chrominance input Pin No. 1 2 3 4 5 6

25 Signal GND DC CON KRD+ GND KTD+ GND RVD+ GND -- GND GND GND DC CON DC CON KRD_ GND KTD_ GND RVD_ IN/OUT -- O I -- O -- O -- -- -- -- -- O O I -- O -- O -- -- Function Frame ground 12 V output

14

2 When BKDF-702/702P is installed
Connector Y/V R-Y B-Y Function Composite input -- --

Receive data "B" Receive common Transmit data "B" Transmit common Transmit VD "B" Ground -- Ground Ground Ground 12 V output 12 V output Receive data "A" Receive common Transmit data "A" Transmit common Transmit VD "A" Ground Frame ground

REF. VIDEO (Loop-through) Connector: BNC Input voltage: PAL 0.45 V p-p (Sync/Burst: 0.300 V p-p) NTSC 0.43 V p-p (Sync/Burst: 0.286 V p-p) Input impedance: High impedance or 75 Z (with termination 75 Z ON/OFF switch) GPI/T 1, 2 Connector: Input voltage:

7 8 9 to 10 11 12 13 14 15 16

BNC TTL level

17 18 19 20

21 to 24 GND 25 GND

DFS-700A/700AP/700/700P

2-5

2-1. Installation

PANEL (D-sub 25-pin, Female) (Control panel)
­ EXT VIEW ­ 13 1

EDITOR (D-sub 9-pin, Female)
­ EXT VIEW ­ 5 1

25 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal FG +12 V MIT+ GND RCV+ GND RVD+ GND -- -- GND GND GND +12 V +12 V MIT_ GND RCV_ GND RVD_ IN/OUT -- I O -- I -- I -- -- -- -- -- -- I I O -- I -- I -- -- Function

14 Pin No. 1 2 3 4 5 6 7 8 9 Signal GND TXA RXB GND -- GND TXB RXA GND

9 IN/OUT -- O I -- -- -- O I --

6 Function Frame ground Transmit "A" Receive "B" Receive common -- Transmit common Transmit "B" Receive "A" Frame ground

Frame ground 12 V input Transmit data "B" Transmit common Receive data "B" Receive common Receive VD "B" Ground -- -- Ground Ground Ground 12 V input 12 V input Transmit data "A" Transmit common Receive data "A" Receive common Receive VD "A" Ground Frame ground

21 to 24 GND 25 FG

2-6

DFS-700A/700AP/700/700P

2-1. Installation

TALLY (D-sub 25-pin, Female)
­ EXT VIEW ­ 13 1

2-1-7. Rack Mounting
The DFS-700A/700AP/700/700P can be mounted on a 19inch standard rack for use. Mount the DFS-700A/700AP/700/700P on the rack properly in the procedure below using a specified rack mounting kit. Specified rack mounting kit: RMM-10 n The DFS-700A/700AP/700/700P may not be able to be mounted on a 19-inch standard rack using a rack mounting kit other than the specified one. Components of RMM-10 . Rack brackets ..................................................... 2 pieces . Rack mounting adaptor (right) ........................... 1 piece [Including two screws (B 4x6: 7-682-560-09)] . Rack mounting adaptor (left) ............................. 1 piece [Including two screws (B 4x6: 7-682-560-09)] . Rack bracket fixing screws (B 4x6: 7-682-560-09) ................................................................ 6 pieces . Adaptor fixing screws (B 4x10: 7-682-560-10) ................................................................ 6 pieces Other required parts To mount in the rack, the rack mount kit RMM-10 and the following part are required. . Screw for rack mounting (B5 x 12: 7-682-576-04) ................................................................ 4 pieces 1. Notes on Rack Mounting w . Fix the rack on the horizontal and firm floor with bolts to prevent it from turning over or moving. If the rack overturn due to the weight of the unit, this may cause a death or serious injury. . Use the specified rack mounting kit. If not, the unit may fall because of insufficient strength. This causes an injury. . After rack mounting, be sure to tighten the screws of the rack angle and fix this unit to the rack. If not, this unit may slide and fall from the rack. This causes an injury.

25 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Signal TL1A TL1B TL2A TL2B TL3A TL3B TL4A TL4B TL5A TL5B TL6A TL6B GND -- TL7A TL7B TL8A TL8B -- -- -- -- -- -- GND IN/OUT O O O O O O O O O O O O -- -- O O O O -- -- -- -- -- -- -- -- -- -- -- -- -- Function

14

Video input 1 Tally

Video input 2 Tally

Video input 3 Tally

Video input 4 Tally

Video input 5 Tally

Video input 6 Tally

Frame ground -- Video input 7 Tally

Video input 8 Tally

Frame ground

TERMINAL (USB B-type, Receptacle)
­ EXT VIEW ­ 4 3

2

1

Pin No. 1 2 3 4

Signal Vcc (not used) D_ D+ GND

IN/OUT

Function

I/O I/O --

Data_ Data+ Frame ground

DFS-700A/700AP/700/700P

2-7

2-1. Installation

c Attention when this unit is installed in the rack: . Mount the unit with two or more persons. . Be careful not to put your hand or finger in the rack mount rail. . Install in a stable posture. n Install a ventiloting fan in the rack to prevent the increase in the temperature inside a rack when multiple units are put in one rack. 2. Rack Mounting Procedure Explains the procedure for rack mounting by Rack Mount Kit RMM-10. n Fasten the screws at the tightening torque below. Tightening torque: 1.2 N.m {12.2 kgf.cm} (1) Attach the rack brackets at the side panels of the processor with the specified six screws. n Be sure to use B4x6 as a screw.
Rack bracket B 4x6

(2) Loosen the screws at the rear of the each adaptor and adjust each adaptor length to the rack depth. (Following figure is case of left side.)

Rail portion

B 4x6

n The maximum depth of an adaptor is 750 mm. The minimum depth of an adaptor is 595 mm. (3) Firmly lay the right and left adaptors in the rack with the specified six screws. (Following figure is case of left side.)
RMM-10 Front

31.75 3U B 4x10 Rear B 4x10 31.75

Rack bracket

B 4x6

(4) Fasten the length adjustment screws which are loosened in step (2). (5) Remove the front panel of the processor. (Refer to Section 2-2.)

2-8

DFS-700A/700AP/700/700P

2-1. Installation

(6) Align the crook of each rack bracket on the side panels of the processor with the rail, then slide the processor backward. n Each rack bracket covers the rails as shown in the figure below.

2-1-8. Installing Optional Board
1. Inserting of Plug-in Boards (BKDF-701/702/702P) c To avoid shock hazards and/or damage to the mounted circuit boards, be sure to turn off the power switch before inserting or pulling out the plug-in boards. BKDF-701 and BKDF-702/702P are installed in slot No. 2 (the second slot from the top). BKDF-701 and BKDF-702/ 702P cannot be installed in the same processor unit. (1) Remove the front panel. (Refer to Section 2-2.) (2) Remove the four screws and then remove the board stopper assembly. (3) Insert the plug-in board into slot No. 2 with the board levers opened. n Insert the board while applying an equal force to the both board levers. (4) Push the plug-in board in the direction of the arrow 2, then close the board levers in the direction of the arrow 1.
2

Rack bracket

Rack bracket

Rail

Rail

(7) Fix the unit to the rack with the specified screws and ornamental washers.

1

1 Board levers 2

B 5x12

B 3x5

Board stopper assembly B 3x5
B 5x12

Plug-in board

(5) Install the board stopper assembly and front panel.

(8) Install the front panel.(Refer to Section 2-2.)

DFS-700A/700AP/700/700P

2-9

2-1. Installation 2-2. Removal of Cabinet

2. Installing the BKDF-711/ 712 c To avoid shock hazards and/or damage to the mounted circuit boards, be sure to turn off the power switch before inserting or pulling out the plug-in boards. (1) Remove the front panel. (Refer to Section 2-2.) (2) Remove the four screws and then remove the board stopper assembly. (3) Open the board levers in the direction of the arrow 1 and remove the VSW-69/69P board from slot No. 4 (the fourth slot from the top).

Installing the BKDF-712 (6) Connect the connectors on the VSE-36 board firmly to the connectors (CN201 and CN202) on the VSW-69/ 69P board. (7) Fix the connectors to the VSW-69/69P board with the six screws supplied for BKDF-712.
PSW 3x6 VSE-36 board (BKDF-712)

PSW 3x6

CN201

1

1
VSW-69 board or VSW-69P board

CN202

B 3x5

Board stopper assembly B 3x5

Plug-in board

(8) Install the VSW-69/69P board in slot No. 4. (9) Install the board stopper assembly and front panel. n BKDF-711 and BKDF-712 can also be installed on the same VSW-69/69P board.

Installing the BKDF-711 (4) Connect the connectors on the CMB-12 board firmly to the connectors (CN101 and CN102) on the VSW69/69P board. (5) Fix the CMB-12 board to the VSW-69/69P board with the six screws supplied in BKDF-711.
PSW 3x6 CMB-12 board (BKDF-711) PSW 3x6 CN101

2-2. Removal of Cabinet
Remove the four screws (with stoppers) and then remove the front panel in the direction of the arrow.
Screws (with stoppers)

CN102 VSW-69 board or VSW-69P board

Front panel

Screws (with stoppers)

2-10

DFS-700A/700AP/700/700P

2-3. Location of Main Parts

2-3. Location of Main Parts
Processor Unit DFS-700A (UC): S/N 10331 and Higher DFS-700AP (CE): S/N 40621 and Higher
!= Switching regulator 4 DC fan 5 6 7

Control Panel
0 7 2 Vacuum fluorescent display 1 6 Joystick

4
1 8 or 9 2 3 !0

9 Fader assembly 8 Rotary encoder 3

5 !-

DFS-700A (UC): S/N 10001-10330 DFS-700AP (CE): S/N 40001-40620 DFS-700 (UC): S/N 10001 and Higher DFS-700P (CE): S/N 40001 and Higher
4 Switching regulator DC fan 5 6 7

Fig No. Board name 1 2 3 4 5 6 7 8 9 CPU-305 KY-466 KY-467 KY-468 LC-40 LE-227 LE-233 LE-234 LE-235 VR-263 VR-264

Function CPU board Switch board Switch board Switch board Joystick board Display LED board 7-segment LED board 7-segment LED board LED board Volume board Volume board

1 8 or 9 2
Fig No. Board name 1 2 3 4 5 6 7 8 9 0 !!= IPM-96/96P VSW-69/69P OPM-39/39P OPM-45/45P MB-874 DD-37 CN-1921 CN-1942 VIF-20/20P (BKDF-701) VIF-19/19P (BKDF-702/702P)

0 !3
Function Input processor board Video processor board Output processor board Motherboard DC-DC conversion board Connector board Connector board Digital analog input board Analog composite input board

0 !-

CMB-12 (BKDF-711) Digital multi effects board VSE-36 (BKDF-712) CN-2389 3D video mapping effects board Connector board

DFS-700A/700AP/700/700P

2-11

2-4. Circuit Description

2-4. Circuit Description
2-4-1. Processor
1. CMB-12 Board (2 Channel Digital Multi-effect Board) V2 (FRGD) and K2 (TITLE) signals are processed on the CMB-12 board. The V2 signal is used as an FRGD signal so as to perform the color collector processing, border addition, beveled edge addition, and two-dimensional low-pass filter processing. In the title mode, the K2 signal is used as a key signal. After key processing, the key signal is used as a wipe key by a wipe generator so as to transform the two-dimensional low-pass filter processing. After the processing, the FRGD and key signals are written in DME memory. For the read address of DME memory data, the generator circuit varies depending on the two types of effects below. (1) 2D, 3D nonlinear effect (2) 3D mapping effect (when the VSE-36 board is installed) The read data is interpolated for lighting. The data is then combined using the key signal from the VSW69/69P board and the key signal processed on the CMB-12 board. The resultant FRGD and key signals are sent to the VSW-69/69P board. 2. DD-37 Board (DC-DC Converter) In the DD-37 board, a power supply of +12 V is converted into the voltage used in each circuit. The 12 V power supply output from an AC-DC power unit is converted into the voltages (+5 V, +3.3 V, +7 V, and _7 V) required in each circuit. IC3, IC4, and IC5 are dual switching regulator control ICs. One IC can control two power outputs. IC3 controls +5 V-1 and +5 V-2 outputs, and IC4 controls +5 V-3 and +3.3 V-2 outputs. IC5 controls +7 V and _7 V outputs. For the maximum load current of each output voltage, +5 V and +3.3 V are 10 A, and +7 V and _7 V are 3 A. 3. IPM-96/96P Board (Input Processor Board) The IPM-96/96P board is used to input the SDI, component (Y, R-Y, B-Y), and component (RGB) signals for DFS-700A/700AP/700/700P. The IPM-96/96P board mounts a four-channel SDI circuit and four-channel component circuit. A video signal is sent to the BG and FG buses by the switching of a crosspoint. The IPM-96/96P board accepts three input signals; SDI signals (270 Mbps), component (Y, R-Y, B-Y) signals, and component (RGB) signals. Four-channel SDI signals, four-channel component (Y, R-Y, BY) signals, and RGB signals can be assigned to channels 1 through 8 of a crosspoint. For the one-channel analog signal input to the 8/4 component input connector, a component (Y, R-Y, B-Y) signal or component (RGB) signal is selected according to the format. (1) Signal input block An SDI input signal is directly converted into 4:2:2 parallel signal of an eight-bit by an SDI input IC and sent to the next stage. For a component signal input, an RGB-to-Y, R-Y, B-Y conversion circuit is added to only the 8/4 input connector. The analog component signal can be input based on an RGB or Y, R-Y, B-Y signal system by the selection of a format. As a result, all analog input signals become Y, R-Y, B-Y signals.

2-12

DFS-700A/700AP/700/700P

2-4. Circuit Description

(2)

(3)

(4)

(5)

In each channel, these signals are analog-to-digital converted by the same circuit processing system and sent to the next stage as 4:2:2 parallel signal of an eight-bit. Analog input block The analog input block on the IPM-96/96P board can accept four-channel component input signal. Basically, the analog input block receives Y, R-Y, and B-Y signals. Only the fourth channel is provided with an RGB-to-Y, R-Y, B-Y conversion circuit and selection circuit so that it can also receive an RGB component signal. Therefore, the circuit stage after the selection circuit in the fourth channel is the same in each channel. Only the first channel is described below as an example. A Y signal is passed through a 5.5 MHz low-pass filter, converted into the proper value in a signal level, and fed to the A/D converter by AC coupling. Color difference signals R-Y and B-Y are passed through a Y/C delay adjustment circuit and 2.5 MHz low-pass filter, converted into the proper value in level, and sent to the A/D converter by AC coupling. A/D converter IC107 is an eight-bit Y, R-Y, B-Y simultaneous conversion output circuit incorporating a clamp function. In the case of reference voltage for A/D conversion, a top voltage of 3.5 V and a bottom voltage of 1.5 V are supplied using a reference voltage generator circuit and operational amplifier. For the phase relation at the input end of the A/D converter, a Y signal is supplied in the state where it is advanced 222 ns (corresponding to three clocks of a 13.5 Mbps digital clock) with respect to a R-Y, B-Y signal. When the Y signal is converted into a digital signal, only the Y signal is delayed by three clocks (222 ns) for phase adjustment. Since the Y signal has a high frequency band, the delay in an analog circuit is disadvantageous in frequency characteristics and is processed by a digital circuit. Moreover, the digital output Y signal of the A/D converter is converted in a digital level by a ROM table so as to select the level difference in NTSC-J, NTSC-UC, and PAL. The level is converted (expanded) for NTSC-UC only. Input conversion clock generation block Each input circuit requires a 4:2:2 digital clock (13.5 MHz) synchronized with an input analog signal. Therefore, each channel has a clock generator circuit in the input block. The signal just before entering the A/D converter is taken out from the Y signal system of an input signal and composite sync information is extracted using a sync separator circuit. One of the extracted information generates a clamp pulse for clamping an input signal. The other is passed through a half H killer circuit and then connected to a clock generation PLL circuit of 27 MHz via the video phase adjustment circuit during digital conversion. As a result, clocks of 27 MHz and 13.5 MHz and H start pulses are generated. Digital level conversion block On the IPM-96/96P board, the input level is multiplied by 1.08 (expanded in level proportionally to the setup elimination) in the NTSC-UC mode using a ROM table after A/D conversion. This is the level conversion by digital processing. Using this system, the setup elimination can also be simultaneously processed without changing the clamp operation and function required until the A/D converter is used. This system is thus very efficient. The DFS-700A/700AP/700/700P is designed so that data completely returns to the former state between the input and output (expansion to reduction) and coincides with each other. Therefore, this ensures the satisfactory characteristics of waveforms. TBC block After an SDI input signal is converted from serial to parallel, it is input to the line memory. After a component input signal is converted from analog to digital, it is input to the line memory. In this line memory, the TBC block having a lead-in range of _0.3 to +1.3 H from a REF signal as reference is constituted. On the write side, the line memory is written in the phase of an input signal. On the read side, it is read in the lead-in timing described above. As a result, on the read side, all input channels are adjusted to the same phase. Similarly, after a component input signal is converted from analog to digital, all channels become in phase with an SDI input by the output of line memory. The write and read control signals of the line memory are generated based on internal HD and VD pulses using memory control circuits (IC1320 to IC1323, IC1330, and IC1331). 2-13

DFS-700A/700AP/700/700P

2-4. Circuit Description

(6) Crosspoint block The input signal of a crosspoint on the IPM-96/96P board is a four-channel SDI input signal and fourchannel component input signal. When the VIF-20/20P board is installed, the four-channel SDI input signal or four-channel component signal of the VIF-20/20P board is used as the input signal of a crosspoint. When the VIF-19/19P board is installed, the four-channel composite input signal or fourchannel S video input signal of the VIF-19/19P board, and a memory bus and internal video signal are used as the input signal of a crosspoint. The output signal of a crosspoint is V1, K1, V2, K2, V3, and BG buses passed to the VSW-69/69P board, a DSKF bus passed to the OPM board (OPM-39/39P or OPM-45/45P), and a memory bus used as the input signal of the frame memory on the IPM-96/96P board. (7) Frame memory block The frame memory block freezes an input signal. The frozen video signal is used as one of the input signals in a crosspoint. When the input signal selected at the crosspoint is input from the memory bus to the frame memory circuit, it is separated into luminance and color-difference signals and written in the frame memory. The frame memory consists of four field memories and memorizes the luminance and color-difference signals separately in units of fields. After the luminance and color-difference signals are read, they are multiplexed and then output. For frame freezing, the luminance and color-difference signals are alternately read from memory in units of fields. For field freezing, odd and even field freezes are available. One field is read at all times. In the other field, two lines are added for interpolation. A two-line addition line buffer (IC1209) and adder (IC1208) are used as this circuit. The control signal of the frame memory is generated based on internal FD and VD pulses using memory control circuits (IC1322, IC1324, IC1326, and IC1333). (8) CPU interface block The IPM-96/96P board sets the mode selection or initial value by communicating with CPU (IC901) on the VSW-69/69P board. After IC1327 receives the data, address, and control signal from CPU and decodes them, it sends a chip select and set value to the SIF control circuit. 4. OPM-39/39P or OPM-45/45P Board (Output Processor Board) The OPM-39/39P or OPM-45/45P board (abbreviated as OPM board hereafter) outputs the DME, PVW, and KEY signals input from the VSW-69/69P board as an SDI or analog (component, S video, or composite) format signal. The OPM board mounts a DSK circuit that mixes a DSK video signal with the DME signal. This board also has an external reference sync circuit and black burst output circuit as well as an internal sync generator. The OPM board consists of the following blocks. (1) Gen-lock/system clock This block generates the reference signals required for DFS-700A/700AP/700/700P, such as internal signals (FD, VD, HD, BLK, CKF (27 MHz), and CKM (13.5 MHz) or an external output black burst signal. Each output signal operates with the sync signal of a sync generator (IC103) as the source. In the operation mode, there are an EXTERNAL GEN-LOCK mode that is gen-locked to the sync signal (VBS or BS) supplied from an external signal oscillator and an INTERNAL mode that internally generates a sync signal. When a sync signal is sent to the REF. VIDEO input connector on the rear panel, the unit automatically enters the EXTERNAL GEN-LOCK mode.

2-14

DFS-700A/700AP/700/700P

2-4. Circuit Description

(2) DSK (Down Stream Keyer) This block generates the key signal required for mixing a DME signal and DSK video signal. In addition to the component key signal input from the DSK KEY input connector on the rear panel, the self-key obtained when only a Y signal is extracted from a DSK fill signal can also be selected for a DSK source signal. The DSK source signal is adjusted in gain and clip, and masked, using a key processor (IC303). A fill key (FLK) signal that mixes the DSK fill signal with a border mat signal and a downstream key (DK) signal that is required for mixing with the DME signal are generated in the next-stage border processor (IC310) using a five-line key signal. The OPM-45/45P board adjusts the position of keying characters, etc. (DSK) by changing the delay amount using IC301, IC410 and IC411. (3) DSK M/E, FTB The mixing operation of a DME signal and DSK video signal, and the FTB (feed-to-black) operation are performed in this block. A DSK fill (or DSK mat) signal and border mat signal are first mixed with the fill key signal used as a coefficient. The PGM signal obtained when a DSK video signal with border is inserted into the DME signal is produced by this processing. The PGM signal is mixed for performing the FTB operation to a color mat signal and sent to the SDI and analog output circuit blocks. The signals (CLEAN, PVW, and KEY) output to the CLEAN connector are also selected by this block. (4) OUTPUT This block outputs PGM, CLEAN, PVW, and KEY signals as an SDI or analog format signal. In an SDI output system, there are a PGM signal and a signal output to the CLEAN connector. After V BLANKING addition and WHITE/DARK clipping are performed via this path using output processors (IC408 and IC504), these signals are converted from parallel to serial and then output. There are PGM and PVW signals in an analog output system. In the PGM path, a (eight-bit, 27 MHz) digital signal is separated into Y, V, and U signals and converted into an analog signal using a D/A converter. On the basis of the converted signal, component, S video, and composite signals are produced for output. Unlike the PGM path, in the PVW path, a digital signal is converted into a composite signal by one LSI (IC808). The following signals can be output from the output connector on the rear panel according to the signal formats below. SDI signal Component signal Composite signal S video signal PVW output signal Composite signal CLEAN output signal SDI signal (CLEAN, PVW, or KEY signal) Black burst output signal Tally output signal PGM output signal 2 channels 2 channels 2 channels 2 channels 1 channel 1 channel 3 channels 8 outputs

(5) CPU interface This block interfaces with the IC and local CPU on the OPM board. This block decodes the control signal generated by CPU using FPGA (IC805) and generates a control signal according to the way to control the IC. It also passes the information on the NTSC/PAL distinction and NTSC J/NTSC UC model to CPU via FPGA.

DFS-700A/700AP/700/700P

2-15

2-4. Circuit Description

5. VIF-19/19P Board (Analog Composite and S Video Input Board) The VIF-19/19P board is used for inputting the analog composite and S video signals of DFS-700A/ 700AP/700/700P. The VIF-19/19P board decodes the input composite signal and converts it into a D1 digital signal. This board also has a frame synchronizer function and uses an input signal as the signal synchronized with a reference signal. The output signal is sent to the IPM-96/96P board. The VIF-19/19P board mounts a four-channel analog composite or S video input circuit. In each channel, an analog composite input signal or S video input signal can be independently selected in the setup menu. One channel is described below. The circuit consists of a sync separator circuit, 13.5-MHz clock generation block, subcarrier clock generation block, Y/C separation and decode block, D1 encoder block, and frame synchronizer block. The analog composite and S video input signals have an individual input connector on the rear panel. These signals can be simultaneously input to the VIF-19/19P board. On the VIF-19/19P board, two input signals are selected by controlling the setup menu. The selected signal branches into two paths. One is input to the sync separation circuit so as to detect horizontal and vertical sync signals. After that, in the 13.5-MHz clock generation block, the signal generates a 13.5-MHz clock for the D1 signal synchronized with a horizontal sync signal. The other is input to the Y/C separation and decode circuit. In the subcarrier clock generation block, the signal generates the clock of the subcarrier frequency, multiplied by four, that was synchronized with a burst signal. After that, a composite signal is converted from analog to digital, Y/C-separated, and decoded by this clock. The resultant signal is converted from digital to analog again to produce an analog component signal. The Y/C separation is based on an adaptive two-dimensional system in which three lines are used. For the S video signal, only a chroma signal is converted from analog to digital and decoded digitally by this clock. The resultant signal is converted from digital to analog again to produce analog B-Y and R-Y signals. For a Y signal, the input analog signal is used directly. The analog component signal is adjusted in phase and gain and converted from analog to digital using the 13.5-MHz clock described above to produce a D1 digital signal. A frame synchronizer is constituted for each signal Y and C. The frame synchronizer consists of two FIFOs of 384 K x 8 bits, respectively. The signals are written in FIFO using the clock synchronized with an input signal and read using the clock synchronized with a reference signal. The input signal synchronized with a reference signal is delayed by about 1 to 3 H in this portion, but absorbed by other boards. Therefore, in the system, the delay will not increase by passing through the frame synchronizer. 6. VIF-20/20P Board (SDI and Analog Component Input Board) The VIF-20/20P board is an optional expansion board for inputting the SDI and analog component signals of DFS-700A/700AP/700/700P. The VIF-20/20P board mounts a four-channel SDI input circuit or four-channel analog component input circuit. The SDI or analog component input signal is sent to the IPM-96/96P board as a four-channel 4:2:2 component parallel digital signal. In each channel, the SDI input signal or analog component input signal can be independently selected according to the format.

2-16

DFS-700A/700AP/700/700P

2-4. Circuit Description

(1) Signal input block There are four channels in an SDI input circuit. An SDI input signal is directly converted into an eight-bit, 4:2:2 parallel signal. There are also four channels in a component input circuit. Finally, the signals in each channel are converted into eight-bit, 4:2:2 parallel signals by the same circuit system. The signals in four channels are selected together with the signal from the SDI input circuit and sent to the next-stage TBC circuit. The analog component input circuit generates a clock of 27 MHz synchronized with an input signal, regulates the level and delay value, and converts the signal from analog to digital. (2) Analog input block The analog input block on the VIF-20/20P board is basically almost the same in configuration as for the IPM-96/96P board. The circuit configuration is almost the same as that obtained when a component (RGB) signal input converter added to only the fourth channel is removed from the circuit configuration of the IPM-96/96P board and when a level selection circuit for each signal format is inserted into each four-channel color-difference (R-Y and B-Y) signal system. Therefore, the relevant circuit configuration is explained below. For other configuration, refer to "(2) Analog Input Block" of the IPM-96/96P board. A video selection circuit of 3 x 1 is inserted in each four-channel color-difference signal system. On the input side, a chroma signal is precisely divided by a high-precision resistor so as to select the level using a selection signal and sent to the next stage. In the case of the chroma signal, the input level for making the same in level as 75% color bars of an SDI signal is 756 mV for NTSC J, 700 mV for NTSC UC, and 525 mV for PAL. As a result, the system operates so that the output level of a selector circuit is constant in any input level. This shows that the setting of a chroma signal level does not vary depending on the format used. (3) Input conversion clock generation block Each input circuit requires a 4:2:2 digital clock (13.5 MHz) synchronized with an input analog signal. Therefore, each channel has a clock generator circuit in the input block. The signal just before entering the A/D converter is taken out from the Y signal system of an input signal and composite sync information is extracted using a sync separator circuit. One of the extracted information generates a clamp pulse for clamping an input signal. The other is passed through a half H killer circuit and then connected to a clock generation PLL circuit of 27 MHz via the video phase adjustment circuit during digital conversion. As a result, clocks of 27 MHz and 13.5 MHz and H start pulses are generated. (4) Digital level conversion block On the VIF-20/20P board, the input level is multiplied by 1.08 (expanded in level proportionally to the setup elimination) in the NTSC-UC mode using a ROM table after A/D conversion. This is the level conversion by digital processing. Using this system, the setup elimination can also be simultaneously processed without changing the clamp operation and function required until the A/D converter is used. This system is thus very efficient. The DFS-700A/700AP/700/700P is designed so that data completely returns to the former state between the input and output (expansion to reduction) and coincides with each other. Therefore, this ensures the satisfactory characteristics of waveforms. (5) TBC block After an SDI input signal is converted from serial to parallel, the video signal selected according to the format is input to the line memory. After a component input signal is converted to analog to digital, the video signal selected according to the format is input to the line memory. In this line memory, the TBC block having a lead-in range of _0.3 to +1.3 H from a REF signal as reference is constituted. On the write side, the line memory is written in the phase of an input signal. On the read side, it is read in the lead-in timing described above. As a result, on the read side, all input channels are adjusted to the same phase. Similarly, after a component input signal is converted from analog to digital, all channels are adjusted to the same phase by the output of line memory. The write and read control signals of the line memory are generated based on internal HD and VD pulses using memory control circuits (IC1309, IC1320, IC1321, and IC1323). The output video signal of the TBC block is sent to the IPM-96/96P board and input to the crosspoint.
DFS-700A/700AP/700/700P

2-17

2-4. Circuit Description

(6) CPU interface block The VIF-20/20P board sets the mode selection or initial value by communicating with CPU (IC901) on the VSW-69/69P board. After IC1327 receives the data, address, and control signal from CPU and decodes them, it sends a chip select and set to the SIF control circuit. 7. VSE-36 Board (3D Mapping Effects Board) The VSE-36 board is used to realize a three-dimensional mapping effect. This board consists of an address generation block and texture memory block. The address generation block can be divided into a CPU block and rendering block. The CPU block consists of CPU (IC501), program flash memories (IC601 to IC605), SDRAMs (IC612, IC613, IC615, IC616), and dual port RAM (IC510). The rendering block consists of DDA (IC401), address memories (IC413 to IC420) and address memory controllers (IC105, IC106, and IC109). The CPU block receives the information (e.g., system set information, effect pattern number, fader position, etc.) required for effect generation from the main CPU on the VSW-69/69P board via dual port RAM and transforms the three-dimensional object creation, geometry processing, and lighting calculation for each vertex. The rendering block expands the vertex data from a CPU (IC901) block to the information based on units of pixels by DDA and draws it on the address memory. The address memory controller reads the drawn address information and sends it to the texture memory block on the VSE-36 board, or the VSW-69/69P and CMB-12 boards. The address memory has a double-buffer configuration. Therefore, drawing and reading are alternately switched for each field. The texture memory block consists of a demultiplexer (IC105), color collector (IC251), border mixer (IC253), low-pass filters (IC201 and IC208), texture memory controllers (IC301 and IC306), and texture memories (IC302 to IC305, and IC307 to IC310). In the texture memory block, color collector processing, border addition, and two-dimensional low-pass filter processing are performed for the V3 signal (8-bit, 27 MHz) sent from the VSW-69/69P board as a texture video source. After that, the signal is written in texture memory. The texture memory controller reads the written data using the address generated by an address generation block, interpolates the data, and send it to the VSW-69/69P board. The texture memory has a double-buffer configuration. Therefore, writing and reading are alternately switched for each field. 8. VSW-69/69P Board (Processor Board) The VSW-69/69P board consists of a signal processing block and CPU block. This board transforms the DME processing according to the control panel operation. V1, K1, BG, V2, K2, and V3 signals (8-bit, 27 MHz) are input from the IPM-96/96P board to the VSW69/69P board. The signal processing block processes the V1, K1, and BG signals and outputs PGM, KEY, and PVW signals to the OPM board (OPM-39/39P or OPM-45/45P). The V1 signal is used as an FRGD signal so as to transform the color collector processing, border addition, beveled edge addition, and two-dimensional low-pass filter processing.

2-18

DFS-700A/700AP/700/700P

2-4. Circuit Description

In the title mode, the K1 signal is used as a key signal. After key processing, the K1 signal is used as a wipe key by a wipe generator so as to perform the two-dimensional low-pass filter processing. The FRGD and key signals in which the two-dimensional low-pass filter processing was carried out are written in DME memory. For the read address of DME memory data, the generator circuit varies depending on the three types of effects below. (1) 2D, 3D, and nonlinear effects (2) Sparkle effect (3) 3D-mapping effect (when the VSE-36 board is mounted) The read data is interpolated for lighting. The signal immediately after lighting for luminance and chroma signals and the signal immediately after interpolation for a key signal are sent to the VSW-69/69P board's later stage and the CMB-12 board in parallel. The resultant signal is passed through a selection circuit and trailing block for the signal from the optional CMB-12 board. In a specific effect, the signal is then given later-stage wiping and later-stage border processing and mixed with a BKGD signal. The signal that gave color collector processing to a BG signal and of which phase was adjusted to an FRGD signal via field memory is used as the BKGD signal. The CPU block consists of CPU (IC901), a program, data flash memories (IC920 to IC924, IC941, IC942), SDRAMs (IC909 and IC910), dual port memory (IC912), SRAM (IC911), and a USB controller (IC932). The SRAM is backed up by a capacitor, storing the crosspoint state, effect parameters, or snapshot data. The CPU block calculates the register set value of hardware from each effect parameter and writes it in the specified position inside the dual port memory. Moreover, the CPU block sets hardware with respect to the IPM-96/96P, OPM-39/39P or OPM-45/45P, VIF-19/19P, and VIF-20/20P boards. The CPU block also communicates with the external equipment such as a control panel, edit controller, and personal computer using a 2-channel serial port and USB interface.

2-4-2. Control Panel
1. CPU-305 Board The CPU-305 board is the system control board on the control panel of DFS-700A/700AP/700/700P. The CPU-305 board communicates with a processor unit via RS-422, scans switches, and displays indication elements such as LED/VFD (vacuum fluorescent display). The CPU-305 board mainly consists of the following circuit blocks. . CPU and CPU's peripheral circuit . DC-DC converter block . External communication interface block . Switch scan/LED lighting interface block . Parallel interface block (1) CPU and CPU's peripheral circuit CPU uses a 16-bit microprocessor (IC21) in a clock of 16 MHz. CPU consists of 4 M-bit flash memory (IC51) in which a boot loader is stored, 4 M-bit flash memory (IC54) in which system control software is stored, two 512 k-bit work SRAMs (IC52 and IC53), and an address decoder (IC26) that generates memories, parallel interface chip select signals, or read/write control signals.

DFS-700A/700AP/700/700P

2-19

2-4. Circuit Description

(2) DC-DC converter block Powers of +5 V and +7 V are produced from +12 V, that is input from a processor unit, using the DC-DC converter (IC29). The +7 V power is passed through the KY-466 board and used to drive the green and red LEDs inside large switches on the KY-467 and KY-468 boards. (3) External interface block The external interface block communicates with a processor unit from the serial port (TXD0/RXD0) inside CPU via an RS-422 transceiver (IC24). (4) Switch scan/LED lighting interface block This block controls the data scanning of switches, volume controls, joysticks, and faders on the KY, VR, and LC boards and the lighting of LEDs on the LED board. This block consists of 2 k-bit dual port memory (IC64), a dual port memory controller (IC70), parallel-to-serial converters (IC65 and IC66), a serial-to-parallel converter (IC68), and a buffer (IC67). The lighting on/off data of LEDs as well as the scan data of switches is memory-mapped on the dual port memory from CPU. CPU writes the lighting on/off data of LEDs in the corresponding address of the dual port memory. The contents of the data are converted from parallel to serial (using IC65 and IC66) and sent to the KY-466 board together with a clock and other control signals. The scan data by which various switches were multiplexed is loaded from the KY-466 board in serial and converted from serial to parallel (using IC68). The converted data is loaded to the dual port memory and read by CPU. (5) Parallel interface block Using a parallel interface circuit (IC72), this block drives the buzzer and operating indication LEDs, reads the DIP switch information, and controls the dual port memory controller. Moreover, it controls and displays the vacuum fluorescent display through IC62 and IC63. 2. KY-466 Board The KY-466 board scans the data of switches, volume controls, faders, and joysticks and turns on the LED indicators and indication elements. The LEDs decode the serial data and timing signal sent from the CPU-305 board and turn on them dynamically with a matrix of 8 x 8 as reference. The switches scan data by a matrix of 8 x 8. The pulse data of the volume controls (on the VR-263 an VR-264 boards) and faders is read using counter circuits (IC208 to IC210, and IC211 to IC214). The analog data of the joysticks (on the LC-40 board) is read using an A/D converter (IC215). After that, the read data is converted from parallel to serial together with switch scan data, and the multiplexed serial data is sent to the CPU-305 board. 3. Other Main Boards The KY-467 board is used for numeric keys. The KY-468 board mounts crosspoint select switches, and CUT, AUTO, and TRANSITION switches. The main control circuit of these switches and LEDs on the board is located on the KY-466 board.

2-20

DFS-700A/700AP/700/700P

2-5. Replacement of Board

2-5. Replacement of Board
c To avoid shock hazards and/or damage to the mounted circuit boards, be sure to turn off the power switch before inserting or pulling out the plug-in boards.

2-5-2. Replacement of Board
1. Remove the four screws (B4 x 6). 2. Disconnect the connectors (CN36, CN37, and CN38) on the CN-1921 board while removing the four hooks. 3. Remove the screw (PS4 x 8), washer (W4), and lug terminal and disconnect the connector (CN31) on the MB-874 board. Remove the rear panel.
CN31 Hook MB-874 board Hook PS 4x8 W4 B 4x6 Hook Hook Lug terminal B 4x6

2-5-1. Replacement of Plug-in Board
1. Remove the front panel. (Refer to Section 2-2.) 2. Remove the four screws and then remove the board stopper assembly. 3. Open the board levers in the direction of arrow 1 and remove the plug-in board.

1

1 CN37

CN36

Rear panel CN38 B 3x5

Board stopper assembly B 3x5

Plug-in board

4. Install a new plug-in board in the reverse order of steps 1 to 3.

Replacing the CN-1921 board 1. Remove the 6 screws (B3 x 5) and 25 screws (BV3 x 8). 2. Remove the 6 connector screws and then remove the CN-1921 board. 3. Install a new CN-1921 board in the reverse order of steps 1 and 2.

CN-1921 board

BV 3x8

BV 3x8 BV 3x8 BV 3x8 BV 3x8 B 3x5 Connector screws

B 3x5

DFS-700A/700AP/700/700P

2-21

2-5. Replacement of Board

Replacement of DD-37 board 1. Remove the two screws. 2. Disconnect connectors (CN1 to CN8) on the DD-37 board and remove the DD-37 board. 3. Install a new DD-37 board in the reverse order of steps 1 and 2.

CN4, CN5, CN6 CN1, CN2, CN3

Replacement of CN-2389 board (DFS-700A (UC): S/N 10331 and Higher) (DFS-700AP (CE): S/N 40621 and Higher) 1. Remove the front panel. (Refer to Section 2-2.) 2. Remove the four screws (PSW 4x8), then remove the two plates. 3. Remove the two harnesses from the connectors (CN1, CN2) on the CN-2389 board. 4. Remove the two screws (PSW 3x6), then remove the CN-2389 board. 5. Install a new CN-2389 board in the reverse order of steps 1 to 4.
PSW 4x8

CN7, CN8 DD-37 board

Harnesses Plates

PSW 3x8

Replacement of CN-1942 board 1. Remove the two screws. 2. Disconnect the connectors (CN1 to CN3) on the CN1942 board and remove the CN-1942 board. 3. Install a new CN-1942 board in the reverse order of steps 1 and 2.

PSW 3x6 CN2

CN1

CN-2389 board

CN1

CN2, CN3 PSW 3x8

CN-1942 board

2-22

DFS-700A/700AP/700/700P

2-6. Replacement of Switching Regulator

2-6. Replacement of Switching Regulator
w To avoid shock hazards and/or damage to the switching regulator, be sure to turn off the power switch before starting the replacement. DFS-700A (UC): S/N 10331 and Higher DFS-700AP (CE): S/N 40621 and Higher 1. Remove the front panel. (Refer to Section 2-2.) 2. Remove the two screws (PSW 3x8) and pull out the power supply unit while holding the handle. 3. Remove the two screws (PSW 3x6), then remove the power supply unit bracket.
Power supply unit bracket

4. Remove the four screws (PSW 4x8), then remove the two plates. 5. Remove the one harness from the connector (CN1) on the CN-2389 board. 6. Remove the one harness from the connector (CN203) of the switching regulator. 7. Remove the