Text preview for : Mainboard_Biostar_Model-P4M8P-M7A.pdf part of some brands - algumas marcas some schematic motherboards notebooks downloaded from www.freeservicemanuals.net. alguns esquemas placa-mae e notebook baixados de www.freeservicemanuals.net.
Back to : Notebook_MB schematic.par | Home
A
B
C
D
E
4
4
TITLE
Cover Sheet Block Diagram General Spec Change List Processor North Bridge South Bridge Clock & Buffer DDR SDRAM AGP Slot PCI Slot IDE Connector ATX Power USB, Front Panel, FDD USB, PS2, COM, LPT AC97 CODEC VCC_CORE DC-DC Converter MIS DC-DC Converter LPC I/O, FDD, BIOS BLANK VGA Connector CNR Slot LAN RTL8201BL BOM
SHEET
1 2 3 4 5,6 7,8,9,10 11,12,13 14 15~19 20 21,22,23 24 25 26 27 28 29 30 31 32 33 34 35 36
3
3
VER : 1.2
2
2
1
1
Title Size Document Number Custom Date:
A B C D
COVER SHEET
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Tuesday, April 18, 2006
1
A
INTEL
FSB 533/800MHZ
CONTROL
P4-775PIN
PROCESSOR
ADD
DATA
HOST BUS
64-Bit
MEMORY
2 DDR DIMM
CLOCK BUFFER ICS953001EF
AGP 8X
VGA CONN
VIA P4M800 PRO
PCI BUS
AC' 97 CODEC
A
VIA VT8237R
8 USB CONN(V2.0)
ADDR/DATA
CNTL
A
USB
USB
USB
USB
KEYBOARD
PCI CONN
LAN RTL8201BL
MOUSE
LPC
PCI CONN PCI CONN
IDE
IDE
ITE
BIOS
RJ45
SATA SATA
IT8705AF
FLOPPY CONN.
PRT CONN. SER. CONN. SER. CONN.
Title Size Document Number Custom Date:
A
BLOCK DIAGRAM
P4M8P-M7A
Sheet 2 of 36
Rev 1.2
Tuesday, April 18, 2006
A
B
C
D
E
4
PCI Solt 1 2 3 4 5 6
IDE SEL INT# 19 A 20 B 21 C
GNT# REQ# 0 0 1 1 2 2
CLOCK PCLK5 PCLK0 PCLK1
P4M80-M7
1. CPU --- INTEL P4 Socket 775(3-Phase Power)
4
2. CHIPSET --- VIA P4M800 CE PRO+ VT8237R 3. MEMORY --- 2 DDR SDRAM(Max. 2GB) 4. SLOTS --- AGP(8X)x1, PCIx3, CNRx1 5. CODEC --- Realtek ALC655 6-Channel Audio
Chips
LPC I/O LAN RAID S ATA WIRE LESS
CARD READER
IDE SEL INT#
GNT# REQ# CLOCK PCLK3
6. LAN --- VT6103L 7. PCB Size --- 2438.4Mmx201.68mm, 4-Layer
3
3
S/B AT123S
SPCLK
2
SLOT AMR CNR ACR
H/W SOUND
22U/25DE
GPIO
PRI.
SEC.
2
5*7 mm 6.3*11 mm 6.3*11 mm 8*11 mm G
D D
100U/16DE 220U/10DE 470U/16DE
O
A
D
C
KA
I GO S G S A O I C SOT-23 LM431 R G SOT-23 2N7002 SI2303S SI2301S S B SOT-23 2N3904 2N3906 MMBT2907A 2N2222A E A SOT-23 BAT54C BAT54S K TO-92 LM431 78L05-D LM432
E BC
ECB
1000U/10DE 8*14 mm 1500U/16DE 10*25 mm 3300U/25DE 10*25 mm
TO-263 PHB55N03 90N02
TO-252 20N03 TM3055TL-S PHD55N03
SOT-223 AMS1117
TO-92 2N2222A 2N2097A
TO-92 HSD882-D
1
1
Title Size Document Number Custom Date:
A B C D
GENERAL SPEC
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Tuesday, April 18, 2006
3
A
B
C
D
E
1 OF 7 7 HA[3:33] CPU1A HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -HA_STB0 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA32 HA33 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 AD5 ADS# A03# BNR# A04# HIT# A05# RSP# A06# BPRI# A07# DBSY# A08# DRDY# A09# HITM# A10# IERR# A11# INIT# A12# LOCK# A13# TRDY# A14# BINIT# A15# DEFER# A16# EDRDY# RSVD1 MCERR# RSVD2 REQ0# AP0# REQ1# AP1# REQ2# REQ3# BR0# REQ4# ADSTB0# TESTHI08 PCREQ# TESTHI09 TESTHI10 A17# DP0# A18# DP1# A19# DP2# A20# DP3# A21# A22# A23# MCH_GTLREF GTLREF0 A24# GTLREF1 A25# A26# GTLREF_SEL A27# RESET# A28# A29# RS0# A30# RS1# A31# RS2# A32# A33# A34# A35# RSVD3 RSVD4 ADSTB1# LGA775 DIP BR19 100 1% TESTHI13 VTT 4 OF 7 CPU1D TCK TDI TDO TMS -TRST BPM0 BPM1 BPM2 BPM3 BPM4 BPM5 DBRESET AE1 AD1 AF1 AC1 AG1 AJ2 AJ1 AD2 AG2 AF2 AG3 AC2 AK3 AJ3 R729 VTT 470 /NI SEL0 SEL1 BSEL2 R730 1K 1% G29 H30 G30 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 BPM0# VTT9 BPM1# VTT10 BPM2# VTT11 BPM3# VTT12 BPM4# VTT13 BPM5# VTT14 VTT15 DBR# VTT16 VTT17 ITPCLKOUT0 VTT18 ITPCLKOUT1 VTT19 VTT20 BSEL0 VTT21 BSEL1 VTT22 BSEL2 VTT23 VTT24 VTTPWRGD TCK TDI TDO TMS TRST# VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL LGA775 DIP VTT +3.3V RN198 4.7K 8P4R
1
2 OF 7 CPU1B D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 F3 G3 G4 H5 J16 H15 H16 J17 E24 H1 H2 H29 G23 B3 F5 A3 CPU_GTLREF0 CPU_GTLREF1 GTLREF_SEL -CPURST -RS0 -RS1 -RS2 MCH_GTLREF 7 GTLREF_SEL -CPURST -RS0 -RS1 -RS2 7 7 7 7 7 7 7 -DBI1 -HD_STBN1 -HD_STBP1 7 -BREQ0 TESTHI8 TESTHI9 TESTHI10 -ADS -BNR -HIT -BPRI -DBSY -DRDY -HITM -IERR -CPUINIT -HLOCK -HTRDY -DEFER -ADS -BNR -HIT -BPRI -DBSY -DRDY -HITM -CPUINIT -HLOCK -HTRDY -DEFER 7 7 7 7 7 7 7 13 7 7 7 7 HD[0:63] HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 -DBI0 -HD_STBN0 -HD_STBP0 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 -DBI1 -HD_STBN1 -HD_STBP1 B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 A8 C8 B9 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 G11 G12 E12 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1# LGA775 DIP VTT_OUT_RIGHT BR834 D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3# G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D19 G20 G19 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 C20 A16 C17 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 -DBI2 -HD_STBN2 -HD_STBP2 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 -DBI3 -HD_STBN3 -HD_STBP3 HD[0:63] 7 13 13 13 13 13 13 13 -SMI -A20M -FERR INTR NMI_SB -IGNNE -STPCLK -SMI -A20M -FERR INTR NMI_SB -IGNNE -STPCLK VCCA VSSA VCCIOPLL CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 R1004 14 14 12 31 31 CPU_CLK -CPU_CLK CPUMISS D+ D62 P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23 AM2 AL5 AM3 AL6 AK4 AL4 AM5 AM7 AN7 F28 G28 AE8 AL1 AK1 AN3 AN4 AN5 AN6 F29 BOOTSELECT Y1 V2 0 /NI AA2 CPU1C
3 OF 7 SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD5 VCCIOPLL TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 RSVD10 RSVD11
Trace 5mil,Space 7mil,Max 1500mil(TESTI[0:12])
TESTHI0 F26 TESTHI1 W3 TESTHI11 P1 TESTHI12 W2 F25 G25 TESTHI_7_2 G27 G26 G24 F24 62 /NI AK6 RSVD_AK6 R704 VTT_OUT_RIGHT G6 RSVD_G6 R1012 62 /NI VTT_OUT_LEFT L2 AH2 N1 AL2 M2 A13 T1 G2 R1 J2 T2 Y3 AE3 TESTHI13 PWRGD_CPU -PROCHOT -TRIP COMP0 COMP1 COMP2 COMP3 COMP4 COMP5 COMP6 COMP7 R988 PWRGD_CPU 25
4
4
7 7 7 7 7 7
-HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -HA_STB0
-HAP0 -HAP1 -BREQ0
7 7 7
7 7 7 7
-DBI0 -HD_STBN0 -HD_STBP0 HD[0:63]
-DBI2 -HD_STBN2 -HD_STBP2 HD[0:63]
29 29 29 7 29 7 29 7 29 7
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5
Trace 5mil,Space 7mil,Max 1500mil(TESTI[0:12])
SLP# RSVD12 VID0 PWRGOOD VID1 PROCHOT# VID2 THERMTRIP# VID3 VID4 VID5 COMP0 VID6 VID7 COMP1 VID_SELECT COMP2 COMP3 BCLK0 COMP4 BCLK1 COMP5 COMP6 SKTOCC# COMP7 THERMDA THERMDC VCCSENSE VSSSENSE RSVD7 RSVD8 RSVD9 BOOTSELECT LL_ID0 LL_ID1 RSVD19 RSVD21 RSVD24 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18
62
29 VCC_SENSE 29 VSS_SENSE -DBI3 -HD_STBN3 -HD_STBP3 7 7 7
VCC_SENSE VSS_SENSE
3
N5 AE6 C9 G10 D16 A20
Trace 15mil,Space 7mil,Max 1200mil(COMP[0:5])
3
7 7
HA[3:33] -HA_STB1 -HA_STB1
The LGA775 ball pitch is 1.09 mm x 1.17 mm. For motherboards designed using the English system, pad pitch of 43 mils x 46 mils should be used.
E23 F23 J3
CPU_BOOT NMI_SB TESTHI13 COMP2 COMP4 COMP5 COMP6 COMP7
LGA775 DIP
0.69 * VTT
BR42 CPU_GTLREF0 1 1
VTT_OUT_LEFT
BR835
0 /NI
-SLP
1
10
BC3 0.1UF 25V Y5V
-SLP
13
1 3 5 7 R997 R998 BR9 BR10
2 VTT_OUT_LEFT 4 RN215 6 62 8P4R 8 62 VTT_OUT_LEFT 62 62 62 VTT_OUT_RIGHT
VTT_OUT_RIGHT -IERR CPU_BOOT VID_PWRGD -PROCHOT BOOTSELECT BPM5 1 BPM0 3 BPM1 5 BPM3 7 BPM2 1 TDI 3 5 TMS 7 BPM4 1 TDO 3 TCK 5 -TRST 7 BR16 BR709 R713 BR836 BR837 2 4 6 8 2 4 6 8 2 4 6 8 C799 0.1UF 25V Y5V 62 1K 1% 680 /NI 120 62 RN3 51 8P4R RN4 51 8P4R RN9 51 8P4R
2
0.01UF 50V X7R
BC67 2 1UF 10V Y5V
A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 AM6 AA1 J1 F27
VTT -TRIP -FERR TESTHI_7_2 TESTHI0 R989 BR990 R991 R992 62 62 62 62
BC5 2 1UF 10V Y5V
BC4 2 0.01UF 50V X7R
PWRGD_CPU BC801 1000P 50V X7R /NI -CPURST TESTHI1 TESTHI9 TESTHI10 C800 560P 50V X7R /NI -BREQ0 TESTHI8 -A20M INTR
BR710
100 1%
PCT12 VTT 680UF 4V 8X8 1 VTT_OUT_LEFT 2 + -
2
TESTHI11 -SMI -IGNNE -STPCLK COMP1 COMP3 TESTHI12 -CPUINIT -SLP DBRESET VCCFUSEPRG VIDFUSEPRG VID_PWRGD VTT_OUT_RIGHT VTT_OUT_LEFT VTT_SEL R734 1K 1% /NI VTT_OUT_RIGHT VTT_OUT_LEFT +3.3V
1 3 5 7 1 3 5 7 BR3 BR999
2 4 RN194 6 62 8P4R 8 2 RN196 4 62 8P4R 6 8 62 62
VTT_OUT_RIGHT
1 3 5 7 BR4 BR5 BR1 BR2
2 4 RN193 6 62 8P4R 8 62 62 62 62
Close to CPU pin"J1"
Close to CPU pin"AA1"
2
1
BR18 210 1%
2
BR43 0.69 100 1%
* VTT
BR44 CPU_GTLREF1
1
1
10
VTT L1 1 2 INDUCTOR 4.7UH 0805 L2 VTT_OUT_RIGHT 1 2 INDUCTOR 4.7UH 0805 1 1 1 VCCA R843 0 0805 VCCIOPLL
BR45 210 1% +5V
14
C805 2 10UF 10V 0805 Y5V
1 0 0 1
0 1 0 1
133MHZ 200MHZ Reserved Reserved
R736 5.6K
1
2 U21A 74HCT14 7
G S
R13 1K 1%
R22 1K 1%
VID_PWRGD Q96 2N3904 SOT23 C807 1UF 10V Y5V R735 100K
C806 2 10UF 10V 0805 Y5V /NI
Q95 NDS351N SOT23
C804 10UF 10V 0805 Y5V 2
SEL0
2 4 6 8
SEL1
D
VTT_OUT_RIGHT
R731 4.7K
BC68
2
+5V
VSSA
1
SEL0 Q2 2N3904 SOT23 SEL1 Q4 2N3904 SOT23
A
1 3 5 7
BSEL0
14 Title
BSEL1
14
Size Document Number Custom Date:
B C D
PROCESSOR SOCKET775
P4M8P-M7A
Sheet
E
Rev 1.2 36
Wednesday, April 19, 2006
5
of
A
B
C
D
E
VCORE 5 OF 7 CPU1E
4
VCORE
VCORE 6 OF 7 CPU1F CPU1G VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 AL23 A12 L25 J7 AE28 AE29 K5 J4 AE30 AN20 AF10 AE24 AM24 AN23 H9 H8 H13 AC6 AC7 AH6 C16 AM16 AE25 AE27 AJ28 AJ7 F19 AH13 AD7 AH16 AK17 E17 AH17 AH20 AE5 AH23 AE7 AM13 AH24 AJ30 AJ10 AF3 AK5 AJ16 AF6 AK29 AJ17 F22 AH3 AK10 AM10 F16 AJ23 F13 AG7 F10 L26 AD4 H11 L24 L23 AM23 A15 AH10 B24 L3 H27 A21 AE2 AJ29 A24 AK27 AK28 B20 AM20 H26 B17 H25 H24 AA3 AA7 H23 AA6 H10
4
7 OF 7
3
2
1
AG22 K29 AM26 AL8 AE12 AE11 W23 W24 W25 T25 Y28 AL18 AC25 W30 Y30 AN14 AD28 Y26 AC29 M29 U24 J23 AC27 AM18 AM19 AB8 AC26 J8 J28 T30 AM9 AF15 AC8 AE14 N23 W29 U29 AC24 AC23 Y23 AN26 AN25 AN11 AN18 Y27 Y25 AD24 AE23 AE22 AN19 V8 K8 AE21 AM30 AE19 AC30 AE15 M30 K27 M24 AN21 T8 AC28 N25 AE18 W26 AD25 M8 N30 AD26 AJ26 AM29 M25 M26 L8 U25 Y8 AJ12 AD27 U23 M23 AG29 N27 AM22 U28 K28 U8 AK18 AD8 K24 AH28 AH21
VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8 VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24 VCCP25 VCCP26 VCCP27 VCCP28 VCCP29 VCCP30 VCCP31 VCCP32 VCCP33 VCCP34 VCCP35 VCCP36 VCCP37 VCCP38 VCCP39 VCCP40 VCCP41 VCCP42 VCCP43 VCCP44 VCCP45 VCCP46 VCCP47 VCCP48 VCCP49 VCCP50 VCCP51 VCCP52 VCCP53 VCCP54 VCCP55 VCCP56 VCCP57 VCCP58 VCCP59 VCCP60 VCCP61 VCCP62 VCCP63 VCCP64 VCCP65 VCCP66 VCCP67 VCCP68 VCCP69 VCCP70 VCCP71 VCCP72 VCCP73 VCCP74 VCCP75 VCCP76 VCCP77 VCCP78 VCCP79 VCCP80 VCCP81 VCCP82 VCCP83 VCCP84 VCCP85 VCCP86 VCCP87 VCCP88 VCCP89 VCCP90 VCCP91 VCCP92 LGA775 DIP
VCCP93 VCCP94 VCCP95 VCCP96 VCCP97 VCCP98 VCCP99 VCCP100 VCCP101 VCCP102 VCCP103 VCCP104 VCCP105 VCCP106 VCCP107 VCCP108 VCCP109 VCCP110 VCCP111 VCCP112 VCCP113 VCCP114 VCCP115 VCCP116 VCCP117 VCCP118 VCCP119 VCCP120 VCCP121 VCCP122 VCCP123 VCCP124 VCCP125 VCCP126 VCCP127 VCCP128 VCCP129 VCCP130 VCCP131 VCCP132 VCCP133 VCCP134 VCCP135 VCCP136 VCCP137 VCCP138 VCCP139 VCCP140 VCCP141 VCCP142 VCCP143 VCCP144 VCCP145 VCCP146 VCCP147 VCCP148 VCCP149 VCCP150 VCCP151 VCCP152 VCCP153 VCCP154 VCCP155 VCCP156 VCCP157 VCCP158 VCCP159 VCCP160 VCCP161 VCCP162 VCCP163 VCCP164 VCCP165 VCCP166 VCCP167 VCCP168 VCCP169 VCCP170 VCCP171 VCCP172 VCCP173 VCCP174 VCCP175 VCCP176 VCCP177 VCCP178 VCCP179 VCCP180 VCCP181 VCCP182 VCCP183 VCCP184
AK12 AH22 T29 AM14 AM25 AE9 Y29 AK25 AK19 AG15 J22 T24 AG21 AM21 J25 U30 AL21 AG25 AJ18 J19 AH30 J15 AG12 AJ22 J20 AH18 AH26 W27 AL25 AN8 AH14 U27 T23 R8 AK22 AN29 AG11 AK26 J10 AJ15 AG26 AN9 AH15 AF18 AL15 J26 J18 J21 AG27 AK15 AF11 AD23 AM15 AF8 AK21 AG30 AJ21 AM11 AL11 AJ11 K30 AL14 AN30 AH25 AL12 AJ9 AK11 AG14 N29 AL30 AJ25 AH9 J29 J11 K25 P8 K23 AL19 AM8 T26 N28 AH12 AL22 AN15 AJ8 U26 AJ19 T27 AK8 AN12 AG9 N26
AF9 AF22 AH11 AJ14 AH19 AH29 AH27 AG28 AL26 AM12 J24 J13 T28 W28 J12 J27 AG19 AL9 AD30 AF21 Y24 AK14 J9 M27 AF14 J30 AG18 AA8 AG8 AL29 AD29 W8 AH8 N24 AN22 J14 K26 AF19 N8 AF12 M28 AK9 C10 D12 C24 K2 C22 AN1 B14 K7 AE16 B11 AL10 AK23 H12 AF7 AK7 H7 E14 L28 Y5 E11 AL16 AL24 AK13 AL3 D21 AL20 D18 AN2 AK16 AK20 AM27 AM1 AL13 AL17 C19 E28 AH7 AK30 D24
VCCP185 VCCP186 VCCP187 VCCP188 VCCP189 VCCP190 VCCP191 VCCP192 VCCP193 VCCP194 VCCP195 VCCP196 VCCP197 VCCP198 VCCP199 VCCP200 VCCP201 VCCP202 VCCP203 VCCP204 VCCP205 VCCP206 VCCP207 VCCP208 VCCP209 VCCP210 VCCP211 VCCP212 VCCP213 VCCP214 VCCP215 VCCP216 VCCP217 VCCP218 VCCP219 VCCP220 VCCP221 VCCP222 VCCP223 VCCP224 VCCP225 VCCP226 VSS1 VSS2 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 LGA775 DIP
H22 H21 H20 H19 H18 AB7 H17 AJ24 AM17 AC3 H14 P28 V6 AK2 P27 P26 AM28 AJ13 W4 P25 AJ20 W7 P23 AG13 AG16 AG17 C7 Y2 L30 L29 D15 AL27 Y7 L27 AA29 N6 N7 AA28 AN13 AA27 AA26 P4 AA25 AA24 P7 E26 V30 R2 V29 V28 R5 V27 R7 E20 AN10 V25 T3 V24 V23 T6 AL7 E25 U1 R29 R28 R27 R26 R25 U7 R24 R23 P30 V3 P29 AF16 AE10 AF13 H6 A18 A2 E2 D9 C4 A6 D6
VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 LGA775 DIP
VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276
D5 A9 D3 B1 B5 B8 AJ4 AE26 AH1 E29 V7 C13 AK24 AB30 L6 L7 AB29 M1 AB28 E8 AG20 AN17 AB27 AB26 AN16 M7 AB25 AB24 AB23 N3 AA30 F4 AG10 AE13 AF30 H28 F7 AF29 AF28 G1 AF27 AF26 AF25 AN28 AN27 AF24 AF23 AG24 AF17 AN24 H3 P24 AE20 AE17 E27 T7 R30 AJ27 AB1 AM4 V26 AA23 AL28 AF20 AG23
VCORE C808 C809 C810 C811 C812 C813
1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 10UF 10V 0805 Y5V
VCORE CT62 100UF 6.3V D TAN
VCORE C814 C815 C816 C817 C818 C819
1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
3
VCORE C820 C821 C822 C823 C824 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V /NI 1UF 16V 0805 Y5V /NI
VCORE C825 C826 C827 C828 C829
1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 1UF 16V 0805 Y5V /NI
2
NEAR CPU
RSVD25 RSVD26
V1 F6
BR839
60.4 1%
RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36
W1 E7 B13 D14 E6 D1 E5
BR840
60.4 1%
1
Title Size Document Number Custom Date:
PROCESSOR SOCKET775
P4M8P-M7A
Sheet
E
Rev 1.2 36
Tuesday, April 18, 2006
6
of
A
B
C
D
A
B
C
D
E
VTT BC24 1UF 16V 0805 Y5V U19 T19 R19 P19 N19 M19 L19 L18 L17 L16 L15 U11A 5 HA[3:33] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA32 HA33 -HA_STB0 -HA_STB1 -ADS -BNR -BPRI -BREQ0 -DBSY -DEFER -DRDY -HIT -HITM -HLOCK -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -RS0 -RS1 -RS2 -DBI0 -DBI1 -DBI2 -DBI3 -CPURST HCLK -HCLK -HA_STB0 -HA_STB1 -ADS -BNR -BPRI -BREQ0 -DBSY -DEFER -DRDY -HIT -HITM -HLOCK -HTRDY -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -RS0 -RS1 -RS2 -DBI0 -DBI1 -DBI2 -DBI3 Y29 V27 AA29 Y27 Y26 AC27 AA28 AB27 AA27 AC29 AB29 AB28 AC26 AD29 T28 R28 N29 N28 P29 P27 R27 N26 T26 P26 R25 N27 N25 R29 T27 U26 T25 W28 R26 M29 M28 T29 K26 M25 U27 M26 L27 U29 L29 M24 W27 V28 V26 W29 V29 L26 M27 K25 C29 H27 B21 A21 HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HA32 HA33 HADSTB0 HADSTB1 ADS BNR BPRI BREQ DBSY DEFER DRDY HIT HITM HLOCK HTRDY HREQ0 HREQ1 HREQ2 HREQ3 HREQ4 RS0 RS1 RS2 HDBI0 HDBI1 HDBI2 HDBI3 CPURST HCLK+ HCLKHAVREF0 HAVREF1 HDVREF0 HDVREF1 HDVREF2 HDVREF3 GTLVREF HAP0 HAP1 HRCOMP HCOMPVREF A16 GND A19 GND B22 GND B25 GND B28 GND D15 GND D16 GND D19 GND E22 GND E25 GND E26 GND E29 GND H26 GND H29 GND L25 GND L28 GND P25 GND P28 GND U25 GND U28 GND Y25 GND Y28 GND M18 GND N18 GND P18 GND R18 GND V18 GND U18 GND T18 GND AC28GND DPWR
VTT C62 1UF 16V 0805 Y5V VTT HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HDSTB0P HDSTB0N HDSTB1P HDSTB1N HDSTB2P HDSTB2N HDSTB3P HDSTB3N D27 D26 A29 C26 C28 D28 A27 B29 A26 B26 D25 E24 A25 A28 D24 C25 K28 K29 J28 K27 J26 J29 J25 J27 F28 G29 G27 D29 E27 F27 E28 F29 E23 B24 C24 A24 A23 B23 A22 C23 F21 C22 E21 C21 D20 D21 F20 E20 B19 C19 B20 B18 C20 A20 C18 B17 B16 A17 C14 C15 A18 B15 B14 A15 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HD[0:63] 5 BC26 1UF 16V 0805 Y5V BC29 1UF 16V 0805 Y5V
4
4
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
VCORE +12V 5 GTLREF_SEL
R806 R807
649 1% /NI 8.2K /NI G S R808 0 0805 D Q112 2N7002 SOT23 /NI
0.69 x VCORE
BR33 VTT BR32 210 1% 100 1% GTLVREF_NB0
3
R841 10 MCH_GTLREF 5
3
5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 14 14 GTLVREF_NB0
0.69 x VCORE
R748 VTT 100 1% /NI R749 210 1% /NI GTLVREF_NB1
R842 10 /NI
R211 VTT
100 1%
HCOMPVREF R220 49.9 1%
R163
20 1%
HRCOMP
2
2
-CPURST D14 HCLK -HCLK Y23 W23 R24 V24 F22 G24 F19 F16
2 -HD_STBP0 -HD_STBN0 -HD_STBP1 -HD_STBN1 -HD_STBP2 -HD_STBN2 -HD_STBP3 -HD_STBN3 5 5 5 5 5 5 5 5 NB-HEATSINK /NI
B27 -HD_STBP0 C27 -HD_STBN0 H28 -HD_STBP1 G28 -HD_STBN1 D23 -HD_STBP2 D22 -HD_STBN2 C17 -HD_STBP3 C16 -HD_STBN3
BC19 BC20 BC18 BC17 1UF 10V Y5V 0.1UF 25V Y5V 1UF 10V Y5V 1UF 10V Y5V GTLVREF_NB1
1
5 5
C842 C844 C843 BC32 L24 1UF 10V Y5V /NI 1UF 10V Y5V /NI 1UF 10V Y5V 1UF 16V 0805 Y5VN24 -HAP0 W26 -HAP1 HRCOMP G25 HCOMPVREF G26 BC513 0.01UF 50V X7R K24
1
1
P4M800 PRO CD
Title
NORTH BRIDGE (PART 1)
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
7
A
B
C
D
E
+1.8VDIMM
U11B
4
V11 W11 W12 W13 W14 W15 W16 W17 W18 W19 V19
15,16
MD_[0:63]
3
2
MD_0 MD_1 MD_2 MD_3 MD_4 MD_5 MD_6 MD_7 MD_8 MD_9 MD_10 MD_11 MD_12 MD_13 MD_14 MD_15 MD_16 MD_17 MD_18 MD_19 MD_20 MD_21 MD_22 MD_23 MD_24 MD_25 MD_26 MD_27 MD_28 MD_29 MD_30 MD_31 MD_32 MD_33 MD_34 MD_35 MD_36 MD_37 MD_38 MD_39 MD_40 MD_41 MD_42 MD_43 MD_44 MD_45 MD_46 MD_47 MD_48 MD_49 MD_50 MD_51 MD_52 MD_53 MD_54 MD_55 MD_56 MD_57 MD_58 MD_59 MD_60 MD_61 MD_62 MD_63 CKEA0 CKEA1 CKEA2 CKEA3
AD28 AE27 AF27 AG28 AD27 AE29 AG27 AG29 AH29 AJ29 AG25 AJ25 AJ28 AH27 AH26 AJ26 AJ24 AG24 AJ22 AG21 AH24 AG23 AG22 AJ21 AH21 AJ20 AG18 AH18 AG20 AH19 AJ18 AG17 AJ12 AG12 AJ10 AJ9 AH12 AJ11 AG10 AH9 AG8 AJ7 AJ6 AH6 AG9 AJ8 AG5 AJ5 AH4 AJ4 AJ2 AH1 AG4 AF4 AG3 AJ1 AG1 AF2 AD3 AD1 AG2 AF3 AE1 AD2 AF21 AF23 AE22 AF24
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 CKE0 CKE1 CKE2 CKE3
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13 BA0 BA1
AF13 AD15 AJ15 AJ16 AJ17 AF16 AG15 AE18 AF17 AE19 AJ14 AF20 AE21 AD7 AF12 AJ13
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM
4
MAA[0:13]
15,16,17
+1.8VDIMM
BA0 BA1
15,16,17 15,16,17
BR39 150 1% MVREF_NB
DMCOMP MEMDET
AE5 AE24
BR40
301 1%
+1.8VDIMM
BR34 BR37
1K 1% 1K 1% /NI
MEMDET
BR35 150 1%
BC41 BC40 0.01UF 50V X7R
BC22
MEMDET
1UF 10V Y5V 0.1UF 25V Y5V
3
ODT0 ODT1 ODT2 ODT3
AE9 AE10 AF6 AD6
ODT0 ODT1 ODT2 ODT3
15,17 15,17 16,17 16,17
SRAS SCAS SWE CS0 CS1 CS2 CS3
AE12 AF9 AF11 AD9 AF8 AG7 AF7
-SRASA -SCASA -SWEA -CS0 -CS1 -CS2 -CS3
-SRAS -SCAS -SWE -CS0 -CS1 -CS2 -CS3
15,16,17 15,16,17 15,16,17 15,17 15,17 16,17 16,17
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 MCLKIA MCLKOMCLKO+ MEMVREF1 MEMVREF2 MEMVREF3 MEMVREF4 GND GND GND GND GND GND GND GND GND GND
AF29 AG26 AH22 AG19 AH10 AG6 AH3 AE3 AD26 AE26 AF26 AD23 AD17 AD11 AD8 M16 N16 P16 R16 T16 U16 V16 M15 N15 P15
-DQS_0 -DQS_1 -DQS_2 -DQS_3 -DQS_4 -DQS_5 -DQS_6 -DQS_7 MCLKI M_CLKO- R844 M_CLKO+ R750 MCLKI 0 0
-DQS_[0:7]
15,16
2
MCLKO+
MCLKI MCLKOMCLKO+ MCLKO+
14 14 14 MCLKO-
15,16,17 CKEA[0:3]
MVREF_NB C4 10P 50V NPO MCLKI C1012 10P 50V NPO
15,16 15,16 15,16 15,16 15,16 15,16 15,16 15,16
-DQM0 -DQM1 -DQM2 -DQM3 -DQM4 -DQM5 -DQM6 -DQM7
-DQM0 -DQM1 -DQM2 -DQM3 -DQM4 -DQM5 -DQM6 -DQM7
AF28 AJ27 AJ23 AJ19 AG11 AH7 AJ3 AF1
DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
NEAR CHIP
BC877 10P 50V NPO /NI
1
AE2 GND AE8 GND AE11GND AE14GND AE16GND AE17GND AE20GND AE23GND AE25GND AE28GND AH2 GND AH5 GND AH8 GND AH11GND AH14GND AH17GND AH20GND AH23GND AH25GND AH28GND AF5 GND M17 GND N17 GND P17 GND R17 GND T17 GND U17 GND V17 GND V15 GND U15 GND T15 GND R15 GND
1
15,17 15,17 16,17 16,17
CKE0 CKE1 CKE2 CKE3
CKEA0 CKEA1 CKEA2 CKEA3
P4M800 PRO CD
Title
NORTH BRIDGE (PART 2)
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
8
A
B
C
D
E
+1.5VAGP BC69 1UF 10V Y5V M11 N11 P11 R11 T11
U11C 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 VLAD0 VLAD1 VLAD2 VLAD3 VLAD4 VLAD5 VLAD6 VLAD7 VBE0 UPSTB -UPSTB DNSTB -DNSTB UPCMD DNCMD VLAD0 VLAD1 VLAD2 VLAD3 VLAD4 VLAD5 VLAD6 VLAD7 VBE0 UPSTB -UPSTB DNSTB -DNSTB UPCMD DNCMD LVREF_NB C283 1UF 10V Y5V BR41 402 1% LCOMPP V1 U2 Y2 Y3 T2 T3 AA2 AA1 U3 W2 W1 V2 V3 AA3 W3 V4 T4 U11 U10 V10 VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VBE UPSTB+ UPSTBDNSTB+ DNSTBUPCMD DNCMD VLVREF VLCOMPP VCC15VL VCC15VL VCC15VL
GD[0:31] GD0/FPD10 GD1/FPD11 GD2/FP1CLK GD3/FPD09 GD4/FPD08 GD5/FPD07 GD6/FPD06 GD7FPD05 GD8/FP1DET GD9/FP1HS GD10/FPD01 GD11/FPD23 GD12/FPD00 GD13/FPD22 GD14/FPD21 GD15/FPD20 GD16/FPD18 GD17/FPD17 GD18/FPD16 GD19/FPDE GD20/FPD14 GD21/FPCLK GD22/FPD13 GD23/FPD15 GD24/GDVP1D09 GD25 GD26/GDVP1D10 GD27/GDVP1D04 GD28/GDVP1D07 GD29/GDVP1D06 GD30/GDVP1D08 GD31/GDVP1DET GC#BE0/FPD03 GC#BE1/SBPLDAT GC#BE2/FPD19 GC#BE3/GDVP1D11 GFRAME/FPHS GIRDY/SBPLCLK GTRDY GDEVSEL/FPVS GSTOP/FP1CLK GPAR/FP1VS GDBIH GRBF GWBF/FPCLK GREQ/SBDDCCLK GGNT/SBDDCDAT GSERR/FP1DE GDBIL AGP8XDET GST0/ENAVEE GST1/ENAVDD GST2/ENABLT GSBSTBF/GDVP1D01 GSBSTBS/GDVP1D02 GADSTBF0/FPD04 GADSTBS0/FPD02 GADSTBF1/FPD12 GADSTBS1/FPDET P3 P4 R3 R4 R1 N2 P1 R2 M3 M1 N4 L3 L1 N5 K2 R6 J2 H3 H1 K4 G1 G2 K5 G3 J6 K6 J4 F2 J5 F3 H4 E1 M2 K1 J1 L6 L4 M5 K3 J3 M4 P6 G5 F4 B3 D5 C4 M6 H6 C5 E4 E3 F5 C1 C2 N1 N3 G4 F1 A1 A2 B1 C3 D1 D4 D2 D3 N6 G6 R5 A4 A3 T1 AGPVREF AGPVREF GCLK_NB AGPCOMPN R268 AGPCOMPP R30 60.4 1% 60.4 1% GD0 GD1 GD2 GD3 GD4 GD5 GD6 GD7 GD8 GD9 GD10 GD11 GD12 GD13 GD14 GD15 GD16 GD17 GD18 GD19 GD20 GD21 GD22 GD23 GD24 GD25 GD26 GD27 GD28 GD29 GD30 GD31 GBE0 GBE1 GBE2 GBE3
20
VCC15AGP VCC15AGP VCC15AGP VCC15AGP VCC15AGP
4
+3.3V
4
+1.5VNB
BR36 BEAD 60 0805 1A AVDD1 BC21 BC15 0.1UF 25V Y5V 1UF 16V 0805 Y5V
R279 1.5K 1% LVREF_NB R278 1K 1%
+3.3V
LVREF_NB => +1.5V/2.5=0.625
+1.5VNB
3
+1.5VNB BC16 BC38 BC39 BC25 BC28 BC42 BC31 1UF 16V 0805 Y5V 0.1UF 25V Y5V 1UF 16V 0805 Y5V 0.1UF 25V Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V BC27 BC30 BC12 BC37 BC11 BC33
+1.8VDIMM 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 1UF 10V Y5V 10UF 10V 0805 Y5V 1UF 10V Y5V 10UF 10V 0805 Y5V
K10 K11 K12 K13 K15 K17 K19 K20 Y10 Y12 Y14 Y16 Y18 Y20 L10 N10 R10 W10 M20 P20 T20 V20
VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15 VCC15
BR38 BEAD 60 0805 1A AVDD2 BC13 0.1UF 25V Y5V 20 20 20 20 BC14 1UF 16V 0805 Y5V
3
RBF WBF
ADD C5 VER:1.0
GFRAME 20 GIRDY 20 GTRDY 20 GDEVSEL 20 GSTOP 20 GPAR 20 DBIH 20 RBF 20 WBF 20 GREQ 20 GGNT 20 GSERR 20 DBIL 20 AGP8X_DET_NB 20
AGPVREF BC43 1UF 16V 0805 Y5V R33 100K C289 1UF 10V Y5V
AGP8xdet 0=enable
ST0 ST1 ST2 SB_STBF SB_STBS AD_STBF0 AD_STBS0 AD_STBF1 AD_STBS1 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 14 +1.5VAGP
2
2
+1.5VSUSNB
AC25 AB1 AB3 TESTIN_NB AF25 AC1 AB2 AVDD1 AVDD2 AA25 AD25
VSUS15 VSUS15 SUSST TESTIN RESET PWROK VCCA33HCK VCCA33MCK
12
-SUSST
11 -RESET_CHIP 12 -PWROK_NB
GSBA0/GDVP1VS GSBA1/GDVP1DE GSBA2/GDVP1D00 GSBA3/GDVP1HS GSBA4/GDVP1D05 GSBA5/GDVP1D03 GSBA6/GDVP1CLK GSBA7/GDVP1CLK AGPVREF1 AGPVREF2 GCLK AGPCOMPN AGPCOMPP GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
TESTIN_NB +1.5VAGP
BR31
1K 1%
+1.8VDIMM
AA26 AD24
GNDAHCK GNDAMCK
AGPBUSY
AGPBZ
13
FOR EMI
C1016 0.1UF 25V Y5V
P4M800 PRO CD
1
M12 M13 M14 N12 N13 N14 P12 P13 P14 R12 R13 R14 T12 T13 T14 U12 U13 U14 V12 V13 V14
20
SBA[0:7]
SBA[0:7]
1
+1.5VAGP Title BC980 C979 0.1UF 25V Y5V 1UF 16V 0805 Y5V
A B C D
NORTH BRIDGE (PART 3)
Size Document Number Custom Date:
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
9
A
B
C
D
E
4
VCCPLL1 VCCPLL2 VCCDAC1 VCCDAC2 +3.3V BC70 1UF 16V 0805 Y5V
4
U11D C13 B13 A13 D13 E13 D12 C12 A12 B12 E12 B11 A11 E11 C11 A10 B10 E10 C10 D11 B9
VCCA33DAC1 VCCA33DAC2
VCCA33PLL1 VCCA33PLL2
VCC33GFX VCC33GFX VCC33GFX
L12 L13 L14
D8 C7
E7 D7
FPD4 FPD6 FPD7 FPD8 FPD9 FPD10
C794 10P 50V NPO /NI
C795 10P 50V NPO /NI
INTA SPCLK1 SPCLK2 SPD1 SPD2 DISPCLKI DISPCLKO GNDAPLL1 GNDAPLL2 GNDADAC2 GNDADAC1
A9 D9 E9 D10 E8 C8 C9 B7 C6 D6 E6 R63
-INTR_A
11,20,21,22
C796 10P 50V NPO /NI
20
FPD8
DVP0D00/TVD00 DVP0D01/TVD01 DVP0D02/TVD02 DVP0D03/TVD03 DVP0D04/TVD04 DVP0D05/TVD05 DVP0D06/TVD06 DVP0D07/TVD07 DVP0D08/TVD08 DVP0D09/TVD09 DVP0D10/TVD10 DVP0D11/TVD11 GPO0 GPOUT TVCLKR DVP0DE/TVDE
AR AG AB RSET HSYNC VSYNC XIN
B6 A5 B5 A6 B8 A8 A7 RSET HSYNC VSYNC GUICLK GUICLK
R984 R985 R986 R253 33 33 14
BEAD 60 0805 1A BEAD 60 0805 1A BEAD 60 0805 1A 82 1%
AR AG AB
33 33 33
+3.3V
3
SPCLK2 SPD2 22 DISPCLKI DISPCLKO
33 33
3
FB20 BEAD 60 0805 1A VCCPLL1 C223 BC224 0.1UF 25V Y5V 1UF 16V 0805 Y5V
VER 1.0 --> 10P /NI
DVP0HS/TVHS DVP0VS/TVVS DVP0CLK/TVCLK DVP0DET
+3.3V
A14 B2 B4 E2 E5 H2 H5 L2 L5 P2 P5 U1 U4 Y1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND
P4M800 PRO CD
R774 BEAD 60 0805 1A VCCPLL2
GFX power up strapping setting:
TVD4/DVP0D4 =>AGP Port Muxing 0: Two 12-bit DVI interface 1: One 24-bit Panel interface
2
C216 C215 1000P 50V X7R 1UF 16V 0805 Y5V
+3.3V
2
RN7
TVD8/DVP0D8
=>External AGP Function Enable 0: External 1: Internal
FPD7 FPD10 FPD6 FPD9
1 3 5 7
2 4 6 8 4.7K 8P4R RN5 2 4 6 8 10K 8P4R
FB19 BEAD 60 0805 1A VCCDAC1 C254 BC266 0.1UF 25V Y5V 1UF 16V 0805 Y5V
FPD4 FPD8
1 3 5 7
+3.3V
FPD8 FPD4
R800 R801
1K 1% /NI 1K 1% /NI+3.3V R775 BEAD 60 0805 1A VCCDAC2 C249 BC226 0.1UF 25V Y5V 1UF 16V 0805 Y5V
1
1
Title
NORTH BRIDGE (PART 4)
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
10
A
B
C
D
E
+3.3V
H9 H10 H11 H12 J8 K8 L8 M8 N8 P8 R8 R19 T8 T19 U8 U19 V8 V19 V21 W9 W10 W11 W17 W18 W19 W21 Y21 W8
21,22
4
A_D[0..31]
U18A USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD USBVDD A22 B22 C22 D22 E22 F22 J13 J14 J15 J16 J17 J18 +3.3VSUS +3.3VSUS +3.3VSUSUSB BC51 0.1UF 25V Y5V C393 1UF 16V 0805 Y5V /NI +3.3VSUS
4
3
A_D0 A_D1 A_D2 A_D3 A_D4 A_D5 A_D6 A_D7 A_D8 A_D9 A_D10 A_D11 A_D12 A_D13 A_D14 A_D15 A_D16 A_D17 A_D18 A_D19 A_D20 A_D21 A_D22 A_D23 A_D24 A_D25 A_D26 A_D27 A_D28 A_D29 A_D30 A_D31 C_-BE0 C_-BE1 C_-BE2 C_-BE3
G2 J4 J3 H3 F1 G1 H4 F2 E1 G3 E3 D1 G4 D2 D3 F3 K3 L3 K2 K1 M4 L2 N4 L1 M2 M1 P4 N3 N2 N1 P1 P2 E2 C1 L4 M3 J1 H2 J2 H1 K4 C2 F4 C3 R1 A4 B4 B5 C4 D4 E4 A3 B3 A5 B6 C5 D5 P3 R3 A6 D6 C6 E5 R4 R2
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0 CBE1 CBE2 CBE3 FRAME DEVSEL IRDY TRDY STOP SERR PAR PERR PCIRST INTA INTB INTC INTD INTE INTF INTG INTH REQ0 REQ1 REQ2 REQ3 REQ4 REQ5 GNT0 GNT1 GNT2 GNT3 GNT4 GNT5
VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC33
+2.5VSUS 0.1UF 25V Y5V BC66 USBSUS25 PLLVDDA PLLVDDA PLLGNDA PLLGNDA USBP0+ USBP0USBP1+ USBP1USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBP6+ USBP6USBP7+ USBP7USBOC0 USBOC1 USBOC2 USBOC3 USBOC4 USBOC5 USBOC6 USBOC7 USBCLK USB REXT UDPWR UDPWREN KBCK/KA20G KBDT/KBRC MSCK/IRQ1 MSDT/IRQ12 C24 A23 B23 D23 C23 E20 D20 A20 B20 E18 D18 A18 B18 D16 E16 A16 B16 D14 E14 A14 B14 C26 D24 B26 C25 B24 A24 A26 A25 E23 USBVCCA C390 0.1UF 25V Y5V USBGNDA USBP0+ USBP0USBP1+ USBP1USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBP6+ USBP6USBP7+ USBP7+2.5V FB52 BEAD 60 0805 1A C388 0.1UF 25V Y5V
3
21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 10,20,21,22 20,21,22 21,22 21,22 29 29 29 29
2
-FRAME -DEVSEL -IRDY -TRDY -STOP -SERR PAR -PERR -INTR_A -INTR_B -INTR_C -INTR_D -INTR_E -INTR_F -INTR_G -INTR_H -REQ0 -REQ1 -REQ2 -REQ3
-PCIRST
-INTR_E -INTR_F -INTR_G -INTR_H
-OC0 -OC1 -OC2 -OC3 -OC4 -OC5 -OC6 -OC7 USBCLK
26 26 27 27 26 26 26 26 14 6.04K 1%
USBP0USBP0+ USBP1USBP1+ USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBP6+ USBP6USBP7+ USBP7-
USBDT0USBDT0+ USBDT1USBDT1+ USBDT2+ USBDT2USBDT3+ USBDT3USBDT4+ USBDT4USBDT5+ USBDT5USBDT6+ USBDT6USBDT7+ USBDT7-
26 26 26 26 27 27 27 27 26 26 26 26 26 26 26 26
C1017 0.1UF 25V Y5V
B25 USBREXT R406 D26 D25 W3 V1 W1 W2 UDPWR UDPWREN
FOR EMI
RN22 15K 8P4R 1 3 5 7 1 3 5 7 7 5 3 1 1 3 5 7
2 4 6 8 2 4 6 8 8 6 4 2 2 4 6 8 RN86 15K 8P4R
21 21 21,22 21
2
+5V KB_CLK KB_DATA MS_CLK MS_DATA 27 27 27 27 3 USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND USBGND
RN69 15K 8P4R
RN83 15K 8P4R
-REQ4 -REQ5
NEAR CONNECTOR
14
21 21 21,22 21
-GNT0 -GNT1 -GNT2 -GNT3
-GNT4 -GNT5
R470 4 U21B 74HCT14 14 7
22
-PCIRSTX C455
-PCIRSTX
20,21,22,31
GND GND GND GND GND GND GND GND GND
14
22P 50V NPO /NI R612 8 U21D 74HCT14 22 -RESET_CHIP -RESET_CHIP 9
A1 A2 B1 B2 E8 F25 H23 J21 J25
A13 A15 A17 A19 A21 B13 B15 B17 B19 B21 C13 C14 C15 C16 C17 C18 C19 C20 C21 D13 D15 D17 D19 D21 E13 E15 E17 E19 E21 H13 H14 H15 H16 H17 H18
VT8237R PLUS
-PCIRST
5
6 U21C 74HCT14 7
9
C470 22P 50V NPO /NI 13 UDPWR UDPWREN +3.3V 7 5 3 1 +3.3V R96 CT41 1000UF 6.3V 8X12 RN108 -REQ4 -REQ5 -GNT4 -GNT5 7 5 3 1 8 6 4 2 +5V 10K 1% R102 10K 1% /NI +5V
14 7
C464 22P 50V NPO /NI -IDERST1 -IDERST2
12 U21F 74HCT14 7
-IDERST1 -IDERST2
24 24
RN95
1
-INTR_F -INTR_E -INTR_H -INTR_G
8 6 4 2
1
4.7K 8P4R /NI
SB Decoupling capacitors
C448 0.1UF 25V Y5V +3.3V Title
SOUTH BRIDGE(PART 1)
Size Document Number Custom Date:
2.2K 8P4R
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
11
A
B
C
D
E
NB STRAPPING FOR PT880/PM880
+2.5V +3.3VSUS +2.5VSUS
J9 J10 J11 J12 K9 L9 L18 M9 M18 N9 N18 P9 P18 R9 R18 T9 T18 U9 U18 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18
AA4 AB4 AB5 AB6
PD_A0 0 0 0 0 1 1
GPIOA 0 0 1 1 0 1 GPIOB 0 1 GPIOD 0 1
GPIOC 0 1 1 0 0 1
Host Clock 100Mhz 133Mhz 166Mhz 200Mhz 266Mhz AUTO Mode
GPIOB GPIOC GPIOA +3.3V PD_A0
1 3 5 7
RN100 2 4 6 8
+3.3V
R901
0 /NI
2.2K 8P4R R43 2.2K
T4 U4
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
4
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 PDDREQ PDDACK PDIOR PDIOW PDRDY PDCS1 PDCS3 PDA0 PDA1 PDA2 IRQ14
VSUS33 VSUS33 VSUS33 VSUS33
VSUS25 VSUS25
24
PD_[0:15]
U18B
PD_0 PD_1 PD_2 PD_3 PD_4 PD_5 PD_6 PD_7 PD_8 PD_9 PD_10 PD_11 PD_12 PD_13 PD_14 PD_15 PDREQ PDACK -PIOR -PIOW PDRDY -PCS_1 -PCS_3 PD_A0 PD_A1 PD_A2 IRQ14_R SD_0 SD_1 SD_2 SD_3 SD_4 SD_5 SD_6 SD_7 SD_8 SD_9 SD_10 SD_11 SD_12 SD_13 SD_14 SD_15 SDREQ -SDACK -SIOR -SIOW SDRDY -SCS_1 -SCS_3 SD_A0 SD_A1 SD_A2 IRQ15_R
AA22 Y24 AA26 AA25 AB26 AC26 AC23 AD25 AD26 AC24 AC25 AB24 AB23 AA24 Y26 AA23 Y23 V24 W26 Y25 Y22 V22 V23 W23 V25 W24 AD24 AC20 AB20 AC21 AE18 AF18 AD18 AD19 AF19 AE20 AF20 AD20 AE21 AF21 AD21 AD22 AF22 AD17 AD23 AF23 AE23 AF17 AF25 AF26 AF24 AC22 AE24 AE26 AC19
IOQ Depth 12 Level 1 Level GTL pullup Enable Disable
R472 R461 4.7K /NI 4.7K +3.3V
ACBITCLK ACSDIN0 ACSDIN1 ACSDIN2 ACSDIN3/SLP_BTN ACSYNC ACSDO ACRST PME BATLOW CPUMISS RING SUSST1 AOLGP/THRM EXTSMI SMBALRT LID PWRBTN PWROK CLKRUN CPUSTP PCISTP INTRUDER SUSCLK SMBCK1 SMBDT1 SMBCK2 SMBDT2 SUSA SUSB SUSC GPI0 GPI1 GPO0 GPO1 GPIOA GPIOB GPIOC GPIOD SERIRQ SPKR OSC TPO TEST VDDA0
T1 U3 V2 U1 V3 T2 U2 T3 W4 V4 Y1 Y2 Y3 Y4 AA1 AB1 AC1 AD2 AF1 AB7 AC7 AD6
RSDIN0 SDIN1 SDIN2 SDIN3 ACSYNC ACSDO ACRST -PME -BATLOW CPUMISS -RING -SUSST AOLGPI -EXTSMI -SMBALT -LID -PWRBTN -PWROK_NB -CLKRUN -CPUSTP -PCISTP
BIT_CLK RSDIN0 SDIN1 SYNC RSDOUT -RACRST -PME CPUMISS -RING -SUSST -EXTSMI -LID -PWROK_NB
28,34 28,34 34 28,34 28,34 28,34 20,21,22,31 5 26 9 26 24 9
ACSDO
GPIOD GTL Driving strength PD_A1 GTL Driving strength -PCS_3 DUAL CPU 0=singe PD_A2 ROMSIP 0=disable
RN78 2.2K 8P4R 1 2 3 4 5 6 7 8
+3.3V RN147 8 6 4 2 7 5 3 1 1K 8P4R
4
0/1:Enable/Disable auto reboot for VT8237
ACSYNC R467 4.7K +3.3V
R387 R389 R386 R378
0 0 0 0 /NI
24 24 24 24 24 24 24 24 24 24 24 24
3
PDREQ PDACK -PIOR -PIOW PDRDY -PCS_1 -PCS_3 PD_A0 PD_A1 PD_A2 IRQ14_R SD_[0:15]
0/1:Enable/Disable LPC FWH command for VT8237
R421
4.7K
SEEDI
SEEDI
13
SDD0/TBC1 SDD1/VALID SDD2 SDD3/RXD2 SDD4/RXD3 SDD5/RXD4 SDD6/RBC0 SDD7/RBC1 SDD8/RXD5 SDD9/RXD6 SDD10/RXD7 SDD11/RXD8 SDD12/RXD9 SDD13/TXD0 SDD14/TXD1 SDD15/TXD2 SDDRQ/RXD1 SDDACK/TBC0 SDIOR/TXD4 SDIOW/TXD3 SDRDY/RXD0 SDCS1/TXD8 SDCS3/TXD9 SDA0/TXD6 SDA1/TXD5 SDA2/TXD7 IRQ15 SVREF SCOMPP
AE1 INTRUDER R476 AB3 SUS_CLK AC4 SMBCK AB2 SMBDT AC3 AD1 SMBCK2 SMBDT2
1M
INTRUDER +3.3VBAT
13
0/1:Disable/Enable LPC shadow EEPROM
PDACK
3
SMBCK SMBDT R54 R780
14,15,16 14,15,16 1K 1% /NI 1K 1% /NI
SPEAK SPEAK R434 1K 1% +3.3V
26
0/1 : Enable/Disable External SATA PHY
-PCS_1
0/1:Enable/Disable CPU FREQ strapping
-PCISTP
AA2 -SUSA AD3 AF2 AE2 AC2 AA3 AE3 AE5 AD5 AF5 AC6 AD9 AF8 AB8 AF9 AE9 AC10 AB10 AD11 AE10 AF10 AE11 AF11 W5 V5 M16 N11 N12 N13 N14 N15 N16 GPI0 GPI1 GPO0 GPO1 GPIOA GPIOB GPIOC GPIOD SERIRQ SPEAK SIO_OSC TPO TEST VDDA0 GNDA0 SREXT SXO SXI
-SUSB -SUSC R477 GPI1 GPO0 1M
25,30 26,30 +3.3VBAT 24 26
0/1 : Enable/Disable SATA Master/Slave mode
0/1 : Enable/Disable 100MHz VLink clock
+3.3VSUS
24 24 24 24 24 24 24 24 24 24 24
SDREQ -SDACK -SIOR -SIOW SDRDY -SCS_1 -SCS_3 SD_A0 SD_A1 SD_A2 IRQ15_R
SERIRQ SIO_OSC
31 14
SMBCK2 LOW S3 SMBCK2 HIGH S3 SMBDT2 LOW P4M800 Pro SMBCK2 HIGH P4M800
13 -LDRQ1
+3.3V
SMBDT2 -LID GPI1 -PWROK_NB -EXTSMI -SUSA CPUMISS -RING -PME -BATLOW -SMBALT
SERIRQ TPO -LDRQ1 -CLKRUN SMBDT SMBCK AOLGPI -CPUSTP SMBCK2 RSDIN0
1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 JSATA2
2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
RN112 10K 8P4R
2
AB21 STXP_1 STXN_1 SRXN_1 SRXP_1 STXP_2 STXN_2 SRXN_2 SRXP_2 BC62 BC58 0.01UF 50V X7R 0.01UF 50V X7R AB13 AC13 AF13 AE13 AB15 AC15 AF15 AE15 W12 W13 W14 W15 W16 AC17 AC11 AB17 AB11
31
AOLGPI
1 3 5 7 1 3 5 7 1 3 5 7
2 4 6 8 2 4 6 8 2 4 6 8
RN99 4.7K 8P4R
RN103 10K 8P4R
RN109 2.2K 8P4R RN110 4.7K 8P4R
RN111 10K 8P4R
2
GNDA0 STXP1 STXN1 SRXN1 SRXP1 STXP2 STXN2 SRXN2 SRXP2 VDDATS VDDATS VDDATS VDDATS VDDATS AB14 GNDATS AC14GNDATS AD12GNDATS AD13GNDATS AD14GNDATS AD15GNDATS AD16GNDATS AE12 GNDATS AE14 GNDATS AE16 GNDATS AF12 GNDATS AF14 GNDATS AF16 GNDATS VDDAS VDDAS VDDAS VDDAS SREXT SXO SXI VDDA33 GNDA33 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
R423
4.7K
+3.3V
C417 1000P 50V X7R C412 1000P 50V X7R BC56 BC54 C414 C405 0.01UF 50V X7R 0.01UF 50V X7R 1000P 50V X7R 1000P 50V X7R
GPO1 SUS_CLK GPO0 -SUSST
RN104 10K 8P4R
X4 VDDA33 GNDA33 1 C432 15P 50V NPO 2 C423
FOR EMI
C1018 0.1UF 25V Y5V
JSATA1
H1 1 STXP_1 STXN_1 2 3 4 PDACK -PCS_1 -PCISTP SEEDI R993 R994 R995 R996 4.7K 4.7K 4.7K 4.7K +3.3V SRXN_1 SRXP_1 5 6 7 H2 SATA CONNECTOR SRXN_2 SRXP_2 STXP_2 STXN_2
H1 1 2 3 4 5 6 7 H2 SATA CONNECTOR
1
near chipset
15P 50V NPO 25MHZ 20PF 30PPM
+2.5VSATA
AC16GNDAS AC12GNDAS AB16GNDAS AB12GNDAS
1
C403 C406 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V near chipset GNDSATA FB58 BEAD 60 0805 1A +3.3V VDDA33 GNDA33 C419 0.1UF 25V Y5V
F6 F7 J5 K5 P5 R5 L11 L12 L13 L14 L15 L16 M11 M12 M13 M14 M15 K18
+3.3VSUS
VT8237R PLUS FB57 BEAD 60 0805 1A +2.5V VDDA0 C420 GNDA0 0.1UF 25V Y5V BC57 GNDSATA 1UF 10V Y5V +2.5VSATA BEAD 60 0805 1A FB56 +2.5V -PWRBTN
R474 4.7K R475 C460 0.1UF 25V Y5V 68 PW_BN 26 TEST SDIN3 SDIN1 SDIN2 1 3 5 7 RN102 2 4 6 8
Title
SOUTH BRIDGE(PART 2)
Size Document Number Custom Date:
4.7K 8P4R
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
12
A
B
C
D
A
B
C
D
E
0.1UF 25V Y5V
+2.5VSUS +3.3VSUS C1 1UF 16V 0805 Y5V
+2.5V
L23 K21 L21 N21 N22 N23 N24 N25 N26 P22 P23 P24 P25 P26 M21 M22 M23 M24 M25 L19 M19 N19 P19
BC55
D12 E12
D9 E9 E10 E11
4
U18C MCRS MCOL MTXENA MTXD0 MTXD1 MTXD2 MTXD3 MTXCLK MRXER MRXCLK MRXDV MRXD0 MRXD1 MRXD2 MRXD3 MDCK MDIO PHYRST EECS EEDO EEDI EECK RAMVCC RAMGND A11 B11 C11 A10 B10 B9 A9 C10 D10 C9 D8 C8 B8 A8 C7 A7 B7 D7 D11 B12 A12 C12 E7 E6 U24 U26 T24 R26 T25 T26 U25 R24 V26 R22 P21 AC9 AC8 AB9 AD10 CRS COL MTEX MTXD0 MTXD1 MTXD2 MTXD3 RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MMDC MMDIO -PHYRST SEECS SEEDO SEEDI SEECLK +2.5VSBRAM GND_SBRAM -FERR -A20M -IGNNE -CPUINIT INTR NMI_SB -SMI -STPCLK -SLP 5 5 5 5 5 5 5 5 5 TXEN TXD0 TXD1 TXD2 TXD3 CRS COL TXEN TXD0 TXD1 TXD2 TXD3 TXCLK RXER RXCLK RXDV RXD0 RXD1 RXD2 RXD3 MDC MDIO -PHYRST 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 RN77 SEEDI 12 R440 2.7 0805 C440 0.1UF 25V Y5V +2.5V VRDSLP VGATE GHI DPSLP 1 3 5 7 2 4 6 8 TXEN R811 10K 1%
4
9 9 9 9 9 9 9 9
VLAD0 VLAD1 VLAD2 VLAD3 VLAD4 VLAD5 VLAD6 VLAD7
H25 G26 K26 J23 F26 G25 K22 K24 E24 G23 L26 L25 E26 E25 L24 M26 G24 K23 K25 J26 J24 H26 H24 VPAR LVREF_SB VCOMPP F24 H22 J22 L22 F23 G22 AD8 AF7 AE7 AD7
VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK
MIISUS25 MIISUS25
VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VBE UPCMD DNCMD UPSTB UPSTB DNSTB DNSTB VPAR VLREF VCOMPP VCLK VIOUT VIIN LAD0 LAD1 LAD2 LAD3
MIIVCC MIIVCC MIIVCC MIIVCC
MMDIO
R812
1.5K 1%
EEPROM
12 SEEDI SEEDI SEECLK SEECS U30 3 2 1 6 DI SK CS NC DO VCC GND NC 4 8 5 7
+3.3VSUS
SEEDO +3.3V
9 9 9 9 9
VBE0 UPCMD DNCMD UPSTB -UPSTB
93C46A-2.7V SO8 +3.3V
3
9 DNSTB 9 -DNSTB +2.5V R755 4.7K
3
+3.3V
14
VCLK
VCLK
31 31 31 31
LAD0 LAD1 LAD2 LAD3
FERR A20M IGNNE INIT INTR NMI SMI STPCLK SLP GHI DPSLP VGATE VIDSEL VRDSLP AGPBZ/GPI6
-CPUINIT
4.7K 8P4R PWRGD_SB R902 4.7K /NI FB47 BEAD 60 0805 1A +2.5VSBPLL +2.5V C351 0.1UF 25V Y5V GND_SBPLL BC860 33P 50V NPO /NI
-SLP
GHI DPSLP VGATE VIDSEL VRDSLP AGPBZ R426 4.7K
BC861 33P 50V NPO /NI VIDSEL AGPBZ +3.3V SPCLK APICCLK R402 R381 1K 1% 1K 1% 14 14 +3.3V 24 9 +2.5V VCOMPP R401 360 1%
31 31 12 25
-LFRAME -LDRQ -LDRQ1 -LDRQ1 PWRGD_SB R451 22K C444
AF6 AE6 AE8
LFRM LREQ0 LREQ1 PCICLK PWRGD RSMRST VBAT RTCX1 RTCX2 P11 GND P12 GND P13 GND P14 GND P15 GND P16 GND R11 GND R12 GND R13 GND R14 GND R15 GND R16 GND R21 GND T11 GND T12 GND T13 GND T14 GND T15 GND T16 GND W22 GND W25 GND AA21GND AB19GND AB22GND AB25GND AC18GND AE17GND AE19GND AE22GND AE25GND AA9 GND AB18GND T21 GND AA10GND K19 GND APICCLK APICD0/APICCS APICD1/APICACK PLLVCC PLLGND
R23 U23
SPCLK
PWRGD_SB AC5 -RSMRST AD4
R396 3K 1%
2
2
+3.3VSUS
R25 APICD0 T23 APICD1 T22 U22
LVREF_SB R393 412 1% C347 0.1UF 25V Y5V
1UF 10V Y5V
+3.3VBAT AF4 +3.3VBATX1 X2 X5 AE4 AF3
+2.5VSBPLL GND_SBPLL
+3.3VSUS VT8237R PLUS A D14 BAT54C SOT23 JCMOS1 1 HEADER 1X3
(NB VDD=2.5V),R393=1K,vdd/4=0.625volt (NB VDD=1.5V),R393=412,vdd/4=0.3volt
1 C451 10P 50V NPO 3
2 4 C452 10P 50V NPO 32.768KHZ 12.5PF 20PPM
KA +3.3VBAT +3.3VBAT C B R394 1K 1% K C348
2
+3.3VBAT
+3.3VBAT
R379 C346 10UF 10V 0805 Y5V 0.1UF 25V Y5V 1K 1% 3 R380 1K 1% BAT1 BATTERY HOLDER-1 JCI1 HEADER 1X2 2 2 1
1
E INTRUDER
Q75 2N3904 SOT23
1
1-2:Normal opertion(Default) 2-3:Clear CMOS
1
12
INTRUDER
+1.5VAGP R404 68K R397 1M BC34 1UF 16V 0805 Y5V BC35 0.1UF 25V Y5V BC36 0.1UF 25V Y5V
B
+2.5V Title BC61 1UF 16V 0805 Y5V BC994 0.1UF 25V Y5V C422 0.1UF 25V Y5V BC995 0.1UF 25V Y5V C413 0.1UF 25V Y5V
C D
Size Document Number Custom Date:
SOUTH BRIDGE(PART 3)
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
13
A
A
B
C
D
E
+3.3V FB79 BEAD 60 0805 1A
4
+3.3VCLK +3.3VCLK +3.3VCLK
4
CT75 C881 BC997 C879 C882 C880 BC996 C884 100UF 16V 6.3X5 2.5mm 1UF 10V Y5V 1UF 10V Y5V 1UF 16V 0805 Y5V 1UF 10V Y5V 1UF 16V 0805 Y5V 1UF 10V Y5V 1UF 10V Y5V +1.8VDIMM FB90 BEAD 60 0805 1A +1.8VDIMMCLK
U32 VDDPCI VDDAGP VDD48 VDDCPU VDD VDD1.8-1 VDD1.8-2 VDD1.8-3 VDD25Mhz_STB VDDA_STB VDDREF_STB GNDPCI GNDAGP GND48 GND25Mhz_STB GNDVDD1.8-2 GNDVDD1.8-3 GNDA_STB GND GNDVDD GNDVDDREF_STB SDATA SCLK CPUCLK8T0 CPUCLK8C0 CPUCLK8T1 CPUCLK8C1 DDRT0 DDRC0 DDRT1 DDRC1 DDRT2 DDRC2 DDRT3 DDRC3 DDRT4 DDRC4 DDRT5 DDRC5 49 48 46 45 25 26 27 28 31 32 34 33 38 37 40 39 8 9 10 61 62 63 64 3 4 5 59 58 13 14 52 23 HCLKL -HCLKL CPU_CLKL -CPU_CLKL DCLK2+L DCLK2-L DCLK5+L DCLK5-L DCLK3+L DCLK3-L DCLK0+L DCLK0-L DCLK4+L DCLK4-L DCLK1+L DCLK1-L GCLKNBL GSLOTL VCLKL PCICLK0L PCICLK1L PCICLK2L PCICLK3L SPCLKL FSD FSLB FSLC SIO_OSCL FSLA 24_48MHz AC97_CLKL MCLKIL 24_48MHz PCICLK2L DCLK2+L DCLK2-L DCLK5+L DCLK5-L DCLK3-L DCLK3+L DCLK0-L DCLK0+L DCLK4-L DCLK4+L DCLK1-L DCLK1+L GCLKNBL GSLOTL VCLKL PCICLK0L PCICLK1L PCICLK2L PCICLK3L SPCLKL FSD FSLB R845 R846 R848 R847 R899 R873 22 22 22 22 22 0 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 R856 R858 R859 R860 33 1% 33 1% 33 1% 33 1% R868 R867 R866 R865 8 6 4 2 8 6 4 2 8 6 4 2 8 6 4 2 HCLK -HCLK CPU_CLK -CPU_CLK 49.9 1% 49.9 1% 49.9 1% 49.9 1% DCLK2+ DCLK2DCLK5+ DCLK5DCLK3DCLK3+ DCLK0DCLK0+ DCLK4DCLK4+ DCLK1DCLK1+ GCLK_NB GCLK_SLOT VCLK PCICLK0 PCICLK1 PCICLK2 PCICLK3 SPCLK APICCLK 15 15 16 16 16 16 15 15 16 16 15 15 9 20 13 21 21 22 31 13 13 7 7 5 5
C986 C989 C987 C988 1UF 16V 0805 Y5V 1UF 10V Y5V 1UF 16V 0805 Y5V 1UF 10V Y5V +3.3VSUS FB91 BEAD 60 0805 1A +3.3VSBCLK
2 6 15 47 50 +1.8VDIMMCLK 24 29 36 +3.3VSBCLK 17 41 57 1 7 12 20 30 35 42 44 51 60 R853 R852 0 0 53 54
RN185 0 8P4R RN186 0 8P4R RN189 0 8P4R RN208 22 8P4R
3
C990 C991 BC992 BC993 1UF 16V 0805 Y5V 1UF 10V Y5V 1UF 16V 0805 Y5V 1UF 10V Y5V R1013 25,26 RST_SW 12,15,16 12,15,16 +3.3V R1005 +3.3V R1006 R1007 VCORE 10K 1% C1013 0.1UF 25V Y5V E B 10K 1% B C 10K 1% C Q116 2N3904 SOT23 E +3.3VCLK SMBDT SMBCK BR854 4.7K
0
AGPCLK0_2X AGPCLK1 CPU_STOP/AGPCLK2*
3
BR855 BR857 2 C901 10P 50V NPO
11 10K 1% 16 475 1% 43
Q117 2N3904 SOT23
CLK_X1 X9 55 CLK_X2 C905 56 10P 50V NPO 14.318MHZ 16PF 20PPM SATA 25MHZ 18 LAN 25MHZ R1008 22 19 35 LAN_25M 1 8 8 MCLKO+ MCLKOR874 R875 C1026 10P 50V NPO 0 0 21 22
RESET# PCI0 VTTPWRGD/PD# PCI1 IREF PCI2/MODE** PCI3/PCI_STOP* PCI4_2X FSD/PCI5_2X X2 FSLB/PCI6_F X1 REF0/FSLC REF1/Freerun** 25Mhz_0 25Mhz_1F FSLA/USB_48MHz SEL24_48#/24_48MHz AC97-24.576Mhz BUF_INT BUF_INC FB_OUTT ICS950952AG TSSOP64
7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 GUICLK SIO_OSC
RN209 22 8P4R RN210 22 8P4R 10 12 31 11 28 8
LPCSIO_OSC USBCLK AC97_CLK MCLKI
+3.3V R1009 R1010 1K 1% /NI 1K 1%
EMI
2
5 5
BSEL1 BSEL0
R869 1K 1% BR987 1K 1% RN184 1 2 FSD BSEL1 3 4 FSLB BSEL0 5 6 FSLA 7 8 FSLC 10K 8P4R
SIO_OSCL
2
FSD FSLC FSLB FSLA 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 1 0 1 0
CPU 266 133 200 166 333
PCI 33 33 33 33 33
GCLK_NB GCLK_SLOT VCLK SPCLK APICCLK GUICLK SIO_OSC USBCLK LPCSIO_OSC AC97_CLK
C994 C995 C996 C997 C998 C999 C910 C911 C890 C891
22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI
ICS950952
1
HCLK -HCLK CPU_CLK -CPU_CLK MCLKOMCLKO+
C906 C907 C908 C909 C924 C925
22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 22P 50V NPO /NI 5P 50V NPO /NI 5P 50V NPO /NI
1
Title Size Document Number Custom Date:
A B C D
CLK GEN
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
14
A
B
C
D
E
+1.8VDIMM
51 56 62 72 75 78 170 175 181 191 194
DDR2_A1 8,16,17 MAA[0:13] MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 71 190 54 193 76 125 134 146 155 202 211 223 232 164 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 BA0 BA1 BA2/A16 CS0 CS1 DQM0/DQS9 DQM1/DQS10 DQM2/DQS11 DQM3/DQS12 DQM4/DQS13 DQM5/DQS14 DQM6/DQS15 DQM7/DQS16 DQM8/DQS17
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
53 59 64 67 69 172 178 184 187 189 197
4
8,16,17 BA0 8,16,17 BA1 8,17 -CS0 8,17 -CS1 8,16 8,16 8,16 8,16 8,16 8,16 8,16 8,16
3
-DQM0 -DQM1 -DQM2 -DQM3 -DQM4 -DQM5 -DQM6 -DQM7
8,16,17 -SWE 8,16,17 -SCAS 8,16,17 -SRAS 8,17 CKE0 8,17 CKE1 14 14 14 14 14 14 DCLK0+ DCLK0DCLK1+ DCLK1DCLK2+ DCLK2-
73 74 192 52 171 185 186 137 138 220 221 7 6 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 195 77
WE CAS RAS CKE0 CKE1 CK0 CK0 CK1 CK1 CK2 CK2 DQS0 DQS0 DQS1 DQS1 DQS2 DQS2 DQS3 DQS3 DQS4 DQS4 DQS5 DQS5 DQS6 DQS6 DQS7 DQS7 DQS8 DQS8 ODT0 ODT1
8,16 -DQS0 8,16 -DQS1 8,16 -DQS2 8,16 -DQS3 8,16 -DQS4 8,16 -DQS5 8,16 -DQS6
2
8,16 -DQS7
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 NC/DQS9 NC/DQS10 NC/DQS11 NC/DQS12 NC/DQS13 NC/DQS14 NC/DQS15 NC/DQS16 NC/DQS17
3 4 9 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 42 43 48 49 161 162 167 168 126 135 147 156 203 212 224 233 165
MD4 MD1 MD7 MD3 MD0 MD5 MD2 MD6 MD12 MD13 MD10 MD11 MD8 MD9 MD14 MD15 MD17 MD21 MD19 MD23 MD20 MD16 MD18 MD22 MD25 MD29 MD27 MD31 MD24 MD28 MD26 MD30 MD33 MD37 MD39 MD35 MD32 MD36 MD34 MD38 MD45 MD41 MD46 MD47 MD44 MD40 MD42 MD43 MD52 MD53 MD55 MD51 MD48 MD49 MD54 MD50 MD61 MD57 MD63 MD59 MD60 MD56 MD62 MD58
MD[63:0]
8,16
4
3
+1.8VDIMM
C981 C982 0.1UF 25V Y5V 10UF 10V 0805 Y5V 0.1UF 25V Y5V
2
BC173
8,17 ODT0 8,17 ODT1
+1.8VDIMM
12,14,16 SMBDT 12,14,16 SMBCK
119 120 239 240 101 MVREF_DIM2
SDA SCL SA0 SA1 SA2 VREF VDDSPD NC NC/ERR_OUT NC/PAR_IN NC/TEST RESET GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
R881 75 1% MVREF_DIM2 R882 75 1% C926 C927 1UF 10V Y5V 1000P 50V X7R
+1.8VDIMM
1 238 19 55 68 102
16,25 RESET_DDR
1
18
GND GND GND GND GND
225 228 231 234 237 DDR2-240 pin
1
2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 100 103 106 109 112 115 118 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 169 198 201 204 207 210 213 216 219 222
Title Size Document Number Custom Date:
A B C D
DDR2-DIMM1
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
15
A
B
C
D
E
+1.8VDIMM
51 56 62 72 75 78 170 175 181 191 194
DDR2_A2 8,15,17 MAA[0:13] MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 188 183 63 182 61 60 180 58 179 177 70 57 176 196 174 173 71 190 54 193 76 125 134 146 155 202 211 223 232 164 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 BA0 BA1 BA2/A16 CS0 CS1 DQM0/DQS9 DQM1/DQS10 DQM2/DQS11 DQM3/DQS12 DQM4/DQS13 DQM5/DQS14 DQM6/DQS15 DQM7/DQS16 DQM8/DQS17
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
53 59 64 67 69 172 178 184 187 189 197
4
8,15,17 BA0 8,15,17 BA1 8,17 -CS2 8,17 -CS3 8,15 8,15 8,15 8,15 8,15 8,15 8,15 8,15
3
-DQM0 -DQM1 -DQM2 -DQM3 -DQM4 -DQM5 -DQM6 -DQM7
8,15,17 -SWE 8,15,17 -SCAS 8,15,17 -SRAS 8,17 CKE2 8,17 CKE3 14 14 14 14 14 14 DCLK3+ DCLK3DCLK4+ DCLK4DCLK5+ DCLK5-
73 74 192 52 171 185 186 137 138 220 221 7 6 16 15 28 27 37 36 84 83 93 92 105 104 114 113 46 45 195 77
WE CAS RAS CKE0 CKE1 CK0 CK0 CK1 CK1 CK2 CK2 DQS0 DQS0 DQS1 DQS1 DQS2 DQS2 DQS3 DQS3 DQS4 DQS4 DQS5 DQS5 DQS6 DQS6 DQS7 DQS7 DQS8 DQS8 ODT0 ODT1
8,15 -DQS0 8,15 -DQS1 8,15 -DQS2 8,15 -DQS3 8,15 -DQS4 8,15 -DQS5
2
8,15 -DQS6 8,15 -DQS7
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 NC/DQS9 NC/DQS10 NC/DQS11 NC/DQS12 NC/DQS13 NC/DQS14 NC/DQS15 NC/DQS16 NC/DQS17
3 4 9 10 122 123 128 129 12 13 21 22 131 132 140 141 24 25 30 31 143 144 149 150 33 34 39 40 152 153 158 159 80 81 86 87 199 200 205 206 89 90 95 96 208 209 214 215 98 99 107 108 217 218 226 227 110 111 116 117 229 230 235 236 42 43 48 49 161 162 167 168 126 135 147 156 203 212 224 233 165
MD4 MD1 MD7 MD3 MD0 MD5 MD2 MD6 MD12 MD13 MD10 MD11 MD8 MD9 MD14 MD15 MD17 MD21 MD19 MD23 MD20 MD16 MD18 MD22 MD25 MD29 MD27 MD31 MD24 MD28 MD26 MD30 MD33 MD37 MD39 MD35 MD32 MD36 MD34 MD38 MD45 MD41 MD46 MD47 MD44 MD40 MD42 MD43 MD52 MD53 MD55 MD51 MD48 MD49 MD54 MD50 MD61 MD57 MD63 MD59 MD60 MD56 MD62 MD58
MD[63:0]
8,15
4
3
2
8,17 ODT2 8,17 ODT3
+1.8VDIMM
12,14,15 SMBDT 12,14,15 SMBCK +1.8VDIMM
119 120 239 240 101 MVREF_DIM3 1 238 19 55 68 102
SDA SCL SA0 SA1 SA2 VREF VDDSPD NC NC/ERR_OUT NC/PAR_IN NC/TEST RESET GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
R883 75 1% MVREF_DIM3 R884 75 1% C928 C929 1UF 10V Y5V 1000P 50V X7R
+1.8VDIMM
15,25 RESET_DDR
1
18
GND GND GND GND GND
225 228 231 234 237 DDR2-240 pin Title
1
2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 65 66 79 82 85 88 91 94 97 100 103 106 109 112 115 118 121 124 127 130 133 136 139 142 145 148 151 154 157 160 163 166 169 198 201 204 207 210 213 216 219 222
DIMM2
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
16
A
B
C
D
E
4
4
+0.9VTERMB 8,15,16 8,16 8,15,16 8,15 8,15 8,15 8,16 8,16 8,16 8,16 8,15 8,15 8,15,16 8,16 8,15 -SRAS -CS2 -SWE -CS0 -CS1 ODT1 -CS3 ODT3 CKE3 CKE2 CKE0 CKE1 -SCAS ODT2 ODT0 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8
RN11 33 8P4R RN6 33 8P4R RN2 33 8P4R
3
3
RN14 33 8P4R RN66 33 8P4R RN63 33 8P4R RN70 33 8P4R RN54 33 8P4R
MAA13 MAA12 MAA11 MAA9 MAA4 MAA3 MAA1 MAA2 MAA0 MAA10
8,15,16 8,15,16
BA1 BA0
MAA7 MAA8 MAA6 MAA5
2
8,15,16 MAA[0:13]
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
2
1
1
Title
DDR TERMINATION
Size B Date:
A B C D
Document Number
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
17
A
B
C
D
E
8,15,16 MD_[0:63]
4
3
MD_4 MD_0 MD_5 MD_1 MD_2 MD_6 MD_7 MD_3 MD_8 MD_12 MD_9 MD_13 MD_14 MD_15 MD_10 MD_11 MD_20 MD_16 MD_17 MD_21 MD_18 MD_22 MD_23 MD_19 MD_24 MD_28 MD_25 MD_29 MD_26 MD_30 MD_27 MD_31 MD_42 MD_43 MD_46 MD_47 MD_44 MD_40 MD_45 MD_41 MD_32 MD_36 MD_33 MD_37 MD_34 MD_38 MD_39 MD_35 MD_48 MD_52 MD_49 MD_53 MD_54 MD_50 MD_55 MD_51 MD_62 MD_58 MD_63 MD_59 MD_60 MD_56 MD_61 MD_57
MD4 MD0 MD5 MD1 MD2 MD6 MD7 MD3 MD8 MD12 MD9 MD13 MD14 MD15 MD10 MD11 MD20 MD16 MD17 MD21 MD18 MD22 MD23 MD19 MD24 MD28 MD25 MD29 MD26 MD30 MD27 MD31 MD42 MD43 MD46 MD47 MD44 MD40 MD45 MD41 MD32 MD36 MD33 MD37 MD34 MD38 MD39 MD35 MD48 MD52 MD49 MD53 MD54 MD50 MD55 MD51 MD62 MD58 MD63 MD59 MD60 MD56 MD61 MD57
MD[0:63]
8,15,16
4
3
2
2
8,15,16 -DQS_[0:7]
-DQS_0 -DQS_1 -DQS_2 -DQS_3 -DQS_4 -DQS_5 -DQS_6 -DQS_7
-DQS0 -DQS1 -DQS2 -DQS3 -DQS4 -DQS5 -DQS6 -DQS7
-DQS[0:7]
8,15,16
8,15,16 -DQM_[0:7]
-DQM_0 -DQM_1 -DQM_2 -DQM_3 -DQM_4 -DQM_5 -DQM_6 -DQM_7
-DQM0 -DQM1 -DQM2 -DQM3 -DQM4 -DQM5 -DQM6 -DQM7
-DQM[0:7]
8,15,16
1
1
Title Size Document Number Custom Date:
A B C D
DDR DAMPING
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
18
A
B
C
D
E
4
4
+0.9VTERMB
CT28 CT3 CT74 1UF 16V 0805 Y5V 100UF 16V 5X11 2mm 100UF 16V 5X11 2mm
+0.9VTERMB +1.8VDIMM
3 3
U13 R1001 1K 1% /NI 4 5 7 6 VOUT NC NC2 VCTNL
9
+3.3V VIN NC1 REFEN GND1 1 8 3 2 R1003 C1004 100K 1UF 10V Y5V C1014 1UF 10V Y5V
+3.3V
GND2
R1
R1002 100K +0.9VTERMB +1.8VDIMM +0.9VTERMB C269 C50 C42 C211 C33 C127 C769 0.1UF 25V Y5V 0.1UF 25V Y5V 0.1UF 25V Y5V 0.1UF 25V Y5V 0.1UF 25V Y5V 0.1UF 25V Y5V 1UF 16V 0805 Y5V C144 C632 C1010 C855 1UF 16V 0805 Y5V 1UF 16V 0805 Y5V 0.1UF 25V Y5V +0.9VTERMB C837 C838 C57 0.1UF 25V Y5V 0.1UF 25V Y5V /NI 0.1UF 25V Y5V 1UF 10V Y5V C279 C242 1UF 16V 0805 Y5V 0.1UF 25V Y5V /NI
2
+0.9VTERMB 0.1UF 25V Y5V
RT9173C SOP8EXP CT78 1UF 16V 0805 Y5V
C770
0.1UF 25V Y5V /NI
USE RT9173-->R1 1K /NI USE RT9199-->R1 ADD 1K
2
C797
C1009 C835
1UF 16V 0805 Y5V 1UF 16V 0805 Y5V
C86
0.1UF 25V Y5V /NI
C66
1
0.1UF 25V Y5V /NI
1
Title Size B Date:
A B C D
DDR VTT
Document Number
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Tuesday, April 18, 2006
19
A
B
C
D
E
4
9 9
SBA[0:7] GD[0:31]
SBA[0:7] GD[0:31]
4
+1.5VAGP +3.3V +5V R343 4.7K AGP1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41
+3.3V ==> 6A +1.5VAGP ==>1A +5V===>2A +12V==>1A +3.3AUX==>750mA OVRCNT# +5V +5V USB+ GND INTB# CLK REQ VCC3.3 ST0 ST2 RBF GND DBI_LO SBA0# VCC3.3 SBA2# SB_STBF GND SBA4# SBA6# RESERVED GND VCC3_AUX VCC3.3 AD31 AD29 VCC3.3 AD27 AD25 GND AD_STBF1 AD23 VDDQ1.5V AD21 AD19 GND AD17 C#/BE2 VDDQ1.5V IRDY +12V TYPEDET# GC_AGP8X_DET USBGND INTA# RST# GNT VCC3.3 ST1 MB_AGP8X_DET DBI_HI GND WBF SBA1# VCC3.3 SBA3# SB_STBS GND SBA5# SBA7# RESERVED GND RESERVED VCC3.3 AD30 AD28 VCC3.3 AD26 AD24 GND AD_STBS1 C#/BE3 VDDQ1.5V AD22 AD20 GND AD18 AD16 VDDQ1.5V FRAME A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41
+5V +12V +1.5VAGP +3.3V R342 4.7K -TYPEDET R802 GC_AGP8X_DET -INTR_A GGNT 0 /NI FPD8 10 +1.5VAGP -INTR_A -PCIRSTX GGNT ST1 DBIH WBF 10,11,21,22 11,21,22,31 9 9 9 9 R348 4.7K B SB_STBS 9 GC_AGP8X_DET R347 10K 1% B C Q36 2N3904 SOT23 E +12V GPERR C
11,21,22 -INTR_B 14 GCLK_SLOT 9 GREQ 9 9 9 9 ST0 ST2 RBF DBIL
-INTR_B GREQ
R340 8.2K
RBF SBA0 SBA2 SB_STBF SBA4 SBA6
AGP8X_DET DBIH WBF SBA1 SBA3 SB_STBS SBA5 SBA7
3
9
SB_STBF
Q37 2N3904 SOT23 E
3
+3.3VSUS
R339 200 1%
GD31 GD29 GD27 GD25 9 AD_STBF1 AD_STBF1 GD23 GD21 GD19 GD17 GBE2 GIRDY
GD30 GD28 GD26 GD24 AD_STBS1 GBE3 GD22 GD20 GD18 GD16 +1.5VAGP GFRAME 9 D Q35 2N7002 SOT23 G S 1.5K 1% +1.5VAGP R351 1K 1% D +12V R350 1K 1% AD_STBS1 GBE3 9 9 +1.5VAGP
9 9
GBE2 GIRDY
2
9
GDEVSEL
GDEVSEL GPERR
9 9
GSERR GBE1
GSERR GBE1 GD14 GD12 GD10 GD8
9
AD_STBF0
AD_STBF0 GD7 GD5 GD3 GD1 VREF_CG
B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
DEVEL TRDY VDDQ1.5V STOP PERR PME# GND GND SERR PAR C#/BE1 AD15 VDDQ1.5V VDDQ1.5V AD14 AD13 AD12 AD11 GND GND AD10 AD9 AD8 C#/BE0 VDDQ1.5V VDDQ1.5V AD_STBF0 AD_STBS0 AD7 AD6 GND GND AD5 AD4 AGP3.0 Ver 0.95 AD3 AD2 VDDQ1.5V VDDQ1.5V AD1 AD0 VREF_CG VREF_GC AGP SLOT 124PIN Y
A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GSTOP GPAR GD15 GD13 GD11 GD9 GBE0 AD_STBS0 GD6 GD4 GD2 GD0 AGPVREF
R344
GPAR
9 C333 1UF 16V 0805 Y5V GC_AGP8X_DET R346 1K 1%
S
GTRDY GSTOP -PME
9 9 12,21,22,31
R345 3.3K VREF_CG
Q34 2N7002 SOT23 G
2
AGP8X_DET_NB R352 10K 1%
AGP8X_DET_NB 9
GBE0 AD_STBS0
9 9
Near AGP slot
AGPVREF
9
C1005 1UF 10V Y5V
+12V
1
CT65 + 100UF 16V 5X11 2mm /NI Title 1 2
1
VER:1.0
AGP SLOT
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
20
A
B
C
D
E
PCICLK0 INT-A REQ-0 / GNT-0 AD19
+3.3V -12V +5V PCI1
4
PCICLK1 INT-B REQ-1 / GNT-1
+5V +12V +3.3V
AD20
+3.3V -12V +5V PCI2 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 -12V TCK GND TDO +5V +5V INTB INTD PRSNT1 RESERVED PRSNT2 GND GND RESERVED GND CLK GND REQ +5V AD31 AD29 GND AD27 AD25 +3.3V C/BE3 AD23 GND AD21 AD19 +3.3V AD17 C/BE2 GND IRDY +3.3V DEVSEL GND LOCK PERR +3.3V SERR +3.3V C/BE1 AD14 GND AD12 AD10 GND AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V ACK64 +5V +5V PCI SLOT 120PIN U TRST +12V TMS TDI +5V INTA INTC +5V RESERVED +5V RESERVED GND GND 3.3V_AUX RST +5V GNT GND PME AD30 +3.3V AD28 AD26 GND AD24 IDSEL +3.3V AD22 AD20 GND AD18 AD16 +3.3V FRAME GND TRDY GND STOP +3.3V SDONE SBO GND PAR AD15 +3.3V AD13 AD11 GND AD9 C/BE0 +3.3V AD6 AD4 GND AD2 AD0 +5V REQ64 +5V +5V A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 +12V +3.3V +5V
4
11,20,22 -INTR_B 11,22 -INTR_D
-INTR_B -INTR_D
14 11
PCICLK0 -REQ0 -REQ0 A_D31
A_D29
A_D27
A_D25
C_-BE3 A_D23
3
A_D21 A_D19 A_D17 C_-BE2 11,22 11,22 22 11,22 11,22 -IRDY -DEVSEL -PLOCK -PERR -SERR -IRDY -DEVSEL -PLOCK -PERR -SERR C_-BE1 A_D14 A_D12 A_D10
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
-12V TCK GND TDO +5V +5V INTB INTD PRSNT1 RESERVED PRSNT2 GND GND RESERVED GND CLK GND REQ +5V AD31 AD29 GND AD27 AD25 +3.3V C/BE3 AD23 GND AD21 AD19 +3.3V AD17 C/BE2 GND IRDY +3.3V DEVSEL GND LOCK PERR +3.3V SERR +3.3V C/BE1 AD14 GND AD12 AD10 GND AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V ACK64 +5V +5V PCI SLOT 120PIN U
TRST +12V TMS TDI +5V INTA INTC +5V RESERVED +5V RESERVED GND GND 3.3V_AUX RST +5V GNT GND PME AD30 +3.3V AD28 AD26 GND AD24 IDSEL +3.3V AD22 AD20 GND AD18 AD16 +3.3V FRAME GND TRDY GND STOP +3.3V SDONE SBO GND PAR AD15 +3.3V AD13 AD11 GND AD9 C/BE0 +3.3V AD6 AD4 GND AD2 AD0 +5V REQ64 +5V +5V
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
-INTR_A -INTR_C
-INTR_A -INTR_C
10,11,20,22 11,22
-INTR_C -INTR_A
-INTR_B -INTR_D
+3.3VSUS
+3.3VSUS
-PCIRSTX -GNT0 -PME A_D30 A_D28 A_D26 A_D24 A_D19 A_D22 A_D20 A_D18 A_D16 -FRAME -TRDY -STOP
-PCIRSTX -GNT0 -PME
11,20,22,31 14 11 11 12,20,22,31 -REQ1 PCICLK1 -REQ1 A_D31 A_D29 A_D27 A_D25 C_-BE3 A_D23 A_D21 A_D19 A_D17 C_-BE2
-PCIRSTX -GNT1 -PME A_D30 A_D28 A_D26 A_D24 A_D20 A_D22 A_D20 A_D18 A_D16 -FRAME -TRDY -STOP -GNT1 11
3
-FRAME -TRDY -STOP
11,22 11,22 11,22
-IRDY -DEVSEL -PLOCK -PERR -SERR
PAR A_D15 A_D13 A_D11 A_D9 C_-BE0 A_D6 A_D4 A_D2 A_D0 -P1REQ64
PAR
11,22
C_-BE1 A_D14 A_D12 A_D10
PAR A_D15 A_D13 A_D11 A_D9 C_-BE0 A_D6 A_D4 A_D2 A_D0 -P2REQ64
A_D8 A_D7 A_D5 A_D3
2
A_D8 A_D7 A_D5 A_D3 A_D1 -P2ACK64
A_D1 -P1ACK64
2
11,22
A_D[0..31] -TRDY -DEVSEL -IRDY -FRAME -SERR -PERR -PLOCK -STOP +3.3VSUS 1 3 5 7 1 3 5 7 2 4 6 8 2 4 6 8
+5V +5V RN94 RN88 2.2K 8P4R RN87 2.2K 8P4R 11 11 11,22 11 -REQ3 -REQ0 -REQ2 -REQ1 -REQ3 -REQ0 -REQ2 -REQ1 1 3 5 7 2 4 6 8 +3.3V RN93 +3.3V RN91 1 2 -INTR_D -INTR_C -INTR_B -INTR_A 1 3 5 7 2 4 6 8 4.7K 8P4R + 11 11 11,22 11 -GNT3 -GNT0 -GNT2 -GNT1 -GNT3 -GNT0 -GNT2 -GNT1 1 3 5 7 2 4 6 8 RN80 -P1ACK64 -P1REQ64 -P2ACK64 -P2REQ64 1 3 5 7 2 4 6 8 2.2K 8P4R +5V
11,22 C_-BE[0..3]
2.2K 8P4R
CT47
1
1
2.2K 8P4R
-
100UF 16V 5X11 2mm
Title
PCI 1&2
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
21
A
B
C
D
E
PCICLK2 INT-C REQ-2 / GNT-2
4 4
AD21
+3.3V -12V +5V PCI3 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 -12V TCK GND TDO +5V +5V INTB INTD PRSNT1 RESERVED PRSNT2 GND GND RESERVED GND CLK GND REQ +5V AD31 AD29 GND AD27 AD25 +3.3V C/BE3 AD23 GND AD21 AD19 +3.3V AD17 C/BE2 GND IRDY +3.3V DEVSEL GND LOCK PERR +3.3V SERR +3.3V C/BE1 AD14 GND AD12 AD10 GND AD8 AD7 +3.3V AD5 AD3 GND AD1 +5V ACK64 +5V +5V PCI SLOT 120PIN U TRST +12V TMS TDI +5V INTA INTC +5V RESERVED +5V RESERVED GND GND 3.3V_AUX RST +5V GNT GND PME AD30 +3.3V AD28 AD26 GND AD24 IDSEL +3.3V AD22 AD20 GND AD18 AD16 +3.3V FRAME GND TRDY GND STOP +3.3V SDONE SBO GND PAR AD15 +3.3V AD13 AD11 GND AD9 C/BE0 +3.3V AD6 AD4 GND AD2 AD0 +5V REQ64 +5V +5V A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 +5V +12V +3.3V
11,21 -INTR_D 11,20,21 -INTR_B
-INTR_D -INTR_B
-INTR_C -INTR_A
-INTR_C -INTR_A
11,21 10,11,20,21
+3.3VSUS
-PCIRSTX -GNT2 -PME A_D30 A_D28 A_D26 A_D24 A_D21 A_D22 A_D20 A_D18 A_D16 -FRAME -TRDY -STOP
-PCIRSTX -GNT2 -PME
11,20,21,31 11,21 12,20,21,31
14 11,21
PCICLK2 -REQ2 -REQ2 A_D31 A_D29
3
A_D27 A_D25 C_-BE3 A_D23 A_D21 A_D19 A_D17 C_-BE2 -IRDY -DEVSEL -PLOCK -PERR -SERR C_-BE1 A_D14 A_D12 A_D10
3
11,21 11,21 11,21 21 11,21 11,21
C_-BE2 -IRDY -DEVSEL -PLOCK -PERR -SERR
-FRAME -TRDY -STOP
11,21 11,21 11,21
PAR A_D15 A_D13 A_D11 A_D9
PAR
11,21
2
2
A_D8 A_D7 A_D5 A_D3 A_D1 -P3ACK64
C_-BE0 A_D6 A_D4 A_D2 A_D0 -P3REQ64
11,21
A_D[0..31] RN90 -P3ACK64 -P3REQ64 1 3 5 7 2 4 6 8 2.2K 8P4R +5V
11,21 C_-BE[0..3]
1
1
Title
PCI 3
Size Document Number Custom Date:
A B C D
P4M8P-M7A
Sheet
E
Rev 1.2 of 36
Wednesday, April 19, 2006
22
A
B
C
D
E
MH4 PAD200-8 /NI 1 2 3 4 9
8 7 6 5
MH1 PAD200-8 /NI 1 2 3 4 9
8 7 6 5
Impedance Testing Coupon
TUNE1 NC1 +12V 1 2 CP1 CP2 HEADER 1X2 D 150 /NI
4
4
GND_AUD
MH7 PAD200-8 /NI 1 2 3 4 9
+12V
+12V
8 7 6 5 TUNE2 NC3 1 2 CP1 CP2 HEADER 1X2 D 150 /NI
C471 1000P 50V X7R /NI
C395 0.1UF 25V Y5V /NI
GND_AUD MH5 PAD200-8 /NI 1 2 3 4 9 MH8 PAD200-8 /NI 1 2 3 4 9
GND_AUD
+3.3V 8 7 6 5 5 mils comp MH2 PAD200-8 /NI 1 2 3 4 9 +5V 5 mils solder
+2.5V
8 7 6 5
TUNE3
C379 0.1UF 25V Y5V /NI
BC52 0.1UF 25V Y5V
3
8 7 6 5
CP1 CP2 CP3 CP4 CP5 CP6 CP7 CP8 CP9
3
CP10
MATXCUT /NI
+5V
+5V
C428 +5V +5V +5V +5V +5V +5V +5V +5V
C429
0.1UF 25V Y5V /NI 0.1UF 25V Y5V /NI
FOR EMI
C848 C849 0.1UF 25V Y5V /NI 0.1UF 25V Y5V /NI
C428:0.1UF-->0.01UF VER:1.0
+5V C381 0.1UF 25V Y5V /NI C135 0.1UF 25V Y5V /NI
C774 C773 0.1UF 25V Y5V /NI 0.1UF 25V Y5V
2
C775
C776 0.1UF 25V Y5V /NI
C840 C841 0.1UF 25V Y5V /NI 0.1UF 25V Y5V /NI
1000P 50V X7R /NI
FOR EMI C849:NI-->0.01UF VER:1.0
C16 0.1UF 25V Y5V /NI
FOR EMI C381:NI-->0.01UF
C1019 0.1UF 25V Y5V
FOR EMI VER:1.0
2
VTT
VTT
+5VSUS
+3.3VSUS
+3.3VSUS
+2.5V +5V 1
1
1
BC23 C772 1UF 16V 0805 Y5V 1000P 50V X7R /NI
C777 0.1UF 25V Y5V /NI
C340 0.1UF 25V Y5V /NI
BC63 0.1UF 25V Y5V 2
BC60 0.1UF 25V Y5V
C378 C472 0.1UF 25V Y5V /NI C332 C473 0.1UF 25V Y5V /NI 0.1UF 25V Y5V /NI C477 0.1UF 25V Y5V /NI 0.1UF 25V Y5V /NI
2
FOR EMI C340:0.1UF-->0.01UF VER:1.0
+3.3V +3.3V +3.3V +3.3V
R695
1
0 1 1 1 1 1 C857 0.1UF 25V Y5V /NI C781 C784 BC50 0.1UF 25V Y5V 2 2 2 2 2 R772 BC65 0.1UF 25V Y5V BC59 0.1UF 25V Y5V BC64 0.1UF 25V Y5V BC53 0.1UF 25V Y5V R773 0 /NI
1
0.1UF 25V Y5V /NI 1000P 50V X7R /NI
2
0.1UF 25V Y5V
FOR EMI FOR EMI C784:0.1UF-->0.01UF VER:1.0 VER:1.0
FOR EMI R77