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Foxconn Precision Co. Inc. 865A01 1. REVISION LIST:
REVISION A B C D(Ver1.0) E TOTAL PAGES MODIFIED PAGES ERRATA NO.
Ver 1.1 Date: 2003/08/21
DATE
D
C
2. PAGE INDEX
01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21.
C
B
A
22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42. 43. Confidential Document.Do Not Reproduce
Index Page Topology Rest Map Clock Distribution Power Delivery Map ClockGen Cypress CY28405 Voltage Regulator Down 10 2.5V Power 1.5V Power 1.25V Power Socket478 -1 Socket478 -2 Springdale-GMCH-1 Springdale-GMCH-2 Springdale-GMCH-3 DDR Channel A DIMM's DDR Channel A Termination DDR Channel B DIMM's DDR Channel B Termination AGP Connector VGA Connector
ICH5-1 ICH5-2 ICH5-3 1394_VT6307 LAN RTL8101L CSA LAN CON & USB3,4 ITP FWH USB Connectors AC'97 Codec Power/MISC Connectors PCI Slots 1,2 PCI Slots 3,4 PCI Slot 5 Super IO W83627NHF Keyboard/Mouse/FAN Serial/Print Ports GPIO Summary Jumper Setting Summary For EMI Caps CNR Without Foxconn Authorization.
B
A
FOXCONN PCEG
Title Size C Date:
Index Page
Document Number
865A01
Sheet 1 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
VRD 10
D
Intel Pentium 4 processor Northwood/Prescott processor
uPGA 478 ZIP Socket
D
3 Phase PWM
400/533/800 FSB
CK-409 Clock
AGP 4X / 8X AGP Solt
4x/8x AGP
DDR 400/333/266
Channel A DDR DIMM1 Channel A DDR DIMM2
GMCH
SpringDale
DDR 400/333/266
932 Pin FC-BGA
VGA Connector
Channel B DDR DIMM1 Channel B DDR DIMM2
C
C
INTEL CSA 82547EI(Optional) Back Panel USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3 USB2.0 Port 4 Front Panel USB2.0 Port 5 USB2.0 Port 6 USB2.0 Port 7 USB2.0 Port 8
460 Pin mBGA
PCI Interface
ATX Form Factor
ICH5
PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5
B
10/100 BT LAN
RTL8101L
B
IDE CONN 1 1394 PORT IDE CONN 2
VT 6307
Super I/O W83627HF/W83637HF
INTEL82562EX(Optional)
10/100 BT LAN
AC 97 Code 2.2 Smart Card Reader (W83637HF Sku Only)
A
PS2 Keyboard / Mouse
Parallel Serial
Floppy Drive Connector
ALC 650
A
Firmware HUB
4MB
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
FOXCONN PCEG
Title Size C Date:
Topology
Document Number
865A01
Sheet 2 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
CPU
CPU_PWRGD
D
CPURSTJ
D
ATX Power
GMCH
PWRGD_ATX PS_On Buffer PWRGD_3V CPURSTJ
Arbiter
Lan Controller
C
PCIRSTJ
C
1394 Controller
ICH5
ICH_PWRGD PCIRSTJ KBRST PWRGD_3V Buffer
ATX Form Factor
AGP 4X / 8X AGP Solt
PCI Slot 1 PCI Slot 2
Buffer
Front Panel
B
SLP_S3# System_RST SW_ON#
PCI Slot 3 PCI Slot 4 PCI Slot 5
B
SW_ON
RSMRST#
FR_RST
IDE CONN 1 IDE CONN 2
RSMRST# KBRST
Super IO
FWH
A
A
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
FOXCONN PCEG
Title Size C Date:
Reset Map
Document Number
865A01
Sheet 3 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
14.318MHz
CPU
D
ITP
D
133/166 MHz Diff Pair 133/166 MHz Diff Pair 133/166 MHz Diff Pair
66 MHz
AGP 4x/8x
SpringDale
Channel A DDR DIMM1
48 MHz
Channel B DDR
66 MHz
C
DIMM1
C
CK-409
14.318Mhz
66 MHz 33 MHz 48 MHz
33 MHz
FWH
ICH5
24.576MHz
B
33 MHz
B
PCI LAN RTL8101L INTEL CSA
66 MHz
33 MHz 33 MHz
PCI 1394 VT6307 PCI Slot 1-5
32.768KHz
AC'97
Super I/O
33 MHz 100 MHz Diff Pair SRC
A
A
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title Size C Date:
Clock Distribution
Document Number
865A01
Sheet 4 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
SPD
D D
5V_SYS
ATX SPS
5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V
ATX 12V P/S
+ 1 2 V
>
1.5V REGULATOR
VCCQ
> >
DDR 2 DIMMS:
5V_DUAL
VCC, CORE LOG, 1.5V 2.46A VCCAGP, AGP I/O 1.5V 1.5A VCCDAC, DAC I/O 1.5V 65mA VCCSM, DDR I/O 2.6V 2.8A VCCGPIO
SPD
> >
CORE_CPU_SYS
VTTFSB 1.1V~1.85V 2.4A
> 2.6V +/-100mv
6.00A
2D6V_STR
> >
3D3V_SYS
MPGA478 12V_VRM
VRD 10
>
C
MIC5258
VCCVID
ICH 5
PWRG_ATX 5V_DUAL VCC3_3:
> >
CORE_CPU_SYS 1.1V~1.85V 60A VCC_VID 1.2V 30mA
>
2D6V_STR
2.6V REGULATOR
DDR_VTT_STR
DDR VTT
>
1.25V REGULATOR
> 1.25V
2.1A
>
3.3V 30mA
3D3V_SYS
> >
3.3V 610mA
5V_SB
AMS1085
3D3V_SB
3.3V 70mA
1.5V 970mA
3 VOLTS BATTERY
> OR >
VCC_RTC
>
VCCRTC 3D3V_SYS
3D3V_SYS 5V_SYS 12V_SYS -12V_SYS
B
3D3V_SB
> > > > >
1.2V 1.8V
PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A
3D3V_SB 3D3V_SB
> LAN 330mA > 1.8V 40mA > 1.2V
5V_SB
AMS1085
3D3V_SB
A
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
>
VCCSUS3_3 RESUME:
VCC1_5: CORE LOGIC:
>
V_CPU_IO 1.1V~1.85V 45mA
C
3D3V_SYS
> > > > >
5V_DUAL
PWRG_ATX
CLK_GEN 3.3V 250mA
5V_SB 5V_SYS 3D3V_SYS
SUPER I/O 5V 3.3V
FWH CORE 3.3V 24mA USB POWER 5V PS2 KB/MS POWER
B
5V_SYS
5V_SB
5V_DUAL
> >
5V
12V_SYS 3D3V_SYS
AUDIO VREG
5V_AUDIO
> >
AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA
A
FOXCONN PCEG
Title Size C Date:
Power Delivery Map
Document Number
865A01
Sheet 5 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
3D3V_SYS
3D3V_SYS
3D3V_SYS
3D3V_SYS
For EMI
1
1
FB13 FB
FB14 FB
1
FB12 FB
10PF BC615
BC629 0.1uF
2
2
D
3D3V_CLK
2
U10
D
3 10 16 40 27 34
VDD_REF VDD_PCI0 VDD_PCI1 VDD_CPU VDD_3V66 VDD_SRC
VDD_A VDD_48
48 24
3D3V_SYS
2
R698 BC86 4.7uF BC88 0.1uF BC68 4.7uF BC67 0.1uF 4.7K/NA CK_33M_PCI4 CK_33M_PCI5
2
R699 4.7K/NA
1
3D3V_CLK
CPU0 CPU0# CPU1 CPU1# CPU_ITP CPU_ITP# SRC SRC# 39 38 42 41 45 44 36 35
166_P_GMCH 166_N_GMCH 166_P_CPU 166_N_CPU 166_P_ITP 166_N_ITP 100_P_ICH 100_N_ICH R98 R102 R90 R93 R81 R85
1 1 1 1 1 1
2 2 2 2 2 2
33 33 33 33 33/NA 33/NA
1
1
2
1
1
1
1
1
1
1
1
BC90 0.01uF
BC89 1uF
BC92 0.01uF
BC91 1uF
BC81 0.01uF
BC73 1uF
BC77 0.01uF R122 1K
BC75 1uF
BC80 0.01uF
BC84 0.1uF
CK_166M_P_GMCH 13 CK_166M_N_GMCH 13 CK_166M_P_CPU 11 CK_166M_N_CPU 11 CK_166M_P_ITP 29 CK_166M_N_ITP 29 CK_100M_P_ICH 22 CK_100M_N_ICH 22 R99 49.9 1% R103 49.9 1% R91 49.9 1% R94 49.9 1% R82 49.9 1%/NA R86 49.9 1%/NA R107 49.9 1% R109 49.9 1%
20
R106 1 R108 1
2 33 2 33
RST#/PD#
VCCP
3D3V_CLK
2
2
2
2
2
2
2
1
1
2
R123 220
R112 10K 16,18,38,43 SMB_DATA_MAIN 16,18,38,43 SMB_CLK_MAIN
2
2
C
32 31
SDATA SCLK
33
Q19
VTT_PWRGD# XTAL_IN XTAL_OUT IREF VSS_REF VSS_PCI0 VSS_PCI1 VSS_48 VSS_3V66 VSS_SRC VSS_CPU VSS_A
4 5 46
X3 XTAL-14.318MHZ
*FS_C/PCIIF0 *FS_D/PCIIF1 *FS_E/PCIIF2 PCI0 PCI1 PCI2 PCI3 PCI4 PCI5 3V66_0 3V66_1 *3V66_2/MODE 3V66_3/VCH DOT48 USB48 **FS_A/REF_1 **FS_B/REF_0
7 8 9 12 13 14 15 18 19 30 29 26 25 21 22 1 2
33_ICH 33_PCI2 33_FWH 33_PCI3 33_4 33_5 66_0 66_1 66_2 3V66_3-VCH 48_DOT 48_USB FS_A FS_B
33_PCI3 33_FWH 33_PCI2 33_ICH
RN4 1 3 5 7 33
2 4 6 8
R485 1 R451 1 R450 1
2 33 2 33 2 33
CK_33M_PCI6 CK_33M_PCI5 CK_33M_PCI4 CK_33M_PCI5 CK_33M_PCI4 CK_33M_PCI3 CK_33M_PCI1 CK_33M_PCI2 CK_33M_FWH CK_33M_ICH CK_33M_SIO 36 35 35 34 34 30 24 37
C
R111 1 R116 1 R119 R118 R127 R135
2 33 2 33 2 2 2 2
33 33 33 33
2N3904
1 1 1 1
1
2 1
6 11 17 23 28 37 43 47
CK_66M_GMCH 13 CK_66M_AGP 20 CK_66M_ICH 22 CK_66M_CSA 27 CK_48M_GMCH 13 CK_48M_ICH 22 CK_48M_SIO 37 CK_14M_ICH ADU14MCLK 22 32
R126 1 R130 1 R486 1 R78 R89
2 33 2 33 2 33 2 33 2 33
1 1
R79 475 1%
2
* 150K Internal Pull-up **150K Internal Pull-down
27PF BC70
27PF BC71
10PF BC613
10PF BC614
For EMI
PCI Arbiter
3D3V_SYS BC505 BC506 BC507
B
SM Bus Address :1101-0010
CY28405
BC508
B
0.1uF
0.1uF
0.1uF
0.1uF
3D3V_CLK
9 21 28 VCC VCC AVCC
U35
1
1
1
R83 1K R134 10K/N
R88 1K
24,25,26,34,35,36 STOPJ 24,25,26 ICH_P_PCIREST2J 24,34 24 PREQ5J GNT5J
STOPJ 2 ICH_P_PCIREST2J 26 PREQ5J GNT5J
PCISTOP# PCIRST# SYSREQ# SYSGNT#
PCIREQ1# PCIGNT1# PCIREQ2# PCIGNT2# PCIREQ3# PCIGNT3#
5 7 8 10 11 12 23 22 20 19
PREQ-5_1J GNT-5_1J PREQ-5_2J GNT-5_2J
PREQ-5_1J GNT-5_1J PREQ-5_2J GNT-5_2J
25 25 26 26
PREQ5J GNT5J
R704 R706
0/NA 0/NA
PREQ-5_1J
3 4
2
2
GNT-5_1J 11,13 11,13 BSEL0 BSEL1 3V66_3-VCH
2
< 16inch
CK_33M_PCI6
R77 R84
1 1
2 10K 2 10K
FS_A FS_B
27
PCICLKI
< 7500mils
PCICLKOUT 1 13 14 15 16 NC NC NC NC NC VSS VSS VSS AVSS PCICLK1 PCICLK2 PCICLK3 PCICLK4
R487 22 R488 10 R489 10 CK_33M_1394 CK_33M_LAN CK_33M_1394 25 CK_33M_LAN 26
PREQ5J GNT5J
R705 R707
0/NA 0/NA
PREQ-5_2J GNT-5_2J
BC509
BC510
6 17 24 25
CK_33M_PCI6 R626 R627
A
IT8209R 10pF 47pF 47pF
0/NA 0/NA
CK_33M_1394 CK_33M_LAN
BC511
18
< 3500mils
A
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title Size C Date:
Clock Generator CK-409
Document Number
865A01
Sheet 6 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
VIN
Semtech PWM for Intel P4 VRM10 Power
VCCP
12V_VRM D24
BC585
4.7uF BC583 R642
4.7uF BC584
1
1N4148
2
1uF
ATX12V_POWER_CONNECTOR
12V_VRM L1 VIN
1
1 1
4.7 U42
2
Q98 CN11 ATX12V 5
1 D 1 3
2
EC6 EC7 EC56 COIL-1uH_3852
4
R640
R641
BST
3
CO
TG
2
2
200 1%
DRN
2
S
BC586 301 1%
VREG
D
D
AUX3
AUX1
AUX2
PGND VPN VIN BG
9
G
NTD60N02R VCCP L17 COIL-500nH_60MG 1 2
BC69 10uF 16V
D
0.1uF
1800uF 16V
1800uF 16V
1800uF 16V
S
5
6
7
8
R715 30K 1% BC631 5600pF
R643 30K 1% BC587 5600pF R716
R644 30K 1% BC588 5600pF R647
PSC_HIG
15nF Q97 2N7002
2
2
2
2
1
AUX2 R645 1K/NA 1 BC590 4.7uF 12V_VRM R717 0
SC1211
R650
4
BC494
2
1 D
Q100
1
1
1
RT5 100K 1%/NTC thermistor/NA 1 2 2 R649 2
S
1 499
0.22uF
SDB85N03L
BC589 R718 2
20K 1%
20K 1%
20K 1%
BC632 2200pF R725 0/NA D25 1N4148 BC592 4.7uF 16V BC594 4.7uF R656
2
BC591 4700pF
R648
1R0 BC611 1nF 2 1 R674 100 G
1
R651 1
2
2
2
1
1
1
2
U43
1 0/NA OS4 OUTSEN OUT4 OUT3 OUT2 OUT1 AGND OSCREF PGOOD VID5 VID0 VID1
SC2643VX
2
5V_DUAL Q25 2N3906 C
1
1 2 1 100k_DUMMT 3 4 5 6 7 8 9 10 11 12
PVID4 PVID3 PVID2 PVID1 PVID0 PVID5
OS3 OS2 OS1 BGOUT ERROUT GNDSEN FB DACOUT VCC VID4 VID3 VID2
24 23
VIN BC595 4.7uF BC444 0.1uF
E
PSC_HI
PSC_HI
10
1 1 B
BC597
1
1
22 21 20
R169 10K R165 10K
BC128 0.1uF
1uF
2
2
2
1
U44 4.7
2 D
Q102 R148 10K NTD60N02R VCCP L18 COIL-500nH_60MG 1 2 12 BOOTSELECT
2
2
4
R675
BST
CO
TG
1
1
1
1M_DUMMY
VPN
1200pF 12V_VRM
C
BC603
0.1uF
VIN
16 15 14 13
AUX1 BC601 4.7uF
VREG
200K
S
2
BC596
1uF 2 R681
1 56.2k_DUMMY
18 17 2
R654
DRN
R676 220pF
R652 68K
R680 BC593
19
3
1
1
PGND BG
9
G 1
Q33
2
BC131 0.1uF 2N3904
Offset voltage setting
2
10 R657 BC598 1uF_25V/NA
5
6
7
8
SC1211
R659 1R0 2 1
2
2
BGOUT
1
2
R173 2.7K
C
D
1 1
VCC
2
R678 100
BC612 1nF 1
Q104
1
R660 1
R658 10K
G S
SDB85N03L BC633 2200pF
2
BC600 4700pF
10 PWRGD_VRM_12V BC599 0.1uF
PWRGD
R677 3.8k/NA VCCP
BC602 4.7uF 16V VIN
VCC_VID & VIDGD
3D3V_SYS U14 VCCVID
2
2
VCCVID
2
R176 2.43K VCC_VIDGD
1
2
R124
1
2 0
R661 0/NA
D28
BC636
4.7uF BC634 R719
4.7uF BC635
1 2 3
IN GND EN
PG OUT
1 2
0 1N4148
2
1uF
5
1
1
R662
1 1
4.7 U46
2 D
Q99
4
3
2
BC139 1uF
MIC5258 BC135 1uF
BST
CO
TG
Power/GND Near CPU
DRN
G S 9
NTD60N02R VCCP L20 COIL-500nH_60MG 1 2
B
PGND VREG VPN VIN BG
5
6
7
AUX3
B
8
SC1211
R720
2
1 D
Q101 SDB85N03L
BC638 4.7uF
1R0 BC637 1nF 2 1 R721 100 G BC639 2200pF BC641 4.7uF 16V
1
R722 1
S
2
BC640 4700pF
3D3V_SYS
1
R723 2.7K/NA
1
R724 2.7K/NA Q113
2
3D3V_SYS
12V_SYS
2 4 6 8
VCCP_VID_CONTROLLER
VID5 R472 VID4 R473 3D3V_SYS J9 VID3 VID2 VID1 VID0 R476 4.7K/NA A0 U34 RN73 0 0 PVID5 PVID4 3D3V_SYS PVID3 PVID2 PVID1 PVID0 3D3V_SYS R477 R663 3D3V_SYS
VCC_VIDGD 2
R646 1.5K/NA 1
Q114
2N3904/NA
2N3904/NA
RN74
R475 1K
1 3 5 7
1K
2 4 6 8
2
2.2k 1K 22,27,34,37,38 SMB_CLK_RESUME 22,27,34,37,38 SMB_DATA_RESUME
A
RN72
R456
2
R474
R713
1 2
HEADER_2X1
8 6 4 2
7 5 3 1
0
R457 10K_NA
10K/NA 10K_NA
11 11 11 11 11 11
VID0 VID1 VID2 VID3 VID4 VID5
VID0 VID1 VID2 VID3 VID4 VID5 R714 1k
1 2 3 4 5 6 7 8 9 10
SCL SDA A0 I0 I1 I2 I3 I4 I5 GND
VCC WP A1 Y0 Y1 Y2 Y3 Y4 Y5 M_SLT
20 19 18 17 16 15 14 13 12 11 C249
0.1uF/NA
1
A1 PVID0 PVID1 PVID2 PVID3 PVID4 PVID5
A
1
4.7K/NA 4.7K/NA
1 3 5 7
R478 A1 A0 R479
1K/NA 1K/NA
2
BGOUT
PCA9561_NA Title
FOXCONN PCEG
Size C Date: Document Number
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
1
4
VCC_VIDGD
11
865A01
Sheet 7 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
5V_DUAL
12V_SYS 5V_SB_SYS 5V_SYS 5V_DUAL U18 3D3V_SB Q55 D1 S1 R217 5V_SB_SYS
3
D
VIN Adjust
VOUT
2
8 7 6 1
R225 301 1% D1
1 2 3 4
PWOK+ G1
1.5K
R454 1K
D
Q36 PWOKJ 2N7002 Q76 PWRG_ATX PWRG_ATX 33
AMS1085 BC183
5
EC31
D2
D2
2
1
AO4600 Q54 2N7002
R219 499 1%
220uF 10V
1uF
1
2
2
5 6 7 8
G2
S2
1
D4 D3 D2 D1
G S3 S2 S1
SI4410
4 3 2 1
3D3V_SB
Vout=Vref(1+R2/R1)+IadjR2 R1 is Up Resister. Iadj=50uA Vref=1.25V
14
R455
U24D 74LVC14A
+ EC40 1000uF 10V
FDS8958A 7A,30V. 28mohm @Vgs=10V for N-Channel -5A,-30V. 80mohm @Vgs=-4.5 for P-Channel
PWOKJ DUMMY_0
8
9
PWRG_ATX
C
7
C
5V_DUAL
1
1
4.5A
4.5A
1
L19
1
L15 D16 SD103AW
L16
2
2
1
5V_SB_SYS
R324 30.1K 1%
2
2
4.5A
EC39
5V_SB_SYS R335 4.7K Q57 2N7002 BC320 0.1uF R325 10K 1% BC630 0.1uF BC322 150pF BC323 0.01uF U26
EC46
1
2
+ 1800uF 16V 1800uF 16V
BC281 0.1uF 2D5V_STR
B
2
1
B
22 SLP_S4J
R339 1
2 100
2
Q56 2N7002
G S 1 8 2 D 4 G S
EC34 EC37 EC44 EC53 EC57 L11 COIL-2.3uH_60MG
5 7 6 3
VCC COMP/OCSET FB GND
BOOT PHASE UGATE LGATE
ISL6520A
D
Q45 NTD60N02R
+ BC321 1000pF Q46 NTD60N02R R328 1 1000uF 6.3V
+ 1000uF 6.3V
+ 1000uF 6.3V
+ 1000uF 6.3V
+ 1000uF 6.3V_Dummy
BC310 0.1uF
2
1
2
R327 2.26K 1%
2
R326
A
1
1K 1%
A
2 1
R465 0
1
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title Size C Date:
Power 2.5V-5VDUAL-3.3SB
Document Number
865A01
Sheet 8 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
2D5V_STR
D
12V_SYS
D
3D3V_SB BC202 0.1uF R237 62 2.5VREF 12V_SYS
1
EC32 220uF 10V/NA
BC180 0.1uF
2
1
R685
R235
1
0
2
1
301 1%
2
3 2
+ -
1
LM324/SO
G S
11
1
R236 1K
2
D
4
U40A
Q39 PHB45N03LTA
2
BC620 0.01uF
BC621 0.1uF
BC205 0.1uF
3
BC214 2.2uF
D11 LM431
1 1 2
R231 301 1%
2
BC207 1uF
12V_SYS
C
C
3D3V_SB R226 R483 4.7K/NA U40B LM324/SO 7 Q38 PHB55N03LTA 1D5V_CORE
1
909 1% Q83 2N7002/NA
2
5 6
+ -
G S 1
R228 1K
D
2
22 ICH_GPIO_25
G G S
R466 113 1% BC201 0.1uF
11
2
D S
2
BC83 0.1uF BC622 0.1uF BC623 0.01uF
D
1
4
1
1
EC30 1000uF 6.3V
BC199 4.7uF
BC194 0.1uF
B
U12A LM393_DUMMY
2
B
3 2
8
+ -
1
4
5V_SYS
PROCHOTJ
11,13
BC101 0.1uF_DUMMY
1
1
2
R140 681 1%_DUMMY R152 Q27
8
R149 1K 1%_DUMMY
R145 1K 1%_DUMMY
5 6
+ -
U12B LM393_DUMMY 7
2
2
1
1
2
137 1%_DUMMY
RT2
1
1
4
R136 R139 499 1%_DUMMY
1
2
7.5K_DUMMY
A
2N3904_DUMMY
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
BC119 0.1uF_DUMMY
6.8K 1% Thermal R_DUMMY
2
2
A
FOXCONN PCEG
Title Size C Date:
Power 1.5V
Document Number
865A01
Sheet 9 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
NWD=1.45V PSC=1.2V GMCH VTT Source 1.6A and Sink 600mA
D
12V_SYS
3D3V_SYS
D
Q23 7 PWRGD_VRM_12V 2N3904
BC121 0.1uF GMCH_VTT BC110 0.1uF 3D3V_SB
1
R174 1K 1%
2
8
U13A LM358
8
1
5 6
2 1
R178 562 1%
+ -
-
7
1
R163 220 1 2
2 E B C
Q30 2N2907A EC24 220uF 10V BC142 4.7uF
4
4
S
3
+
U13B LM358
R388 1K
G
D
C
1
BC445 1uF
Q28 PHD45N03LTA
C
2
-12V_SYS -12V_SYS
D
1
7
PSC_HI
PSC_HI
D S
G G S
Q24 2N7002
2
-12V_SYS
10
B
4
U40C
+ -
9
8
LM324/SO
2
BC130 0.1uF BC122 0.1uF
11
1
1 2
D
4
2
C56 R288 1.1K 1%
2
0.1uF VTT_DDR
11
LM324/SO
S
1
R171 221 1%
B
3D3V_SYS 12V_SYS 3D3V_SYS
2.5VREF
R664 62_DUMMY BC581 0.1u 16V
EC52 BC165 0.1uF
100uF 16V R287 1K 1% U40D Q96 AP15N03H
12 13
+ -
14
G
EC41
EC54
EC36
EC38
A
220uF 10V 220uF 10V
A
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
220uF 10V
220uF 10V
FOXCONN PCEG
Title
Power 1.25V-GMCH VTT
Size Document Number Custom Date:
865A01
Sheet 10 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
HOST BUS
H DJ[63..0] U16A
D
CMD ADDRESS & VID
HDJ[63..0] 13 13 HADSJ HBNRJ HBPRIJ HBR0J DBRESETJ HDBSYJ HDEFERJ HDRDYJ HITJ HITMJ HLOCKJ HREQJ0 HREQJ1 HREQJ2 HREQJ3 HREQJ4 13 13 13 13 7 7 7 7 7 7 7 HRSJ0 HRSJ1 HRSJ2 HTRDYJ
U16C
HAJ[31..3]
H DJ33 H DJ34 H DJ35 H DJ36 H DJ37 H DJ38 H DJ39 H DJ40 H DJ41 H DJ42 H DJ43 H DJ44 H DJ45 H DJ46 H DJ47 H DJ48 H DJ49 H DJ50 H DJ51 H DJ52 H DJ53 H DJ54 H DJ55 H DJ56 H DJ57 H DJ58 H DJ59 H DJ60 H DJ61 H DJ62 H DJ63
N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 E22 K22 R22 W22 F21 J23 P23 W23
D#[33] D#[34] D#[35] D#[36] D#[37] D#[38] D#[39] D#[40] D#[41] D#[42] D#[43] D#[44] D#[45] D#[46] D#[47] D#[48] D#[49] D#[50] D#[51] D#[52] D#[53] D#[54] D#[55] D#[56] D#[57] D#[58] D#[59] D#[60] D#[61] D#[62] D#[63] DSTBN#[0] DSTBN#[1] DSTBN#[2] DSTBN#[3] DSTBP#[0] DSTBP#[1] DSTBP#[2] DSTBP#[3]
Data group
C
13 13 13 13 13 13 13 13
HDSTBNJ0 HDSTBNJ1 HDSTBNJ2 HDSTBNJ3 HDSTBPJ0 HDSTBPJ1 HDSTBPJ2 HDSTBPJ3
D#[32] D#[31] D#[30] D#[29] D#[28] D#[27] D#[26] D#[25] D#[24] D#[23] D#[22] D#[21] D#[20] D#[19] D#[18] D#[17] D#[16] D#[15] D#[14] D#[13] D#[12] D#[11] D#[10] D#[09] D#[08] D#[07] D#[06] D#[05] D#[04] D#[03] D#[02] D#[01] D#[0] DP#[3] DP#[2] DP#[1] DP#[0] DBI#[3] DBI#[2] DBI#[1] DBI#[0]
M23 H25 K23 J24 L22 M21 H24 G26 L21 D26 F26 E25 F24 F23 G23 E24 H22 D25 J21 D23 C26 H21 G22 B25 C24 C23 B24 D22 C21 A25 A23 B22 B21 L25 K26 K25 J26 V21 P26 G25 E21
H DJ32 H DJ31 H DJ30 H DJ29 H DJ28 H DJ27 H DJ26 H DJ25 H DJ24 H DJ23 H DJ22 H DJ21 H DJ20 H DJ19 H DJ18 H DJ17 H DJ16 H DJ15 H DJ14 H DJ13 H DJ12 H DJ11 H DJ10 HDJ9 HDJ8 HDJ7 HDJ6 HDJ5 HDJ4 HDJ3 HDJ2 HDJ1 HDJ0
13 13 13 29 13 13 13 13 13 13 13 HREQJ[4..0]
G1 AA3 G2 D2 H6 AE25 H5 E2 H2 F3 E3 G4 J1 K5 J4 J3 H3 F1 G5 F4 AB2 J6 AD2 AD3 AE1 AE2 AE3 AE4 AE5 AF4 AF3
ADS# BINIT# BNR# BPRI# BR0# DBR# DBSY# DEFER# DRDY# HIT# HITM# LOCK# REQ#[0] REQ#[1] REQ#[2] REQ#[3] REQ#[4] RS#[0] RS#[1] RS#[2] RSP# TRDY# VIDPWRGD VID5 VID4 VID3 VID2 VID1 VID0 VCCVID VCCVIDLB
VCCVID
VCC_VIDGD VID5 VID4 VID3 VID2 VID1 VID0
VID5 VID4 VID3 VID2 VID1 VID0
A#[35] A#[34] A#[33] A#[32] A#[31] A#[30] A#[29] A#[28] A#[27] A#[26] A#[25] A#[24] A#[23] A#[22] A#[21] A#[20] A#[19] A#[18] A#[17] A#[16] A#[15] A#[14] A#[13] A#[12] A#[11] A#[10] A#[09] A#[08] A#[07] A#[06] A#[05] A#[04] A#[03] AP#[1] AP#[0]
AB1 Y1 W2 V3 U4 T5 W1 R6 V2 T4 U3 P6 U1 T2 R3 P4 P3 R2 T1 N5 N4 N2 M1 N1 M4 M3 L2 M6 L3 K1 L6 K4 K2 V5 AC1 R5 L5
HAJ[31..3]
13
D
HAJ31 HAJ30 HAJ29 HAJ28 HAJ27 HAJ26 HAJ25 HAJ24 HAJ23 HAJ22 HAJ21 HAJ20 HAJ19 HAJ18 HAJ17 HAJ16 HAJ15 HAJ14 HAJ13 HAJ12 HAJ11 HAJ10 HAJ9 HAJ8 HAJ7 HAJ6 HAJ5 HAJ4 HAJ3
CMD VID
Address Group
BC138 0.1uF HD BIJ3 HD BIJ2 HD BIJ1 HD BIJ0
A22 A7
HDBIJ3 HDBIJ2 HDBIJ1 HDBIJ0 13 13 13 13
RESERVED RESERVED RESERVED RESERVED RESERVED
ADSTB#[1] ADSTB#[0]
HADSTBJ1 HADSTBJ0
13 13
C
AE21 AF24 AF25
TEST, ICH5, CLK & THERMAL
U16B 29 29 29 29 29 HTMS HTCK HTDI HTDO HTRSTJ HTMS HTCK HTDI HTDO HTRSTJ TESTHI_0 TESTHI_1 TESTHI_2_7
PULL UP CIRCUIT
GMCH_VTT
HOST GTLREF
B
2
29 HBPM0J 29 HBPM1J 29 HBPM2J 29 HBPM3J 29 HBPM4_PRDYJ 29 HBPM5_PREQJ
HBPM0J HBPM1J HBPM2J HBPM3J HBPM4_PRDYJ HBPM5_PREQJ
AC6 AB5 AC4 Y6 AA5 AB4
2
TESTHI_8 TESTHI_9 TESTHI_10 TESTHI_11 TESTHI_12
F7 D4 C1 D5 E6 AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25
TMS TCK TDI TDO TRST# TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12 BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5]
A20M# FERR# IERR# IGNNE# INIT# PWRGOOD SLP# SKTOCC# SMI# STPCLK# MCERR# LINT1 LINT0
1
R175 200 1%
1
C6 B6 AC3 B2 W5 AB23 AB26 AF26 B5 Y4 V6 E5 D1
A20MJ FERRJ IGNNEJ INITJ CPU_PWRG CPUSLPJ SMIJ STPCLKJ NMI INTR
22 22 22 22,30 22 22 22 22 22 22 R187 1 VCCP
2 62
HCPURSTJ
ICH5
1
HCOMP0 HCOMP1
L24 P1 AA21 F20 F6 AA6
COMP[0] COMP[1] GTLREF GTLREF GTLREF GTLREF
BSEL1 BSEL0 RESET#
AD5 AD6 AB25
BSEL1 BSEL0 HCPURSTJ
6,13 6,13 13,29
1 3 5 7
2 4 6 8
62
TESTHI_8 TESTHI_9 TESTHI_10 TESTHI_1
13
HGTLREF
R205 1 R200 1
2 61.9 1% 2 61.9 1%
HCOMP1 HCOMP0
A
2
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Test
R275 R221 R222 R276 R223
1 1 1 1 1
2 2 2 2 2
62 62 113 1% 301 1% 200 1%
THERMTRIPJ FERRJ PROCHOTJ CPU_PWRG HBR0J TESTHI_11
GMCH_VTT
VCCP
B
R224 200 1%
Thermal Clock/Reset
PROCHOT# THERMTRIP# THERMDC THERMDA
C3 A2 C4 B3
PROCHOTJ THERMTRIPJ THERMDC THERMDA
9,13 22 37 37
R220 1 RN8
2 62
HGTLREF
13
ITP_CLK1 ITP_CLK0 BCLK[1] BCLK[0]
AD26 AC26 AF23 AF22
CK_166M_N_CPU 6 CK_166M_P_CPU 6
1 3 5 7
2 4 6 8
62 RN11
TESTHI_2_7 TESTHI_12 TESTHI_0
R227 169 1%
BC184 1uF
BC193 220pF
A
FOXCONN PCEG
Title Size C Date:
Socket 478-1
Document Number
865A01
Sheet 11 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
VCCP
U16D
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
A16 A14 A12 A10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 AA8 AA18
D
C
AB11 AB13 B9 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 C10
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC VCC VCC VCC VCC VCC VCC
AA16 AA14 AA12 AA10 A8 A20 A18 AD20 AD22 AE23 A4 A5 M2 M22 M25 M5 D10 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AB10 L4 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 AE22 AE24 AE26 AE7 AE9 AF1 AF10 AF12 AF14 AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17
HVCCA HVSSA HVCCIOPLL
VCCP
D
1
L9 10uH TP38 TP39 HVCCIOPLL HVCCA
1
L10 10uH BC132 10uF
VCCA VSSA VCCIOPLL VSSSENSE VCCSENSE VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
2
2
BC133 10uF
HVSSA
C
VCCP
B
L26 L23 L1 K6 K3 K24 K21 J5 G6 G24 J25 J22 J2 H4 H26 H23 H1 G3 G21 F8 F5 F25 F22 F2 F18 F16 F14 F12 F10 E9 E19 E23 E26 E7 E4 E17 Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 C5 C25 C22 C2 C19
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
TC2
TC3
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
EC12
2
2
2
2
2
2
2
2
2
2
BOOTSELECT
BOOTSELECT 7
2200uF 6.3V
EC14 2200uF 6.3V
EC13 2200uF 6.3V
EC19 EC10 EC15 EC17 1500uF 6.3V/NA 1500uF 6.3V/NA 2200uF 6.3V 2200uF 6.3V
EC16 2200uF 6.3V
EC18 1500uF 6.3V/NA
EC11 1500uF 6.3V/NA
1
DUMMY_100uF 2V
DUMMY_100uF 2V
VCCP
B
BC95 22uF
BC96 22uF
BC97 22uF
BC98 22uF
BC99 22uF
BC103 2.2uF
BC104 2.2uF
BC105 2.2uF
BC106 2.2uF
BC107 2.2uF
BC114 2.2uF
BC115 2.2uF
BC116 2.2uF
BC117 1uF
BC118 1uF
BC161 1uF
BC153 1uF
BC192 1uF
BC185 1uF
BC190 1uF
BC151 1uF
BC191 1uF
BC188 1uF
BC152 1uF
BC187 1uF
BC159 1uF
BC160 1uF
BC189 1uF
BC186 22uF
BC154 22uF
BC123 22uF
BC156 22uF
BC157 22uF
BC126 22uF
BC124 22uF
BC166 22uF
BC125 22uF
BC162 22uF
BC167 22uF
BC127 22uF
A
N6 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N3 N24 N21 E15 E13 E11 E1 D8 D6 D3 D24 D21 D20 D18 D16 D14 D12 C9 C7
A
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
FOXCONN PCEG
Title Size C Date:
Socket 478-2
Document Number
865A01
Sheet 12 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
U17D 20 20 20 20
D
GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 GFRAMEJ CK_66M_GMCH GDEVSELJ GIRDYJ GTRDYJ GSTOPJ GPAR GREQJ GGNTJ
GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 GFRAMEJ GDEVSELJ GIRD YJ GT RDYJ GSTOPJ GPAR GREQJ GGNTJ GRCOMP
Y7 W5 AA3 U2 U6 H4 AB4 V11 AB5 W11 AB2 N6 M7 AC2 AC3 AD2 R10 R9 M4 M5
GCBE0 GCBE1 GCBE2 GCBE3 GFRAME GCLKIN GDEVSEL GIRDY GTRDY GSTOP GPAR/ADD_DETECT GREQ GGNT
GADSTBF0 GADSTBS0 GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GADSTBF1 GADSTBS1 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 GSBSTBF GSBSTBS GSBA0# GSBA1# GSBA2# GSBA3# GSBA4# GSBA5# GSBA6# GSBA7# DDCA_DATA DDCA_CLK RED RED# GREEN GREEN# BLUE BLUE# HSYNC VSYNC REFSET NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20
AC6 AC5 AE6 AC11 AD5 AE5 AA10 AC9 AB11 AB7 AA9 AA6 AA5 W10 AA11 W6 W9 V7 V4 V5 AA2 Y4 Y2 W2 Y5 V2 W3 U3 T2 T4 T5 R2 P2 P5 P4 M2 U11 T11 R6 P7 R3 R5 U9 U10 U5 T7 H3 F2 F4 E4 H6 G5 H7 G6 G3 E2 D2 A3 A33 A35 AF13 AF23 AJ12 AN1 AP2 AR3 AR33 AR35 B2 B25 B34 C1 C23 C35 E26 M31 R25
AD_STB0 AD_STB0J GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 AD_STB1 AD_STB1J GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 SB_STB SB_STBJ SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DDCA_DATA DDCA_CLK
AD_STB0 AD_STB0J
20 20 GAD[31..0]
20
11 HAJ[31..3] HAJ3 HAJ4 HAJ5 HAJ6 HAJ7 HAJ8 HAJ9 HAJ10 HAJ11 HAJ12 HAJ13 HAJ14 HAJ15 HAJ16 HAJ17 HAJ18 HAJ19 HAJ20 HAJ21 HAJ22 HAJ23 HAJ24 HAJ25 HAJ26 HAJ27 HAJ28 HAJ29 HAJ30 HAJ31 11 HREQJ[4..0] HREQJ0 HREQJ1 HREQJ2 HREQJ3 HREQJ4 HADSTBJ0 HADSTBJ1
U17A
H DJ[63..0]
HDJ[63..0]
11
D26 D30 L23 E29 B32 K23 C30 C31 J25 B31 E30 B33 J24 F25 D34 C32 F28 C34 J27 G27 F29 E28 H27 K24 E32 F31 G30 J26 G26 B29 J23 L22 C29 J21 B30 D28 B7 C7 B19 C19 C17 L19 K19 L17 G9 F9 L14 D12 E12 C15 F27 D24 G24 L21 E23 K21 E25 B24 B28 B26 E27 G22 C27 B27 E8 AE14
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HADSTB0# HADSTB1#
C
11 11
6 CK_166M_P_GMCH 6 CK_166M_N_GMCH 11 11 11 11 11 11 11 11 11 11 11 11 HDSTBPJ0 HDSTBNJ0 HDBIJ0 HDSTBPJ1 HDSTBNJ1 HDBIJ1 HDSTBPJ2 HDSTBNJ2 HDBIJ2 HDSTBPJ3 HDSTBNJ3 HDBIJ3
HCLKP HCLKN HDSTBP0# HDSTBN0# DINV0# HDSTBP1# HDSTBN1# DINV1# HDSTBP2# HDSTBN2# DINV2# HDSTBP3# HDSTBN3# DINV3# ADS# HTRDY# DRDY# DEFER# HITM# HIT# HLOCK# BREQ0# BNR# BPRI# DBSY# RS0# RS1# RS2# CPURST# PWROK# HDRCOMP HDSWING HDVREF
HD BIJ0 HD BIJ1 HD BIJ2 HD BIJ3
11 HADSJ 11 HTRDYJ 11 HDRDYJ 11 HDEFERJ 11 HITMJ 11 HITJ 11 HLOCKJ 11 HBR0J 11 HBNRJ 11 HBPRIJ 11 HDBSYJ 11 HRSJ0 11 HRSJ1 11 HRSJ2 11,29 HCPURSTJ 22,28,30,33 PWRGD_3V
B
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
1
1
B23 E22 B21 D20 B22 D22 B20 C21 E18 E20 B16 D16 B18 B17 E16 D18 G20 F17 E19 F19 J17 L18 G16 G18 F21 F15 E15 E21 J19 G14 E17 K17 J15 L16 J13 F13 F11 E13 K15 G12 G10 L15 E11 K13 J11 H10 G8 E9 B13 E14 B14 B12 B15 D14 C13 B11 D10 C11 E10 B10 C9 B9 D8 B8 L20 L13 L12
HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 H DJ10 H DJ11 H DJ12 H DJ13 H DJ14 H DJ15 H DJ16 H DJ17 H DJ18 H DJ19 H DJ20 H DJ21 H DJ22 H DJ23 H DJ24 H DJ25 H DJ26 H DJ27 H DJ28 H DJ29 H DJ30 H DJ31 H DJ32 H DJ33 H DJ34 H DJ35 H DJ36 H DJ37 H DJ38 H DJ39 H DJ40 H DJ41 H DJ42 H DJ43 H DJ44 H DJ45 H DJ46 H DJ47 H DJ48 H DJ49 H DJ50 H DJ51 H DJ52 H DJ53 H DJ54 H DJ55 H DJ56 H DJ57 H DJ58 H DJ59 H DJ60 H DJ61 H DJ62 H DJ63
GSWING_GMCH AGPREF_GMCH
20 6 20 20 20 20 20 20 20
D
AGP
BC158 0.01uF BC163 0.1uF
BC164 0.01uF BC155 0.1uF
1D5V_CORE
20 GSWING_GMCH 20 AGPREF_GMCH 20 20 20 20 20 20 20 22 ST0 ST1 ST2 HI[10..0] RBFJ WBFJ PIPEJ DBI_LO ST0 ST1 ST2 H I0 H I1 H I2 H I3 H I4 H I5 H I6 H I7 H I8 H I9 H I10 HI_STBF HI_STBS HI_RCOMP_MCH HI_VSWING HI_VREF BC169 0.01uF 27 WI[10..0] WI0 WI1 WI2 WI3 WI4 WI5 WI6 WI7 WI8 WI9 W I10 27 WI_STBF 27 WI_STBS
GRCOMP GVSWING GVREF GRBF GWBF DBI_HI DBI_LO GST0 GST1 GST2 HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10 HISTRF HISTRS
R214 226 1%
AD_STB1 AD_STB1J
20 20 GAD[31..0] 20
1
0.8V
BC174 0.1uF
W ISWING_SPD R210 147 1% BC172 0.01uF
N3 N5 N2 AF5 AG3 AK2 AG5 AK5 AL3 AL2 AL4 AJ2 AH2 AJ3 AH5 AH4 AD4 AE3 AE2 AK7 AH7 AD11 AF7 AD7 AC10 AF8 AG7 AE9 AH9 AG6 AJ6 AJ5 AG2 AF2 AF4 G4 AP8 AJ8 AK4 AG10 AG9 AN35 AP34 AR1
1
2
HUB
2
HI_VSWING HI_VREF
BC177 0.01uF
BC181 0.01uF
0.35V
1
BC170 0.1uF
W IVREF_SPD R208 113 1%
22 HI_STBF 22 HI_STBS
HI_RCOMP HI_SWING HI_VREF CI0 CI1 CI2 CI3 CI4 CI5 CI6 CI7 CI8 CI9 CI10 CISTRF CISTRS
SB_STB SB_STBJ SBA[7..0]
20 20 20
C
FSB
2
VGA
CSA
DDCA_DATA DDCA_CLK RED GREEN BLUE HSYNC VSYNC
21 21 21 21 21 21 21
1D5V_CORE
R218 1
2 52.3 1% W ISWING_SPD W IVREF_SPD
6 CK_48M_GMCH TP46 TP28 EXTTSJ ICH_SYNCJ RESERVED_1 RESERVEDJ2
CI_RCOMP CI_SWING CI_VREF DREFCLK EXTTS# ICH_SYNC# RSTIN# RESERVED_1 RESERVED_2 RESERVED_3 RESERVED_4 RESERVED_5
BSEL0 BSEL1
6,11 6,11
24,27,30,37 ICH_H_PCIRESTJ
1
R179 124 1%
1
1 2
R153 DUMMY_75 1%
1D5V_CORE
R202 1
TP29 TP47
PROCHOT# BSEL0 BSEL1
PROCHOTJ
9,11
2
2 51.1 1% 2 43.2 1%
HI_RCOMP_MCH GRCOMP
2
R181 2K 1%
R182 2K 1%
2
1
R154 DUMMY_75 1% R155 DUMMY_75 1%
2
2
R199 1
Springdale-GMCH
11
HGTLREF
HD_SW ING HGTLREF
E24 C25 F23
R180 2.49K 1%
R186 2.49K 1%
Springdale-GMCH R203 20 1%
1 2 3 4 5 6 7 8
POST1 POST2 POST3 POST4 POST5 POST6 POST7 POST8
1
1
B
2
1
2
2
BC168 0.1uF
GMCH_VTT
1D5V_CORE
2
2
R184 301 1% HD_SW ING
R183 100 1%
A
2
2
BC141 0.1uF
Pin Name Pin # Decouping cap VTTFSB A15 0.22uF VTTFSB A21 0.47uF VCC_DDR E35 0.47uF VCC_DDR R35 0.22uF VCCA_DDR AL35 0.1uF VCCA_DDR AA35 0.1uF VCC_DDR AR31 0.1uf VCC_DDR AR21 0.22uF VCC_DDR AR15 0.1uF VCC_AGP AG1 0.1uF VCC_AGP Y1 0.1uF BaseOn Intel WW29 Update
1
1
R270 226 1%
HI_VSWING
22
1
R267 147 1%
1
BC248 0.1uF
A
HI_VREF
22
1
R266 113 1% BC237 0.1uF
2
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title Size C Date:
GMCH-1
Document Number
865A01
Sheet 13 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
U17C U17B 16,17 M_MAA_A[12..0] M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 M_MAB_A1 M_MAB_A2 M_MAB_A3 M_MAB_A4 M_MAB_A5
D
AJ34 AL33 AK29 AN31 AL30 AL26 AL28 AN25 AP26 AP24 AJ33 AN23 AN21 AL34 AM34 AP32 AP31 AM26 AB34 Y34 AC33
SMAA_A0 SMAA_A1 SMAA_A2 SMAA_A3 SMAA_A4 SMAA_A5 SMAA_A6 SMAA_A7 SMAA_A8 SMAA_A9 SMAA_A10 SMAA_A11 SMAA_A12 SMAB_A1 SMAB_A2 SMAB_A3 SMAB_A4 SMAB_A5 SWE_A# SCAS_A# SRAS_A# SBA_A0 SBA_A1 SCS_A0# SCS_A1# SCS_A2# SCS_A3# SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3
SDQS_A0 SDM_A0 SDQ_A0 SDQ_A1 SDQ_A2 SDQ_A3 SDQ_A4 SDQ_A5 SDQ_A6 SDQ_A7 SDQS_A1 SDM_A1 SDQ_A8 SDQ_A9 SDQ_A10 SDQ_A11 SDQ_A12 SDQ_A13 SDQ_A14 SDQ_A15 SDQS_A2 SDM_A2 SDQ_A16 SDQ_A17 SDQ_A18 SDQ_A19 SDQ_A20 SDQ_A21 SDQ_A22 SDQ_A23 SDQS_A3 SDM_A3 SDQ_A24 SDQ_A25 SDQ_A26 SDQ_A27 SDQ_A28 SDQ_A29 SDQ_A30 SDQ_A31 SDQS_A4 SDM_A4 SDQ_A32 SDQ_A33 SDQ_A34 SDQ_A35 SDQ_A36 SDQ_A37 SDQ_A38 SDQ_A39 SDQS_A5 SDM_A5 SDQ_A40 SDQ_A41 SDQ_A42 SDQ_A43 SDQ_A44 SDQ_A45 SDQ_A46 SDQ_A47 SDQS_A6 SDM_A6 SDQ_A48 SDQ_A49 SDQ_A50 SDQ_A51 SDQ_A52 SDQ_A53 SDQ_A54 SDQ_A55 SDQS_A7 SDM_A7 SDQ_A56 SDQ_A57 SDQ_A58 SDQ_A59 SDQ_A60 SDQ_A61 SDQ_A62 SDQ_A63
AN11 AP12 AP10 AP11 AM12 AN13 AM10 AL10 AL12 AP13 AP15 AP16 AP14 AM14 AL18 AP19 AL14 AN15 AP18 AM18 AP23 AM24 AP22 AM22 AL24 AN27 AP21 AL22 AP25 AP27 AM30 AP30 AP28 AP29 AP33 AM33 AM28 AN29 AM31 AN34 AF34 AF31 AH32 AG34 AF32 AD32 AH31 AG33 AE34 AD34 V34 W33 AC34 AB31 V32 V31 AD31 AB32 U34 U33 M32 M34 T34 T32 K34 K32 T31 P34 L34 L33 H31 H32 J33 H34 E33 F33 K31 J34 G34 F34
M_DQS_A0 M_DQM_A0 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DQS_A1 M_DQM_A1 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DQS_A2 M_DQM_A2 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DQS_A3 M_DQM_A3 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DQS_A4 M_DQM_A4 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DQS_A5 M_DQM_A5 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DQS_A6 M_DQM_A6 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DQS_A7 M_DQM_A7 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
18,19 M_MAA_B[12..0]
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17 18 M_MAB_B[5..1]
M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_MAA_B11 M_MAA_B12 M_MAB_B1 M_MAB_B2 M_MAB_B3 M_MAB_B4 M_MAB_B5
AG31 AJ31 AD27 AE24 AK27 AG25 AL25 AF21 AL23 AJ22 AF29 AL21 AJ20 AE27 AD26 AL29 AL27 AE23 W27 W31 W26
SMAA_B0 SMAA_B1 SMAA_B2 SMAA_B3 SMAA_B4 SMAA_B5 SMAA_B6 SMAA_B7 SMAA_B8 SMAA_B9 SMAA_B10 SMAA_B11 SMAA_B12 SMAB_B1 SMAB_B2 SMAB_B3 SMAB_B4 SMAB_B5 SWE_B# SCAS_B# SRAS_B# SBA_B0 SBA_B1 SCS_B0# SCS_B1# SCS_B2# SCS_B3# SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3 SCMDCLK_B0 SCMDCLK_B0# SCMDCLK_B1 SCMDCLK_B1# SCMDCLK_B2 SCMDCLK_B2# SCMDCLK_B3 SCMDCLK_B3# SCMDCLK_B4 SCMDCLK_B4# SCMDCLK_B5 SCMDCLK_B5# SMVREF_B SMYRCOMP SMYRCOMPVOH SMYRCOMPVOL
SDQS_B0 SDM_B0 SDQ_B0 SDQ_B1 SDQ_B2 SDQ_B3 SDQ_B4 SDQ_B5 SDQ_B6 SDQ_B7 SDQS_B1 SDM_B1 SDQ_B8 SDQ_B9 SDQ_B10 SDQ_B11 SDQ_B12 SDQ_B13 SDQ_B14 SDQ_B15 SDQS_B2 SDM_B2 SDQ_B16 SDQ_B17 SDQ_B18 SDQ_B19 SDQ_B20 SDQ_B21 SDQ_B22 SDQ_B23 SDQS_B3 SDM_B3 SDQ_B24 SDQ_B25 SDQ_B26 SDQ_B27 SDQ_B28 SDQ_B29 SDQ_B30 SDQ_B31 SDQS_B4 SDM_B4 SDQ_B32 SDQ_B33 SDQ_B34 SDQ_B35 SDQ_B36 SDQ_B37 SDQ_B38 SDQ_B39 SDQS_B5 SDM_B5 SDQ_B40 SDQ_B41 SDQ_B42 SDQ_B43 SDQ_B44 SDQ_B45 SDQ_B46 SDQ_B47 SDQS_B6 SDM_B6 SDQ_B48 SDQ_B49 SDQ_B50 SDQ_B51 SDQ_B52 SDQ_B53 SDQ_B54 SDQ_B55 SDQS_B7 SDM_B7 SDQ_B56 SDQ_B57 SDQ_B58 SDQ_B59 SDQ_B60 SDQ_B61 SDQ_B62 SDQ_B63
AF15 AG11 AJ10 AE15 AL11 AE16 AL8 AF12 AK11 AG12 AG13 AG15 AE17 AL13 AK17 AL17 AK13 AJ14 AJ16 AJ18 AG21 AE21 AE19 AE20 AG23 AK23 AL19 AK21 AJ24 AE22 AH27 AJ28 AK25 AH26 AG27 AF27 AJ26 AJ27 AD25 AF28 AD29 AC31 AE30 AC27 AC30 Y29 AE31 AB29 AA26 AA27 U30 U31 AA30 W30 U27 T25 AA31 V29 U25 R27 L27 M29 P29 R30 K28 L30 R31 R26 P25 L32 J30 J31 K30 H29 F32 G33 N25 M25 J29 G32
M_DQS_B0 M_DQM_B0 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DQS_B1 M_DQM_B1 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DQS_B2 M_DQM_B2 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DQS_B3 M_DQM_B3 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DQS_B4 M_DQM_B4 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DQS_B5 M_DQM_B5 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DQS_B6 M_DQM_B6 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DQS_B7 M_DQM_B7 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
D
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
16 M_MAB_A[5..1]
16,17 16,17 16,17 16,17
M_WE_AJ M_CAS_AJ M_RAS_AJ M_BS_A[1..0]
DDR Channel A
M_BS_A0 M_BS_A1
AE33 AH34 AA34 Y31 Y32 W34
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
18,19 M_WE_BJ 18,19 M_CAS_BJ 18,19 M_RAS_BJ 18,19 M_BS_B[1..0] M_BS_B0 M_BS_B1
DDR Channel B
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
Y25 AA25 U26 T29 V25 W25
16,17 16,17 16,17 16,17 16,17
M_SCS_A0J M_SCS_A1J M_SCS_A2J M_SCS_A3J M_SCKE_A[3..0]
M_SCKE_A0 M_SCKE_A1 M_SCKE_A2 M_SCKE_A3
AL20 AN19 AM20 AP20 AK32 AK31 AP17 AN17 N33 N34 AK33 AK34 AM16 AL16 P31 P32
18,19 18,19 18,19 18,19 18,19 M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
M_SCS_B0J M_SCS_B1J M_SCS_B2J M_SCS_B3J M_SCKE_B[3..0]
M_SCKE_B0 M_SCKE_B1 M_SCKE_B2 M_SCKE_B3 18 18 18 18 18 18 18 18 18 18 18 18 CK_M_133M_P_DDR0_B CK_M_133M_N_DDR0_B CK_M_133M_P_DDR1_B CK_M_133M_N_DDR1_B CK_M_133M_P_DDR2_B CK_M_133M_N_DDR2_B CK_M_133M_P_DDR3_B CK_M_133M_N_DDR3_B CK_M_133M_P_DDR4_B CK_M_133M_N_DDR4_B CK_M_133M_P_DDR5_B CK_M_133M_N_DDR5_B GMCH_VREF_B SMYRCOMP SMYRCOMPVOH SMYRCOMPVOL
AK19 AF19 AG19 AE18 AG29 AG30 AF17 AG17 N27 N26 AJ30 AH29 AK15 AL15 N31 N30 AP9 AA33 R34 R33
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
C
16 16 16 16 16 16 16 16 16 16 16 16
CK_M_133M_P_DDR0_A CK_M_133M_N_DDR0_A CK_M_133M_P_DDR1_A CK_M_133M_N_DDR1_A CK_M_133M_P_DDR2_A CK_M_133M_N_DDR2_A CK_M_133M_P_DDR3_A CK_M_133M_N_DDR3_A CK_M_133M_P_DDR4_A CK_M_133M_N_DDR4_A CK_M_133M_P_DDR5_A CK_M_133M_N_DDR5_A GMCH_VREF_A SMXRCOMP SMXRCOMPVOH SMXRCOMPVOL
SCMDCLK_A0 SCMDCLK_A0# SCMDCLK_A1 SCMDCLK_A1# SCMDCLK_A2 SCMDCLK_A2# SCMDCLK_A3 SCMDCLK_A3# SCMDCLK_A4 SCMDCLK_A4# SCMDCLK_A5 SCMDCLK_A5# SMVREF_A SMXRCOMP SMXRCOMPVOH SMXRCOMPVOL
C
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
E34 AK9 AN9 AL9
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
Springdale-GMCH
B
M_DQS_A[7..0] 16,17 M_DQM_A[7..0] 16,17 M_DATA_A[63..0] 16,17
Subject: New DDR Tuning Requirement > The following are the updated DDR tuning guidelines for DQ/DQM to DQS. DQ > & DQM is matched to DQS in EACH byte lane: > From GMCH pad to DIMM-0 pin +/-25mils. > From GMCH pad to DIMM-1 pin +/-25mils. > From DIMM-1 pin to Rtt no tuning required. Form Intel WW32 update
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
Springdale-GMCH
B
M_DQS_B[7..0] 18,19 M_DQM_B[7..0] 18,19 M_DATA_B[63..0] 18,19
2D5V_STR
2D5V_STR
2D5V_STR V_SMYRCOMP V_SMYRCOMPVO V_SMYRCOMPVO 2D5V_STR
1
1
1
1
1
1
R234 42.2 1% R248 10K 1%
R229 10K 1%
R233 30.1K 1%
1
R257 150 1% SMYRCOMPVOL
R259 42.2 1% SMXRCOMP R260 42.2 1%
A
R247 30.1K 1%
2
2
2
2
2
2
SMYRCOMP SMXRCOMPVOH GMCH_VREF_A
SMYRCOMPVOH
2
GMCH_VREF_B
SMXRCOMPVOL
1
1
1
1
1
1
R241 42.2 1% R253 30.1K 1% BC610 0.01uF BC217 1uF BC176 2.2uF BC175 0.1uF
R230 30.1K 1% BC607 0.01uF BC195 1uF
R232 10K 1% BC608 0.01uF BC200 1uF
1
R258 150 1% BC230 2.2uF BC182 0.1uF
R252 10K 1% BC609 0.01uF BC215 1uF
2
2
2
GMCH-2
A
2
2
2
2
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title Size C Date: Document Number Rev E 14 of 44
865A01
Sheet
Sunday, August 24, 2003
5
4
3
2
1
GMCH_VTT U17E VCCP_DCAP1 VCCP_DCAP2
1D5V_CORE U17F U17G
D
V_SMYRCOMPVO
V_SMYRCOMP V_SMYRCOMP 2D5V_STR
A15 A21 A4 A5 A6 B5 B6 C5 C6 D5 D6 D7 E6 E7 F7 AA35 AL6 AL7 AM1 AM2 AM3 AM5 AM6 AM7 AM8 AN2 AN4 AN5 AN6 AN7 AN8 AP3 AP4 AP5 AP6 AP7 AR15 AR21 AR31 AR4 AR5 AR7 E35 R35 G1 G2 AG1 Y11 A31 B4 B3 C2 AL35 AB25 AC25 AC26
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DAC VCC_DAC VCCA_AGP VCCA_AGP VCCA_FSB VCCA_FSB VCCA_DPLL VCCA_DAC VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR
Springdale-GMCH
V2P5_DCAP5 V2P5_DCAP4 V_SMYRCOMPVO
V2P5_DCAP1
C
3D3V_SYS 1D5V_CORE VCORE_DCAP1 VCCP_DCAP3 V_1P5_VCCA_FSB VCCA_DPLL V_1P7_DAC V2P5_DCAP2 V_1P5_VCCA_SM
VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VSSA_DAC
J1 J2 J3 J4 J5 K2 K3 K4 K5 L1 L2 L3 L4 L5 Y1 D3
GND
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
J6 J7 J8 J9 K6 K7 K8 K9 L6 L7 L9 L10 L11 M8 M9 M10 M11 N9 N10 N11 P10 P11 R11 T16 T17 T18 T19 T20 U16 U17 U20 V16 V18 V20 W16 W19 W20 Y16 Y17 Y18 Y19 Y20
VCORE_DCAP2
1D5V_CORE
2D5V_STR GMCH_VTT
+
+
B
3D3V_SYS
BC136 0.1uF
AR32 AR29 AR27 AR25 AR23 AR20 AR16 AR13 AR11 AR9 AN32 AN30 AN28 AN26 AN24 AN22 AN20 AN18 AN16 AN14 AN12 AN10 AM35 AM29 AM27 AM25 AM23 AM21 AM19 AM17 AM15 AM13 AM11 AM9 AL32 AL1 AK28 AK26 AK24 AK22 AK20 AK18 AK16 AK14 AK12 AK10 AK8 AK3 AJ35 AJ32 AJ9 AJ4 AJ1 AH33 AH30 AH24 AH22 AH20 AH18 AH16 AH14 AH12 AH10 AH6 AH3 AG35 AG32 AG28 AG26 AG24 AG22 AG20 AG18 AG16 AG14 AG8 AG4 AF33 AF30 AF25 AF24 AF22 AF20 AF18 AF16 AF14 AF11 AF9 AF6 AF3 AE35 AE32 AE26 AE25 AE13 AE12
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
AE11 AE10 AE4 AE1 AD33 AD30 AD28 AD10 AD9 AD8 AD6 AD3 AC35 AC32 AC4 AC1 AB33 AB30 AB28 AB27 AB26 AB10 AB9 AB8 AB6 AB3 AA32 AA4 AA1 Y35 Y33 Y30 Y28 Y27 Y26 Y10 Y9 Y8 Y6 Y3 W32 W18 W17 W4 V33 V30 V28 V27 V26 V19 V17 V10 V9 V8 V6 V3 U32 U19 U18 U4 T35 T33 T30 T28 T27 T26 T10 T9 T8 T6 T3 T1 R32 R4 R1 P33 P30 P28 P27 P26 P9 P8 P6 P3 N35 N32 N4 N1 M33 M30 M28 M27 M26 M6 M3 L35
L31 L26 L25 L24 K33 K29 K27 K25 K22 K20 K18 K16 K14 K12 K11 J35 J32 J28 J22 J20 J18 J16 J14 J12 J10 H33 H30 H26 H24 H22 H20 H18 H16 H14 H12 H9 H8 H5 H2 G35 G31 G28 F26 F24 F22 F20 F18
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
F16 F14 F12 F10 F8 F5 F3 F1 E3 E1 D35 D33 D31 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D9 D1 C28 C26 C24 C22 C20 C18 C16 C14 C12 C10 C8 C4 A32 A29 A27 A25 A23 A20 A16 A13 A11 A9 A7
D
POWER
GND
C53 0.22uF BC148 10uF
C54 0.1uF EC42 1000uF 6.3V EC35 BC144 1000uF 6.3V BC229 4.7uF BC226 10uF 0.1uF
C
Springdale-GMCH
BC134 1uF
BC147 4.7uF
BC137 0.47uF
B
Springdale-GMCH 3D3V_SYS
1
R162 R161 33 DUMMY 33 DUMMY
1
1D5V_CORE
1D5V_CORE
1D5V_CORE
1D5V_CORE
1.7V
R158 DUMMY_0 2
2
2
R151 1
1
L7 R160 365 1% DUMMY
0.1uH
L5 0.82uH
L8 1uH
2
1
VCORE_DCAP1 VCORE_DCAP2 VCCP_DCAP1 VCCP_DCAP2 VCCP_DCAP3 V2P5_DCAP2 V2P5_DCAP5 V2P5_DCAP4 V2P5_DCAP1
L6
0.1uH C50 C52 C51 C55 C49 C47 C45 C46 C48
D10 LM431 DUMMY
1
V_1P7_DAC
V_1P5_VCCA_FSB
V_1P5_VCCA_SM
VCCA_DPLL
2
1
1
1
R159 1K 1% DUMMY BC113 0.01uF BC112 0.1uF
1
A
Subject: GMCH Vtt VR Clarification The GMCH VTT regulator is required to be capable of sinking 600mA of current in addition to sourcing 1.6A of current in normal operation. Sinking 600mA of current is a new requirement for the Springdale platform regardless if a Northwood or Prescott processor is installed. The reason why the GMCH VTT VR must be able to sink 600mA is because there will be times when the GMCH VTT VR's output will be set to a voltage lower than the VRD 10's output. The difference in voltage will cause current to be driven from the VRD to the GMCH VTT regulator. If the GMCH VTT VR doesn't have the capability to sink the current, damage to the GMCH can occur. In order to meet this requirement, Intel is using a P-FET in an SOT-23 footprint on the GMCH VTT voltage regulator. The back driven current will be sunk into the ground plane through this P-FET without causing damage to the Springdale GMCH. Update from Intel WW34 MOV
3
1
0.47uF
0.22uF
0.1uF
0.1uF
0.1uF
0.47uF
0.47uF
0.47uF
0.47uF
1
2
A
EC22 470uF 6.3V
EC23 100uF 16V
BC120 0.1uF
BC111 0.1uF
EC21 100uF 16V
EC25 100uF 16V
BC109 0.1uF
2
2
2
2
2
FOXCONN PCEG
Title
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Springdale-GMCH-3
Document Number
Size C Date:
865A01
Sheet 15 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
14,17 M_MAA_A[12..0]
D
M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_BS_A0 M_BS_A1 M_MAA_A11 M_MAA_A12 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63
CN18
14 M_MAB_A[5..1]
14,17 M_BS_A[1..0] 14,17 M_MAA_A[12..0] 14,17 M_DATA_A[63..0]
C
B
14,17 M_RAS_AJ 14,17 M_CAS_AJ 14,17 M_WE_AJ
48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE
DDR333_DIMM
/CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC
157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173
M_SCKE_A0 M_SCKE_A1 M_DQS_A0 M_DQS_A1 M_DQS_A2 M_DQS_A3 M_DQS_A4 M_DQS_A5 M_DQS_A6 M_DQS_A7 M_DQM_A0 M_DQM_A1 M_DQM_A2 M_DQM_A3 M_DQM_A4 M_DQM_A5 M_DQM_A6 M_DQM_A7
M_SCS_A0J M_SCS_A1J
14,17 14,17 M_SCKE_A[3..0] 14,17
M_MAA_A0 M_MAB_A1 M_MAB_A2 M_MAB_A3 M_MAB_A4 M_MAB_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_BS_A0 M_BS_A1
CN35
M_DQS_A[7..0] 14,17
M_DQM_A[7..0] 14,17 CK_M_133M_P_DDR0_A 14 CK_M_133M_N_DDR0_A 14 CK_M_133M_P_DDR1_A 14 CK_M_133M_N_DDR1_A 14 CK_M_133M_P_DDR2_A 14 CK_M_133M_N_DDR2_A 14 SMB_CLK_MAIN 6,18,38,43 SMB_DATA_MAIN 6,18,38,43
SMB_CLK_MAIN SMB_DATA_MAIN
2D5V_STR
2D5V_STR SMVREF_A
R311 75 1%
SMVREF_A
R309 75 1%
BC261 0.1uF
BC264 0.1uF
2D5V_STR
M_MAA_A11 M_MAA_A12 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63
M_RAS_AJ M_CAS_AJ M_WE_AJ
48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE
DDR333_DIMM
/CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC
157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173
M_SCKE_A2 M_SCKE_A3 M_DQS_A0 M_DQS_A1 M_DQS_A2 M_DQS_A3 M_DQS_A4 M_DQS_A5 M_DQS_A6 M_DQS_A7 M_DQM_A0 M_DQM_A1 M_DQM_A2 M_DQM_A3 M_DQM_A4 M_DQM_A5 M_DQM_A6 M_DQM_A7
M_SCS_A2J M_SCS_A3J
14,17 14,17
D
M_SCKE_A[3..0] 14,17
SMB_CLK_MAIN SMB_DATA_MAIN
CK_M_133M_P_DDR3_A CK_M_133M_N_DDR3_A CK_M_133M_P_DDR4_A CK_M_133M_N_DDR4_A CK_M_133M_P_DDR5_A CK_M_133M_N_DDR5_A
14 14 14 14 14 14
C
2D5V_STR
SMVREF_A
2
1
2
1
B
2D5V_STR
A
A
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title
DDR Channel A DIMM's
Size Document Number Custom Date:
865A01
Sheet 16 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
VTT_DDR RN14
1 3 5 7
2 4 6 8
56 RN15
M_DATA_A0 M_DATA_A4 M_DATA_A5 M_DATA_A1
M_DATA_A[63..0] 14,16
1 3 5 7
D
2 4 6 8
56 RN16
M_DQS_A0 M_DQM_A0 M_DATA_A2 M_DATA_A6
Updated DDR Termination Resistor (Rtt) Values The recommended termination resistor (Rtt) value for DQ/DQM/DQS is changed to 56 ohms.The previous recommendation was 110 ohms. Form Intel FAE WW32
M_MAA_A[12..0] 14,16 M_BS_A[1..0] 14,16 M_SCKE_A[3..0] 14,16 M_DQM_A[7..0] 14,16 M_DQS_A[7..0] 14,16
D
1 3 5 7
2 4 6 8
56 RN17
M_DATA_A9 M_DATA_A7 M_DATA_A3 M_DATA_A8
1 3 5 7
2 4 6 8
56 RN18
M_DATA_A12 M_DQS_A1 M_DATA_A13 M_DQM_A1
1 3 5 7
2 4 6 8
56 RN20
M_DATA_A14 M_DATA_A15 M_DATA_A10 M_DATA_A11 VTT_DDR M_DATA_A20 M_DATA_A16 M_DATA_A17 M_DATA_A21
1 3 5 7
2 4 6 8
56
R305 1 R306 1
2 47
M_DQM_A5 2 56.2 1%
M_SCS_A0J
14,16
R576 1 R577 1 R578 1 R579 1
2 56 2 56 2 56 2 56
M_DQS_A2 M_DQM_A2 M_DATA_A18 M_DATA_A22
2D5V_STR
R303 1 R304 1 R302 1 R301 R300 R299 R298
2 47 2 47 2 47 2 2 2 2
RN33 47 47 47 47 M_BS_A0 M_MAA_A6 M_MAA_A9 M_MAA_A11 M_MAA_A12
M_RAS_AJ M_WE_AJ
14,16 14,16
C
R580 R581 R582 R583
1 1 1 1
RN24
2 2 2 2
56 56 56 56
M_DATA_A23 M_DATA_A19 M_DATA_A24 M_DATA_A28
1 1 1 1
C
BC240
BC328
BC333
BC334
BC332
BC330
BC327
BC312
BC239
BC314
BC313
BC315
BC316
BC336
BC317
BC335
1 3 5 7
2 4 6 8
56 RN26
M_DATA_A25 M_DATA_A29 M_DQS_A3 M_DQM_A3
1 3 5 7
2 4 6 8
47 RN28
M_CAS_AJ M_SCS_A2J M_SCS_A1J M_SCS_A3J
14,16 14,16 14,16 14,16
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
1 3 5 7
2 4 6 8
56 RN29
M_DATA_A30 M_DATA_A26 M_DATA_A27 M_DATA_A31 VTT_DDR M_DATA_A32 M_DATA_A36 M_DATA_A33 M_DATA_A37 R584 1 R585 1 R586 1
1 3 5 7
2 4 6 8
47
M_MAA_A0 M_MAA_A10 M_BS_A1
1 3 5 7
2 4 6 8
56 RN30
2 47 2 47 2 47
RN19
M_MAA_A7 M_MAA_A8 M_MAA_A5
1 3 5 7
2 4 6 8
56 RN31
M_DQS_A4 M_DATA_A34 M_DQM_A4 M_DATA_A38
1 3 5 7
2 4 6 8
47
M_SCKE_A1 M_SCKE_A3 M_SCKE_A2 M_SCKE_A0
BC295 0.1uF
BC288 0.1uF
BC290 0.1uF
BC291 0.1uF
BC283 0.1uF
BC286 0.1uF
BC293 0.1uF
BC284 0.1uF
BC292 0.1uF
BC285 0.1uF
BC296 0.1uF
BC289 0.1uF
BC282 0.1uF
BC294 0.1uF
BC287 0.1uF
BC297 0.1uF
BC298 0.1uF
BC299 0.1uF
BC300 0.1uF
BC301 0.1uF
BC303 0.1uF
BC304 0.1uF
BC302 0.1uF
BC305 0.1uF
BC307 0.1uF
BC325 10uF
BC338 10uF
B
1 3 5 7
2 4 6 8
56 RN32
M_DATA_A39 M_DATA_A35 M_DATA_A44 M_DATA_A40
B
RN27
1 3 5 7
2 4 6 8
56 RN34
M_DATA_A45 M_DATA_A41 M_DQS_A5 R587 1 M_DATA_A42 M_DATA_A43 M_DATA_A46 M_DATA_A47 R588 1
1 3 5 7
2 4 6 8
47
M_MAA_A2 M_MAA_A1
2 47 2 47
M_MAA_A4 M_MAA_A3
1 3 5 7
2 4 6 8
56 RN35
1 3 5 7
2 4 6 8
56 RN36
M_DATA_A48 M_DATA_A49 M_DATA_A52 M_DATA_A53
1 3 5 7
2 4 6 8
56 RN37
M_DQM_A6 M_DQS_A6 M_DATA_A54 M_DATA_A55
1 3 5 7
A
2 4 6 8
56 RN38
M_DATA_A50 M_DATA_A51 M_DATA_A60 M_DATA_A61
A
1 3 5 7
2 4 6 8
56 RN39
M_DATA_A56 M_DATA_A57 M_DQM_A7 M_DQS_A7
1 3 5 7
2 4 6 8
56
M_DATA_A62 M_DATA_A63 M_DATA_A59 M_DATA_A58
FOXCONN PCEG
Title Size C Date:
DDR Channel A Termination
Document Number
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
865A01
Sheet 17 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
D
14,19 M_MAA_B[12..0]
M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_BS_B0 M_BS_B1 M_MAA_B11 M_MAA_B12 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63
CN20
14,19 M_BS_B[1..0] 14,19 M_MAA_B[12..0] 14,19 M_DATA_B[63..0]
C
B
14,19 M_RAS_BJ 14,19 M_CAS_BJ 14,19 M_WE_BJ
48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE
DDR333_DIMM
/CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC
157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173
M_SCKE_B0 M_SCKE_B1 M_DQS_B0 M_DQS_B1 M_DQS_B2 M_DQS_B3 M_DQS_B4 M_DQS_B5 M_DQS_B6 M_DQS_B7 M_DQM_B0 M_DQM_B1 M_DQM_B2 M_DQM_B3 M_DQM_B4 M_DQM_B5 M_DQM_B6 M_DQM_B7
M_SCS_B0J M_SCS_B1J
14,19 14,19 M_SCKE_B[3..0] 14,19
14 M_MAB_B[5..1]
M_MAA_B0 M_MAB_B1 M_MAB_B2 M_MAB_B3 M_MAB_B4 M_MAB_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_BS_B0 M_BS_B1 M_MAA_B11 M_MAA_B12 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63
CN36
M_DQS_B[7..0] 14,19
M_DQM_B[7..0] 14,19 CK_M_133M_P_DDR0_B 14 CK_M_133M_N_DDR0_B 14 CK_M_133M_P_DDR1_B 14 CK_M_133M_N_DDR1_B 14 CK_M_133M_P_DDR2_B 14 CK_M_133M_N_DDR2_B 14 SMB_CLK_MAIN 6,16,38,43 SMB_DATA_MAIN 6,16,38,43
2D5V_STR
2D5V_STR
1
SMVREF_B
R323 75 1%
SMVREF_B
R334 75 1%
BC324 0.1uF
BC337 0.1uF
2D5V_STR
M_RAS_BJ M_CAS_BJ M_WE_BJ
48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE
DDR333_DIMM
/CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC
157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173
M_SCKE_B2 M_SCKE_B3 M_DQS_B0 M_DQS_B1 M_DQS_B2 M_DQS_B3 M_DQS_B4 M_DQS_B5 M_DQS_B6 M_DQS_B7 M_DQM_B0 M_DQM_B1 M_DQM_B2 M_DQM_B3 M_DQM_B4 M_DQM_B5 M_DQM_B6 M_DQM_B7
M_SCS_B2J M_SCS_B3J
14,19 14,19
D
SMB_CLK_MAIN SMB_DATA_MAIN
CK_M_133M_P_DDR3_B CK_M_133M_N_DDR3_B CK_M_133M_P_DDR4_B CK_M_133M_N_DDR4_B CK_M_133M_P_DDR5_B CK_M_133M_N_DDR5_B
14 14 14 14 14 14
C
2D5V_STR
SMVREF_B
2
1
2
B
2D5V_STR
A
A
FOXCONN PCEG
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
Title
DDR Channel B DIMM's
Size Document Number Custom Date:
865A01
Sheet 18 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
VTT_DDR
RN40
1 3 5 7
2 4 6 8
56 RN41
M_DATA_B0 M_DATA_B4 M_DATA_B5 M_DATA_B1
1 3 5 7
D
2 4 6 8
56 RN42
M_DQS_B0 M_DQM_B0 M_DATA_B2 M_DATA_B6
Updated DDR Termination Resistor (Rtt) Values The recommended termination resistor (Rtt) value for DQ/DQM/DQS is changed to 56 ohms.The previous recommendation was 110 ohms. Form Intel FAE WW32
M_SCKE_B[3..0] 14,18 M_BS_B[1..0] 14,18 M_DQM_B[7..0] 14,18 M_MAA_B[12..0] 14,18 M_DQS_B[7..0] 14,18 M_DATA_B[63..0] 14,18
D
1 3 5 7
2 4 6 8
56 RN43
M_DATA_B7 M_DATA_B3 M_DATA_B8 M_DATA_B9
VTT_DDR
1 3 5 7
2 4 6 8
56 RN44
M_DATA_B12 M_DQS_B1 M_DATA_B13 M_DQM_B1
RN61
1 3 5 7
2 4 6 8
56 RN46
M_DATA_B15 M_DATA_B10 M_DATA_B14 M_DATA_B11
1 3 5 7
2 4 6 8
47 RN60
M_SCS_B2J M_SCS_B3J M_SCS_B0J M_SCS_B1J
14,18 14,18 14,18 14,18
1 3 5 7
2 4 6 8
56 RN48
M_DATA_B20 M_DATA_B17 M_DATA_B16 M_DQS_B2
2D5V_STR
1 3 5 7
2 4 6 8
47 RN55
M_BS_B0 M_RAS_BJ M_WE_BJ M_CAS_BJ 14,18 14,18 14,18
1 3 5 7
2 4 6 8
56 RN50
M_DATA_B21 M_DQM_B2 M_DATA_B18 M_DATA_B22
1 3 5 7
2 4 6 8
47 RN54
M_MAA_B0 M_MAA_B10 M_BS_B1
BC329 0.1uF
BC311 0.1uF
BC331 0.1uF
BC278 0.1uF
BC277 0.1uF
BC243 0.1uF
BC275 0.1uF
BC276 0.1uF
BC241 0.1uF
BC245 0.1uF
BC242 0.1uF
BC279 0.1uF
BC246 0.1uF
C
1 3 5 7
2 4 6 8
56 RN51
M_DATA_B23 M_DATA_B24 M_DATA_B28 M_DATA_B19
1 3 5 7
2 4 6 8
47 RN52
M_MAA_B2 M_MAA_B1
C
1 3 5 7
2 4 6 8
56 RN53
M_DATA_B25 M_DATA_B29 M_DQS_B3 M_DQM_B3
1 3 5 7
2 4 6 8
47 RN49
M_MAA_B4 M_MAA_B3
1 3 5 7
2 4 6 8
56 RN56
M_DATA_B26 M_DATA_B30 M_DATA_B31 M_DATA_B27
VTT_DDR
1 3 5 7
2 4 6 8
47 RN47
M_MAA_B8 M_MAA_B5 M_MAA_B6
1 3 5 7
2 4 6 8
56 RN57
M_DATA_B32 M_DATA_B36 M_DATA_B33 M_DQS_B4
1 3 5 7 1 3 5 7
2 4 6 8
RN45 47 2 4 6 8 47
M_MAA_B12 M_MAA_B7 M_MAA_B11 M_MAA_B9 M_SCKE_B3 M_SCKE_B1 M_SCKE_B2 M_SCKE_B0
BC340 0.1uF
BC341 0.1uF
BC357 0.1uF
BC344 0.1uF
BC343 0.1uF
BC349 0.1uF
BC342 0.1uF
BC363 0.1uF
BC355 0.1uF
BC359 0.1uF
BC350 0.1uF
BC351 0.1uF
BC361 0.1uF
BC356 0.1uF
BC347 0.1uF
BC362 0.1uF
BC353 0.1uF
BC360 0.1uF
BC346 0.1uF
BC365 0.1uF
BC352 0.1uF
BC345 0.1uF
BC354 0.1uF
BC366 0.1uF
BC364 0.1uF
BC358 0.1uF
BC367 0.1uF
BC339 0.1uF
BC309 10uF
BC274 10uF
1 3 5 7
2 4 6 8
56 RN58
M_DATA_B37 M_DATA_B34 M_DQM_B4 M_DATA_B38
B
1 3 5 7
2 4 6 8
56 RN59
M_DATA_B39 M_DATA_B35 M_DATA_B44 M_DATA_B40
B
1 3 5 7
2 4 6 8
56 RN62
M_DATA_B42 M_DATA_B41 M_DQS_B5 M_DATA_B45
1 3 5 7
2 4 6 8
56 RN63
M_DQM_B5 M_DATA_B46 M_DATA_B43 M_DATA_B47
1 3 5 7
2 4 6 8
56 RN64
M_DATA_B52 M_DATA_B49 M_DATA_B48 M_DATA_B53
1 3 5 7
2 4 6 8
56 RN65
M_DQM_B6 M_DQS_B6 M_DATA_B54 M_DATA_B50
1 3 5 7
A
2 4 6 8
56 RN66
M_DATA_B55 M_DATA_B51 M_DATA_B60 M_DATA_B56
1 3 5 7
2 4 6 8
56 RN67
M_DATA_B61 M_DATA_B57 M_DQM_B7 M_DQS_B7
A
1 3 5 7
2 4 6 8
56
M_DATA_B62 M_DATA_B58 M_DATA_B59 M_DATA_B63
FOXCONN PCEG
Title Size C Date:
DDR Channel B Termination
Document Number
Confidential Document.Do Not Reproduce Without Foxconn Authorization.
865A01
Sheet 19 of 44
Rev E
Sunday, August 24, 2003
5
4
3
2
1
D
D
3D3V_SB CN16 3D3V_SYS
B9 B16 B25 B28
1D5V_CORE
VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3
1.5 AGP 8X
A9 A16 A25 A28 A34 B34 B40 B47 B52 B58 B64 A40 A52 A58 A64 B2 B3 A1 A2 B1 A4 B4 A6 B6 A7 A8 B7 B8 A12 A14 B12 A48 A50 B41 B46 B48 B50 A41 A46 A47 B5 B13 B19 B23 B31 B37 B49 B55 B61 A5 A13 A19 A23 A31 A37 A49 A55 A61
5V_SYS 12V_SYS
1D5V_CORE
C
R206 1
2 6.8K GSERRJ
24,34,35 24,34,35 24,34,35,36 13 6 13 13 13 13 24,25,26,33,34,35,36 13 13 13
INTAJ INTBJ ICH_P_PCIRESTJ GGNTJ CK_66M_AGP GREQJ PIPEJ WBFJ RBFJ PMEJ GPAR GIRDYJ GDEVSELJ
13 GFRAMEJ 13 GTRDYJ 13 GSTOPJ
GGNTJ CK_66M_AGP GREQJ PIPEJ WBFJ RBFJ PMEJ GPAR GIRD YJ GDEVSELJ GPERRJ GSERRJ GFRAMEJ GT RDYJ GSTOPJ
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 5.0V 5.0V 12V TYPEDET# OVRCNT# USBUSB+ INTA# INTB# RST# GNT# CLK REQ# PIPE#/DBI_HI WBF# RBF# PME# PAR IRDY# DEVSEL# PERR# SERR# FRAME# TRDY# STOP# GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
AGP-Solt_124
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 SB_STB SB_STB# AD_STB0# AD_STB1# AD_STB0 AD_STB1 C/BE0# C/BE1# C/BE2# C/BE3# ST0 ST1 ST2 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DBI_LO RESERVED 3.3V_AUX VREFCG GC_DET MB_DET RESERVED RESERVED
A65 B65 A63 B63 A62 B62 A60 B60 B57 A56 B56 A54 B54 A53 B53 A51 A39 B38 A38 B36 A36 B35 A35 B33 A30 B30 A29 B29 A27 B27 A26 B26 B18 A18 A59 A32 B59 B32 A57 B51 B39 A33 B10 A10 B11 B15 A15 B17 A17 B20 A20 B21 A21 B14 B22 B24 B66 A3 A11 A22 A24 A66
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 SB_STB SB_STBJ AD_STB0J AD_STB1J AD_STB0 AD_STB1 GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3
GAD[31..0]
13
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DBI_LO
SB_STB SB_STBJ AD_STB0J AD_STB1J AD_STB0 AD_STB1 GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 ST0 ST1 ST2
13 13 13 13 13 13 13 13 13 13 13 13 13
C
SBA[7..0] DBI_LO
13 13
AGPREF_GMCH GC_DETJ
NC1 NC2 NC3 1 2 3
RESERVED
B
B
DECUBLE CAP.
5V_SYS 3D3V_SYS 12V_SYS 1D5V_CORE 3D3V_SB
AGPREF & AGPSWING CIRCUIT
1D5V_CORE
1
1D5V_CORE 12V_SYS 1D5V_CORE R195 60.4 1%
1
2
BC146
R138 8.2K
R166 8.2K
R142 8.2K
GSWING_GMCH 13
1
1
2