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5

4

3

2

1

D

1. REVISION LIST:
REVISION A B C D

Foxconn Precision Co. Inc. 865A05 Schematic
TOTAL PAGES MODIFIED PAGES ERRATA NO.

Fab B Date: 2003/08/025
DATE

D

2. PAGE INDEX
C

B

01. 02. 03. 04. 05. 06. 07. 08. 09. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19.

Index Page Topology Rest Map Clock Distribution Power Delivery Map ClockGen ICS952619 Voltage Regulator Down 10 1.5V/2.5V/3.3V_SB POWER GMCHVTT/DDRVTT POWER Socket478 -1 Socket478 -2 Springdale-GMCH-1 Springdale-GMCH-2 Springdale-GMCH-3 DDR Channel A DIMM DDR Channel A Termination DDR Channel B DIMM DDR Channel B Termination AGP Connector

20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38.

VGA Connector ICH5-1 ICH5-2 ICH5-3 FWH USB Connectors AC'97 Codec Power/MISC Connectors PCI Slots 1,2 PCI Slots 3,4 PCI Slot 5 Super IO 83627HF Keyboard/Mouse/FAN Serial/Print Ports GPIO Summary Jumper Setting Summary For EMI Caps LAN_RTL8101L Modify List

C

B

A

A

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title Size C Date:

Index Page
Document Number

865A05
Sheet 1 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

VRD 10
D

Intel Pentium 4 processor Northwood/Prescott processor
uPGA 478 ZIP Socket
D

2/3 Phase PWM

400/533/800 FSB

CK-409 Clock

AGP slot
(only for 865G/PE)

DDR 400/333/266

Channel A DDR DIMM

GMCH
SpringDale
DDR 400/333/266
932 Pin FC-BGA

VGA
(only for 865G/GV)

Channel B DDR DIMM

C

C

8101 LAN Back Panel USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3 USB2.0 Port 4
PCI Interface ATX Form Factor

ICH5
460 Pin mBGA

PCI Slot 1 PCI Slot 2 PCI Slot 3

Front Panel USB2.0 Port 5 USB2.0 Port 6
B

PCI Slot 4 1394_VT6307 PCI Slot 5

B

IDE CONN 1 IDE CONN 2 Super I/O W83627HF

AC 97 Codec
ALC 655/202A

Firmware HUB
4MB

PS2 Keyboard / Mouse
A

Parallel Serial

Floppy Drive Connector
A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

FOXCONN PCEG
Title Size C Date:

Topology
Document Number

865A05
Sheet 2 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

CPU
CPU_PWRGD
D

CPURSTJ

D

ATX Power

GMCH
PWRGD_ATX PS_On PWRGD_3V CPURSTJ

C

PCIRSTJ

C

ICH5
ICH_PWRGD PCIRSTJ KBRST PWRGD_3V Buffer

PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5
B

Front Panel
B

Buffer

SLP_S3# System_RST SW_ON#

SW_ON

RSMRST#

FR_RST

IDE CONN 1 IDE CONN 2
RSMRST# KBRST

Super IO

FWH

A

A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

FOXCONN PCEG
Title Size C Date:

Reset Map
Document Number

865A05
Sheet 3 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

14.318MHz

CPU
D

133/166 MHz Diff Pair

D

133/166 MHz Diff Pair

SpringDale
48 MHz

Channel A DDR DIMM1

Channel B DDR
66 MHz
C

DIMM1
C

CK-409

14.318Mhz

66 MHz 33 MHz 48 MHz

33 MHz

FWH

ICH5
24.576MHz
B

33 MHz
B

8101 LAN

48 MHz

33 MHz

PCI Slot 1-5
32.768KHz

33 MHz

1394 Super I/O

AC'97

33 MHz 100 MHz Diff Pair SRC

A

A

FOXCONN PCEG

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5 4 3 2

Title Size C Date:

Clock Distribution
Document Number

865A05
Sheet
1

Rev B 4 of 39

Monday, February 10, 2003

5

4

3

2

1

SPD
D D

5V_SYS

ATX SPS
5 V S B 5 V 3 . 3 V + 1 2 V 1 2 V

ATX 12V P/S
+ 1 2 V

>

1.5V REGULATOR

VCCQ

> >
DDR 2 DIMMS:
5V_SYS

VCC, CORE LOG, 1.5V 2.46A VCCAGP, AGP I/O 1.5V 1.5A VCCDAC, DAC I/O 1.5V 65mA VCCSM, DDR I/O 2.6V 2.8A VCCGPIO

SPD

> >
CORE_CPU_SYS

VTTFSB 1.1V~1.85V 2.4A

> 2.6V +/-100mv
6.00A
2D6V_STR

> >
3D3V_SYS

MPGA478 12V_VRM

VRD 10

>
C

MIC5258

VCCVID

> >

CORE_CPU_SYS 1.1V~1.85V 60A VCC_VID 1.2V 30mA

>
2D6V_STR

2.6V REGULATOR

DDR_VTT_STR

DDR VTT

ICH 5
PWRG_ATX 5V_DUAL VCC3_3: 3D3V_SYS

>

1.25V REGULATOR

> 1.25V
2.1A

>

3.3V 30mA

3.3V 610mA

5V_SB

AMS1085

3D3V_SB

>

3.3V 70mA

1.5V 970mA

3 VOLTS BATTERY

> OR >

VCC_RTC

>

VCCRTC 3D3V_SYS

3D3V_SYS 5V_SYS 12V_SYS -12V_SYS
B

3D3V_SB

> > > > >

PCI PER SLOT: 3.3V 5V 12V -12V 3.3Vaux 0.375A 7.6A 5.0A 0.5A 0.1A

5V_SB

AMS1085

3D3V_SB

A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

>

VCCSUS3_3 RESUME:

VCC1_5: CORE LOGIC:

>

>

V_CPU_IO 1.1V~1.85V 45mA

C

3D3V_SYS

> > > > >
5V_SYS
PWRG_ATX

CLK_GEN 3.3V 250mA

5V_SB 5V_SYS 3D3V_SYS

SUPER I/O 5V 3.3V

FWH CORE 3.3V 24mA USB POWER 5V PS2 KB/MS POWER
B

5V_SYS

5V_SB

5V_DUAL

> >

5V

12V_SYS 3D3V_SYS

AUDIO VREG

5V_AUDIO

> >

AC' 97 AUDIO CODEC A5V 70mA 3.3V 10mA

A

FOXCONN PCEG
Title Size C Date:

Power Delivery Map
Document Number

865A05
Sheet 5 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

D

D

3D3V_SYS 3D3V_SYS
1 FB13 FB

3D3V_SYS
For EMI

FB,300ohm@100MHz,L0805,P-TYPE,RDC<03.ohm, IDC>=1A
1 FB12 FB U10 3 10 17 28 35 41 48 25 BC68 4.7uF BC67 0.1uF 2

3D3V_SYS
0.1uF BC615

3D3V_CLK

2

1 FB14 FB 2 BC86 4.7uF

VDD_REF VDD_PCI VDD_PCI VDD3V66 VDD VDDCPU

VDD_A VDD48

BC88 0.1uF

BC90 0.01uF

BC92 0.01uF

BC81 0.01uF

BC77 0.01uF

BC80 0.01uF

BC89 1uF

BC91 1uF

BC73 1uF

BC75 1uF

BC84 0.1uF

3D3V_CLK

CPUCLKC0 CPUCLKT0 CPUCLKC1 CPUCLKT1 Vtt PWRGD R746 0 34 VttPWR_GD/PD# SRCCLKC SRCCLKT

39 40 42 43 36 37

166_N_GMCH 166_P_GMCH 166_N_CPU 166_P_CPU 100_N_ICH 100_P_ICH

R98 1 R102 1 R90 R93 1 1

2 33 2 33 2 33 2 33 2 33 2 33

CK_166M_N_GMCH 12 CK_166M_P_GMCH 12 CK_166M_N_CPU 10 CK_166M_P_CPU 10 CK_100M_N_ICH 21 CK_100M_P_ICH 21

R106 1 R108 1

D

1

1

1

1

1

C

7,9 PWRGD_VRM_12V

G G S

S

Q19 2N7002 R123 1 2 220 Vtt PWRGD

1

D

10,21,27 ICH_SYS_RSTJ

1

2

45

Reset#

C

R99 49.9 1% 2 2

2

2

2

R122 1K 2

15,17,32 SMB_CLK_MAIN 15,17,32 SMB_DATA_MAIN

32 33

SCLK SDATA

4 5 X3 XTAL-14.318MHZ 1 2 1 R79 475 1% 46

XTAL_IN XTAL_OUT

**FS_2/PCIF0 **FS_4/PCIF1 PCIF2 PCI0 PCI1 PCI2 PCI3 PCI4 PCI5 PCI6 PCI7

7 8 9 12 13 14 15 16 19 20 21

1

RN4 2 4 6 8 1 3 5 7 33

R749 1 R451 1 R450 1

2 33 2 33 2 33

CK_33M_PCIF2 CK_33M_SIO CK_33M_FWH CK_33M_PCI1 CK_33M_LAN CK_33M_PCI3 CK_33M_PCI4 CK_33M_PCI5 CK_33M_ICH 31 24 28 37 29 29 30 23

R111 1 R116 1

2 33 2 33

IREF

3V66_3/VCH 3V66_2 3V66_1 3V66_0

26 27 30 31

48_DOT 66M_AGP 66M_ICH 66M_GMCH

R126 R118 R127 R119

1 1 1 1

2 2 2 2

33 33 33 33

CK_48M_GMCH 12 CK_66M_AGP 19 CK_66M_ICH 21 CK_66M_GMCH 12

2

6 11 18 24 29 38 44 47

GND GND GND GND GND GND GND GND

**Sel24_48#/24_48MHz **FS3/48MHz_0

22 23

48M_SIO 48_USB

R486 1 R130 1

2 33 2 33

CK_48M_SIO CK_48M_ICH

2

R103 49.9 1%

R91 49.9 1%

R94 49.9 1%

R107 49.9 1%

R109 49.9 1%

33PF BC70

33PF BC71

31 21

**FS_A/REF_0 **FS_B/REF_1

1 2

FS_A FS_B

R78 R89

1 1

2 33 2 33

CK_14M_ICH ADU14MCLK

21 26
B

B

BC693

PCI Arbiter
STOPJ ICH_H_PCIRESTJ PREQ5J GNT5J 2 26 3 4

3D3V_SYS

BC682

BC683

BC684

BC685

SM Bus Address :1101-0010
1

* 120K Internal Pull-up **120K Internal Pull-down ICS952619

2

2

R772 10K 1

R773 10K 1

2 R774 10K

0.1uF

0.1uF

0.1uF

0.1uF

U57 5 7 8 10 11 12 23 22 20 19 BC686 R871 22 R873 10 R875 10 PREQ-5_1J GNT-5_1J PREQ-5_2J GNT-5_2J

VCC VCC AVCC

0.1uF

9 21 28

23,28,29,30,37,39 STOPJ 12,19,23,24,28,29,30,31,37,39 ICH_H_PCIRESTJ 23,28 23 PREQ5J GNT5J

PCISTOP# PCIRST# SYSREQ# SYSGNT#

PCIREQ1# PCIGNT1# PCIREQ2# PCIGNT2# PCIREQ3# PCIGNT3#

PREQ-5_1J GNT-5_1J PREQ-5_2J GNT-5_2J

39 39 28 28 PREQ5J GNT5J R869 R870 0/NA 0/NA PREQ-5_1J

3D3V_CLK

1

< 16inch
CK_33M_PCIF2 27 PCICLKI

1 R88 1K R83 1K 2

< 7500mils

GNT-5_1J 10,12 10,12 BSEL0 BSEL1

2

PCICLKOUT 1 13 14 15 16 NC NC NC NC NC VSS VSS VSS AVSS PCICLK1 PCICLK2 PCICLK3 PCICLK4

CK_33M_1394 CK_33M_PCI2

R77 R84

1 1

2 10K 2 10K

FS_A FS_B

CK_33M_1394 39 CK_33M_PCI2 28

BC687

BC688

18

< 3500mils

PREQ5J GNT5J

R872 R874

0/NA 0/NA

PREQ-5_2J GNT-5_2J

6 17 24 25

A

CK_33M_PCIF2 R876 R877

0/NA 0/NA

CK_33M_1394 CK_33M_PCI2

IT8209R 10pF 47pF 47pF

A

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title Size C Date:

Clock Generator CK-409
Document Number

865A05
Sheet 6 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

Semtech PWM for Intel P4 VRM10 Power
12V_VRM
D

ATX12V_POWER_CONNECTOR
12V_VRM L1 1 CN11 ATX12V 5 1 3 2 EC5 EC6 EC7 COIL-1uH_3852 VIN

VIN

D

1800uF 16V

1800uF 16V

1800uF 16V

D26 1N4148 1 VCCP 3 4 2

BC652

BC650 4.7uF

BC651 4.7uF

2

4

BC494 0.1uF

1uF 2 1

R817 1 0 Q114 G 9 IPD09N03L R818 1R0 2 1 R819 2 100 1 1nF 2 G BC656 2200pF 16V Q115 IPD04N03L S BC653 D 1 S 2 D VCCP

BST

CO

TG

VPN

D 2

15nF Q97 2N7002 RT5 1 2 2 R645 1K_NA 1

VREG

PSC_HI AUX1 2 AUX2 2 R644 30K 1% 1 1 AUX3 2

2

BC655 0.1uF

R640 1.5K_1%

SC1211
BC586 R641 301_1%

PGND VIN BG

DRN

1

U54

5V_SB_SYS L19 COIL-600nH_60MG 1 2 R820 1 E Q25 2N3906 C

PSC_HI

9

5

6

7

R643 30K 1% 1

1 B

1

NTC thermistor_NA R649 R822 20K 1% 2 499_1% BC589 R823 2 U43 0_NA OS4 OUTSEN OUT4 OUT3 OUT2 OUT1 AGND OSCREF PGOOD VID5 VID0 VID1 SC2643VX 24 23 22 21 20 2 R847 0 1 1 12V_VRM 1 0.22uF 1

BC654 4.7uF

R173 2.7K 2 2

R165 10K 2

1 R169 10K

R821 30K 1%

G S

1

AUX2

8

BC444 0.1uF

BC128 0.1uF

2

2

2

BC587 5600pF 1

R647 20K 1%

BC588 5600pF 1

R648 20K 1%

BC659 5600pF 1

BC657 4700pF

BC658 4.7uF 16V 11 BOOTSELECT VIN 1

R148 10K 2

Q33 BC131 0.1uF

2N3904

VCCVID
C

C

1 2 R646 1.5K 2 1 3 4 5 2 2 2 R897 2M_NA 1 R898 10M_NA 1 R652 30K 1 BC596 470pF BC593 1uF BC603 0.1uF 6 7 8 9 10 1 1 10 BC598 1uF 2 V ID4 V ID3 V ID2 V ID1 V ID0 V ID5 11 12

OS3 OS2 OS1 BGOUT ERROUT GNDSEN FB DACOUT VCC VID4 VID3 VID2

D24 1N4148 2

BC585

BC583 4.7uF

BC584 4.7uF

R902 1K

to CPU pin AD2
CPU_VIDPWRGD 10

V CC_VIDGD

1uF 3 2 4 1

1 0

2 D Q98 G S

D G S 3D3V_SYS R904 1K/NC Q120 2N7002

R642

VCC_VID & VIDGD
3D3V_SYS VCCVID 3D3V_SYS 2 R176 L17 COIL-600nH_60MG 1 2 1 R651 1 2 BC139 1uF U14 PG GND EN MIC5258 OUT 4 5 BC135 1uF C280 NA 1 1 2 3 IN 2.43K G

3D3V_SYS

19 18 17 16 15 14 13 2 R654 200K 1

BST

CO

TG

BC660 220pF

SC1211

DRN

U42

R903 2K

PGND VREG VPN VIN BG

9

IPD09N03L R650 1R0 2 1 R674 2 100 1 1nF G BC644 2200pF 16V BC611

12V_VRM R657 2

D Q121 2N7002 S

5

6

7

Q100 IPD04N03L

6,9 PWRGD_VRM_12V BC599 0.1uF 1 2 R677 3.8K/NA

BC591 4700pF

D

S

R658 10K

BC590 4.7uF

D

AUX3

8

VCC_VIDGD Q122 2N7002 S

G

Offset voltage setting
VCCP R661 1 0 2 D25 1N4148 R662 1 0 2 3 4 1 2

BC592 4.7uF 16V VIN

to VRD10 voltage regulator enable pin

B

R124 1 0 2

R824 2K_NA 1

BC597

BC594 4.7uF

BC595 4.7uF

VRD9/VRD10/VRD10.1 Select
VID5 0-4V for VR10 4-7V for VR9 J9 open VRM10/VRD10.1 J9 short VRM9
12V_SYS

B

2

1uF 2 1

R656 1 0 Q102 G S 9 IPD09N03L R659 1R0 2 1 R678 2 100 1 1nF 2 G BC645 2200pF 16V Q104 IPD04N03L S BC612 D 1 2 D

Power/GND Near CPU

BST

CO

TG

SC1211

DRN

U44

PGND VREG VPN VIN BG

3D3V_SYS L18 COIL-600nH_60MG 1 2 R660 1

2 4 6 8

J9 RN74 1K R475 2K 1 2 HEADER_2X1

5

6

7

AUX1 BC601 4.7uF

8

R474 1K 10 10 10 10 10 10 VID0 VID1 VID2 VID3 VID4 VID5 V ID0 V ID1 V ID2 V ID3 V ID4 V ID5

1 3 5 7

R815 1K R816 1K

BC600 4700pF

BC602 4.7uF 16V

A

A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

FOXCONN PCEG
Title Size C Date: Document Number

865A04
Sheet 7 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

3D3V_SYS 12V_SYS

3D3V_SYS BC180 0.1uF BC202 0.1uF R237 62 2 12V_SYS

1

D

D

3 2

4

U40A 1 LM324/SO 1 R236 1K 2 G

Q39 SDB55N03L

D

+ 11

S

BC620 0.01uF

BC621 0.1uF

1

BC205 0.1uF EC61 100uF 16V 1

3

BC214 2.2uF

2

LM431

2

D11

1

R231 604 1% 2

5 6 2 R226 909 1% BC201 0.1uF 1

+ 11

7 LM324/SO 1 R228 1K 2

G S

D

4

1

BC207 1uF

12V_SYS

U40B

Q38 SDB55N03L 1D5V_CORE

BC622 0.1uF

BC623 0.01uF

BC83 0.1uF

EC30 1000uF 6.3V

BC199 4.7uF

BC194 0.1uF

3D3V_SYS

3D3V_SYS EC46 1800uF 16V_NA

+ 2200PF 6.3V

12V_SYS 2 R736 301 1% 1 10 9 D 4 U40C 8 LM324/SO 1 R737 1K 2 G S Q107 SDU3055L2

BC281 0.1uF

2

C

C

EC39 5V_SB_SYS U18 3 VIN Adjust VOUT VOUT 2 4 3D3V_SB

+ 11

BC626 0.01uF

BC627 0.1uF

B

B

1

BC624 0.1uF 1

AIC1086 BC183

1 R225 301 1% 2 1 1 R219 499 1% 2 2

1uF

R738 301 1% 2

12V_SYS

D

4

U40D 14 LM324/SO 1 R740 1K 2 G

Q108 SDU3055L2 2D5V_STR

12 13 2 R739 2.43K 1% BC625 0.1uF 1

+ 11

Vout=Vref(1+R2/R1)+IadjR2 R1 is Up Resister. Iadj=50uA Vref=1.25V

S

+ 1000uF 6.3V_NA

+ 1000uF 6.3V

+ 1000uF 6.3V

+ 1000uF 6.3V

+ 1000uF 6.3V_NA

BC310 0.1uF

A

220uF 10V

EC31

BC628 2.2uF

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

BC629 1uF

EC34

EC37

EC44

EC53

EC57
A

FOXCONN PCEG
Title Size C Date:

Power 2.5V-1.5V-3.3SB
Document Number

865A05
Sheet 8 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

NWD=1.45V PSC=1.2V GMCH VTT Source 1.6A and Sink 600mA
D

12V_SYS

3D3V_SYS

D

6,7 PWRGD_VRM_12V

Q23 2N3904/NA

BC121 0.1uF/NA

BC110 0.1uF/NA

3D3V_SYS

GMCH_VTT

VCCP

1 R174 1K 1%/NA R178 562 1%/NA

D

2

8

U13A LM358/NA 1 5 6

2 4 6 8 RN94 0 1 1 3 5 7 EC24 220uF 10V/NA BC142 4.7uF/NA

8

2 1

4

+ 4

7

1 R163 220/NA 1 2 B

2 E Q30 C 2N2907A/NA

2

-12V_SYS

-12V_SYS

D

1

7

PSC_HI

PSC_HI

D S

G G S

Q24 2N7002/NA 2

B

2

C

S

BC445 1uF/NA 3 + U13B LM358/NA R388 1K/NA G

Q28 SDU3055L2/NA

C

R171 221 1%/NA BC130 0.1uF/NA

B

2D5V_STR

3D3V_SYS

-12V_SYS EC52 U45 1 R287 10K 1% 3 C56 1uF R288 10K 1% VIN VCNTL1 VCNTL2 VCNTL3 VCNTL4 VOUT REFEN GND 5 6 7 8 4 2 EC41 EC54 EC36 EC38 100uF 16V

VTT_DDR

BC122 0.1uF/NA

RT9173A 220uF 10V 220uF 10V 220uF 10V 220uF 10V

A

A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

FOXCONN PCEG
Title

Power DDRVTT-GMCH VTT

Size Document Number Custom Date:

865A05
Sheet 9 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

HOST BUS
HDJ[ 63..0] U16A N22 P21 M24 N23 M26 N26 N25 R21 P24 R25 R24 T26 T25 T22 T23 U26 U24 U23 V25 U21 V22 V24 W26 Y26 W25 Y23 Y24 Y21 AA25 AA22 AA24 E22 K22 R22 W22 F21 J23 P23 W23 D#[33] D#[34] D#[35] D#[36] D#[37] D#[38] D#[39] D#[40] D#[41] D#[42] D#[43] D#[44] D#[45] D#[46] D#[47] D#[48] D#[49] D#[50] D#[51] D#[52] D#[53] D#[54] D#[55] D#[56] D#[57] D#[58] D#[59] D#[60] D#[61] D#[62] D#[63] DSTBN#[0] DSTBN#[1] DSTBN#[2] DSTBN#[3] DSTBP#[0] DSTBP#[1] DSTBP#[2] DSTBP#[3] D#[32] D#[31] D#[30] D#[29] D#[28] D#[27] D#[26] D#[25] D#[24] D#[23] D#[22] D#[21] D#[20] D#[19] D#[18] D#[17] D#[16] D#[15] D#[14] D#[13] D#[12] D#[11] D#[10] D#[09] D#[08] D#[07] D#[06] D#[05] D#[04] D#[03] D#[02] D#[01] D#[0] DP#[3] DP#[2] DP#[1] DP#[0] DBI#[3] DBI#[2] DBI#[1] DBI#[0] M23 H25 K23 J24 L22 M21 H24 G26 L21 D26 F26 E25 F24 F23 G23 E24 H22 D25 J21 D23 C26 H21 G22 B25 C24 C23 B24 D22 C21 A25 A23 B22 B21 L25 K26 K25 J26 V21 P26 G25 E21 HDBI J3 HDBI J2 HDBI J1 HDBI J0 HDBIJ3 HDBIJ2 HDBIJ1 HDBIJ0 12 12 12 12 HDJ[63..0] 12 12

CMD ADDRESS & VID

U16C HADSJ G1 AA3 G2 D2 H6 AE25 H5 E2 H2 F3 E3 G4 J1 K5 J4 J3 H3 F1 G5 F4 AB2 J6 AD2 AD3 AE1 AE2 AE3 AE4 AE5 AF4 AF3 ADS# BINIT# BNR# BPRI# BR0# DBR# DBSY# DEFER# DRDY# HIT# HITM# LOCK# REQ#[0] REQ#[1] REQ#[2] REQ#[3] REQ#[4] RS#[0] RS#[1] RS#[2] RSP# TRDY# VIDPWRGD VID5 VID4 VID3 VID2 VID1 VID0 VCCVID VCCVIDLB A#[35] A#[34] A#[33] A#[32] A#[31] A#[30] A#[29] A#[28] A#[27] A#[26] A#[25] A#[24] A#[23] A#[22] A#[21] A#[20] A#[19] A#[18] A#[17] A#[16] A#[15] A#[14] A#[13] A#[12] A#[11] A#[10] A#[09] A#[08] A#[07] A#[06] A#[05] A#[04] A#[03] AP#[1] AP#[0] ADSTB#[1] ADSTB#[0] AB1 Y1 W2 V3 U4 T5 W1 R6 V2 T4 U3 P6 U1 T2 R3 P4 P3 R2 T1 N5 N4 N2 M1 N1 M4 M3 L2 M6 L3 K1 L6 K4 K2 V5 AC1 R5 L5

H AJ[31..3]

HAJ[31..3]

12

D

HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63

Data group

HDJ32 HDJ31 HDJ30 HDJ29 HDJ28 HDJ27 HDJ26 HDJ25 HDJ24 HDJ23 HDJ22 HDJ21 HDJ20 HDJ19 HDJ18 HDJ17 HDJ16 HDJ15 HDJ14 HDJ13 HDJ12 HDJ11 HDJ10 HDJ9 HDJ8 HDJ7 HDJ6 HDJ5 HDJ4 HDJ3 HDJ2 HDJ1 HDJ0

12 HBNRJ 12 HBPRIJ 12 HBR0J 6,21,27 ICH_SYS_RSTJ 12 HDBSYJ 12 HDEFERJ 12 HDRDYJ 12 HITJ 12 HITMJ 12 HLOCKJ 12 HREQJ[4..0] HR EQJ0 HR EQJ1 HR EQJ2 HR EQJ3 HR EQJ4 12 12 12 12 HRSJ0 HRSJ1 HRSJ2 HTRDYJ

D

VCCVID

7 CPU_VIDPWRGD 7 VID5 7 VID4 7 VID3 7 VID2 7 VID1 7 VID0

V ID5 V ID4 V ID3 V ID2 V ID1 V ID0

HAJ31 HAJ30 HAJ29 HAJ28 HAJ27 HAJ26 HAJ25 HAJ24 HAJ23 HAJ22 HAJ21 HAJ20 HAJ19 HAJ18 HAJ17 HAJ16 HAJ15 HAJ14 HAJ13 HAJ12 HAJ11 HAJ10 HA J9 HA J8 HA J7 HA J6 HA J5 HA J4 HA J3

CMD VID

Address Group

C

12 12 12 12 12 12 12 12

HDSTBNJ0 HDSTBNJ1 HDSTBNJ2 HDSTBNJ3 HDSTBPJ0 HDSTBPJ1 HDSTBPJ2 HDSTBPJ3

BC138 0.1uF A22 A7 AE21 AF24 AF25 RESERVED RESERVED RESERVED RESERVED RESERVED

HADSTBJ1 HADSTBJ0

12 12
C

TEST, ICH5, CLK & THERMAL
U16B HTMS HTCK H TDI HTDO HTRSTJ TESTHI_0 TESTHI_1 TESTHI_2_7
B

PULL UP CIRCUIT
A20M# FERR# IERR# IGNNE# INIT# PWRGOOD SLP# SKTOCC# SMI# STPCLK# MCERR# LINT1 LINT0 C6 B6 AC3 B2 W5 AB23 AB26 AF26 B5 Y4 V6 E5 D1 A20MJ FERRJ IGNNEJ INITJ CPU_PWRG CPUSLPJ SMIJ STPCLKJ NMI INTR 21 21 21 21,24 21 21 21 21 21 21 R275 R221 R222 R276 R223 1 1 1 1 1 2 2 2 2 2 62 62 113 1% 301 1% 200 1% THERMTRIPJ FE RRJ PROCHOTJ CP U_PWRG HBR 0J TESTHI_11 2 GMCH_VTT 1 VCCP 1 GMCH_VTT

TESTHI_8 TESTHI_9 TESTHI_10 TESTHI_11 TESTHI_12 HBPM0J HBPM1J HBPM2J HBPM3J HBPM4_PRDYJ HBPM5_PREQJ

F7 D4 C1 D5 E6 AD24 AA2 AC21 AC20 AC24 AC23 AA20 AB22 U6 W4 Y3 A6 AD25 AC6 AB5 AC4 Y6 AA5 AB4

TMS TCK TDI TDO TRST# TESTHI0 TESTHI1 TESTHI2 TESTHI3 TESTHI4 TESTHI5 TESTHI6 TESTHI7 TESTHI8 TESTHI9 TESTHI10 TESTHI11 TESTHI12 BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5]

R187 1 VCCP

2 62

HCPURSTJ

HOST GTLREF
VCCP 1 3 5 7 R224 200 1% 2 R192 1 R191 1 R207 1 HGTLREF 1 12 R201 1 RN10 2 4 6 8 62 2 62 2 62 2 147 1% 2 681 1% HBPM5_PREQJ HBPM4_PRDYJ HBPM3J HBPM2J HBPM1J HBPM0J H TDI HTRSTJ
B

ICH5

Test

Thermal Clock/Reset

PROCHOT# THERMTRIP# THERMDC THERMDA

C3 A2 C4 B3

PROCHOTJ THERMTRIPJ THERMDC THERMDA

12 21 31 31

R175 200 1%

R220 1 RN8

2 62

ITP_CLK1 ITP_CLK0 BCLK[1] BCLK[0] BSEL1 BSEL0 RESET#

AD26 AC26 AF23 AF22 AD5 AD6 AB25 CK_166M_N_CPU 6 CK_166M_P_CPU 6 BSEL1 BSEL0 HCPURSTJ 6,12 6,12 12

1 3 5 7

2 4 6 8 62 RN11

TESTHI_2_7 TESTHI_12 TESTHI_0

R227 169 1% TESTHI_8 TESTHI_9 TESTHI_10 TESTHI_1 2

BC184 1uF

BC193 220pF VCCP

ITP/TAP Termination

HCOMP0 HCOMP1

L24 P1 AA21 F20 F6 AA6

COMP[0] COMP[1] GTLREF GTLREF GTLREF GTLREF

12

HGTLREF

1 3 5 7

2 4 6 8 62

R196 1 R204 1 R197 1

2 56.2 1% 2 39.2 1% 2 27.4 1%

HTDO HTMS HTCK

R205 1 R200 1

2 61.9 1% 2 61.9 1%

HCOMP1 HCOMP0

ITP USB Support

A

A

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title Size C Date:

Socket 478-1
Document Number

865A05
Sheet 10 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

VCCP

U16D AB11 AB13 B9 AB15 AB17 AB19 AB7 AB9 AC10 AC12 AC14 AC16 AC18 AC8 AD11 AD13 AD15 AD17 AD19 AD7 AD9 AE10 AE12 AE14 AE16 AE18 AE20 AE6 AE8 AF11 AF13 AF15 AF17 AF19 AF2 AF21 AF5 AF7 AF9 B11 B13 B15 B17 B19 B7 C10 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

A16 A14 A12 A10 C12 C14 C16 C18 C20 C8 D11 D13 D15 D17 D19 D7 D9 E10 E12 E14 E16 E18 E20 E8 F11 F13 F15 F17 F19 F9 AA8 AA18

D

VCC VCC VCC VCC VCC VCC VCC

AA16 AA14 AA12 AA10 A8 A20 A18 AD20 AD22 AE23 A4 A5 M2 M22 M25 M5 D10 A11 A13 A15 A17 A19 A21 A24 A26 A3 A9 AA1 AA11 AA13 AA15 AA17 AA19 AA23 AA26 AA4 AA7 AA9 AB12 AB14 AB16 AB18 AB20 AB21 AB24 AB3 AB6 AB8 AC11 AC13 AC15 AC17 AC19 AC2 AC22 AC25 AC5 AC7 AC9 AD1 AD10 AD12 AB10 L4 AD14 AD16 AD18 AD21 AD23 AD4 AD8 AE11 AE13 AE15 AE17 AE19 AE22 AE24 AE26 AE7 AE9 AF1 AF10 AF12 AF14 AF16 AF18 AF20 AF6 AF8 B10 B12 B14 B16 B18 B20 B23 B26 B4 B8 C11 C13 C15 C17 HVC CA HVSSA HVCCIOPLL TP38 TP39

VCCP

D

1

L9 10uH

1 L10 10uH BC132 10uF 2 BC133 10uF

VCCA VSSA VCCIOPLL VSSSENSE VCCSENSE VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HVCCIOPLL HVC CA

HVSSA

C

2

C

VCCP

B

L26 L23 L1 K6 K3 K24 K21 J5 G6 G24 J25 J22 J2 H4 H26 H23 H1 G3 G21 F8 F5 F25 F22 F2 F18 F16 F14 F12 F10 E9 E19 E23 E26 E7 E4 E17 Y5 Y25 Y22 Y2 W6 W3 W24 W21 V4 V26 V23 V1 U5 U25 U22 C5 C25 C22 C2 C19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

TC2

TC3

3

1

3

1

3

1

3

1

3

1

3

1

3

1

3

1

3

1

3 2

EC12

2

2

2

2

2

2

2

2

2

BOOTSELECT

BOOTSELECT 7

2200uF 6.3V

EC14 2200uF 6.3V

EC13 2200uF 6.3V

EC19 2200uF 6.3V

EC10 2200uF 6.3V

EC15 EC17 2200uF 6.3V 2200uF 6.3V

EC16 2200uF 6.3V

EC18 2200uF 6.3V

EC11 2200uF 6.3V

1

100uF 2V_NA

100uF 2V_NA

VCCP

B

BC103

BC104

BC105

BC106

BC107

BC114

BC115

BC116

BC117

BC118

BC161

BC153

BC192

BC185

BC190

BC151

BC191

BC188

BC152

BC187

BC159

BC160

BC189

BC186

BC154

BC123

BC156

BC157

BC126

BC124

BC166

BC125

BC162

BC167

BC127

BC95 2.2uF_NA

BC96 2.2uF

BC97 2.2uF

BC98 2.2uF_NA

BC99 2.2uF_NA

22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF_NA

22uF_NA

22uF_NA

22uF_NA

2.2uF

2.2uF_NA

2.2uF_NA

2.2uF_NA

2.2uF_NA

2.2uF_NA

2.2uF_NA

2.2uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

1uF_NA

A

N6 U2 T6 T3 T24 T21 R4 R26 R23 R1 P5 P25 P22 P2 N3 N24 N21 E15 E13 E11 E1 D8 D6 D3 D24 D21 D20 D18 D16 D14 D12 C9 C7

A

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

FOXCONN PCEG
Title Size C Date:

Socket 478-2
Document Number

865A05
Sheet 11 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

U17D 19 19 19 19
D

GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 GFRAMEJ CK_66M_GMCH GDEVSELJ GIRDYJ GTRDYJ GSTOPJ GPAR GREQJ GGNTJ

GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 GFRAMEJ GDEVSELJ GIRDYJ GTRD YJ GSTOPJ GPAR GREQJ GGNTJ GRCOMP

Y7 W5 AA3 U2 U6 H4 AB4 V11 AB5 W11 AB2 N6 M7 AC2 AC3 AD2 R10 R9 M4 M5

GCBE0 GCBE1 GCBE2 GCBE3 GFRAME GCLKIN GDEVSEL GIRDY GTRDY GSTOP GPAR/ADD_DETECT GREQ GGNT

GADSTBF0 GADSTBS0 GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GADSTBF1 GADSTBS1 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 GSBSTBF GSBSTBS GSBA0# GSBA1# GSBA2# GSBA3# GSBA4# GSBA5# GSBA6# GSBA7# DDCA_DATA DDCA_CLK RED RED# GREEN GREEN# BLUE BLUE# HSYNC VSYNC REFSET NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20

AC6 AC5 AE6 AC11 AD5 AE5 AA10 AC9 AB11 AB7 AA9 AA6 AA5 W10 AA11 W6 W9 V7 V4 V5 AA2 Y4 Y2 W2 Y5 V2 W3 U3 T2 T4 T5 R2 P2 P5 P4 M2 U11 T11 R6 P7 R3 R5 U9 U10 U5 T7 H3 F2 F4 E4 H6 G5 H7 G6 G3 E2 D2 A3 A33 A35 AF13 AF23 AJ12 AN1 AP2 AR3 AR33 AR35 B2 B25 B34 C1 C23 C35 E26 M31 R25

AD_STB0 AD_STB0J GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 AD_STB1 AD_STB1J GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 SB_STB SB_STBJ SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DDCA_DATA D DCA_CLK

AD_STB0 AD_STB0J

19 19 GAD[31..0]

19

10 HAJ[31..3] HA J3 HA J4 HA J5 HA J6 HA J7 HA J8 HA J9 HAJ10 HAJ11 HAJ12 HAJ13 HAJ14 HAJ15 HAJ16 HAJ17 HAJ18 HAJ19 HAJ20 HAJ21 HAJ22 HAJ23 HAJ24 HAJ25 HAJ26 HAJ27 HAJ28 HAJ29 HAJ30 HAJ31 10 HREQJ[4..0] HR EQJ0 HR EQJ1 HR EQJ2 HR EQJ3 HR EQJ4 HADSTBJ0 HADSTBJ1 D26 D30 L23 E29 B32 K23 C30 C31 J25 B31 E30 B33 J24 F25 D34 C32 F28 C34 J27 G27 F29 E28 H27 K24 E32 F31 G30 J26 G26 B29 J23 L22 C29 J21 B30 D28 B7 C7 B19 C19 C17 L19 K19 L17 G9 F9 L14 D12 E12 C15 F27 D24 G24 L21 E23 K21 E25 B24 B28 B26 E27 G22 C27 B27 E8 AE14 E24 C25 F23

U17A HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HADSTB0# HADSTB1# HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# B23 E22 B21 D20 B22 D22 B20 C21 E18 E20 B16 D16 B18 B17 E16 D18 G20 F17 E19 F19 J17 L18 G16 G18 F21 F15 E15 E21 J19 G14 E17 K17 J15 L16 J13 F13 F11 E13 K15 G12 G10 L15 E11 K13 J11 H10 G8 E9 B13 E14 B14 B12 B15 D14 C13 B11 D10 C11 E10 B10 C9 B9 D8 B8 L20 L13 L12 HDJ0 HDJ1 HDJ2 HDJ3 HDJ4 HDJ5 HDJ6 HDJ7 HDJ8 HDJ9 HDJ10 HDJ11 HDJ12 HDJ13 HDJ14 HDJ15 HDJ16 HDJ17 HDJ18 HDJ19 HDJ20 HDJ21 HDJ22 HDJ23 HDJ24 HDJ25 HDJ26 HDJ27 HDJ28 HDJ29 HDJ30 HDJ31 HDJ32 HDJ33 HDJ34 HDJ35 HDJ36 HDJ37 HDJ38 HDJ39 HDJ40 HDJ41 HDJ42 HDJ43 HDJ44 HDJ45 HDJ46 HDJ47 HDJ48 HDJ49 HDJ50 HDJ51 HDJ52 HDJ53 HDJ54 HDJ55 HDJ56 HDJ57 HDJ58 HDJ59 HDJ60 HDJ61 HDJ62 HDJ63

HDJ[ 63..0]

HDJ[63..0]

10

GSWING_GMCH AGPREF_GMCH

19 6 19 19 19 19 19 19 19

D

AGP

BC158 0.01uF BC163 0.1uF

BC164 0.01uF BC155 0.1uF

1D5V_CORE

19 GSWING_GMCH 19 AGPREF_GMCH 19 19 19 19 19 19 19 21 ST0 ST1 ST2 HI[10..0] RBFJ WBFJ PIPEJ DBI_LO ST0 ST1 ST2 H I0 H I1 H I2 H I3 H I4 H I5 H I6 H I7 H I8 H I9 HI 10 HI_STBF HI_STBS HI_RCOMP_MCH H I_VSWING H I_VREF BC169 0.01uF

GRCOMP GVSWING GVREF GRBF GWBF DBI_HI DBI_LO GST0 GST1 GST2 HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10 HISTRF HISTRS

R214 226 1% 2

AD_STB1 AD_STB1J

19 19

1

GAD[31..0]

19

0.8V
BC174 0.1uF

WI SWING_SPD R210 147 1%

N3 N5 N2 AF5 AG3 AK2 AG5 AK5 AL3 AL2 AL4 AJ2 AH2 AJ3 AH5 AH4 AD4 AE3 AE2 AK7 AH7 AD11 AF7 AD7 AC10 AF8 AG7 AE9 AH9 AG6 AJ6 AJ5

1

BC172 0.01uF

HUB

2

H I_VSWING H I_VREF

BC177 0.01uF

BC181 0.01uF

0.35V
1 BC170 0.1uF

WIVREF_SPD R208 113 1% 2

21 HI_STBF 21 HI_STBS

C

10 10

HI_RCOMP HI_SWING HI_VREF CI0 CI1 CI2 CI3 CI4 CI5 CI6 CI7 CI8 CI9 CI10 CISTRF CISTRS

SB_STB SB_STBJ SBA[7..0]

19 19 19

C

6 CK_166M_P_GMCH 6 CK_166M_N_GMCH 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 HDSTBPJ0 HDSTBNJ0 HDBIJ0 HDSTBPJ1 HDSTBNJ1 HDBIJ1 HDSTBPJ2 HDSTBNJ2 HDBIJ2 HDSTBPJ3 HDSTBNJ3 HDBIJ3 HADSJ HTRDYJ HDRDYJ HDEFERJ HITMJ HITJ HLOCKJ HBR0J HBNRJ HBPRIJ HDBSYJ HRSJ0 HRSJ1 HRSJ2 HCPURSTJ

HCLKP HCLKN HDSTBP0# HDSTBN0# DINV0# HDSTBP1# HDSTBN1# DINV1# HDSTBP2# HDSTBN2# DINV2# HDSTBP3# HDSTBN3# DINV3# ADS# HTRDY# DRDY# DEFER# HITM# HIT# HLOCK# BREQ0# BNR# BPRI# DBSY# RS0# RS1# RS2# CPURST# PWROK# HDRCOMP HDSWING HDVREF

HDBI J0 HDBI J1 HDBI J2 HDBI J3

FSB

VGA

CSA

DDCA_DATA DDCA_CLK RED GREEN BLUE HSYNC VSYNC

20 20 20 20 20 20 20

1D5V_CORE

R218 1

2 52.3 1% WI SWING_SPD WIVREF_SPD 6 CK_48M_GMCH TP46 TP28 EXTTSJ ICH _SYNCJ RESERVED_1 RESERVEDJ2

AG2 AF2 AF4 G4 AP8 AJ8 AK4 AG10 AG9 AN35 AP34 AR1

CI_RCOMP CI_SWING CI_VREF DREFCLK EXTTS# ICH_SYNC# RSTIN# RESERVED_1 RESERVED_2 RESERVED_3 RESERVED_4 RESERVED_5

BSEL0 BSEL1 1 1

6,10 6,10

6,19,23,24,28,29,30,31,37,39 ICH_H_PCIRESTJ

1 R179 124 1% 2

1

1 2 R153 75 1%_NA R154 75 1%_NA

1D5V_CORE
R202 1 2 51.1 1% 2 43.2 1% HI_RCOMP_MCH GRCOMP

TP29 TP47

PROCHOT# BSEL0 BSEL1

PROCHOTJ

10 2

2

2

R181 2K 1% 2

R182 2K 1%

1 R155 75 1%_NA

PWRGD_3VG HD_S WING HGTLREF 2

R199 1 1 R180 2.49K 1% 2 2 1 R186 2.49K 1%

Springdale-GMCH 1 2 3 4 5 6 7 8 POST1 POST2 POST3 POST4 POST5 POST6 POST7 POST8

B

B

10

HGTLREF

R203 BC168 0.1uF

Springdale-GMCH

20 1% 1 3D3V_SB

U53 GMCH_VTT 21,24,27 PWRGD_3V 21,31 SLP_S3J 1 1 2 B A

5

1D5V_CORE
Y 4 PWRGD_3VG

VCC GND

3

74LVC1G08_NA R184 301 1% HD_S WING 1 0

R812 2

R183 100 1% 2

A

2

BC141 0.1uF

Pin Name Pin # Decouping cap VTTFSB A15 0.22uF VTTFSB A21 0.47uF VCC_DDR E35 0.47uF VCC_DDR R35 0.22uF VCCA_DDR AL35 0.1uF VCCA_DDR AA35 0.1uF VCC_DDR AR31 0.1uf VCC_DDR AR21 0.22uF VCC_DDR AR15 0.1uF VCC_AGP AG1 0.1uF VCC_AGP Y1 0.1uF BaseOn Intel WW29 Update

1 R270 226 1% 2

2

HI_VSWING 1 R267 147 1%

21

1

BC248 0.1uF
A

HI_VREF 1 R266 113 1% 2

21

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

BC237 0.1uF

FOXCONN PCEG
Title Size C Date:

GMCH-1
Document Number

865A05
Sheet 12 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

U17B 15,16 M_MAA_A[12..0] M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_MAA_A11 M_MAA_A12 AJ34 AL33 AK29 AN31 AL30 AL26 AL28 AN25 AP26 AP24 AJ33 AN23 AN21 AL34 AM34 AP32 AP31 AM26 15,16 15,16 15,16 15,16 M_WE_AJ M_CAS_AJ M_RAS_AJ M_BS_A[1..0] AB34 Y34 AC33 M_BS_A0 M_BS_A1 AE33 AH34 AA34 Y31 Y32 W34 15,16 M_SCKE_A0 15,16 M_SCKE_A1 M_SCKE_A0 M_SCKE_A1 AL20 AN19 AM20 AP20 AK32 AK31 AP17 AN17 N33 N34 AK33 AK34 AM16 AL16 P31 P32 GMCH_VREF_A SMXRCOMP SMXRCOMPVOH SMXRCOMPVOL E34 AK9 AN9 AL9 SMAA_A0 SMAA_A1 SMAA_A2 SMAA_A3 SMAA_A4 SMAA_A5 SMAA_A6 SMAA_A7 SMAA_A8 SMAA_A9 SMAA_A10 SMAA_A11 SMAA_A12 SMAB_A1 SMAB_A2 SMAB_A3 SMAB_A4 SMAB_A5 SWE_A# SCAS_A# SRAS_A# SBA_A0 SBA_A1 SCS_A0# SCS_A1# SCS_A2# SCS_A3# SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3 SDQS_A0 SDM_A0 SDQ_A0 SDQ_A1 SDQ_A2 SDQ_A3 SDQ_A4 SDQ_A5 SDQ_A6 SDQ_A7 SDQS_A1 SDM_A1 SDQ_A8 SDQ_A9 SDQ_A10 SDQ_A11 SDQ_A12 SDQ_A13 SDQ_A14 SDQ_A15 SDQS_A2 SDM_A2 SDQ_A16 SDQ_A17 SDQ_A18 SDQ_A19 SDQ_A20 SDQ_A21 SDQ_A22 SDQ_A23 SDQS_A3 SDM_A3 SDQ_A24 SDQ_A25 SDQ_A26 SDQ_A27 SDQ_A28 SDQ_A29 SDQ_A30 SDQ_A31 SDQS_A4 SDM_A4 SDQ_A32 SDQ_A33 SDQ_A34 SDQ_A35 SDQ_A36 SDQ_A37 SDQ_A38 SDQ_A39 SDQS_A5 SDM_A5 SDQ_A40 SDQ_A41 SDQ_A42 SDQ_A43 SDQ_A44 SDQ_A45 SDQ_A46 SDQ_A47 SDQS_A6 SDM_A6 SDQ_A48 SDQ_A49 SDQ_A50 SDQ_A51 SDQ_A52 SDQ_A53 SDQ_A54 SDQ_A55 SDQS_A7 SDM_A7 SDQ_A56 SDQ_A57 SDQ_A58 SDQ_A59 SDQ_A60 SDQ_A61 SDQ_A62 SDQ_A63 AN11 AP12 AP10 AP11 AM12 AN13 AM10 AL10 AL12 AP13 AP15 AP16 AP14 AM14 AL18 AP19 AL14 AN15 AP18 AM18 AP23 AM24 AP22 AM22 AL24 AN27 AP21 AL22 AP25 AP27 AM30 AP30 AP28 AP29 AP33 AM33 AM28 AN29 AM31 AN34 AF34 AF31 AH32 AG34 AF32 AD32 AH31 AG33 AE34 AD34 V34 W33 AC34 AB31 V32 V31 AD31 AB32 U34 U33 M32 M34 T34 T32 K34 K32 T31 P34 L34 L33 H31 H32 J33 H34 E33 F33 K31 J34 G34 F34 M_DQS_A0 M_DQM_A0 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DQS_A1 M_DQM_A1 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DQS_A2 M_DQM_A2 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DQS_A3 M_DQM_A3 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DQS_A4 M_DQM_A4 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DQS_A5 M_DQM_A5 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DQS_A6 M_DQM_A6 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DQS_A7 M_DQM_A7 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63 M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

U17C 17,18 M_MAA_B[12..0] M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_MAA_B11 M_MAA_B12 AG31 AJ31 AD27 AE24 AK27 AG25 AL25 AF21 AL23 AJ22 AF29 AL21 AJ20 AE27 AD26 AL29 AL27 AE23 17,18 M_WE_BJ 17,18 M_CAS_BJ 17,18 M_RAS_BJ 17,18 M_BS_B[1..0] M_BS_B0 M_BS_B1 W27 W31 W26 Y25 AA25 U26 T29 V25 W25 17,18 M_SCKE_B0 17,18 M_SCKE_B1 M_SCKE_B0 M_SCKE_B1 AK19 AF19 AG19 AE18 AG29 AG30 AF17 AG17 N27 N26 AJ30 AH29 AK15 AL15 N31 N30 AP9 AA33 R34 R33 SMAA_B0 SMAA_B1 SMAA_B2 SMAA_B3 SMAA_B4 SMAA_B5 SMAA_B6 SMAA_B7 SMAA_B8 SMAA_B9 SMAA_B10 SMAA_B11 SMAA_B12 SMAB_B1 SMAB_B2 SMAB_B3 SMAB_B4 SMAB_B5 SWE_B# SCAS_B# SRAS_B# SBA_B0 SBA_B1 SCS_B0# SCS_B1# SCS_B2# SCS_B3# SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3 SCMDCLK_B0 SCMDCLK_B0# SCMDCLK_B1 SCMDCLK_B1# SCMDCLK_B2 SCMDCLK_B2# SCMDCLK_B3 SCMDCLK_B3# SCMDCLK_B4 SCMDCLK_B4# SCMDCLK_B5 SCMDCLK_B5# SMVREF_B SMYRCOMP SMYRCOMPVOH SMYRCOMPVOL SDQS_B0 SDM_B0 SDQ_B0 SDQ_B1 SDQ_B2 SDQ_B3 SDQ_B4 SDQ_B5 SDQ_B6 SDQ_B7 SDQS_B1 SDM_B1 SDQ_B8 SDQ_B9 SDQ_B10 SDQ_B11 SDQ_B12 SDQ_B13 SDQ_B14 SDQ_B15 SDQS_B2 SDM_B2 SDQ_B16 SDQ_B17 SDQ_B18 SDQ_B19 SDQ_B20 SDQ_B21 SDQ_B22 SDQ_B23 SDQS_B3 SDM_B3 SDQ_B24 SDQ_B25 SDQ_B26 SDQ_B27 SDQ_B28 SDQ_B29 SDQ_B30 SDQ_B31 SDQS_B4 SDM_B4 SDQ_B32 SDQ_B33 SDQ_B34 SDQ_B35 SDQ_B36 SDQ_B37 SDQ_B38 SDQ_B39 SDQS_B5 SDM_B5 SDQ_B40 SDQ_B41 SDQ_B42 SDQ_B43 SDQ_B44 SDQ_B45 SDQ_B46 SDQ_B47 SDQS_B6 SDM_B6 SDQ_B48 SDQ_B49 SDQ_B50 SDQ_B51 SDQ_B52 SDQ_B53 SDQ_B54 SDQ_B55 SDQS_B7 SDM_B7 SDQ_B56 SDQ_B57 SDQ_B58 SDQ_B59 SDQ_B60 SDQ_B61 SDQ_B62 SDQ_B63 AF15 AG11 AJ10 AE15 AL11 AE16 AL8 AF12 AK11 AG12 AG13 AG15 AE17 AL13 AK17 AL17 AK13 AJ14 AJ16 AJ18 AG21 AE21 AE19 AE20 AG23 AK23 AL19 AK21 AJ24 AE22 AH27 AJ28 AK25 AH26 AG27 AF27 AJ26 AJ27 AD25 AF28 AD29 AC31 AE30 AC27 AC30 Y29 AE31 AB29 AA26 AA27 U30 U31 AA30 W30 U27 T25 AA31 V29 U25 R27 L27 M29 P29 R30 K28 L30 R31 R26 P25 L32 J30 J31 K30 H29 F32 G33 N25 M25 J29 G32 M_DQS_B0 M_DQM_B0 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DQS_B1 M_DQM_B1 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DQS_B2 M_DQM_B2 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DQS_B3 M_DQM_B3 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DQS_B4 M_DQM_B4 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DQS_B5 M_DQM_B5 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DQS_B6 M_DQM_B6 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DQS_B7 M_DQM_B7 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63 M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

D

D

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

DDR Channel A

DDR Channel B

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

15,16 M_SCS_A0J 15,16 M_SCS_A1J

17,18 M_SCS_B0J 17,18 M_SCS_B1J

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

C

15 15 15 15 15 15

CK_M_133M_P_DDR0_A CK_M_133M_N_DDR0_A CK_M_133M_P_DDR1_A CK_M_133M_N_DDR1_A CK_M_133M_P_DDR2_A CK_M_133M_N_DDR2_A

SCMDCLK_A0 SCMDCLK_A0# SCMDCLK_A1 SCMDCLK_A1# SCMDCLK_A2 SCMDCLK_A2# SCMDCLK_A3 SCMDCLK_A3# SCMDCLK_A4 SCMDCLK_A4# SCMDCLK_A5 SCMDCLK_A5# SMVREF_A SMXRCOMP SMXRCOMPVOH SMXRCOMPVOL

17 17 17 17 17 17

CK_M_133M_P_DDR0_B CK_M_133M_N_DDR0_B CK_M_133M_P_DDR1_B CK_M_133M_N_DDR1_B CK_M_133M_P_DDR2_B CK_M_133M_N_DDR2_B

C

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16 GMCH_VREF_B SMYRCOMP SMYRCOMPVOH SMYRCOMPVOL M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

Springdale-GMCH
B

M_DQS_A[7..0] 15,16 M_DQM_A[7..0] 15,16 M_DATA_A[63..0] 15,16

Subject: New DDR Tuning Requirement > The following are the updated DDR tuning guidelines for DQ/DQM to DQS. DQ > & DQM is matched to DQS in EACH byte lane: > From GMCH pad to DIMM-0 pin +/-25mils. > From GMCH pad to DIMM-1 pin +/-25mils. > From DIMM-1 pin to Rtt no tuning required. Form Intel WW32 update

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

Springdale-GMCH

B

M_DQS_B[7..0] 17,18 M_DQM_B[7..0] 17,18 M_DATA_B[63..0] 17,18

2D5V_STR

2D5V_STR

2D5V_STR V_SMYRCOMP V_SMYRCOMPVO V_SMYRCOMPVO 2D5V_STR

1

1

1

1

1

1

R234 42.2 1% R248 10K 1% 2

R229 10K 1%

R233 30.1K 1%

1 R257 150 1% SMYRCOMPVOL 1 2

R259 42.2 1% 42.2 1%

R247 30.1K 1%

2

2

2

2

SMYRCOMP SMXRCOMPVOH GMCH_VREF_A 1 1 R241 42.2 1% R230 30.1K 1%

SMYRCOMPVOH 1

2

GMCH_VREF_B

SMXRCOMP 1 1

SMXRCOMPVOL 1

R232 10K 1% BC607 0.01uF BC195 1uF BC608 0.01uF BC200 1uF

R258 150 1% BC230 2.2uF BC182 0.1uF
A

R260
A

R252 10K 1% BC609 0.01uF BC215 1uF

R253 30.1K 1% BC610 0.01uF BC217 1uF BC176 2.2uF BC175 0.1uF 2

2

2

2

2

2

2

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title Size C Date:

GMCH-2
Document Number

865A05
Sheet 13 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

GMCH_VTT U17E VCCP_DCAP1 VCCP_DCAP2 A15 A21 A4 A5 A6 B5 B6 C5 C6 D5 D6 D7 E6 E7 F7 AA35 AL6 AL7 AM1 AM2 AM3 AM5 AM6 AM7 AM8 AN2 AN4 AN5 AN6 AN7 AN8 AP3 AP4 AP5 AP6 AP7 AR15 AR21 AR31 AR4 AR5 AR7 E35 R35 G1 G2 AG1 Y11 A31 B4 B3 C2 AL35 AB25 AC25 AC26 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DDR VCC_DAC VCC_DAC VCCA_AGP VCCA_AGP VCCA_FSB VCCA_FSB VCCA_DPLL VCCA_DAC VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR Springdale-GMCH VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VCC_AGP VSSA_DAC J6 J7 J8 J9 K6 K7 K8 K9 L6 L7 L9 L10 L11 M8 M9 M10 M11 N9 N10 N11 P10 P11 R11 T16 T17 T18 T19 T20 U16 U17 U20 V16 V18 V20 W16 W19 W20 Y16 Y17 Y18 Y19 Y20 J1 J2 J3 J4 J5 K2 K3 K4 K5 L1 L2 L3 L4 L5 Y1 D3

1D5V_CORE U17F AR32 AR29 AR27 AR25 AR23 AR20 AR16 AR13 AR11 AR9 AN32 AN30 AN28 AN26 AN24 AN22 AN20 AN18 AN16 AN14 AN12 AN10 AM35 AM29 AM27 AM25 AM23 AM21 AM19 AM17 AM15 AM13 AM11 AM9 AL32 AL1 AK28 AK26 AK24 AK22 AK20 AK18 AK16 AK14 AK12 AK10 AK8 AK3 AJ35 AJ32 AJ9 AJ4 AJ1 AH33 AH30 AH24 AH22 AH20 AH18 AH16 AH14 AH12 AH10 AH6 AH3 AG35 AG32 AG28 AG26 AG24 AG22 AG20 AG18 AG16 AG14 AG8 AG4 AF33 AF30 AF25 AF24 AF22 AF20 AF18 AF16 AF14 AF11 AF9 AF6 AF3 AE35 AE32 AE26 AE25 AE13 AE12 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AE11 AE10 AE4 AE1 AD33 AD30 AD28 AD10 AD9 AD8 AD6 AD3 AC35 AC32 AC4 AC1 AB33 AB30 AB28 AB27 AB26 AB10 AB9 AB8 AB6 AB3 AA32 AA4 AA1 Y35 Y33 Y30 Y28 Y27 Y26 Y10 Y9 Y8 Y6 Y3 W32 W18 W17 W4 V33 V30 V28 V27 V26 V19 V17 V10 V9 V8 V6 V3 U32 U19 U18 U4 T35 T33 T30 T28 T27 T26 T10 T9 T8 T6 T3 T1 R32 R4 R1 P33 P30 P28 P27 P26 P9 P8 P6 P3 N35 N32 N4 N1 M33 M30 M28 M27 M26 M6 M3 L35 L31 L26 L25 L24 K33 K29 K27 K25 K22 K20 K18 K16 K14 K12 K11 J35 J32 J28 J22 J20 J18 J16 J14 J12 J10 H33 H30 H26 H24 H22 H20 H18 H16 H14 H12 H9 H8 H5 H2 G35 G31 G28 F26 F24 F22 F20 F18 U17G VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS F16 F14 F12 F10 F8 F5 F3 F1 E3 E1 D35 D33 D31 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D9 D1 C28 C26 C24 C22 C20 C18 C16 C14 C12 C10 C8 C4 A32 A29 A27 A25 A23 A20 A16 A13 A11 A9 A7

D

D

V_SMYRCOMPVO

V_SMYRCOMP V_SMYRCOMP 2D5V_STR

V2P5_DCAP5 V2P5_DCAP4 V_SMYRCOMPVO

POWER

V2P5_DCAP1

C

3D3V_SYS 1D5V_CORE VCORE_DCAP1 VCCP_DCAP3 V_1P5_VCCA_FSB VCCA_DPLL V_1P7_DAC V2P5_DCAP2 V_1P5_VCCA_SM

GND

GND

C53 0.22uF 1D5V_CORE BC148 10uF

C54 0.1uF 2D5V_STR GMCH_VTT EC42 + 1000uF 6.3V EC35 + BC144 1000uF 6.3V_NA BC229 4.7uF BC226 10uF

C

VCORE_DCAP2

Springdale-GMCH

BC134

BC147

BC137

B

3D3V_SYS

0.1uF

4.7uF

1uF

0.47uF

B

BC136 0.1uF

Springdale-GMCH

1D5V_CORE 1D5V_CORE

1D5V_CORE

1D5V_CORE 1

R151 1 2

VCORE_DCAP1 VCORE_DCAP2 VCCP_DCAP1 VCCP_DCAP2 VCCP_DCAP3 V2P5_DCAP2 V2P5_DCAP5 V2P5_DCAP4 V2P5_DCAP1

L7

0.1uH

L5 0.82uH

L8 1uH

L6

0.1uH

V_1P7_DAC

V_1P5_VCCA_FSB

V_1P5_VCCA_SM

VCCA_DPLL

1

1

1

1

A

Subject: GMCH Vtt VR Clarification The GMCH VTT regulator is required to be capable of sinking 600mA of current in addition to sourcing 1.6A of current in normal operation. Sinking 600mA of current is a new requirement for the Springdale platform regardless if a Northwood or Prescott processor is installed. The reason why the GMCH VTT VR must be able to sink 600mA is because there will be times when the GMCH VTT VR's output will be set to a voltage lower than the VRD 10's output. The difference in voltage will cause current to be driven from the VRD to the GMCH VTT regulator. If the GMCH VTT VR doesn't have the capability to sink the current, damage to the GMCH can occur. In order to meet this requirement, Intel is using a P-FET in an SOT-23 footprint on the GMCH VTT voltage regulator. The back driven current will be sunk into the ground plane through this P-FET without causing damage to the Springdale GMCH. Update from Intel WW34 MOV

C50 0.47uF

C52 0.22uF

C51 0.1uF

C55 0.1uF

C49 0.1uF

C47 0.47uF

C45 0.47uF

C46 0.47uF

C48 0.47uF

A

EC22 470uF 6.3V

EC23 100uF 16V

EC21 100uF 16V

EC25 100uF 16V

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

BC113 0.01uF

BC112 0.1uF

BC120 0.1uF

BC111 0.1uF

BC109 0.1uF

2

2

2

2

FOXCONN PCEG
Title Size C Date:

Springdale-GMCH-3
Document Number

865A05
Sheet 14 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

13,16 M_MAA_A[12..0]
D

M_MAA_A0 M_MAA_A1 M_MAA_A2 M_MAA_A3 M_MAA_A4 M_MAA_A5 M_MAA_A6 M_MAA_A7 M_MAA_A8 M_MAA_A9 M_MAA_A10 M_BS_A0 M_BS_A1 M_MAA_A11 M_MAA_A12 M_DATA_A0 M_DATA_A1 M_DATA_A2 M_DATA_A3 M_DATA_A4 M_DATA_A5 M_DATA_A6 M_DATA_A7 M_DATA_A8 M_DATA_A9 M_DATA_A10 M_DATA_A11 M_DATA_A12 M_DATA_A13 M_DATA_A14 M_DATA_A15 M_DATA_A16 M_DATA_A17 M_DATA_A18 M_DATA_A19 M_DATA_A20 M_DATA_A21 M_DATA_A22 M_DATA_A23 M_DATA_A24 M_DATA_A25 M_DATA_A26 M_DATA_A27 M_DATA_A28 M_DATA_A29 M_DATA_A30 M_DATA_A31 M_DATA_A32 M_DATA_A33 M_DATA_A34 M_DATA_A35 M_DATA_A36 M_DATA_A37 M_DATA_A38 M_DATA_A39 M_DATA_A40 M_DATA_A41 M_DATA_A42 M_DATA_A43 M_DATA_A44 M_DATA_A45 M_DATA_A46 M_DATA_A47 M_DATA_A48 M_DATA_A49 M_DATA_A50 M_DATA_A51 M_DATA_A52 M_DATA_A53 M_DATA_A54 M_DATA_A55 M_DATA_A56 M_DATA_A57 M_DATA_A58 M_DATA_A59 M_DATA_A60 M_DATA_A61 M_DATA_A62 M_DATA_A63

CN18 48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE DDR333_DIMM /CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC 157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173 M_SCKE_A0 M_SCKE_A1 M_DQS_A0 M_DQS_A1 M_DQS_A2 M_DQS_A3 M_DQS_A4 M_DQS_A5 M_DQS_A6 M_DQS_A7 M_DQM_A0 M_DQM_A1 M_DQM_A2 M_DQM_A3 M_DQM_A4 M_DQM_A5 M_DQM_A6 M_DQM_A7 M_SCS_A0J M_SCS_A1J M_SCKE_A0 M_SCKE_A1 13,16 13,16 13,16 13,16
D

13,16 M_BS_A[1..0] 13,16 M_MAA_A[12..0] 13,16 M_DATA_A[63..0]

M_DQS_A[7..0] 13,16

M_DQM_A[7..0] 13,16 CK_M_133M_P_DDR0_A 13 CK_M_133M_N_DDR0_A 13 CK_M_133M_P_DDR1_A 13 CK_M_133M_N_DDR1_A 13 CK_M_133M_P_DDR2_A 13 CK_M_133M_N_DDR2_A 13 SMB_CLK_MAIN 6,17,32 SMB_DATA_MAIN 6,17,32

SMB_CLK_MAIN SMB_DATA_MAIN

C

C

2D5V_STR

2D5V_STR SMVREF_A 1 R311 75 1% 2

SMVREF_A 1 R309 75 1% 2

BC261 0.1uF

BC264 0.1uF
B

B

2D5V_STR

13,16 M_RAS_AJ 13,16 M_CAS_AJ 13,16 M_WE_AJ

A

A

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title

DDR Channel A DIMM

Size Document Number Custom Date:

865A05
Sheet 15 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

VTT_DDR RN14 1 3 5 7 2 4 6 8 56 RN15 1 3 5 7
D

M_DATA_A0 M_DATA_A4 M_DATA_A5 M_DATA_A1

M_DATA_A[63..0] 13,15

2 4 6 8 56 RN16

M_DQS_A0 M_DQM_A0 M_DATA_A2 M_DATA_A6

Updated DDR Termination Resistor (Rtt) Values The recommended termination resistor (Rtt) value for DQ/DQM/DQS is changed to 56 ohms.The previous recommendation was 110 ohms. Form Intel FAE WW32

M_MAA_A[12..0] 13,15 M_BS_A[1..0] 13,15

M_DQM_A[7..0] 13,15 M_DQS_A[7..0] 13,15

D

1 3 5 7

2 4 6 8 56 RN17

M_DATA_A9 M_DATA_A7 M_DATA_A3 M_DATA_A8

1 3 5 7

2 4 6 8 56 RN18

M_DATA_A12 M_DQS_A1 M_DATA_A13 M_DQM_A1

1 3 5 7

2 4 6 8 56 RN20

M_DATA_A14 M_DATA_A15 M_DATA_A10 M_DATA_A11 VTT_DDR

1 3 5 7

2 4 6 8 56

M_DATA_A20 M_DATA_A16 M_DATA_A17 M_DATA_A21

R305 1 R306 1

2 47 M_DQM_A5 2 56.2 1% 2 47 2 47 2 47 2 2 2 2 RN33 1 3 5 7 2 4 6 8 47 RN28 1 3 5 7 2 4 6 8 47 M_MAA_A0 M_MAA_A10 M_BS_A1 47 47 47 47 M_BS_A0 M_MAA_A6 M_MAA_A9 M_MAA_A11 M_MAA_A12

M_SCS_A0J

13,15

R576 R577 R578 R579

1 1 1 1

2 2 2 2

56 56 56 56

M_DQS_A2 M_DQM_A2 M_DATA_A18 M_DATA_A22

2D5V_STR

R303 1 R304 1 R302 1 R301 R300 R299 R298 1 1 1 1

M_RAS_AJ M_WE_AJ

13,15 13,15

C

R580 R581 R582 R583

1 1 1 1 RN24 1 3 5 7

2 2 2 2

56 56 56 56

M_DATA_A23 M_DATA_A19 M_DATA_A24 M_DATA_A28

C

BC240

BC328

BC333

BC334

BC332

BC330

BC327

BC312

BC239

BC314

BC313

BC315

BC316

BC336

BC317

BC335

M_CAS_AJ M_SCS_A1J

13,15 13,15

2 4 6 8 56 RN26

M_DATA_A25 M_DATA_A29 M_DQS_A3 M_DQM_A3

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

1 3 5 7

2 4 6 8 56 RN29

M_DATA_A30 M_DATA_A26 M_DATA_A27 M_DATA_A31 VTT_DDR M_DATA_A32 M_DATA_A36 M_DATA_A33 M_DATA_A37 R584 1 R585 1 R586 1

1 3 5 7

2 4 6 8 56 RN30

2 47 2 47 2 47 RN19 1 3 5 7 2 4 6 8 47

M_MAA_A7 M_MAA_A8 M_MAA_A5

M_SCKE_A1 M_SCKE_A0

M_SCKE_A1 M_SCKE_A0

13,15 13,15

1 3 5 7

2 4 6 8 56 RN31

M_DQS_A4 M_DATA_A34 M_DQM_A4 M_DATA_A38

BC295 0.1uF_NA

BC288 0.1uF

BC290 0.1uF

BC291 0.1uF_NA

BC283 0.1uF_NA

BC286 0.1uF

BC293 0.1uF_NA

BC284 0.1uF

BC292 0.1uF

BC285 0.1uF_NA

BC296 0.1uF

BC289 0.1uF_NA

BC282 0.1uF

BC294 0.1uF_NA

BC287 0.1uF_NA

BC297 0.1uF

BC298 0.1uF_NA

BC299 0.1uF_NA

BC300 0.1uF_NA

BC301 0.1uF

BC303 0.1uF_NA

BC304 0.1uF_NA

BC302 0.1uF

BC305 0.1uF

BC307 0.1uF

BC325 10uF

BC338 10uF

B

1 3 5 7

2 4 6 8 56 RN32

M_DATA_A39 M_DATA_A35 M_DATA_A44 M_DATA_A40

B

RN27 1 3 5 7 2 4 6 8 47 R587 1 2 47 2 47 M_MAA_A4 M_MAA_A3 M_MAA_A2 M_MAA_A1

1 3 5 7

2 4 6 8 56 RN34

M_DATA_A45 M_DATA_A41 M_DQS_A5

1 3 5 7

2 4 6 8 56 RN35

M_DATA_A42 M_DATA_A43 M_DATA_A46 M_DATA_A47

R588 1

1 3 5 7

2 4 6 8 56 RN36

M_DATA_A48 M_DATA_A49 M_DATA_A52 M_DATA_A53

1 3 5 7

2 4 6 8 56 RN37

M_DQM_A6 M_DQS_A6 M_DATA_A54 M_DATA_A55

1 3 5 7
A

2 4 6 8 56 RN38

M_DATA_A50 M_DATA_A51 M_DATA_A60 M_DATA_A61
A

1 3 5 7

2 4 6 8 56 RN39

M_DATA_A56 M_DATA_A57 M_DQM_A7 M_DQS_A7

1 3 5 7

2 4 6 8 56

M_DATA_A62 M_DATA_A63 M_DATA_A59 M_DATA_A58

FOXCONN PCEG
Title Size C Date:

DDR Channel A Termination
Document Number

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

865A05
Sheet 16 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

D

13,18 M_MAA_B[12..0]

M_MAA_B0 M_MAA_B1 M_MAA_B2 M_MAA_B3 M_MAA_B4 M_MAA_B5 M_MAA_B6 M_MAA_B7 M_MAA_B8 M_MAA_B9 M_MAA_B10 M_BS_B0 M_BS_B1 M_MAA_B11 M_MAA_B12 M_DATA_B0 M_DATA_B1 M_DATA_B2 M_DATA_B3 M_DATA_B4 M_DATA_B5 M_DATA_B6 M_DATA_B7 M_DATA_B8 M_DATA_B9 M_DATA_B10 M_DATA_B11 M_DATA_B12 M_DATA_B13 M_DATA_B14 M_DATA_B15 M_DATA_B16 M_DATA_B17 M_DATA_B18 M_DATA_B19 M_DATA_B20 M_DATA_B21 M_DATA_B22 M_DATA_B23 M_DATA_B24 M_DATA_B25 M_DATA_B26 M_DATA_B27 M_DATA_B28 M_DATA_B29 M_DATA_B30 M_DATA_B31 M_DATA_B32 M_DATA_B33 M_DATA_B34 M_DATA_B35 M_DATA_B36 M_DATA_B37 M_DATA_B38 M_DATA_B39 M_DATA_B40 M_DATA_B41 M_DATA_B42 M_DATA_B43 M_DATA_B44 M_DATA_B45 M_DATA_B46 M_DATA_B47 M_DATA_B48 M_DATA_B49 M_DATA_B50 M_DATA_B51 M_DATA_B52 M_DATA_B53 M_DATA_B54 M_DATA_B55 M_DATA_B56 M_DATA_B57 M_DATA_B58 M_DATA_B59 M_DATA_B60 M_DATA_B61 M_DATA_B62 M_DATA_B63

CN20 48 43 41 130 37 32 125 29 122 27 141 103 59 52 113 118 115 2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179 44 45 49 51 134 135 142 144 154 65 63 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A13 BA0 BA1 BA2 A11 A12 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 /RAS /CAS /WE DDR333_DIMM /CS0 /CS1 CKE0 CKE1 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8 VDDID CK0 /CK0 CK1 /CK1 CK2 /CK2 SCL SDA SA0 SA1 SA2 WP VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VSDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDDSPD NC/FETEN NC/CS2 NC/CS3 NC NC NC NC NC 157 158 21 111 5 14 25 36 56 67 78 86 47 97 107 119 129 149 159 169 177 140 82 137 138 16 17 76 75 92 91 181 182 183 90 108 120 148 70 85 168 38 7 46 54 96 62 128 104 136 30 143 77 112 156 164 172 180 15 22 1 3 145 18 58 50 100 160 139 132 152 116 11 34 26 66 93 124 74 176 42 81 89 184 167 71 163 10 9 101 102 173 M_SCKE_B0 M_SCKE_B1 M_DQS_B0 M_DQS_B1 M_DQS_B2 M_DQS_B3 M_DQS_B4 M_DQS_B5 M_DQS_B6 M_DQS_B7 M_DQM_B0 M_DQM_B1 M_DQM_B2 M_DQM_B3 M_DQM_B4 M_DQM_B5 M_DQM_B6 M_DQM_B7 M_SCS_B0J M_SCS_B1J M_SCKE_B0 M_SCKE_B1 13,18 13,18 13,18 13,18

D

13,18 M_BS_B[1..0] 13,18 M_MAA_B[12..0] 13,18 M_DATA_B[63..0]

M_DQS_B[7..0] 13,18

M_DQM_B[7..0] 13,18 CK_M_133M_P_DDR0_B 13 CK_M_133M_N_DDR0_B 13 CK_M_133M_P_DDR1_B 13 CK_M_133M_N_DDR1_B 13 CK_M_133M_P_DDR2_B 13 CK_M_133M_N_DDR2_B 13 SMB_CLK_MAIN 6,15,32 SMB_DATA_MAIN 6,15,32

C

C

2D5V_STR

2D5V_STR

1 R323 75 1% 2

SMVREF_B

SMVREF_B 1 R334 75 1% 2

BC324 0.1uF

BC337 0.1uF
B

B

2D5V_STR

13,18 M_RAS_BJ 13,18 M_CAS_BJ 13,18 M_WE_BJ

A

A

FOXCONN PCEG

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

Title

DDR Channel B DIMM

Size Document Number Custom Date:

865A05
Sheet 17 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

VTT_DDR

RN40 1 3 5 7 2 4 6 8 56 RN41 1 3 5 7
D

M_DATA_B0 M_DATA_B4 M_DATA_B5 M_DATA_B1

2 4 6 8 56 RN42

M_DQS_B0 M_DQM_B0 M_DATA_B2 M_DATA_B6

Updated DDR Termination Resistor (Rtt) Values The recommended termination resistor (Rtt) value for DQ/DQM/DQS is changed to 56 ohms.The previous recommendation was 110 ohms. Form Intel FAE WW32

M_BS_B[1..0] 13,17 M_DQM_B[7..0] 13,17 M_MAA_B[12..0] 13,17 M_DQS_B[7..0] 13,17 M_DATA_B[63..0] 13,17

D

1 3 5 7

2 4 6 8 56 RN43

M_DATA_B7 M_DATA_B3 M_DATA_B8 M_DATA_B9

VTT_DDR

1 3 5 7

2 4 6 8 56 RN44

M_DATA_B12 M_DQS_B1 M_DATA_B13 M_DQM_B1 1 3 5 7

RN61 2 4 6 8 47 RN60 2D5V_STR 1 3 5 7 2 4 6 8 47 RN55 1 3 5 7 2 4 6 8 47 RN54 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF M_BS_B0 M_RAS_BJ M_WE_BJ M_CAS_BJ 13,17 13,17 13,17

1 3 5 7

2 4 6 8 56 RN46

M_DATA_B15 M_DATA_B10 M_DATA_B14 M_DATA_B11

M_SCS_B0J M_SCS_B1J

13,17 13,17

1 3 5 7

2 4 6 8 56 RN48

M_DATA_B20 M_DATA_B17 M_DATA_B16 M_DQS_B2

1 3 5 7

2 4 6 8 56 RN50

M_DATA_B21 M_DQM_B2 M_DATA_B18 M_DATA_B22

M_MAA_B0 M_MAA_B10 M_BS_B1

BC329

BC311

BC331

BC278

BC277

BC243

BC275

BC276

BC241

BC245

BC242

BC279

BC246

C

1 3 5 7

2 4 6 8 56 RN51

M_DATA_B23 M_DATA_B24 M_DATA_B28 M_DATA_B19

1 3 5 7

2 4 6 8 47 RN52

M_MAA_B2 M_MAA_B1
C

1 3 5 7

2 4 6 8 56 RN53

M_DATA_B25 M_DATA_B29 M_DQS_B3 M_DQM_B3

1 3 5 7

2 4 6 8 47 RN49

M_MAA_B4 M_MAA_B3

1 3 5 7

2 4 6 8 56 RN56

M_DATA_B26 M_DATA_B30 M_DATA_B31 M_DATA_B27

VTT_DDR

1 3 5 7

2 4 6 8 47 RN47

M_MAA_B8 M_MAA_B5 M_MAA_B6

1 3 5 7

2 4 6 8 56 RN57

M_DATA_B32 M_DATA_B36 M_DATA_B33 M_DQS_B4

1 3 5 7 1 3 5 7

2 4 6 8 RN45 47 2 4 6 8 47

M_MAA_B12 M_MAA_B7 M_MAA_B11 M_MAA_B9

BC340

BC341

BC357

BC344

BC343

BC349

BC342

BC363

BC355

BC359

BC350

BC351

BC361

BC356

BC347

BC362

BC353

BC360

BC346

BC365

BC352

BC345

BC354

BC366

BC364

BC358

BC367

BC339

BC309

BC274

M_SCKE_B1 M_SCKE_B0

1 3 5 7

2 4 6 8 56 RN58

M_DATA_B37 M_DATA_B34 M_DQM_B4 M_DATA_B38

M_SCKE_B1 M_SCKE_B0

13,17 13,17

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF_NA

0.1uF

10uF

10uF

B

1 3 5 7

2 4 6 8 56 RN59

M_DATA_B39 M_DATA_B35 M_DATA_B44 M_DATA_B40

B

1 3 5 7

2 4 6 8 56 RN62

M_DATA_B42 M_DATA_B41 M_DQS_B5 M_DATA_B45

1 3 5 7

2 4 6 8 56 RN63

M_DQM_B5 M_DATA_B46 M_DATA_B43 M_DATA_B47

1 3 5 7

2 4 6 8 56 RN64

M_DATA_B52 M_DATA_B49 M_DATA_B48 M_DATA_B53

1 3 5 7

2 4 6 8 56 RN65

M_DQM_B6 M_DQS_B6 M_DATA_B54 M_DATA_B50

1 3 5 7
A

2 4 6 8 56 RN66

M_DATA_B55 M_DATA_B51 M_DATA_B60 M_DATA_B56

1 3 5 7

2 4 6 8 56 RN67

M_DATA_B61 M_DATA_B57 M_DQM_B7 M_DQS_B7

A

1 3 5 7

2 4 6 8 56

M_DATA_B62 M_DATA_B58 M_DATA_B59 M_DATA_B63 Title Size C Date:

FOXCONN PCEG
DDR Channel B Termination
Document Number

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

865A05
Sheet 18 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

D

D

3D3V_SB CN16 3D3V_SYS B9 B16 B25 B28 1D5V_CORE A9 A16 A25 A28 A34 B34 B40 B47 B52 B58 B64 A40 A52 A58 A64 B2 B3 A1 A2 B1 A4 B4 A6 B6 A7 A8 B7 B8 A12 A14 B12 A48 A50 B41 B46 B48 B50 A41 A46 A47 B5 B13 B19 B23 B31 B37 B49 B55 B61 A5 A13 A19 A23 A31 A37 A49 A55 A61

VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3 VCC3.3

1.5 AGP 8X

5V_SYS 12V_SYS

1D5V_CORE
C

R206 1

6.8K/NA G SERRJ 2

23,28,29 23,28,29 6,12,23,24,28,29,30,31,37,39 12 6 12 12 12 12 23,27,28,29,30,37,39 12 12 12

INTAJ INTBJ ICH_H_PCIRESTJ GGNTJ CK_66M_AGP GREQJ PIPEJ WBFJ RBFJ PMEJ GPAR GIRDYJ GDEVSELJ

12 GFRAMEJ 12 GTRDYJ 12 GSTOPJ

GGNTJ CK_66M_AGP GREQJ PIPEJ WB FJ RB FJ PMEJ GPAR GIRDYJ GDEVSELJ G PERRJ G SERRJ GFRAMEJ GTRD YJ GSTOPJ

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ 5.0V 5.0V 12V TYPEDET# OVRCNT# USBUSB+ INTA# INTB# RST# GNT# CLK REQ# PIPE#/DBI_HI WBF# RBF# PME# PAR IRDY# DEVSEL# PERR# SERR# FRAME# TRDY# STOP# GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND NC1 NC2 NC3

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 SB_STB SB_STB# AD_STB0# AD_STB1# AD_STB0 AD_STB1 C/BE0# C/BE1# C/BE2# C/BE3# ST0 ST1 ST2 SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DBI_LO RESERVED 3.3V_AUX VREFCG GC_DET MB_DET RESERVED RESERVED RESERVED

A65 B65 A63 B63 A62 B62 A60 B60 B57 A56 B56 A54 B54 A53 B53 A51 A39 B38 A38 B36 A36 B35 A35 B33 A30 B30 A29 B29 A27 B27 A26 B26 B18 A18 A59 A32 B59 B32 A57 B51 B39 A33 B10 A10 B11 B15 A15 B17 A17 B20 A20 B21 A21 B14 B22 B24 B66 A3 A11 A22 A24 A66

GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 SB_STB SB_STBJ AD_STB0J AD_STB1J AD_STB0 AD_STB1 GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3

GAD[31..0]

12

SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 DBI_LO

SB_STB SB_STBJ AD_STB0J AD_STB1J AD_STB0 AD_STB1 GCBEJ0 GCBEJ1 GCBEJ2 GCBEJ3 ST0 ST1 ST2

12 12 12 12 12 12 12 12 12 12 12 12 12

C

SBA[7..0] DBI_LO

12 12

AGPREF_GMCH GC_DETJ

AGP-Solt_124/NA
B

1 2 3

B

DECUBLE CAP.
5V_SYS 3D3V_SYS 12V_SYS 1D5V_CORE 3D3V_SB

AGPREF & AGPSWING CIRCUIT
1D5V_CORE 1 1D5V_CORE 12V_SYS 1D5V_CORE 1 2 R195 60.4 1%

BC146 2 0.1uF/NA

R138 8.2K/NA 2

R166 8.2K/NA 2

R142 8.2K/NA G PERRJ Q26 2N3904/NA E B R164 100/NA 2 E R193 33.2 1%/NA 1 2 C Q34 2N3904/NA

GSWING_GMCH 12 1 R198 39.2 1% 2

1

1

BC102

BC150

BC149

A

B GC_DETJ C B E Q31 2N3904/NA

C

1

1

2

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

BC94 0.1uF/NA

BC82 0.1uF/NA

0.1uF/NA

0.1uF/NA

0.1uF/NA

AGPREF_GMCH 12

A

R194 100 1%

FOXCONN PCEG
Title Size C Date:

AGP Connector
Document Number

865A05
Sheet 19 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

VGA CONN.
D

FB-4,80ohm@100MHZ,L0603,B-TYPE,RDF<0.4ohm, IDC>=200mA
12 BLUE 1 FB4 FB-4 1 2

D

5V_SYS

R24 BC20 75 1% 2 6.8pF 6.8pF CN1 VGA CONN 5 GND ID0 B G R VGA SCL GND VSYNC NC HSYNC GND SDA GND ID1 GND BC11

FB-4,80ohm@100MHZ,L0603,B-TYPE,RDF<0.4ohm, IDC>=200mA
12 GREEN GREEN 1 FB3 FB-4 1 2

4 3 2 1

R23 75 1%

BC19 17 16 BC10 2 6.8pF 6.8pF

15 10 14 9 13 8 12 7 11 6

L_DDCA_CLK 5 V_VSYNC 5V_H SYNC L_DDCA_DATA R43 R42 1 1 2 47 2 47 VS YNC VSYNC H SYNC HSYNC 12 12

BC12 0.1uF BC630 BC631 BC632 100pF_NA 100pF_NA 100pF_NA BC633 100pF_NA

C

C

FB-4,80ohm@100MHZ,L0603,B-TYPE,RDF<0.4ohm, IDC>=200mA
12 RED RED 1 FB2 FB-4 1 2

R22 75 1% 2

BC18

BC9

6.8pF

6.8pF

B

B

3D3V_SYS

5V_SYS

LEVEL SHIFT

3D3V_SYS

1 D2 SD103AW 2

1

2 1 1 1 2 2 2 2 2 1 R41 2.2K R39 1K R35 1K R40 4.7K R34 4.7K L_DDCA_DATA Q4 2 D1 SD103AW 1

1 R44 2.2K L_DDCA_CLK Q3 2 D4 SD103AW 1
A A

2N3904

2N3904

12 DDCA_DATA

DDCA_DATA

12 DDCA_CLK

D DCA_CLK

FOXCONN PCEG
Title

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

VGA Connector
Document Number

Size C Date:

865A05
Sheet 20 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

U22B 12 HI[10..0] H I0 H I1 H I2 H I3 H I4 H I5 H I6 H I7 H I8 H I9 HI 10 2 61.9 1% HI_STBF HI_STBS HI_RCOMP_ICH HI_ VSWING_ICH HI_ VREF_ICH H20 H21 J20 H23 M23 M21 N21 M20 L22 J22 K21 G22 K23 J24 N24 L20 L24 N22 C10 C9 C11 D9 E9 B12 D10 E10 AA1 B11 B10 A12 B9 B8 C12 A9 AC_SDIN0 E12 AC_SDIN1 D12 A13 D8 2 HI0 HI1 HI2 HI3 HI4 HI5 HI6 HI7 HI8 HI9 HI10 HI11 HI_STBF HI_STBS HIRCOMP HI_VSWING HIREF CLK66 LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_RSTSYNC LAN_CLK LAN_RST# EE_DIN EE_CS EE_SHCLK EE_DOUT AC_SYNC AC_RST# AC_SDOUT AC_SDIN0 AC_SDIN1 AC_SDIN2 AC_BIT_CLK ICH5 USBP0P USBP0N USBP1P USBP1N USBP2P USBP2N USBP3P USBP3N USBP4P USBP4N USBP5P USBP5N USBP6P USBP6N USBP7P USBP7N OC0# OC1# OC2# OC3# OC4#/GPI9 OC5#/GPI10 OC6#/GPI14 OC7#/GPI15 USBRBIAS USBRBIAS# CLK48 C23 D23 A22 B22 C21 D21 A20 B20 C19 D19 A18 B18 C17 D17 A16 B16 C15 D15 D14 C14 B14 A14 D13 C13 A24 B24 F24 R256 1 2 22.6 1% 9 CK_48M_ICH 6 USBP0P USBP0N USBP1P USBP1N USBP2P USBP2N USBP3P USBP3N USBP4P USBP4N USBP5P USBP5N U22D USBP0P USBP0N USBP1P USBP1N USBP2P USBP2N USBP3P USBP3N USBP4P USBP4N USBP5P USBP5N 25 25 25 25 25 25 25 25 25 25 25 25 31 10 10 10 10 10,24 10 10 31 31 10 10 CN21 SATA USB_OC0J 25 9 USB_OC1J 25 CN22 SATA 1 2 3 4 5 6 7 1 2 3 4 5 6 7 RN93 33 1 3 5 7 A20GATE A20MJ CPUSLPJ FERRJ IGNNEJ INITJ INTR NMI KBRSTJ SERIRQ SMIJ STPCLKJ TP42 8 TP4 SATA_TXP0 SATA_TXN0 SATA_RXN0 SATA_RXP0 SATA_TXP1 SATA_TXN1 SATA_RXN1 SATA_RXP1 R296 1 2 24.9 1% T22 V23 P22 U24 R21 R23 U23 R22 P23 F23 V24 T24 P20 R24 AA8 AB8 AD7 AC7 AA10 AB10 AD9 AC9 Y11 Y9 AC5 AD5 T5 R4 R3 U4 T4 U5 R2 AC11 AB12 AA12 AB13 AC12 A20GATE A20M# CPUSLP# FERR# IGNNE# INIT# INTR NMI RCIN# SERIRQ SMI# STPCLK# DPRSLPVR DPSLP# SATA0TXP SATA0TXN SATA0RXN SATA0RXP SATA1TXP SATA1TXN SATA1RXN SATA1RXP SATARBIASP SATARBIASN AGPBUSY#/GPI6 GPI7 GPI8 SMBALERT#/GPI11 GPI12 GPI13 STP_PCI#/GPO18 SLP_S1#/GPO19 STP_CPU#/GPO20 C3_STAT#/GPO21 CPUPERF#/GPO22 SSMUXSEL/GPO23 CLKRUN#/GPIO24 GPIO25 GPIO27 GPIO28 GPIO32 GPIO33 GPIO34 SMBCLK SMBDATA SMLINK0 SMLINK1 LINKALERT# R5 U3 Y2 AC3 W4 W5 U21 T20 U22 R1 U20 F22 AC1 W3 V3 W2 T1 G23 F21 AD2 AD1 AD3 AA2 V5 E24 AB3 Y4 Y1 AB2 AB1 W1 U2 AA3 U1 R20 P24 T21 T2 AD10 F20 Y12 A11 ICH_GPIO6_PU BOARD0 ICH_GPIO8_UP SMB_ALERT_UP SLEEPJ ICH_GPIO_18 ICH_GPIO_19 ICH_GPIO_20 ICH_GPIO_21 W PJ ICH_GPIO_23 ICH_GPIO_24 ICH_GPIO_25 S1LED ICH_GPIO_32 SATA_LED BOARD1 L_PMEJ 31

D

R263 1 12 HI_STBF 12 HI_STBS

WPJ TP40 TP51 TP52 S1LED SATA_LED

24

D

12 HI_VSWING 12 HI_VREF 6 CK_66M_ICH

27 22

8

R312 1 R293 1 R289 1

2 10K 2 10K 2 10K

SMB_CLK_RESUME 28,29,30,31,32 SMB_DATA_RESUME 28,29,30,31,32 3D3V_SB

26 26

ICH_SYNC ICH_SDOUT

R813 1 1 R814

47 2 2 47 26 ICH_RSTJ TP48 TP49 1

Clear CMOS
H I_VSWING H I_VREF

6 CK_100M_P_ICH 6 CK_100M_N_ICH 2 4 6 8 24,31 L_FRAMEJ 31 L_DRQ0J TP44 LD RQ

JP1

CMOS (1-2) (2-3)

24,31 24,31 24,31 24,31

L_AD0 L_AD1 L_AD2 L_AD3

Clear
Normal
BC178 0.01uF BC179 0.01uF

26 ICH_SDIN2 26 ICH_BCLK

Default

JP1 3 2 1 HEADER_3X1 1 RTCRSTJ

R703 47

ICH_RTCX1 ICH_RTCX2 RSMRSTJ PGD_3V

SPKR RI# PWRBTN# SUSCLK CLK100P BATLOW# CLK100N SUS_STAT# SLP_S3# LAD0 SLP_S4# LAD1 SLP_S5# LAD2 SYS_RESET# LAD3 VGATE/VRMPWRGD LFRAME# CPUPWRGD/GPO49 LDRQ0# THRMTRIP# LDRQ1#/GPI41 THRM# INTVRMEN RTCX1 CLK14 RTCX2 INTRUDER# RTCRST# RSMRST# NC PWROK ICH5

ICH_BATLOW_PU TP43 TP54 ICH_VRMPWRGD_UP ICH_THRM_UP INTVRMEN TP45

SPKR ICH_RIJ PWRBTNJ SUSCLK SLP_S3J

26,27 33 31 31 12,31

VCCRTC

R297

ICH_SYS_RSTJ 6,10,27 CPU_PWRG 10 THERMTRIPJ 10 ICH_THRM_UP 31 CK_14M_ICH INTRUDERJ 6 27

C

VCCRTC R314 1 1D5V_CORE R269 1 3D3V_SB R294 1 1 RN96 3 5 7 R599 1 3D3V_SYS R271 1 R280 1 R281 1 R272 1 R600 1 2 10K 2 4 8.2k 6 8 2 10K 2 1M

ICH_SID0/1/2 internal pull-down 9k-50k.
INTR UDERJ

1

2

Difference between DemoSch and DG1.0 R381 0

390K
C

2 52.3 1%

HI_RCOMP_ICH

ICH_RTCX1 ICH_RTCX2

2

PWRGD_3V 12,24,27 3D3V_SB 3D3V_SB 3D3V_SB

14

2

SLEEPJ X4 XTAL-32.768KHz 1

14

L_PMEJ ICH_GPIO8_UP ICH_BATLOW_PU IC H_RIJ SMB_ALERT_UP

R307 1

2 10M

1 R317 51K

U24E 10

U24F 12 RSMRSTJ

11

13

2 10K 2 10K 2 10K 2 8.2K 2 10K/NA

ICH_GPIO6_PU W PJ ICH_VRMPWRGD_UP ICH_THRM_UP BC280 6.8pF BOARD0

7

74LVC14A

7

2

74LVC14A R316 10K

BC319 1uF

4

3

BC271 6.8pF

R901

2

3D3V_SYS R490 R493 R494 R492 R491 4.7K 4.7K 4.7K 4.7K 4.7K
B

B

10K Q109 2N3906 R751 LED1 150 1 LED 2 E C B R750 4.7K B Q110 2N3906 R753 LED2 150 1 LED 2 E C R754 C Q111 2N3906 R755 LED3 150 1 LED 2 E R752 B R757 LED4 150 1 LED 2 E Q113 B 2N3906 B Q112 2N3906 R756 C R758 C

1

2

2

2

1

2

3D3V_SB

VCCRTC

3D3V_SYS

ICH_GPIO_18

2 3 1 1

ICH_SYS_RSTJ

R597 1 R561 1

10k 2 330_NA 2

2 1

D15 BAT54C

1

1

1

2

1

3D3V_SB

R892 10K\NA

ICH_SYS_RSTJ R283 20K

4.7K

ICH_GPIO_19 1 R285 1K 2 2

BOARD1 RTCRSTJ

BC257 1uF

R895

4.7K

ICH_GPIO_20

2 BC254 0.1uF 1

10K

1 3

4.7K

ICH_GPIO_32
A

A

R759

LED5 150 1

LED 2 E

+

4.7K

ICH_GPIO_21

BAT1 B7566BP5R BAT3S

2

FOXCONN PCEG
Title

Confidential Document.Do Not Reproduce Without Foxconn Authorization.
5 4 3 2

ICH5-1
Document Number

Size C Date:

865A05
Sheet 21 of 39
1

Rev B

Monday, February 10, 2003

5

4

3

2

1

ICH5 IDE INTERFACE
U22C
D

3D3V_SYS

PRIMARY IDE CONN.

1

1

R361

R342
D

PIDE_D15 PIDE_D14 PIDE_D13 PIDE_D12 PIDE_D11 PIDE_D10 PIDE_D9 PIDE_D8 PIDE_D7 PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3 PIDE_D2 PIDE_D1 PIDE_D0 PIDE_IOWJ PIDE_DAKJ PIDE_DREQ PIDE_IORJ PIDE_RDY PIDE_A2 PIDE_A1 PIDE_A0

AB17 AA16 Y16 AC16 AA15 AD16 Y15 AD15 AB14 AD14 AC15 AA14 AC14 Y14 Y13 AB16 AA17 AC18 AC17 AD18 AA18 AC19 AD19 AA19

PDD15 PDD14 PDD13 PDD12 PDD11 PDD10 PDD9 PDD8 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 PDIOW# PDDACK# PDDREQ PDIOR# PIORDY PDA2 PDA1 PDA0 PDCS3# PDCS1# IRQ14 ICH5

SDD15 SDD14 SDD13 SDD12 SDD11 SDD10 SDD9 SDD8 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 SDIOW# SDDACK# SDDREQ SDIOR# SIORDY SDA2 SDA1 SDA0 SDCS3# SDCS1# IRQ15

AA23 AB24 AC24 AB22 AA20 AC22 AD22 Y19 AC20 AB20 AC21 AB21 AD24 AD23 AB23 AA22 Y22 W20 Y20 Y23 Y21 W21 W23 W22 V20 V22 Y24

SIDE_D15 SIDE_D14 SIDE_D13 SIDE_D12 SIDE_D11 SIDE_D10 SIDE_D9 SIDE_D8 SIDE_D7 SIDE_D6 SIDE_D5 SIDE_D4 SIDE_D3 SIDE_D2 SIDE_D1 SIDE_D0 SIDE_IOWJ SIDE_DAKJ SIDE_DREQ SIDE_IORJ SIDE_RDY SIDE_A2 SIDE_A1 SIDE_A0 SIDE_CS3J SIDE_CS1J IRQ15

2

2

8.2K

4.7K CN26 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 X 22 24 26 28 30 32 34 36 38 40 PIDE_D8 PIDE_D9 PIDE_D10 PIDE_D11 PIDE_D12 PIDE_D13 PIDE_D14 PIDE_D15

P_IDERSTJ PIDE_D7 PIDE_D6 PIDE_D5 PIDE_D4 PIDE_D3 PIDE_D2 PIDE_D1 PIDE_D0 PIDE_DREQ PIDE_IOWJ PIDE_IORJ PIDE_RDY PIDE_DAKJ IRQ14 PIDE_A1 PIDE_A0 PIDE_CS1J PIDE_LED

PIDE_A2 PIDE_CS3J 1 1 R364 470 BC387 0.047uF_NA 2 2 R374 10K

CBLID_P

24

C

PIDE_CS3J Y18 PIDE_CS1J AB19 IRQ14 Y17

DVD-CONN40A_BLUE

C

IDE LED & IDE RST
3D3V_SYS

SECOND