Text preview for : 630cfr3.pdf part of some brands - algumas marcas some schematic motherboards notebooks downloaded from www.freeservicemanuals.net. alguns esquemas placa-mae e notebook baixados de www.freeservicemanuals.net.
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VTT
VTT AK30 CPURST# VCC3
R84 OPEN-220
630CF REV:3.0
Layout all Bead 0805-->0603
VCC2DET SLEWCTRL RTTCTRL VTT VCC2.5 VCC_CMOS VCC3 U4 R414 1K VCC_1.5V VCC_2.5V VCC_CMOS BP#[2] BP#[3] BPM#[0] BPM#[1] BSEL# AD36 Z36 AB36 G33 E37 C35 E35 AJ33 AE33 AC35 AE37 AE35 AG37 AG33 M36 L37 AH30 AJ35 AG35 J33 J35 L35 AK26 A35 J37 AL33 AN35 AN37 AK32 AN33
VCCCORE
U5 AA37 AA5 AB2 AB34 AD32 AE5 AF2 AF34 AH24 AH32 AH36 AJ13 AJ17 AJ21 AJ25 AJ29 AJ5 AJ9 AK2 AK34 AM12 AM16 AM20 AM24 AM28 AM32 AM4 AM8 B10 B14 B18 B22 B26 B30 B34 B6 C3 D20 D24 D28 D32 D36 D6 E13 E17 E5 E9 F14 F2 F22 F26 F30 F34 F4 H32 H36 J5 K2 K32 K34 M32 N5 P2 P34 R32 R36 S5 T2 T34 V32 V36 W5 X34 Y35 Z32
M E N DOCINO_2 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A37 AB32 AC33 AC5 AD2 AD34 AF32 AF36 AG5 AH2 AH34 AJ11 AJ15 AJ19 AJ23 AJ27 AJ3 AJ7 AK36 AK4 AL1 AL3 AM10 AM14 AM18 AM2 AM22 AM26 AM30 AM34 AM6 AN3 B12 B16 B20 B24 B28 B32 B4 B8 D18 D2 D22 D26 D30 D34 D4 E11 E15 E19 E7 F20 F24 F28 F32 F36 G5 H2 H34 K36 L5 M2 M34 P32 P36 Q5 R34 T32 T36 U5 V2 V34 X32 X36 Y37 Y5 Z2 Z34 AJ31 Y33 VCC2.5
AH20 AH4 A29 A31 A33 AA33 AA35 AC1 AC37 AF4 AK16 AK24 AK30 AL11 AL13 AL21 AN11 AN13 AN15 AN21 AN23 B36 C29 C31 C33 E23 E29 E31 F10 G35 G37 L33 N33 N35 N37 Q33 Q35 Q37 S33 S37 U35 U37 V4 W3 X6 Y1 E21 E27 R2 S35 X2
W35 C37
TESTHI CPUPRES#
RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED
C15 NC-18P
23,26 23,26 8 370CPUCLK
DXP DXN
DXP DXN
AL31 AL29 AH28 W37 AK20 AN19 AN25 X4 AN17 AN29 AK28 AH22 AH26 AN31 AL23 AL25 AN27 AL27 AH14 AL17 AL19 AH18 AH16 AK18 AD4 AA3 Z4 AK6 AA1 Y3 AF6 AB4 AB6 AE3 AJ1 AC3 AG3 Z6 AE1 AN7 AL5 AK14 AL7 AN5 AK10 AH6 AL9 AH10 AL15 AN9 AH8 AH12 AK8
THERMDP THERMDN THERMTRIP# BCLK LOCK# DEFER# TRDY# RESET# BPRI# BREQ0# RS#[2] RS#[1] RS#[0] ADS# HITM# HIT# DRDY# DBSY# BNR# REQ#[4] REQ#[3] REQ#[2] REQ#[1] REQ#[0] A#[31] A#[30] A#[29] A#[28] A#[27] A#[26] A#[25] A#[24] A#[23] A#[22] A#[21] A#[20] A#[19] A#[18] A#[17] A#[16] A#[15] A#[14] A#[13] A#[12] A#[11] A#[10] A#[9] A#[8] A#[7] A#[6] A#[5] A#[4] A#[3]
JP11 BSEL0# A20M# FERR# FLUSH# IGNNE# INIT# INTR NMI SLP# SMI# STPCLK# PICCLK PICD0 PICD1 PWRGOOD PRDY# PREQ# HTCK HTDI HTDO HTMS HTRST# 1 HEADER 2 2
R411
1K FS0 8
370CPUCLK HLOCK# 2,3 HLOCK# DEFER# 2,3 DEFER# HTRDY# 2,3 HTRDY# CPURST# 2,3 CPURST# BPRI# 2,3 BPRI# BREQ0# 2,3 BREQ0# RS#2 2,3 RS#2 RS#1 2,3 RS#1 RS#0 2,3 RS#0 ADS# 2,3 ADS# HITM# 2,3 HITM# HIT# 2,3 HIT# DRDY# 2,3 DRDY# DBSY# 2,3 DBSY# BNR# 2,3 BNR# HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3
PPGA 370
A20M# FERR# FLUSH# IERR# IGNNE# INIT# LINT[0]/INTR LINT[1]/NMI SLP# SMI# STPCLK# PICCLK
A20M# FERR#
6 6
IGNNE# 6 INIT# 6 INTR 6 NMI 6 CPUSLP# 6 SMI# 6 STPCLK# 6 PICCLK 8
VID3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
VID2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
VID1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
VID0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
VCC_CORE 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05
PICD[0] PICD[1] PWRGOOD PRDY# PREQ# TCK TDI TDO TMS TRST#
PWRGOOD PRDY# 2
20
VID[3] VID[2] VID[1] VID[0] VREF7 VREF6 VREF5 VREF4 VREF3 VREF2 VREF1 VREF0 EDGCTRL PLL1 PLL2
AJ37 AL37 AM36 AL35 AK22 AK12 AD6 V6 R6 K4 F18 E33 AG1 W33 U33
VID3 VID2 VID1 VID0
CPUVREF
VCCCORE EDGCTRL PLL1 PLL2 + R80 51 L20 1 2 2 2 U H-SMT-CPU BC40 2 2 U F-SMT-CPU VCC3 R415 1K
F16 E25 A27 A25 C17 C23 A19 C27 C19 C21 A23 D16 A13 C25 C13 A17 A15 A21 C11 A11 A7 D12 D14 C15 D10 D8 A9 C9 B2 C7 C1 F6 C5 J3 A3 A5 F12 E1 E3 K6 G3 F8 G1 L3 H6 P4 R4 H4 U3 N3 L1 Q1 M4 Q3 P6 S1 J1 T6 S3 U1 M6 N1 T4 W1
M E N DOCINO_1
VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE VCC_CORE
BC5 1nF
MENDOCINO PPGA
VID4
VID4
20
|LINK |2.SCH |3.SCH |4.SCH |5.SCH |6.SCH |7.SCH |8.SCH |9.SCH |10.SCH |11.SCH |12.SCH |13.SCH |14.SCH |15.SCH |16.SCH |17.SCH |18.SCH |19.SCH |20.SCH |21.SCH |22.SCH |23.SCH |24.SCH |25.SCH |26.SCH
VCC2.5 R62 150-1%
D#63 D#62 D#61 D#60 D#59 D#58 D#57 D#56 D#55 D#54 D#53 D#52 D#51 D#50 D#49 D#48 D#47 D#46 D#45 D#44 D#43 D#42 D#41 D#40 D#39 D#38 D#37 D#36 D#35 D#34 D#33 D#32 D#31 D#30 D#29 D#28 D#27 D#26 D#25 D#24 D#23 D#22 D#21 D#20 D#19 D#18 D#17 D#16 D#15 D#14 D#13 D#12 D#11 D#10 D#9 D#8 D#7 D#6 D#5 D#4 D#3 D#2 D#1 D#0
AK30 VTT JP10 3 2 1 HEADER 3 R412 FS1 1K BSEL133/100# CPUVREF L19 1.2V 1 FB R58 150 1% 2 8
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
PLL1.25V C43 C44 R61
HD#[0..63] HA#[3..31] HREQ#[0..4]
HD#[0..63] HA#[3..31] HREQ#[0..4]
2,3 2,3 2,3
For Cu-256 PU_cmos=150 Ohm
VCC_CMOS A20M# FERR# FLUSH# IGNNE# INIT# INTR NMI SLP# SMI# STPCLK# R27 R26 R28 R30 R32 R23 R22 R33 R34 R29 470 330 510 470 470 470 470 330 470 470 PICD0 PICD1 PREQ# HTCK HTDI HTDO HTMS HTRST# R20 R21 R19 R39 R38 R35 R36 R40 150 150 330 1K 330 150 1K 680 VCC_CMOS
R59 75 1% VCC_CMOS VCC_CMOS
4.7U
.1U
BC6 .1U
BC8 .1U
150-1% BC29 10uF BC30 BC31 1nF BC52 1nF BC80 1nF BC82 1nF BC84 1nF BC88 1nF BC72 1nF BC89 1nF
F o r Future Compatibility Upgrate RTTCTRL SLEWCTRL R24 R60 110 1% 110 1%
VCC_CMOS
VCC_CMOS
0.1uF J E T W A Y I N F ORMATION
BC4 .1U
BC7 .1U VID[0..4] VID[0..4] 20
Title M E N D O C I N O PPGA CPU Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 1 of 26 Rev 3.0
@ FOR FSB=133MHZ Lmax=4.5 inches
VTT
VTT RN27 56-8P4RS HD#13 HD#11 HD#14 HD#2 HD#30 HD#7 HD#3 HD#20 RN26 RN25 2 4 6 8 2 4 6 8 56-8P4RS 56-8P4RS 56-8P4RS 1 3 5 7 1 3 5 7 VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
Vtt>50mil
VTT VTT VTT VTT VTT 1,3 BREQ0# 1,3 RS#2 1,3 DRDY# 1,3 DBSY# BC95 .1U 1 1,3 PRDY# ADS# BREQ0# RS#2 DRDY# DBSY# PRDY# ADS# 1 3 5 7 1 3 5 7
RN4 2 4 6 8 2 4 6 8 RN3
BC16 .1U
BC94 .1U
BC90 .1U
BC102 .1U
56-8P4RS
BC32 .1U
BC34 .1U
BC38 .1U
BC41 .1U
BC42 .1U
BC43 .1U
VTT
VTT
VTT
1,3 RS#1 1,3 HLOCK# 1,3 DEFER# 1,3 RS#0 1,3 HTRDY# 1,3 HIT# 1,3 HITM# VTT
BC48 1U
BC112 .1U
BC75 1U
RS#1 HLOCK# HREQ#3 DEFER# RS#0 HTRDY# HIT# HITM#
1 3 5 7 1 3 5 7
RN19
2 4 6 8 2 4 6 8
56-8P4RS 56-8P4RS
HD#24 HD#23 HD#21 HD#16 HD#33 HD#19 HD#25 HD#26
2 4 6 8 2 4 6 8
1 3 5 7 1 3 5 7
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
BC73 .1U
BC74 .1U
BC50 .1U
BC54 .1U
BC51 .1U
BC53 .1U
VTT
VTT
VTT
VTT
BC109 .1U
BC100 .1U
BC76 .1U
BC101 1U
C63 .1U
1,3
BNR#
1,3 BPRI#
HREQ#1 HA#7 HA#14 BNR# HREQ#0 HREQ#2 BPRI# HREQ#4
RN18 RN38 1 3 5 7 1 3 5 7 RN20 RN36 2 4 6 8 2 4 6 8 56-8P4RS HD#31 HD#29 HD#32 HD#35 HD#43 HD#34 HD#22 HD#28
RN24
56-8P4RS VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE
RN23 2 4 6 8 2 4 6 8 RN22 RN17
56-8P4RS 1 3 5 7 1 3 5 7 56-8P4RS 56-8P4RS 2 4 6 8 2 4 6 8 1 3 5 7 1 3 5 7 VCCCORE 56-8P4RS 56-8P4RS 2 4 6 8 2 4 6 8 1 3 5 7 1 3 5 7 56-8P4RS 56-8P4RS 2 4 6 8 2 4 6 8 1 3 5 7 1 3 5 7 56-8P4RS VCCCORE VCCCORE
56-8P4RS
BC58 .1U
BC77 .1U
BC79 .1U
BC83 .1U
BC85 .1U
BC87 .1U
VTT
VTT
VTT
VTT
VTT
BC110 1U
BC104 .1U
BC49 .1U
BC27 .1U
BC17 .1U
HA#13 HA#16 HA#3 HA#9 HA#6 HA#8 HA#11 HA#4 HA#19 HA#25 HA#21 HA#10 HA#28 HA#15 HA#5 HA#12 RN35 RN32 HA#27 HA#30 HA#24 HA#20 HA#31 HA#17 HA#22 HA#23 RN33 RN30
2 4 6 8 2 4 6 8 RN37 2 4 6 8 2 4 6 8 56-8P4RS 56-8P4RS 2 4 6 8 2 4 6 8 56-8P4RS 56-8P4RS
1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
56-8P4RS 56-8P4RS HD#39 HD#37 HD#36 HD#38 HD#42 HD#27 HD#44 HD#45
BC60 .1U
BC63 .1U
BC65 .1U
BC66 .1U
BC61 .1U
VTT
VTT
VTT
VTT
RN34 56-8P4RS
VCCCORE
VTT
VCCCORE
RN16 RN15 HD#47 HD#41 HD#49 HD#51 HD#59 HD#48 HD#52 HD#40 RN11 RN10 HD#54 HD#63 HD#57 HD#55 HD#62 HD#58 HD#53 HD#46 RN9 HD#56 HD#61 HD#50 HD#60 RN6 2 4 6 8
BC105 1U
BC28 .1U
BC108 .1U
BC106 .1U
BC36 4.7U
BC44 4.7U
BC70 4.7U
BC71 4.7U
VTT
VTT
BC202 .1U
BC203 .1U
1 3 5 7 1 3 5 7
VCCCORE
VCCCORE
VCCCORE
BC33 4.7U
BC55 4.7U
BC81 4.7U
BC86 4.7U
1,3
CPURST#
HD#4 HD#15 HD#1 HD#0 CPURST# HA#18 HA#26 HA#29
2 4 6 8 2 4 6 8
1 3 5 7 1 3 5 7
VCCCORE
VCCCORE
VCCCORE
1 3 5 7 56-8P4RS BC59 4.7U BC62 4.7U BC64 4.7U BC67 4.7U
HD#9 HD#18 HD#12 HD#10 HD#17 HD#8 HD#5 HD#6 1,3 1,3 1,3 HD#[0..63] HA#[3..31] HREQ#[0..4] HD#[0..63] HA#[3..31] HREQ#[0..4]
RN31 RN28 2 4 6 8 2 4 6 8 RN29
56-8P4RS 56-8P4RS 1 3 5 7 1 3 5 7 56-8P4RS
SCOKET 370 RT
VCCCORE
VCCCORE
VCCCORE
VCCCORE
BC35 .1U
BC37 .1U
BC39 .1U
BC56 .1U
N O T E : GTL+ TERMINATION RESISTORS ONLY FOR MENDOCINO PPGA PROCESSOR.
VCCCORE
VCCCORE
VCCCORE
VCCCORE J E T W A Y I N F ORMATION
BC68 .1U
BC57 10U/1206
BC69 10U/1206
BC78 .1U
Title G T L + T E R M I N A T I O N R ESISTORS Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 2 of 26 Rev 3.0
VTT VTT VTT VTTA R93 56 R113 75 1% 1.2V R114 150 1% R91 75 1% 1.2V R92 150 1% GTLREFA DQM[0..7] MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 BC115 0.001uF BC107 0.001uF VSSREFA W28 V24 Y29 Y27 Y25 W25 AA27 Y24 AB28 AA25 AB25 AC28 AC26 AD28 AD26 AB24 AH22 AD20 AG21 AJ21 AF20 AE19 AJ20 AD18 AH19 AE18 AG18 AJ18 AG17 AE17 AF16 AH16 W29 W27 W26 Y28 Y26 AA29 AA28 AA26 AB29 AB27 AB26 AC29 AC27 AD29 AD27 AD25 AG22 AJ22 AF21 AH21 AE20 AG20 AH20 AF19 AG19 AJ19 AF18 AH18 AF17 AH17 AJ17 AG16 R29 P29 N29 U10 ADS# C65 1u-0805 1,2 MA[0..14]
CLOSE TO SIS630E
MD[0..63] CSA#[0..3] CSB#[0..3] ADS# MD[0..63] CSA#[0..3] CSB#[0..3] MA[0..14] DQM[0..7] 7,19 7 7 7 7
VSSQ GTLREFA VTTA
C78 10P 8 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 630CCLK HLOCK# DEFER# HTRDY# CPURST# BPRI# BREQ0# RS#2 RS#1 RS#0 HITM# 1,2 HIT# 1,2 DRDY# 1,2 DBSY# 1,2 BNR# 1,2 630CCLK HLOCK# DEFER# HTRDY# CPURST# BPRI# BREQ0# RS#2 RS#1 RS#0 ADS# HITM# HIT# DRDY# DBSY# BNR# HREQ#4 HREQ#3 HREQ#2 HREQ#1 HREQ#0 HA#31 HA#30 HA#29 HA#28 HA#27 HA#26 HA#25 HA#24 HA#23 HA#22 HA#21 HA#20 HA#19 HA#18 HA#17 HA#16 HA#15 HA#14 HA#13 HA#12 HA#11 HA#10 HA#9 HA#8 HA#7 HA#6 HA#5 HA#4 HA#3
VTTB GTLREFB VSSREFB
A23 A24 B24
VTTB GTLREFB VSSQ
MD63 MD62 MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 MD53 MD52 MD51 MD50 MD49 MD48 MD47 MD46 MD45 MD44 MD43 MD42 MD41 MD40 MD39 MD38 MD37 MD36 MD35 MD34 MD33 MD32 MD31 MD30 MD29 MD28 MD27 MD26 MD25 MD24 MD23 MD22 MD21 MD20 MD19 MD18 MD17 MD16 MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MD7 MD6 MD5 MD4 MD3 MD2 MD1 MD0
A18 T26 T27 T24 M24 R26 J26 V27 V26 U27 V28 U26 V25 U28 V29 R28 T28 U25 U29 T29 R27 K25 J28 J27 K27 K26 J29 L26 M25 K29 N25 P24 K28 L27 L29 M26 P25 L28 R25 M28 M29 M27 R24 P26 N26 N27 P27 N28 P28 T25
CPUCLK HLOCK# DEFER# HTRDY# CPURST# BPRI# BREQ0# RS#[2] RS#[1] RS#[0] ADS# HITM# HIT# DRDY# DBSY# BNR# HREQ#[4] HREQ#[3] HREQ#[2] HREQ#[1] HREQ#[0] HA#[31] HA#[30] HA#[29] HA#[28] HA#[27] HA#[26] HA#[25] HA#[24] HA#[23] HA#[22] HA#[21] HA#[20] HA#[19] HA#[18] HA#[17] HA#[16] HA#[15] HA#[14] HA#[13] HA#[12] HA#[11] HA#[10] HA#[9] HA#[8] HA#[7] HA#[6] HA#[5] HA#[4] HA#[3]
CSA#[5] CSA#[4] CSA#[3] CSA#[2] CSA#[1] CSA#[0] CSB#[5] CSB#[4] CSB#[3] CSB#[2] CSB#[1] CSB#[0] MA[14] MA[13] MA[12] MA[11] MA[10] MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0] DQM[7] DQM[6] DQM[5] DQM[4] DQM[3] DQM[2] DQM[1] DQM[0]
AE23 AD22 AJ24 AH24 AG24 AF24 AF27 AF28 AC25 AF29 AE25 AE26 AF26 AG29 AG28 AG27 AH28 AH27 AJ27 AG26 AH26 AJ26 AF25 AG25 AH25 AJ25 AE24 AE29 AE27 AH23 AE22 AD24 AE28 AG23 AJ23
CAS3 CAS2 CAS1 CAS0
CAS0 CAS1 CAS2 CAS3
1 3 5 7
RN46
2 4 6 8
CSA#0 CSA#1 CSA#2 CSA#3
10X4 CSB3 CSB2 CSB1 CSB0 MAA14 MAA13 MAA12 MAA11 MAA10 MAA9 MAA8 MAA7 MAA6 MAA5 MAA4 MAA3 MAA2 MAA1 MAA0 DQMA7 DQMA6 DQMA5 DQMA4 DQMA3 DQMA2 DQMA1 DQMA0 DQMA3 DQMA7 DQMA2 DQMA6 DQMA1 DQMA5 DQMA0 DQMA4 1 3 5 7 10 10 10 1 3 5 7 1 3 5 7 1 3 5 7 RN39 1 10X4 3 5 7 1 3 5 7 RN49 10X4 RAMW# SRAS# SCAS# RAMW# SRAS# SCAS# 630SDCLK 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 DQM3 DQM7 DQM2 DQM6 DQM1 DQM5 DQM0 DQM4 2 4 6 8 CSB#3 CSB#2 CSB#1 CSB#0 MA14 MA13 MA12 MA11 MA10 MA9 MA8 MA7 MA6 MA5 MA4 MA3 MA2 MA1 MA0
MEMORY
RN42 10X4
R95 R96 R94 RN47 10X4 RN45 10X4 RN48 10X4
630-1
HOST
CPUAVDD SDVADD HD#63 HD#62 HD#61 HD#60 HD#59 HD#58 HD#57 HD#56 HD#55 HD#54 HD#53 HD#52 HD#51 HD#50 HD#49 HD#48 HD#47 HD#46 HD#45 HD#44 HD#43 HD#42 HD#41 HD#40 HD#39 HD#38 HD#37 HD#36 HD#35 HD#34 HD#33 HD#32 HD#31 HD#30 HD#29 HD#28 HD#27 HD#26 HD#25 HD#24 HD#23 HD#22 HD#21 HD#20 HD#19 HD#18 HD#17 HD#16 HD#15 HD#14 HD#13 HD#12 HD#11 HD#10 HD#9 HD#8 HD#7 HD#6 HD#5 HD#4 HD#3 HD#2 HD#1 HD#0
WE# SRAS# SCAS# SDCLK
AF22 AF23 AE21 AJ15
R128 R115 R129
10 10 10 630SDCLK
7 7 7
CKE
F6
630CKE
630CKE
21,22 VCC3
C83 OPEN BC148 1 5 00U/6.3DE 630-1 SDAVDD HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63 R125 0 BC121 0.001uF BC123 0.1uF BC125 10uF + VCC3 +
VCC3 R124 0 BC117 10uF + BC118 0.1uF CPUAVDD BC119 0.001uF
AJ16
E19 D20 A21 F20 C22 E20 B22 C21 B21 E21 A22 F22 C23 D21 B23 E22 C24 D22 D24 E24 C25 E23 D23 B25 F24 A26 E25 A25 D26 D25 B26 C26 B27 B28 C27 A27 C29 C28 D27 D28 E26 D29 E28 H24 E27 E29 F27 F25 F29 G26 F26 J25 F28 G25 G28 H25 G27 G29 H26 K24 L25 H27 H29 H28
A19
J E T W A Y I N F ORMATION HD#[0..63] HA#[3..31] HREQ#[0..4] Title 6 3 0 - 1 ( H O S T/MEMORY) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 3 of 26 Rev 3.0
HD#[0..63] HA#[3..31] HREQ#[0..4]
1,2 1,2 1,2
VCC1.8V R126 13,14,15,23 AD[0..31] AD[0..31] 0 BC122 0.001uF BC124 0.1uF + AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 AH15 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 B17 A17 D16 E16 C16 B16 A16 F15 C15 B15 E15 A15 A14 B14 E14 C14 C12 D12 A11 E12 B11 C11 D11 F12 B10 C10 E11 D10 E10 A9 B9 C9 IDEAVDD
(FOR INTERNAL PLL)
BC126 10uF IDESAA[0..2] I D ECS#A[0..1] IDESAA[0..2] I D ECS#A[0..1] 15 15
U12
14 PREQ#2 13,14 PREQ#1 13,14 PREQ#0
PREQ#2 PREQ#1 PREQ#0
B18 E17 C18
PREQ#[2] PREQ#[1] PREQ#[0]
ICHRDYA IDREQ[A] IIRQA CBLIDA IIOR#[A] IIOW#[A] IDACK#[A] IDSAA[2] IDSAA[1] IDSAA[0] IDECSA#[1] IDECSA#[0]
AF8 AE11 AD12 AE12 AG8 AE8 AH8 AG9 AJ8 AF9 AJ9 AH9 IDESAA2 IDESAA1 IDESAA0 IDECS#A1 IDECS#A0
ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR#A IDEIOW#A IDACK#A
ICHRDYA IDEREQA IDEIRQA CBLIDA IDEIOR#A IDEIOW#A IDACK#A
15 15 15 15 15 15 15
13,14,15,23 13,14,15,23
14 PGNT#2 PGNT#1 13 PGNT#0 C/BE#[0..3]
PGNT#2 PGNT#1 PGNT#0 C/BE#[0..3] C/BE#3 C/BE#2 C/BE#1 C/BE#0
F16 C17 D17
PGNT#[2] PGNT#[1] PGNT#[0]
PCI
D15 D14 E13 A10 K5 J5 J4 J3 A13 F14 B13 A12 L5 B12 C13 D13 AJ14 E6 33
C/BE#[3] C/BE#[2] C/BE#[1] C/BE#[0] INTA# INTB# INTC# INTD# FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK# PCICLK PCIRST#
13,14,15,23 13,14 13,14,15,23 13,14 13,14,15,23 13,14 13,14,15,23 13,14,15,23
INT#A INT#B INT#C INT#D FRAME# IRDY# TRDY# STOP#
INT#A INT#B INT#C INT#D FRAME# IRDY# TRDY# STOP# SERR# PAR DEVSEL# PLOCK# 630PCLK PCIRST# R153
630-2
IDE
IDB0 IDB1 IDB2 IDB3 IDB4 IDB5 IDB6 IDB7 IDB8 IDB9 IDB10 IDB11 IDB12 IDB13 IDB14 IDB15 AG12 AF12 AH11 AG11 AJ10 AH10 AF10 AE10 AE13 AG10 AD14 AF11 AE14 AJ11 AD15 AH12 AH7 AG7 AJ6 AG6 AE6 AD6 AF5 AE5 AE7 AG5 AF7 AF6 AD8 AE9 AD10 AJ7 IDA0 IDA1 IDA2 IDA3 IDA4 IDA5 IDA6 IDA7 IDA8 IDA9 IDA10 IDA11 IDA12 IDA13 IDA14 IDA15
ICHRDYB IDREQ[B] IIRQB CBLIDB IIOR#[B] IIOW#[B] IDACK#[B] IDSAB[2] IDSAB[1] IDSAB[0] IDECSB#[1] IDECSB#[0]
AG13 AE15 AF15 AD16 AF13 AJ12 AH13 AE16 AJ13 AF14 AH14 AG14 IDESAB2 IDESAB1 IDESAB0 IDECS#B1 IDECS#B0
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR#B IDEIOW#B IDACK#B
ICHRDYB IDEREQB IDEIRQB CBLIDB IDEIOR#B IDEIOW#B IDACK#B
15 15 15 15 15 15 15
13,14 SERR# 13,14,15,23 PAR 13,14 DEVSEL# 13,14 PLOCK# 13,14,15,23 8 630PCLK PCIRST#
VCC3 U11 J13 J14 J15 J16 J17 J18 M9 M21 N9 N21 P9 P21 R9 R21 T9 T21 U9 U21 V9 V21 AA12 AA13 AA14 AA15 AA16 AA17 AA18 H14 H15 H16 N8 P8 P22 R8 R22 T8 T22 AB14 AB15 AB16 J19 J20 J21 K21 L21 AA9 AA10 AA11 AA19 AA20 AA21 Y9 OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD OVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD PVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD IVDD 630-3 RXAVSS TXAVSS OSC25VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS M12 M13 M14 M15 M16 M17 M18 N12 N13 N14 N15 N16 N17 N18 P12 P13 P14 P15 P16 P17 P18 R12 R13 R14 R15 R16 R17 R18 T12 T13 T14 T15 T16 T17 T18 U12 U13 U14 U15 U16 U17 U18 V12 V13 V14 V15 V16 V17 V18
630-2
IDESAB[0..2] IDEDB15 IDEDB14 IDEDB13 IDEDB12 IDEDB11 IDEDB10 IDEDB9 IDEDB8 IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0 IDEDA15 IDEDA14 IDEDA13 IDEDA12 IDEDA11 IDEDA10 IDEDA9 IDEDA8 IDEDA7 IDEDA6 IDEDA5 IDEDA4 IDEDA3 IDEDA2 IDEDA1 IDEDA0 I D ECS#B[0..1]
IDESAB[0..2] IDECS#B[0..1]
15 15
IDEDA[0..15] IDEDB[0..15]
IDEDA[0..15] IDEDB[0..15]
15 15
630-3
CHIPSET BYPASS VCC1.8V VCC1.8V VCC1.8V VCC1.8V VCC1.8V VCC3
CHIPSET BYPASS VCC1.8V
CAPACITOR VCC1.8V VCC1.8V VCC1.8V VCC3
BC130 .1US
BC131 .01US
BC132 .1US
BC133 .01US
BC134 .1US
BC145 .01US
BC208 105P
BC209 105P
BC300 105P
BC301 105P
BC306 NC
POWER
VCC3
VCCCORE
VCC3
VCC3
VCCCORE
VCC3
VCC1.8V
VCC1.8V
VCC1.8V
VCC1.8V
VCC1.8V
BC113 .1US
BC103 .01US
BC116 .1US
BC120 .01US
BC114 .1US
BC111 .01US
BC302 105P
BC303 105P
BC304 105P
BC305 105P
J E T W A Y I N F ORMATION Title
IVDD IVDD IVDD
W21 W9 Y21
6 3 0 - 2 , 6 3 0 - 3 ( P C I/IDE/PWR) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 4 of 26 Rev 3.0
VMD63 VMD62 VMD61 VMD60 VMD59/B7 VMD58/B6 VMD57/B5 VMD56/B4 VMD55/B3 VMD54/B2 VMD53/B1 VMD52/B0 VMD51/R2 VMD50/R1 VMD49/R0 VMD48/R3 VMD47/R4 VMD46/R5 VMD45/R6 VMD44/R7 VMD43/G2 VMD42/G3 VMD41/G1 VMD40/G0 VMD39/G5 VMD38/G4 VMD37/G6 VMD36/G7 VMD35/VBBLANKN VMD34/VBCTL0 VMD33/VBCTL1 VMD32/VBCAD
L1 M4 M3 M2 N5 M1 N4 N3 P2 P5 P1 R4 R3 R2 R1 R6 T1 T2 T3 R5 T4 U1 U2 T5 U3 U4 V1 V2 V3 V4 W1 T6
W4 W2 W3 P6 ROUT GOUT BOUT RSET 630VREF COMP 16 HSYNC 16 VSYNC HSYNC VSYNC R159 R158 33 33 AH5 AJ5 AJ4 AG4 AH4 AF4 AG2 AF3 AB6 VOSCI DDC1DATA DDC1CLK AG1 AG3 AH2
VBA1/VBCLK VMA10/VBHCLK VMA11/VGCLK VCS# ROUT GOUT BOUT RSET VREF COMP HSYNC VSYNC SSYNC OSCI DDC1DATA DDC1CLK
16 16 16
ROUT GOUT BOUT
630-4
VGA/DFP
8
VOSCI
16 DDC1DATA 16 DDC1CLK
VBHSYNC/VMD31 VBVSYNC/VMD30 DDC2CLK/VMD29 DDC2DATA/VMD28 VMD27 VMD26 VMD25 VMD24 VMD23 VMD22 VMD21 VMD20 VMD19 VMD18 VMD17 VMD16 VMD15 VMD14 VMD13 VMD12 VMD11 VMD10 VMD9 VMD8 VMD7 VMD6 VMD5 VMD4 VMD3 VMD2 VMD1 VMD0 VDQM7 VDQM6 VDQM5 VDQM4 VDQM3 VDQM2 VDQM1 VDQM0
U5 Y1 Y2 Y3 V5 Y4 Y5 AA1 W5 AB1 AB2 AB3 AB4 AB5 AC1 AC2 Y6 AC3 AC4 AC5 AD1 AD2 AD3 AD4 AA5 AD5 AE1 AE2 AE3 AE4 AF1 AF2 N2 N1 P4 P3 V6 AA2 AA3 AA4
ECLKAVDD DCLKAVDD DACAVDD
AJ3 AH3 AH6
ECLKAVDD DCLKAVDD DACAVDD
U6A 630-4 P L A CE THESE CIRCUITS CLOSE TO SiS 630 DACAVDD COMP 630VREF RSET R161 140 1% R299 0 BC127 0.1uF + BC142 10uF + C119 .1U BC137 0.1uF + BC138 10uF + C118 10uF BC136 0.1uF + BC140 10uF + C120 10uF BC141 1U-0805 1 L34 FB VCC3 2 DCLKAVDD R173 10 1 L32 FB VCC3 2 ECLKAVDD R175 10 1 L33 FB VCC3 2
R174 0
R162 0
J E T W A Y I N F ORMATION Title 6 3 0 - 4 (VGA/DFP) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 5 of 26 Rev 3.0
U7A 630-5 ENTEST PSON# ACPILED EXTSMI# PWRBTN# RING PME# THERM# KBDAT KBCLK PMDAT PMCLK KBLOCK# AG15 D1 D2 F10 E3 E4 E5 C8 D3 D4 C1 C2 C3 ENTEST PSON# ACPILED EXTSMI# PWRBTN# RING PME# THERM# KBDAT/GP10 KBCLK/GP11 PMDAT/GP12 PMCLK/GP13 KLOCK#/GP14 LAD0 LAD1 LAD2 LAD3 M6 K1 L4 K2 M5 L3 L2 F18 D18 C20 E18 B19 B20 A20 C19 D19 J2 K4 B2 LAD0 LAD1 LAD2 LAD3 LDRQ# LFRAME# SIRQ NMI SMI# INTR A20M# INIT# IGNNE# FERR# STPCLK# CPUSLP# SMCLK SMBDAT SMBALT#
LAD[0..3]
LAD[0..3]
23
20,21 PSON# 19 ACPILED 19 EXTSMI# 19 PWRBTN# 26 RING 13,14,23 PME#
ACPI
LDRQ# LFRAME# SIRQ NMI SMI# INTR A20M# INIT# IGNNE# FERR# STPCLK# CPUSLP# SMCLK SMBDAT GP15/SMBALT#
LDRQ# LFRAME# SIRQ
23 23 23
16 KBDAT 16 KBCLK 16 PMDAT 16 PMCLK 19 KBLOCK#
KBC
NMI 1 SMI# 1 INTR 1 A20M# 1 INIT# 1 IGNNE# 1 FERR# 1 STPCLK# 1 CPUSLP# 1 SMCLK SMBDAT 7,8,20 7,8,20
EEDI GP3/EEDO EECS EESK GP8/PLED0/OC2# RXAVSS TPI+ TPITPO+ TPOREXT
F8 E7 D6 C6 D5 C5 J10 J9 J12 J11 A5 R148 10K 1% PLED0 RXAVSS TPI+ TPITPO+ TPOTPI+ TPITPO+ TPO18 18 18 18 PLED0 18
R403 R404
NC NC
17 12,17
OC0# OC1#
OC0# OC1# LDRQ1# GPIO4 GPIO5 GPIO6 SPDIF
11 R405 NC 10,19,23
SPDIF
D8 E8 A7 D7 C7 B7 E9
GP0/PREQ#3/OC0# GP1/PGNT#3/OC1# GP2/LDRQ1#/OC3# GP4 GP5 GP6 GP7/SPDIF
630-5
AC '97
LAN
SPKR
SPKR SDATI1 SDATI0 SDATO SYNC AC_RESET# BIT_CLK
K3 B3 A3 D9 A8 C4 B8
SPK OSC25MHI/CLK25M AC_SDIN[1] AC_SDIN[0] AC_SDOUT AC_SYNC AC_RESET# AC_BIT_CLK
B5 Y2 25M
10,12 SDATI1 10,12 SDATI0 10,12 SDATO 10,12 SYNC 10,12 AC_RESET# 10,12 BIT_CLK
M14
HRTXRXP HRTXRXN
B6 A6
20 AUX_OK 9 BATOK 20 PWRGD
AUX_OK BATOK PWRGD
G2 K6 H3 H2 H1 R156 10M
AUXOK BATOK PWROK OSC32KHI OSC32KHO
RTC M13
RTCVDD TXAVDD RTCVSS
USB M12
OVDDAUX IVDDAUX RXAVDD USBVDD USBVDD
1 3 LPC PULL-HIGH PLACE NEAR TO SPUER I/O VCC3 RN63 LAD0 LAD1 LAD2 LAD3 2 4 6 8 4.7KX4 RN60 1 3 5 7 C104 10pF
Y3 32.768K 2 4
UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ UV4UV4+ CLK48M
H5 G3 H6 G4 G5 F3 E2 F1 F4 F5 J1
UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ UV4UV4+ UCLK48M
UV0UV0+ UV1UV1+ UV2UV2+ UV3UV3+ UV4UV4+ UCLK48M
17 17 17 17 17 17 17 17 12 12 8
A4
B4
K9
E1 F2
G1
H4
L9
SB3V VCC3 BC129 C102 C112 10uF 0.1uF 0.1uF 0.1uF VCC3 BC135 VCC3 BC128
C103 10pF RTCVDD VCC3 R154 C86 0.1uF
3.3V_TX
0.1uF C92 1U-0805 SB3V
THERM# 1 3 5 7 DO NOT NEED TO PLACE NEAR TO SiS 630 SB3V R147 RXAVSS PME# R155 R140 R127 C105 4.7K 0.1uF C106 560 C115 22UF 4.7K 0 SMBALT# 4.7K SB1.8V 100K 100K 3.3V_RX 4.7k C101 0.1uF C91 0.1uF C89 1U-0805 C99 0.1uF
SMCLK SMBDAT SIRQ LDRQ#
2 4 6 8
NEED NOT TO PLACE NEAR TO SiS 630 VCC3 RN54 7 5 3 1 4.7KX4 J E T W A Y I N F ORMATION 8 6 4 2
4.7KX4 AC'97 PULL-DOWN PLACE NEAR TO AC'97 CODEC SDATI1 SDATI0 SDATO SYNC R187 R188 R186 R185
GPIO4 GPIO5 LDRQ1# GPIO6
OPEN-100K OPEN-100K
ENTEST
Title 6 3 0 - 5 ( S O UTH BRIDGE) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 6 of 26 Rev 3.0
3,19
MD[0..63] 3 MA[0..14]
MD[0..63] MA[0..14] DQM[0..7]
3 DQM[0..7]
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
C46 0.1U
C56 0.1U
C68 0.1U
C69 0.1U 6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168 R81 8.2K 6 18 26 40 41 49 59 73 84 90 102 110 124 133 143 157 168 DIMM1 DIMM2 R82 8.2K
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA11 MA12 33 117 34 118 35 119 36 120 37 121 38 123 126 122 39 132 A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10]/AP A[11] A[12] BA[0] BA[1] A[13]
C54 0.1U
C58 0.1U
C84 0.1U
C94 0.1U
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL
C107 0.1U
C67 0.1U
C95 0.1U
C85 0.1U
VCC3_DUAL
VCC3_DUAL
VCC3_DUAL DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 28 29 46 47 112 113 130 131 21 22 52 53 105 106 136 137 3 3 SRAS# SCAS# SRAS# SCAS# CSA#0 CSA#1 CSB#0 CSB#1 3 RAMW# RAMW# SDCLK0 SDCLK1 SDCLK2 SDCLK3 CKE0 CKE1 SMCLK SMBDAT 115 111 30 114 45 129 27 48 42 125 79 163 128 63 83 82 165 166 167 DQM[0] DQM[1] DQM[2] DQM[3] DQM[4] DQM[5] DQM[6] DQM[7] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2]
C79 0.1U
C59 0.1U
C47 0.1U
6,8,20 6,8,20
SMCLK SMBDAT
addr = 1010000b
81 24 25 50 31 44
WP/NC NC NC NC NC/OE#0 NC/OE#2 NC NC NC NC
REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63]
147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA13 MA14 MA11 MA12
33 117 34 118 35 119 36 120 37 121 38 123 126 122 39 132
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3
A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] A[8] A[9] A[10]/AP A[11] A[12] BA[0] BA[1] A[13]
28 29 46 47 112 113 130 131 21 22 52 53 105 106 136 137
DQM[0] DQM[1] DQM[2] DQM[3] DQM[4] DQM[5] DQM[6] DQM[7] CB[0] CB[1] CB[2] CB[3] CB[4] CB[5] CB[6] CB[7] SRAS# SCAS# S#[0] S#[1] S#[2] S#[3] WE0# WE2# CK[0] CK[1] CK[2] CK[3] CKE[0] CKE[1] SCL SDA SA[0] SA[1] SA[2]
SRAS# SCAS# CSA#2 CSA#3 CSB#2 CSB#3 RAMW# VCC3_DUAL SDCLK4 SDCLK5 SDCLK6 SDCLK7 CKE2 CKE3
115 111 30 114 45 129 27 48 42 125 79 163 128 63 83 82 165 166 167
R63 8.2K
SMCLK SMBDAT
addr = 1010001b
81 24 25 50 31 44
WP/NC NC NC NC NC/OE#0 NC/OE#2 NC NC NC NC
REOE/NC DQ[0] DQ[1] DQ[2] DQ[3] DQ[4] DQ[5] DQ[6] DQ[7] NC DQ[8] DQ[9] DQ[10] DQ[11] DQ[12] DQ[13] DQ[14] DQ[15] NC DQ[16] DQ[17] DQ[18] DQ[19] DQ[20] DQ[21] DQ[22] DQ[23] NC DQ[24] DQ[25] DQ[26] DQ[27] DQ[28] DQ[29] DQ[30] DQ[31] NC DQ[32] DQ[33] DQ[34] DQ[35] DQ[36] DQ[37] DQ[38] DQ[39] NC DQ[40] DQ[41] DQ[42] DQ[43] DQ[44] DQ[45] DQ[46] DQ[47] NC DQ[48] DQ[49] DQ[50] DQ[51] DQ[52] DQ[53] DQ[54] DQ[55] NC DQ[56] DQ[57] DQ[58] DQ[59] DQ[60] DQ[61] DQ[62] DQ[63]
147 2 3 4 5 7 8 9 10 164 11 13 14 15 16 17 19 20 51 55 56 57 58 60 65 66 67 146 69 70 71 72 74 75 76 77 145 86 87 88 89 91 92 93 94 135 95 97 98 99 100 101 103 104 134 139 140 141 142 144 149 150 151 109 153 154 155 156 158 159 160 161
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
61 62 80 108
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
61 62 80 108
3 CSA#[0..3] 3 CSB#[0..3] 8 SDCLK[0..7] 22 CKE[0..3]
CSA#[0..3] CSB#[0..3] SDCLK[0..7] CKE[0..3] Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 7 of 26 Rev 3.0 Title D I M M 1 & DIMM2
1 12 23 32 43 54 64 68 78 85 96 107 116 127 138 148 152 162
SDRAM DIMM
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS SDRAM DIMM J E T W A Y I N F ORMATION
Frequency Selection VCC3
FS0 FS1 RN13 1 3 5 7 2.7KX4 VCC3 2 4 6 8 QQ5 QQ6 QQ7 QQ8 JP2 1 2 3 4 5 6 7 8 HEADER 4X2 FS0 FS1 FS2 FS3 R75 R76 R77 R78
1 1 10K 10K 10K 10K VCC3
@
CLOCK SPACE > 14 mil
R48 10K C24 CPUV 10pF C23 10pF C49 10pF C50 10pF C51 10pF C52 10pF C53 10pF C48 10pF C22 10pF C27 15pF
L21 FB BC22 .1U BC13 .1U BC14 .1U BC15 .1U BC23 .1U BC45 .1U BC20 .1U BC19 .1U BC18 .1U 1 15 19 27 30 36 42 + BC21 22uF 6 U3 C L O C K GENERATOR VDDREF VDDSDR VDDSDR VDDSDR VDDSDR VDDSDR VDDSDR VDDPCI
CPU CLK 2.5V LEVEL
CPUCLK0 CPUCLK1 CPUCLK2 FS1/PCICLK0 FS2/PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6
46 45 43 7 8 9 11 12 13 14
R43 R44
22 22
630CCLK 370CPUCLK
630CCLK 370CPUCLK
3 1
FS1 FS2
1 2 4 6 8 R55
RN7 1 3 5 7 22 22 22
22X4
PCICLK1 PCICLK2 PCICLK3 697PCLK 630PCLK
PCICLK1 PCICLK2 PCICLK3 697PCLK 630PCLK
13 13 14 23 4
3 16 22 33 39 10 L7 FB
GNDREF GNDSDR GNDSDR GNDSDR GNDSDR GNDPCI FS3/REF0 REF1 2 48 FS3 R54 R42 PICCLK VOSCI PICCLK VOSCI 1 5
VCC2.5
24_48/CPU2V_3V# FS0/48MHZ SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM13
25 26 17 18 20 21 28 29 31 32 34 35 37 38 40 41
CPUV FS0
R47 R46 RN5 2 4 6 8 7 5 3 1 R45 10 RN2 0X4 1 3 5 7 8 6 4 2
22 22 0X4 SDCLK4 SDCLK5 SDCLK0 SDCLK1 SDCLK6 SDCLK7 SDCLK2 SDCLK3
SIO48M UCLK48M SDCLK[0..7]
SIO48M 23 UCLK48M 6 7
47
VDDLCPU
BC11 10U
BC9 0.1uF
BC10 0.1uF
BC12 0.001uF 44 GNDL
630SDCLK
630SDCLK
3
# 630SDCLK-630CPUCLK<0.5NS 2 4 6 8 7 5 3 1 CP1
C25 10pF
C26 10pF
6,7,20 6,7,20
SMCLK SMBDAT
SMCLK SMBDAT
24 23
X1
X2
SCLK SDATA
CP2 10P-8P4C 1 3 5 7 (5 OPTIONS) 1.ICS9248-102 (ICS) 2.ICW207 (IC Works) 3.PLL52C72-31 (Phase Link) 4.W83194R-630 (Winbond) 5.RTM540-630 (Realtek) C36 10pF 8 6 4 2 10P-8P4C
4
Y1
14.318MHz Frequency Selection Table (FS3) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 (FS2) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 (FS1) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 (FS0) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 CPU (MHz) 66.7 100 150 133 66 100 100 133 66.7 83.3 90 95 95 112 166 166 SDRAM (MHz) 100 100 100 100 133 133 150 133 66.7 83.3 90 95 126 112 111 166 PCI REF (MHz) (MHz) 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 33.33 14.318 NOTE: PCICLK<37.5MHz C37 10pF
5 JP2 CPU/SDRAM AUTO 66/66 66/100 100/100 100/133 133/100 133/133
1-2 3-4 5-6 7-8 OFF OFF OFF ON ON ON ON OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF ON OFF ON OFF ON OFF OFF OFF OFF OFF
JP10 ON OFF OFF OFF OFF OFF OFF
JP11 ON OFF OFF OFF OFF OFF OFF
J E T W A Y I N F ORMATION Title C L O C K G E N E R A T O R ( 5 OPTIONS) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 8 of 26 Rev 3.0
INT. RTC MUST CLOSE TO CHIP RTCVDD PIN
SB5V
R244 180 C B E Q19 2N3904 RTCVDD
C B E
1
(~2.4V) D6 R L Z2.4A-DIP 2
+
BC151 22uF D12 1N4148 + BC155 470UF D11 1N4148 JP6 3 2 1 HEADER 3 1-2 : CLEAR CMOS + C111 1uF-0805 C100 0.01uF C131 100UF R219 BATOK 120K 6
D7 1N4148
D10 1N4148 0603 R406 NC-0
D G
R242 G 470 R241 100K S
D9 1N4148
S
D
Q18 N D S 3 5 2AP-SOT23 P L ACE NEAR TO SiS 630E
NOTE: P i n D and S can NOT be SWAPPED
R243 1K
BAT
BAT1 Lithium 3V/60MA
J E T W A Y I N F ORMATION NOTE: S I S IS NOT RESPONSIBLE FOR A N Y ERRORS OR OMISSIONS IN T H ESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Title RTC Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 9 of 26 Rev 3.0
ALC100/ALC200/AD1881/WM9703/CS4297A/STAC9721
+12V VCCD VCC BC175 10uF BC176 0.1uF BC193 10uF BC192 0.1uF L45 FB VCC VCC VCC BC187 10uF VCCA BC190 .1U VCCD VCC3 R281 3.3V AC97 CODEC 0 R280 5V AC97 CODEC OPEN-0 BC170 10uF BC171 0.1uF BC191 10uF BC189 0.1uF VCCD VCCA CS4297A=.22UF AD1881/WM9703/STAC9721=1U BC156 BC157 BC160 1uF BC158 1uF 1uF BC161 1uF BC163 1uF BC165 1uF BC186 1uF LINE_OUT_R LINE_OUT_L LINE_IN_R LINE_IN_L MIC1 +2.25Vref 1uF BC159 1uF 1uF CD_R CD_L CD_GND VIDEO_R VIDEO_L AUX_R AUX_L + 10uF VCCA 0 C501 L46 1 UTC 78L05 VIN GND VOUT 3 VCCA
+ 10uF
C502 C500 105P
25 38
DVDD2 DVDD1
AVDD1 AVDD2
NC NC NC NC NC
39 40 41 43 44
9 1
U17 24 23 21 22 20 18 19 17 16 15 14 13 37 36 35
VCC ACS0 R276 R278 OPEN OPEN ACS1
6,12
SDATI1
R279
NC-0
47 48
CHAIN_IN CLOCK_OUT RESET SDATA_OUT SDATA_IN SYNC BIT_CLK PC_BEEP
LINE_IN_R LINE_IN_L MIC1 MIC2 CD_R CD_L CD_GND VIDEO_R VIDEO_L AUX_R AUX_L
1uF
LINE_IN_R LINE_IN_L MIC1 CD_R CD_L CD_GND VIDEO_R VIDEO_L AUX_R AUX_L 11 11 11 11 11
2
11 11
6,12
AC_RESET# 6,12 SDATO 6,12 SDATI0 6,12 SYNC 6,12 BIT_CLK
AC_RESET# SDATO SDATI0 SYNC BIT_CLK PC_BEEP
11 5 8 10 6 12
1uF
11 11 11
BC162 BC164 BC166
A D 1 8 8 1/CS4297A/WM9703/STAC9721 DO NOT STUFF = MASTER CODEC VCC R277 OPEN ACS1 ACS0 OPEN 28 27 BC169 10uF C148 C149 AFILT1 AFILT2 FILT_L FILT_R RX3D 46 45 CS1 CS0
PHONE MONO_OUT LINE_OUT_R LINE_OUT_L
PHONE_IN MONO_OUT LINE_OUT_R LINE_OUT_L
12 12 11 11
TO AC97 MODEM IN TO AC97 MODEM OUT
R275 +2.25Vref R245 0
11 +2.25Vref
VREFOUT VREF XTAL_OUT CX3D XTAL_IN DVSS2 DVSS1 AVSS1 AVSS2
BC188 680pF
BC185 680pF
BC184 680pF
29 30 31 32
33
34 2
CS4297A DO NOT STUFF CS4297A STUFF O P E N-1U-0805
OPEN-.1U
0.1uF R500 BC168 10uF NC Y4 24.576MHz BC177 5pF BC194 10pF 6,19,23 BC182 NC-.1uF AD1881/WM9703=STUFF C S 4297A/STAC9721=DO NOT STUFF SPKR R296 1.37K R295 4.99K BC200 100nF PC_BEEP R267 24.5MHZ NC-10 12
ALC100
R275 X R277 X BC182 X BC183 X C200 X BC181 X BC180 X BC179 1u BC174 102P BC173 102P PIN 39 X PIN 40 X
ALC200
R275 x R277 x BC182 x BC183 x C200 C200 105P 105P BC181 x BC180 1u BC179 1u BC174 102P BC173 102P PIN 39 x Pin 40 x BC174 BC173 270pF BC180 BC179 1uF BC181 OPEN-10U BC183 NC-47nF
7 4 26 42
BC172
AD1881
3
BC201 100nF
AD1881 1U 1U 270P 1uF 270P
WM9703 10U X X 270P
CS4297A .01U X 1000P 1000P
STAC9721 .1U/10U X 820P J E T W A Y I N F ORMATION 820P Title AC'97 CODEC
270pF Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 10 of 26 Rev 3.0
VCCA FOR CS4297A STUFF R204 OPEN-1.8K R205 10 +2.25Vref R207 10 CD_R R206 47K BC149 1nF 1K 2K CDIN1 1 2 3 4 H 4 X 1 - 2 . 54mm-POST CDIN2 1 2 3 4 H 4 X 1 - 2 .0mm-POST L37 10 LINE_IN_R FB R246 47K L38 10 LINE_IN_L R247 47K C128 FB BC147 1000P 10 LINE INPUT MIC1 0.068U 3.3K BC143 3300PF MIC INPUT R164 BC146 1000P J3 J4 C138 10U C127 220PF R402 NC
R209 10 CD_L R210 47K BC150 1nF 1K
R208 10 CD_GND 1K
VCC L500 FB-31
R400 NC-0-20K 0 C123 NC-100U 10 LINE_OUT_R LOUT_R C136 1U C137 1U R220 NC-0-20K R221 NC-0-20K C133 NC-100P C134 4 NC-100P C124 NC-1U-0805 R203 NC-0-20K 1 2 3 10 LINE_OUT_L LOUT_L U15-NC OUTA INA BYPS VDD OUTB INB 8 L36 7 6 5 C125 NC-.1U C126 NC-100U R501 33 R503 NC R504 NC FB-300OHM LOL C109 470P C108 470P L I NE OUTPUT R502 33
R202
L35
FB-300OHM LOR
J2
GND SHDN L M 4 8 8 0-250MW
R401 R248 10 VIDEO_R R249 47K C139 NC-100P 1K JP4 1 2 3 4 H 4 X 1 - 2 .54mm-POST R138 OPEN-0 R122 OPEN-0 R139 6 SPDIF R123 OPEN OPEN-47 SPDIF open-h2x1 2 1 R252 10 AUX_R R253 47K C141 NC-100P 1K JP5 1 2 3 4 H 4 X 1 - 2 .54mm-POST R254 10 AUX_L R255 47K C142 NC-100P 1K 0 VCC3 VCC
R250 10 VIDEO_L R251 47K C140 NC-100P 1K
J E T W A Y I N F ORMATION Title A U D I O A N A L O G UE IN/OUT Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 11 of 26 Rev 3.0
-DATA4 +DATA4
R171 R170
22 22 C97 C98 47pF
UV4UV4+
UV4UV4+
6 6
R166 15K
R167 15K
47pF P L ACE THESE COMPONENT NEAR SiS630
AMR
VCC3 VCC +12V -12V AMR1 SB5V TO MODEM SYSTEM 10 MONO_OUT MONO_OUT B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 AUDIO_MUTE# GND MONO_OUT/PC_BEE RESERVED RESERVED PRIMARY_DN# -12V GND +12V GND +5V GND RESERVED RESERVED +3.3V GND SDATA_OUT RESET# SDATA_IN[3] GND SDATA_IN[2] GND MSTRCLK AUDIO_PWRDN MONO_PHONE RESERVED RESERVED RESERVED GND 5VDUAL/5VSB USB_OC GND USB+ USBGND S/P-DIF_IN GND 3.3VDUAL/3.3VSB GND SYNC GND SDATA_IN[1] GND SDATA_IN[0] GND BITCLK A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 SB3V TO SUBAUDIO SYSTEM PHONE_IN PHONE_IN 10
OC1# +DATA4 -DATA4
OC1#
6,17
6,10 SDATO 6,10 AC_RESET#
SDATO AC_RESET#
SYNC SDATI1 SDATI0 R189 BIT_CLK 10 Critical trace
SYNC SDATI1 SDATI0 BIT_CLK 6,10 6,10 6,10
6,10
10 24.5MHZ
AMR-CON.
C122 OPEN
J E T W A Y I N F ORMATION Title A U D I O / M O DEM RISER Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 12 of 26 Rev 3.0
VCC3 VCC3 VCC3 VCC3
VCC -12V PCI_1 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
VCC +12V
VCC -12V PCI_2 TRST# TMS TDI INT#B INT#D SB3V B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
VCC +12V
14
TCK
TCK
4,14,15,23 4,14,15,23
INT#C INT#A
INT#C INT#A VCC3 R310 1K PCICLK1 PREQ#0 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10
8 PCICLK1 4,14 PREQ#0
4,14 4,14
IRDY# DEVSEL#
4,14 PLOCK# 14 PERR# 4,14 SERR#
-12V TCK GROUND TDO +5V +5V INT#[B] INT#[D] PRSNT#[1] RESERVED PRSNT#[2] GROUND GROUND RESERVED GROUND CLK GROUND REQ# +5V(I/O) AD[31] AD[29] GROUND AD[27] AD[25] +3.3V C/BE#[3] AD[23] GROUND AD[21] AD[19] +3.3V AD[17] C/BE#[2] GROUND IRDY# +3.3V DEVSEL# GROUND LOCK# PERR# +3.3V SERR# +3.3V C/BE#[1] AD[14] GROUND AD[12] AD[10] GROUND AD[8] AD[7] +3.3V AD[5] AD[3] GROUND AD[1] +5V(I/O) ACK64# +5V +5V
TRST# +12V TMS TDI +5V INT#[A] INT#[C] +5V RESERVED +5V(I/O) RESERVED GROUND GROUND RESERVED RST# +5V(I/O) GNT# GROUND RESERVED AD[30] +3.3V AD[28] AD[26] GROUND AD[24] IDSEL +3.3V AD[22] AD[20] GROUND AD[18] AD[16] +3.3V FRAME# GROUND TRDY# GROUND STOP# +3.3V SDONE SBO# GROUND PAR AD[15] +3.3V AD[13] AD[11] GROUND AD[9] C/BE#[0] +3.3V AD[6] AD[4] GROUND AD[2] AD[0] +5V(I/O) REQ64# +5V +5V
TRST# TMS TDI INT#B INT#D
4,14,15,23 4,14,15,23 4,14,15,23 4,14 4,14
TCK
INT#D INT#B
PCIRST# PGNT#0 R222 AD30 AD28 AD26 AD24 R224 100 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE1 SBO#1 PAR AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 R227 2.7K VCC 0 PME#
PCIRST# PGNT#0 PME# 4
4,14,15,23 8 PCICLK2 4,14 6,14,23 PREQ#1
PCICLK2 PREQ#1 AD31 AD29 AD27 AD25
AD20
C/BE#3 AD23 AD21 AD19 AD17
FRAME# TRDY# STOP#
4,14,15,23 4,14,15,23 4,14,15,23
C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR#
PAR
4,14,15,23
C/BE#1 AD14 AD12 AD10
-12V TCK GROUND TDO +5V +5V INT#[B] INT#[D] PRSNT#[1] RESERVED PRSNT#[2] GROUND GROUND RESERVED GROUND CLK GROUND REQ# +5V(I/O) AD[31] AD[29] GROUND AD[27] AD[25] +3.3V C/BE#[3] AD[23] GROUND AD[21] AD[19] +3.3V AD[17] C/BE#[2] GROUND IRDY# +3.3V DEVSEL# GROUND LOCK# PERR# +3.3V SERR# +3.3V C/BE#[1] AD[14] GROUND AD[12] AD[10] GROUND AD[8] AD[7] +3.3V AD[5] AD[3] GROUND AD[1] +5V(I/O) ACK64# +5V +5V
TRST# +12V TMS TDI +5V INT#[A] INT#[C] +5V RESERVED +5V(I/O) RESERVED GROUND GROUND RESERVED RST# +5V(I/O) GNT# GROUND RESERVED AD[30] +3.3V AD[28] AD[26] GROUND AD[24] IDSEL +3.3V AD[22] AD[20] GROUND AD[18] AD[16] +3.3V FRAME# GROUND TRDY# GROUND STOP# +3.3V SDONE SBO# GROUND PAR AD[15] +3.3V AD[13] AD[11] GROUND AD[9] C/BE#[0] +3.3V AD[6] AD[4] GROUND AD[2] AD[0] +5V(I/O) REQ64# +5V +5V
TRST# TMS TDI INT#C INT#A SB3V
PCIRST# PGNT#1 R223 AD30 AD28 AD26 AD24 R225 100 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE2 SBO#2 PAR AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 R257 2.7K VCC AD22 0 PGNT#1 4,14,15,23 PME#
AD8 AD7 AD5 AD3 VCC AD1 R226 2.7K
AD8 AD7 AD5 AD3 VCC AD1 R256 2.7K
PCI_CON
PCI_CON
4,14,15,23 4,14,15,23
C/BE#[0..3] AD[0..31]
C/BE#[0..3] AD[0..31]
VCC RN71 SDONE1 SDONE2 SBO#2 SBO#1 1 3 5 7 4.7KX4 2 4 6 8 FRAME# IRDY# TRDY# DEVSEL# 1 3 5 7 2.7KX4 RN73 2 4 6 8
VCC VCC RN72 TRST# TCK TMS TDI 1 3 5 7 4.7KX4 Size B Date: 2 4 6 8 J E T W A Y I N F ORMATION Title P C I C O N N E C T OR 1 & 2 D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 13 of 26 Rev 3.0
VCC3 VCC3
VCC -12V PCI_3 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
VCC +12V
13
TCK
TCK
4,13,15,23 4,13,15,23
INT#A INT#C VCC3 R410 1K 8 PCICLK3 4 PREQ#2
INT#A INT#C
PCICLK3 PREQ#2 AD31 AD29 AD27 AD25 C/BE#3 AD23 AD21 AD19 AD17 C/BE#2 IRDY# DEVSEL# PLOCK# PERR# SERR# C/BE#1 AD14 AD12 AD10
4,13 4,13
IRDY# DEVSEL#
4,13 PLOCK# 13 PERR# 4,13 SERR#
-12V TCK GROUND TDO +5V +5V INT#[B] INT#[D] PRSNT#[1] RESERVED PRSNT#[2] GROUND GROUND RESERVED GROUND CLK GROUND REQ# +5V(I/O) AD[31] AD[29] GROUND AD[27] AD[25] +3.3V C/BE#[3] AD[23] GROUND AD[21] AD[19] +3.3V AD[17] C/BE#[2] GROUND IRDY# +3.3V DEVSEL# GROUND LOCK# PERR# +3.3V SERR# +3.3V C/BE#[1] AD[14] GROUND AD[12] AD[10] GROUND AD[8] AD[7] +3.3V AD[5] AD[3] GROUND AD[1] +5V(I/O) ACK64# +5V +5V
TRST# +12V TMS TDI +5V INT#[A] INT#[C] +5V RESERVED +5V(I/O) RESERVED GROUND GROUND RESERVED RST# +5V(I/O) GNT# GROUND RESERVED AD[30] +3.3V AD[28] AD[26] GROUND AD[24] IDSEL +3.3V AD[22] AD[20] GROUND AD[18] AD[16] +3.3V FRAME# GROUND TRDY# GROUND STOP# +3.3V SDONE SBO# GROUND PAR AD[15] +3.3V AD[13] AD[11] GROUND AD[9] C/BE#[0] +3.3V AD[6] AD[4] GROUND AD[2] AD[0] +5V(I/O) REQ64# +5V +5V
TRST# TMS TDI INT#D INT#B SB3V
TRST# TMS TDI INT#D INT#B
4,13,15,23 4,13,15,23 4,13,15,23 4,13 4,13 VCC3
PCIRST# PGNT#2 R268 AD30 AD28 AD26 AD24 R269 100 AD22 AD20 AD18 AD16 FRAME# TRDY# STOP# SDONE3 SBO#3 PAR AD15 AD13 AD11 AD9 C/BE#0 AD6 AD4 AD2 AD0 R273 2.7K VCC AD24 0 PME#
PCIRST# PGNT#2 PME#
4,13,15,23 4 6,13,23 PCIRST#
R212 OPEN-4.7K
FRAME# TRDY# STOP#
4,13,15,23 4,13,15,23 4,13,15,23
PAR
4,13,15,23
AD8 AD7 AD5 AD3 VCC AD1 R272 2.7K
PCI_CON
4,13,15,23 4,13,15,23
C/BE#[0..3] AD[0..31]
C/BE#[0..31] AD[0..31]
VCC RN70 4,13 4,13 PREQ#1 PREQ#0 PREQ#2 PREQ#1 PREQ#0 1 3 5 7 2.7KX4 2 4 6 8 INT#B INT#C INT#D INT#A 2 4 6 8 8.2KX4 RN76 1 3 5 7
VCC3 R270 SDONE3 R271 SBO#3 4.7K 4.7K
VCC RN74 STOP# PLOCK# PERR# SERR# 1 3 5 7 2.7KX4 2 4 6 8
VCC
J E T W A Y I N F ORMATION Title P C I C O N NECTOR 3&4 Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 14 of 26 Rev 3.0
4 IDEDA[0..15]
IDEDA[0..15] RN61 33X4 DA8 DA9 DA10 DA11 DA15 DA14 DA13 DA12 DA8 DA9 DA10 DA11 DA12 DA13 DA14 DA15 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA12 IDEDA13 IDEDA14 IDEDA15 2 4 6 8 2 4 6 8 RN64 33X4 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 2 4 6 8 2 4 6 8 RN62 33X4 CBLIDA IDESAA2 IDECS#A1 1 3 5 7 1 3 5 7 IDEDA7 IDEDA6 IDEDA5 IDEDA4 IDEDA3 IDEDA2 IDEDA1 IDEDA0 RN65 33X4 1 3 5 7 1 3 5 7 IDEDA8 IDEDA9 IDEDA10 IDEDA11 IDEDA15 IDEDA14 IDEDA13 IDEDA12
R201 10K IDERST# VCC3 IDEDA7 IDEDA6 IDEDA5 IDEDA4 IDEDA3 IDEDA2 IDEDA1 IDEDA0 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 IDE1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 H20X2-POST
R181 1K
4 IDEREQA 4 IDEIOW#A 4 IDEIOR#A 4 ICHRDYA 4 IDACK#A 4 IDEIRQA
IDEREQA IDEIOW#A IDEIOR#A ICHRDYA IDACK#A IDEIRQA R196 10K
R199 R182 R198 R197 R180 R195
82 22 22 82 22 82 R200 5.6K IDESAA1 IDESAA0 IDECS#A0 R194 R193 R178 33 33 33
R179 R177
33 33
CBLIDA
4
D14 19 HDDLED# 4 IDESAA[0..2] 4 I D ECS#A[0..1] HDDLED# IDESAA[0..2] I D ECS#A[0..1] 1N4148
4 IDEDB[0..15]
IDEDB[0..15] VCC3 VCC5 DB9 DB6 DB8 DB7 DB13 DB2 DB12 DB3 IDE2 Q31 MMBT3904 R510 VCC3 IDEDB7 IDEDB6 IDEDB5 IDEDB4 IDEDB3 IDEDB2 IDEDB1 IDEDB0 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 H20X2-POST DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 IDEDB8 IDEDB9 IDEDB10 IDEDB11 IDEDB12 IDEDB13 IDEDB14 IDEDB15 DB11 DB4 DB10 DB5 DB15 DB0 DB14 DB1 RN51 RN57 1 3 5 7 1 3 5 7 RN55 1 3 5 7 1 3 5 7 33X4 33X4 2 4 6 8 2 4 6 8 33X4 RN56 2 4 6 8 2 4 6 8 IDEDB9 IDEDB6 IDEDB8 IDEDB7 IDEDB13 IDEDB2 IDEDB12 IDEDB3
R511 4.7K
R512 4.7K
IDERST# R176 10K
4,13,14,23
PCIRST# 1K
Q30 MMBT3904 R133 1K
IDEDB11 IDEDB4 IDEDB10 IDEDB5 IDEDB15 IDEDB0 IDEDB14 IDEDB1
4 IDEREQB 4 IDEIOW#B 4 IDEIOR#B 4 ICHRDYB 4 IDACK#B 4 IDEIRQB
IDEREQB IDEIOW#B IDEIOR#B ICHRDYB IDACK#B IDEIRQB R131 10K
R151 R149 R135 R134 R132 R130
82 22 22 82 22 82 R150 5.6K IDESAB1 IDESAB0 IDECS#B0 R120 R118 R116 33 33 33
33X4
R119 R117
33 33
CBLIDB IDESAB2 IDECS#B1
CBLIDB
4
D13 HDDLED# 1N4148 4 IDESAB[0..2] 4 I D ECS#B[0..1] IDESAB[0..2] I D ECS#B[0..1]
J E T W A Y I N F ORMATION NOTE: S I S IS NOT RESPONSIBLE FOR A N Y ERRORS OR OMISSIONS IN T H ESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Title I D E C O NNECTORS Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 15 of 26 Rev 3.0
SB5V VCC D20 DIP IN5817 R7 10K R8 10K L1 FB L2 FB C1 50pF C2 50pF SB5V SB5V
VCC JP9 1 2 3 HEADER 3 F1 FUSE JP9 :1-2 K/B POWER-ON DSABLE :2-3 K/B POWER-ON ENABLE
CONNECTOR VIEW
TOP VIEW 6 . 5 .
6
KBDAT
KBDAT
XKBDAT
KBMS1 1 2 3 4 5 6 BC2 0.1uF 13 14 15 4 .
6 .
5 . 3 .
. . . . 4 2 1 3 6 . 5 .
6
KBCLK
KBCLK
XKBCLK
2 .
1 .
. . . . 4 2 1 3 6 . 4 . 3 . 2 . 1 . 5 .
VCC
R9 10K
R10 10K L3
6
PMDAT
PMDAT FB L4
XPMDAT
6
PMCLK
PMCLK FB R3 200K R4 200K C7 50pF C8 50pF
XPMCLK
BC1 0.1uF
7 8 9 10 11 12 PS/2 KB/MS
16
17
VGA CONNECTOR 1
D5 BAT54S 1 2 VCC3 1 D4 BAT54S 2 VCC3 1 D3 BAT54S 2 VCC3
3 1 2
19ohm@100MHz VGA1
VCC3
CONNECTOR TOP VIEW
R103
R101
3
3
3
2.2K 11 12 13 14 15 R102 33 R100 33
2.2K
5 5 5
ROUT GOUT BOUT
ROUT GOUT BOUT
L22 L24
1 1
FB FB
2 2
L23
1
FB
2
6 1 7 2 8 3 9 4 10 5 C73 27pF C74 27pF C75 27pF VGACON
DDC1DATA HSYNC VSYNC DDC1CLK C72 68pF C80 68pF
DDC1DATA HSYNC VSYNC DDC1CLK 5 5
5
5
R121 75
R104 75
R105 75
C81 27pF
C76 27pF
C77 27pF
J E T W A Y I N F ORMATION NOTE: SIS IS NOT RESPONSIBLE FOR ANY ERRORS OR OMISSIONS IN THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Title K E Y B O A R D & M O U S E C O N NECTORS Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 16 of 26 Rev 3.0
F3 FB-600OHM L14 BC25 0.1uF + BC26 100uF
FUSE
IOVSB
R68 470K BC46 0.001uF R69 560K
OC0#
OC0#
6
CP11 USB1 H3 H4 H5 HOLE HOLE HOLE VCC -DATA +DATA GND U1 U2 U3 U4 L15 L16 FB FB -DATA0 +DATA0 2 4 6 8 1 3 5 7
UV3UV3+ UV0+ UV0-
UV3UV3+ UV0+ UV0-
6 6 6 6
NC-47P-8P4C CP12 2 4 6 8 2 4 6 8 22X4 RN58 UV2UV2+ UV1UV1+ RN8 1 3 5 7 NC-47P-8P4C UV2UV2+ UV1UV1+ UV2UV2+ UV1UV1+ 6 6 6 6
RN59 C39 68P C38 NC-68P -DATA2 +DATA2 -DATA1 +DATA1 1 3 5 7
-DATA3 +DATA3 +DATA0 -DATA0
1 3 5 7
2 4 6 8
UV3UV3+ UV0+ UV0-
1 3 5 7
2 4 6 8
+DATA3 -DATA3 +DATA0 -DATA0
22X4 1 3 5 7 L17 L18 FB FB -DATA3 +DATA3
15K-8P4R RN75 2 4 6 8 15K-8P4R -DATA2 +DATA2 -DATA1 +DATA1
H6 H7 H8
HOLE HOLE HOLE USB-BP
VCC -DATA +DATA GND
U5 U6 U7 U8
L13 BC24 NC-.1U NC-FB
C41 68P
C40 NC-68P F4 L47 FUSE
VCC
R285 + BC196 100uF 470K BC197 0.001uF R284 560K
OC1#
USB2 -DATA2 +DATA2 L41 L42 FB FB 1 2 3 4 5 6 7 8 9 10 H5X2-POST L43 L44 FB FB -DATA1 +DATA1 BC198 0.1uF
FB-600OHM
OC1#
6,12
C151 NC-68P
C153 68P
C152 68P
C150 NC-68P
L48 FB
BC199 470pF
J E T W A Y I N F ORMATION Title U S B C O NNECTORS Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 17 of 26 Rev 3.0
PLACE NEAR THE SiS630E 3.3V_RX
C87 .01U
LAN
CONNECTOR TOP VIEW P/N:UB1112C-L1 (FONCONN) SB3V L9 R49 510 L10 L11 L12
o
o
L7 L5 L3
o
L1 H2 H4
o
UL-2 LAN
R144 25.5 1%
R142 25 .5 1% 6 PLED0 PLED0 L10 L12
UL_B1 PLED0 PLED1 VCC VCC L9 L11
x o
H1 H3
o o o o o L6 L4 L2 o o o L8
U1 U2 U3 U4
x o
UL-1 USB
6 6
TPI+ TPI-
TPI+ TPI3.3V_TX
R141 R145 3.3V_TX
25.5 1% 25.5 1% 3.3V_TX 10 12 11 9 13 TF1 7 5 6 RX+ RXC RXTX+ TXC TXNC NC FC515LS RD+ RDC RDTD+ TDC TDNC NC 1 3 2 16 14 15 4 8 L3 L6 L5 L4
RO+ RONC NC H5
L1 L2 L7 L8
x o
HOLE HOLE RJ45 H1 H2 SB3V
x oooo o o x x oooo o o x
U5 U6 U7 U8 H6 H8 L28 2 FB
H7
x o
3.3V_TX
TO+ TONC NC UL-2
R143 49.9 1%
C88 10P
R146 49.9 1%
C90 10P
C42 .01U
1
6 6
TPO+ TPO-
TPO+ TPO1 FB L8 2
PLACE NEAR 630E
SB3V R50 75 R51 75 R5 75 R6 75 C32 + .01U C250 0.01U 1
L31 FB
2
3.3V_RX
J E T W A Y I N F ORMATION NOTE: SIS IS NOT RESPONSIBLE FOR ANY ERRORS OR OMISSIONS IN THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Title N E T W O R K OPTION 1 Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 18 of 26 Rev 3.0
6 KBLOCK#
VCC IOVSB VCC VCC
VCC
VCC
R289 330 R294 C 3,7 MD[0..63] MD[0..63] 6,10,23 SPKR SPKR R297 4.7K E VCC3 RSTSW# HDDLED# ACPILED B Q20 MMBT3904 C160 0.1uF 33
R291 330
R293 330 JP8 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 F_PNL R292 330 SB3V R286 470 KBLOCK#
R298 4.7K
EXTSMI#
20 RSTSW# M D 62: PCI Clock PLL Enable MD62 R64 OPEN/4.7K 15 HDDLED# 6 ACPILED M D 61: SDRAM Clock DLL Enable M D 60: CPU Clock DLL Enable M D [ 59..58]: SDRAM Clock DLL'S DRC[1..0] (Default 00) M D [ 57..56]: CPU Clock DLL'S DRC[1..0] (Default 00) M D [ 55..54]: PCI Clock DLL'S DRC[1..0] (Default 00) MD32: 0=NTSC / 1=PAL M D 38: Enable INTERRUPT MD38 R163 OPEN/4.7K MD61 MD60 MD59 MD58 MD57 MD56 MD55 MD54 R65 R66 R67 R70 R71 R72 R73 R74 OPEN/4.7K OPEN/4.7K OPEN/4.7K
R288 OPEN/4.7K OPEN/4.7K OPEN/4.7K OPEN/4.7K OPEN/4.7K 6 PWRBTN# PWRBTN# VCC3 C158 1u-0805 R290 51K R287 0 51K
6
6 EXTSMI# C159 1U-0805
SPKR RESET TURBO LED
1 3 5 7 9 11 13 15
2 4 6 8 10 12 14 16
POWER LED
TURBO S/W
IDELED
1 3
2 4
SMI S/W
ACPILED
1 3
2 4
PWR BTN
J E T W A Y I N F ORMATION NOTE: SIS IS NOT RESPONSIBLE FOR ANY ERRORS OR OMISSIONS IN THESE SCHEMATICS. THIS IS AN EXAMPLE ONLY. Title D A T A A C Q U I S I T I O N & JUMPERS Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 19 of 26 Rev 3.0
VCC VCC3 +12V VCC
R56 10K + C21 100U PWMPG 2 N 2 2 22A-TO23 D VCC2.5 Q3 C6 470U VCC3 16 R90 510 D VTT 4 5 N03-DPACK Q6 G S R112 270 C64 1500U + R111 1k R52 NC-0 15 14 DRIVE4 18 19 G S + R57 316 R53 470 R41 510 C33 0.1U 8 9 1 10 C9 1U
R11 10 H I P 6 0 2 1 -INTERSIL RT9231 C10 1000P 28 U2 OCSET 23 R12 27 26 R25 4.7 3.9K G S Q1 25 R2 0 G S D D
L5 1.3UH
C3 1500U Q2 F D B 6 0 30L-T0252
+
C14 1500U
+
VCCCORE
PGOOD SD DRIVE2 VSEN2
VCCP
UGATE PHASE
18A
L6 R31 5.1K 3.3UH C19 1500U C16 105P VID0 VID1 VID2 VID3 VID4 R37 OPEN SB1.8V + C17 1500U + C57 1000U + C35 1000U + C5 1500U +
11
LGATE SELECT VAUX DRIVE3 COMP VSEN3 VID0 VID1 VID2 VID3 VID4 SS PGND VSEN1 FB
F D B 6 0 30L-TO252 24 22 21 C11 20 C12 7 6 5 4 3 12 NC NC
R17 R15 0 NC
R14 0 R13 NC
FAULT/RT
GND
FIX
VSEN4
R18 OPEN
VCC R16 360K
17
13
2
C34
0.1u
C13 OPEN R191 1K
C/D
AUX_OK VCC3 C71 470U VCC1.8V R192 510 G 4 5 N 03-DPACK Q11 S R172 470 + C117 1500U R160 1K VCC2.5 VCC VCC C143 470U VCC2.5 + BC98 .1U R85 300 SB5V VCC -12V VCC3 VCC SB5V +12V VCC 1 PWRGOOD R83 OPEN/2.7K PSON# ATX1 11 12 13 14 15 16 17 18 19 20 3.3V -12V GND PSON# GND GND GND -5V +5V +5V ATX_PWR 3.3V 3.3V GND +5V GND +5V GND PWROK AUX5V +12V 1 2 3 4 5 6 7 8 9 10 R87 8.2K U7D 14 R88 100 PW-OK PW-OK 21 8 9 7 7407 C61 .1US 20 + C62 1500U R89 10 PW-OK 7 R57 316 3 14 7407 R111 1k RSTSW# R172 470 R160 ik J E T W A Y I N F ORMATION 3 2 1 Title 11 Size B Date: HIP6021 D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 20 of 26 Rev 3.0 NC 0 NC 4 R112 270 0 330 U7B PWRGOOD 6 14 5 7 7407 PWMPG .1U U7C 7 1 14 7407 R86 51K R17 0 C16 105P 2.2K 224P 2 PWRGD PWRGD 6 U7A C11 x R157 1K C12 x R15 x 102P 20k 10P BC99 VCC1.8V RT9231 HIP6021 R190 100K + C114 22uF AUX_OK 6
+ D
B/G
E/S
6,21
PSON#
RSTSW#
19
RC5058+Discrete ACPI FOR SIS630 - PAGE 2
SB5V
SB5V
+12V
VCC S G D D Q7 G S 0.1U SB5V N C -NDS352AP 0.1U C155 1000U Q5 N C - F DD6030L IOVSB JP7 + 1 2 H2X1-SHORT SB5V
R108 U9A 3 20 PW-OK PW-OK 2 NC-74HC00 7 R107 NC-1K 14 R106 NC-1K G S NC-1K D Q8 NC-2N7002
630CKE
1
BC91
BC92
PWR OK:POWER GOOD FROM ATX POWER
SB5V R152 220 2.5V_REF BC144 C96 U13 LM431 0.1U R168 3.2K + C113 1000U 2A/100mA 10 9 U14C + 8 LMV324 B E C Q12 N Z T 6 5 1-SOT223 2 N 2 222A-TO23 SB3V
C/D
0.1U
B/G
E/S
LM431 f ref + -
R169 10K
SB5V 2.5V_REF R165 NC-1K SB5V 3 R110 NC-1K G 6,20 3,22 PSON# 630CKE PSON# 630CKE 4 6 5 NC-1K NC-74HC00 N C -MMBT3904 R98 NC-10K 2.5V_REF IOVSB R184 1K 5 6 R183 3.3K + U14B 7 LMV324 B E R109 Q9 S 2 D Q10 NC-2N7002 NC-0.1U R97 NC-3.2K + C45 + 1000U C93 + 1000U BC93 1000U 0.1U BC96 0.1U BC97 0.1U C110 U14A LMV324 1 4 IOVSB
C N C - N Z T 6 5 1 - D P A C K-SOT223 B E Q4 VCC3_DUAL JP3 3 2A/64mA C60 1 VCC3
+ 11
U9B
4 2 H2X2-SHORT 1-3 SHORT 2-4 SHORT VCC3_DUAL VCC3_DUAL VCC3_DUAL
PS_ON# FROM SIS630 6 3 0CKE FROM SIS630 PIN F6
PIN D1
C Q13 3904 SB1.8V
C121 0.1U
+
C116 470U
0.5A
J E T W A Y I N F ORMATION Title D I S C R E T E A C P I F O R S IS630 - 2 Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 21 of 26 Rev 3.0
U8A 7 VCC3_DUAL 1 14 74LVC07 2
1 3 5 7 7 3 V C C and VCC3 Standby VOLTAGE SWITCH WHEN IN S0,S1 T H I S CIRCUIT PASSES THE NORMAL POWER WHEN IN S3,S4,S5 T H IS CIRCUIT PASSES THE STANDBY POWER U8C 7 22X4 5 14 74LVC07 SB3V SB3V 6 CKE[0..3] CKE[0..3] 7 8 6 4 2 14 74LVC07 RN43 7 5 3 1 CKE0 CKE1 CKE2 CKE3 U8B 4 2 4 6 8 U8D 14 3,21 630CKE 630CKE 9 7 74LVC07 8 RN44 270x4 R99 8.2K C70 .1U
J E T W A Y I N FORMTION Title V O L T A G E S W I T C H F O R S U S P E N D TO DRAM Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 22 of 26 Rev 3.0
W83697HF
CASEOPEN 1 HX2 25 ROMCS# 25 MEMR# 25 MEMW# 6,13,14 PME# 24 CIRRX BAT R262 1K C144 .1U C146 .1U C145 .1U 2
BAT
R265 2M
XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 XA0 XA1 XA2 XA3 XA4 XA5 XA6 XA7 XA8 XA9 XA10 XA11 XA12 XA13 XA14 XA15 XA16 XA17 XA18
XD[0..7]
XD[0..7]
25
XA[0..18]
XA[0..18]
25
( T o monitor battery voltage, this input should be connected directly to battery)
SB5V VCC
IRTX 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
24
C147 VCC3 R215 4.7K .1U 1,26 DXP 26 VTIN1 26 AVCC 26 697VREF 26 VCOREIN 26 +3.3VIN 26 +12VIN 26 -12VIN 1,26 AGND 26 FANIO2 26 FANIO1 26 FANPWM2 26 FANPWM1 25 25 25 25 25 25 25 25 25 25 BEEP MSI MSO GPAS2 GPBS2 GPAY GPBY GPBX GPAX GPBS1 GPAS1 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 VTIN2 VTIN1 AVCC VREF VCORE +3.3VIN +12VIN -12VIN -5VIN AGND FANIO2 FANIO1 FANPWM2 FANPWM1 OVT#/SMI# BEEP MSI/GP51/WDTO MSO/GP50/PLED GSAS2/GP17 GPBS2/GP16 GPAY/GP15 GPBY/GP14 GPBX/GP13 GPAX/GP12 GPBS1/GP11 GPAS1/GP10
VBAT CASEOPEN CIRRX VSB PME# MEMW#/GP52 MEMR#/GP53 ROMCS#/GP54 XD0/GP20 XD1/GP21 XD2/GP22 XD3/GP23 GND XD4/GP24 XD5/GP25 XD6/GP26 XD7/GP27 XA0/GP30 XA1/GP31 XA2/GP32 XA3/GP33 XA4/GP34 XA5/GP35 XA6/GP36 XA7/GP37 XA8/GP40 XA9/GP41 VCC XA10/GP42 XA11/GP43 XA12/GP44 XA13/GP45 XA14/GP46 XA15/GP47 XA16/GP55 XA17/GP56 XA18/GP57 IRTX
IR
IRRX RIB# DCDB# SOUTB GND SINB DTRB# RTSB# DSRB# CTSB# RIA# DCDA# SOUTA SINA DTRA# RTSA# DSRA# CTSA# STB# VCC AFD# INIT# PD0 PD1 PD2 PD3 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 IRRX RIB# DCDB# SOUTB GND SINB DTRB# RTSB# DSRB# CTSB# RIA# DCDA# SOUTA SINA DTRA# RTSA# DSRA# CTSA# STB# VCC AFD# IOINIT# 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24
Temperature Sensing
& COMB
Voltage SENSING
U16 W83697HF
Fan Speed Seneing & Speed Control
COMA
MIDI PORT
GAME PORT
C135 .1U
DRVDEN0 INDEX# MOA# DSB# VCC DSA# MOB# DIR# STEP# WD# WE# TRAK0# WP# RDATA# HEAD# DSKCHG# CLKIN GND PCICLK LDRQ# SERIRQ VCC3 LAD3 LAD2 LAD1 LAD0 LFRAME# LRESET# SLCT PE BUSY ACK# ERR# SLIN# PD7 PD6 PD5 PD4
VCC
R407 NC-10K R211 200
FDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 H17X2-POST VCC RWC# INDEX# MOA# DSB# DSA# MOB# DIR# STEP# WD# WE# TRAK0# WP# RDATA# HEAD# DSKCHG#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
Printer
PD[0..7] PD[0..7] 24
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
VCC3 C129 .1U GND C130 .1U VCC RN69 8 SIO48M 8 697PCLK 6 LDRQ# 6 SIRQ LAD[0..3] GND VCC R408 10K
SLIN# ERR# ACK# BUSY PE SLCT
24 24 24 24 24 24
FDC
8 6 4 2
7 5 3 1
SPKR BEEP Q21 3904
6,10,19
200X4
6 LAD[0..3] 6 LFRAME# PCIRST#
LAD3 LAD2 LAD1 LAD0
J E T W A Y I N F ORMATION Title W 8 3 6 9 7 H F ( L P C I / O + H / W + F L A S H R O M I/N) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 23 of 26 Rev 3.0
4,13,14,15
COM PORT
U6 VCC 23 23 23 23 23 23 23 23 RTSA# DTRA# SOUTA RIA# CTSA# DSRA# SINA DCDA# 20 16 15 13 19 18 17 14 12 11 VCC DA1 DA2 DA3 RY1 RY2 RY3 RY4 RY5 GND 75232 (SOP20) +12V DY1 DY2 DY3 RA1 RA2 RA3 RA4 RA9 -12V 1 5 6 8 2 3 4 7 9 10 NRTSA NDTRA NSOUTA NRIA NCTSA NDSRA NSINA NDCDA +12V
IR/CIR CONNECTOR
COM1 NDCDA NSOUTA GND NRTSA NRIA CP3 330PX4 CP4 330PX4 CP14 330PX4 CP13 330PX4 1 3 5 7 9 DB9M 2 4 6 8 10 NSINA NDTRA NDSRA NCTSA IOVSB VCC IR 1 6 2 7 3 8 4 9 5 10 H5X2-POST CIRRX 23
U19 VCC 23 23 23 23 23 23 23 23 RTSB# DTRB# SOUTB RIB# CTSB# DSRB# SINB DCDB# 20 16 15 13 19 18 17 14 12 11 VCC DA1 DA2 DA3 RY1 RY2 RY3 RY4 RY5 GND 75232 (SOP20) +12V DY1 DY2 DY3 RA1 RA2 RA3 RA4 RA9 -12V 1 5 6 8 2 3 4 7 9 10 NRTSB NDTRB NSOUTB NRIB NCTSB NDSRB NSINB NDCDB
NRIA NCTSA NDSRA NRTSA NDTRA NSINA NSOUTA NDCDA NRTSB NDSRB NRIB NCTSB NDCDB NSOUTB NSINB NDTRB
1 3 5 7 2 4 6 8 1 3 5 7 1 3 5 7
2 4 6 8 1 3 5 7 2 4 6 8 2 4 6 8
23 23
IRRX IRTX
COMA
(UARTA)
COM2 NDCDB NSOUTB GND NRTSB NRIB NRIA 1 2 3 4 5 6 7 8 9 10 H2X5-POST NSINB NDTRB NDSRB NCTSB T H E IOVSB OF PIN 8 IS FOR CIR WAKE-UP FUNCTION.
26 26
NRIB NRIA
COMB
-12V
(UARTB)
VCC D2 1N4148 7 5 3 1 7 5 3 1
PRT PORT
RN66 23 STB# 23 AFD# 23 IOINIT# 23 SLIN# 23 PD[0..7] PD[0..7] PD0 PD1 PD2 PD3 1 3 5 7 33X4 RN68 PD4 PD5 PD6 PD7 1 3 5 7 33X4 23 23 23 23 23 ERR# ACK# BUSY PE SLCT C55 180P 2 4 6 8 1 3 5 7 2 4 6 8 1 3 5 7 33X4 RN67 2 4 6 8 2 4 6 8
RN40 2.7KX4
RN21 2.7KX4
RN41 2.7KX4
7 5 3 1 8 6 4 2 RN14 2.7KX4
R79 2.7K
8 6 4 2 8 6 4 2
8 6 4 2 7 5 3 1
J1 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 DB25-PRINT 1 3 5 7 1 3 5 7 CP5 180P-8P4C 2 4 6 8 CP6 180P-8P4C 2 4 6 8 CP7 180P-8P4C 1 3 5 7 2 4 6 8 CP8 180P-8P4C
J E T W A Y I N F ORMATION Title W 8 3 6 9 7 H F ( L P C I / O + H / W + F L A S H R O M I/F) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 24 of 26 Rev 3.0
VCC
GAME & MIDI PORT CIRCUIT
VCC 7 5 3 1 VCC RN50 2.2KX4 L25 INDUCTOR R506 100K R505 100K R137 2.2K 8 6 4 2
GAME 23 MSI 23 GPAS2 23 GPBS2 23 GPAY 23 GPBY 23 MSO R136 FB FB L26 L27 RN52 2 4 6 8 FB FB L29 L30 2.2KX4 1 3 5 7 2.2K 8 15 7 14 6 13 5 12 4 11 3 10 2 9 1 DB15-GAME RN53 1MX4 8 6 4 2 CP9 0.01UX4 150P 7 5 3 1 C82 1 3 5 7
23 GPBX 23 GPAX 23 GPBS1 23 GPAS1
C161 0.01U
C162 0.01U
C163 0.01U
C164 0.01U
FLASH ROM
VCC S E L ECT 2M-FLASH ROM, UNINSTALL R258 S E LECT 4M-FLASH ROM, INSTALL R258 R274 0 U18 XA17 XA16 XA15 XA14 XA13 XA12 XA11 XA10 XA9 XA8 XA7 XA6 XA5 XA4 XA3 XA2 XA1 XA0 1 30 2 3 29 28 4 25 23 26 27 5 6 7 8 9 10 11 12 31 24 22 NC/A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 WE# OE# CE# W 2 9C020/40 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 13 14 15 17 18 19 20 21 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7
2 4 6 8
IOVSB CIRCUIT
RX1 R266 OPEN-0 D15 VCC XD[0..7] OPEN-5817 XD[0..7] 23 D16 SB5V OPEN-5817 4.7KX4 C156 NC-10U O n Now or Wake_up function power R X 1 OFF, D1,D2 ON: Wake_up fuction R X 1 ON, D1,D2 OFF:NO Wake_up fuction IOVSB
R258 XA18 OPEN
VCC RN77 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 VCC 2 4 6 8 2 4 6 8 RN78 4.7KX4 1 3 5 7 1 3 5 7
REFERENCE TO PAGE 21
23 XA[0..18]
XA[0..18] VCC
R261 4.7K
R260 4.7K
R259 4.7K
VCC 23 MEMW# 23 MEMR# 23 ROMCS# GND
32 16 C154 .1U
J E T W A Y I N F ORMATION Title W 8 3 6 9 7 H F ( L P C I / O + H / W + F L A S H R O M I/F) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 25 of 26 Rev 3.0
Hardware Monitor circuits
Temperature Sensing Voltage Sensing
23 697VREF VCCCORE R238 10K RT1 10K 1% (for system) VCC3 R232 10K +12VIN +12V R264 30K D+ DXP DXN C18 3300P 1,23 1,23 R237 28K 1% (from CPU) R R231 10K 1% R AGND AGND 23 1,23 R +3.3VIN 23 R VCOREIN 23 -12VIN 23 697VREF R233 57.6K 1% R239 -12V 232K 1%
697VREF
R263
10K 1%
THERMISTOR 23 VTIN1
1,23
vtin2
AGND
PWM Circuit for FAN speed control
+12V R213 4.7K E 1K B C D 23 FANPWM1 R218 510 G S Q15 2N7002 C20 10u CPUFAN + 3 2 1 H3X1-FAN Q14 2N3906 R301 0 1N4148 D1 R240 4.7K R234 GND 12V SEN 27K R229 10K 23
NC
C/D
R214
t
FANIO1
23
1 +12V R217 R216 4.7K E 1K B C D R228 23 FANPWM2 510 G S Q17 2N7002 C132 + 10u SYSFAN 3 2 1 H3X1-FAN Q16 2N3906 R300 0 1N4148 D8
2
3
B/G
E/S
R236 4.7K R235 27K R230 10K L40 23 AVCC FB L39 FB VCC 23
FANIO2
23
SB5V WOL1 24 NRIA NRIA D18 1N4148 NRIB D17 1N4148 R282 560K RING R283 220K C157 100pF BY EXPERIENCED RING 6 D19 1N4148 BC195 0.1uF BC153 0.1uF BC178 0.1uF BC154 0.1uF BC47 0.1uF + BC3 100UF + BC152 10uF + BC167 1000UF 1 2 3 H3X1-WOL 1 X 2 3 GND RING VCC SB5V
1,23
AGND
AGND
24
NRIB
J E T W A Y I N F ORMATION Title W 8 3 6 9 7 H F ( L P C I / O + H / W + F L A S H R O M I/F) Size B Date: D o c u m e n t Number J - 6 3 0 C F REV:3.0 S a t u r d a y , A u g u s t 11, 2001 Sheet 26 of 26 Rev 3.0