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( P4 LGA775P Processor with DDR2 SDRAM Mainboard )
A
945G-M3 Rev: 1.0B Page Title of Schematic :
Title Page Title Page A
Schematics Version History Table : Cover Sheet 1
Circuit Ver. PCB Ver. Total Page Modified Page(s) Date System Block Diagram 2
A A 36 02/24/' 05 P4 LGA775P Part A 3
1.0 1.0 36 04/01/' 05 P4 LGA775P Part B 4
1.0a 1.0a 36 05/10/' 05 P4 LGA775P Part C 5
1.0B 1.0B 36 24 06/14/' 05 P4 LGA775P Part D 6
P4 LGA775P Part E 7
Clock Generator(CK410) 8
I-LP(MCH)Part A & E & F 9
B
I-LP(MCH)Part D 10 B
I-LP(MCH)Part B & C 11
I-LP(MCH)Part G 12
DDIMM 1&2 ( DDR SDRAMs ) 13
DDIMM 3&4 ( DDR SDRAMs ) 14
DDR & V_FSB_VTT Power 15
PCI EXPRESS 16-PORT 16
ICH7 Part A & D (SATA-CONNECTOR) 17
ICH7 Part B & C (RTC) 18
ICH7 Part E & F (POWER & GND) 19
IDE1 Connector 20
C
USB/FWH 21 C
LPC_FDD/KB/M 22
I/O Ports 23
H/W Monitor 24
Azalia Codec 25
Audio Interface 26
ATX Power & Front Panel 27
LAN 28
Vcore DC-DC 29
MIS DC-DC(DUAL & VDDQ) 30
D
PCI Slot 1&2 31 D
PCIEX1 32
Back I/O 33 Elitegroup Computer Systems
VT6307 (1394) 34 Title
PCI LAN 35 Cover Sheet
Size Document Number Rev
Custom 945G-M3 1.0B
Date: Wednesday, June 15, 2005 Sheet 1 of 36
1 2 3 4 5 6 7 8
A B C D E
PCB : 244 x 244 mm ; 4 layers
DEVICE IDSEL INT# REQ# GNT#
INTEL
PCI1 18 D/E/F/G PREQ-1 PGNT-1
P4 Processor
PCI2 19 E/F/G/H PREQ-2 PGNT-2
1394 20 D PREQ-3 PGNT-3 PSC, Smithfield -
4 4
LAN 21 E PREQ-4 PGNT-4
LGA 775 pin
BW : 4.1GB/s @ FSB : 533MHz & Freq : 133MHz
BW : 6.4GB/s @ FSB : 800MHz & Freq : 200MHz
BW :8.5GB/s @ FSB : 1066MHz & Freq : 266MHz
BW : 10.7GB/s @ DDR2 :533/667MHz
INTEL
i945G/P DDIMM1: DDR2 Socket 240P
3 3
Analong Display 1210pin FC-BGA
RAMDAC: 400MHz VGA (G only) DDIMM2 : DDR2 Socket 240P
Resolutions Up To 2048x1536@75Hz
BW : 2GB/s (Support Lsoch)
USB V2.0
USB1 USB2 USB3 USB4 PCIEx1
2 ports 2 ports 2 ports 2 ports INTEL
Up to Ultra ATA/100 ICH7 BW : 133MB/s @Freq : 33MHz
IDE1 40pin PCI1 Slot 120pin @ AD18
One IDE Channel 652pin EBGA
Line in PCI2 Slot 120pin @ AD19
2 Audio Codec Azalia I/F 2
Line out
Mic in ALC880
Center/Bass out intel LPC bus
FWH 10/100
Surround 32pin PLCC
SATA1 7Pin VIA 1394 Lan
Side-Surround
(OPTION)
SATA2 7pin Super I/O
SATA3 7Pin BW : 150MB/s ITE8712 USBLAN
RJ45
SATA4 7pin TPM 1.1 128pin PQFP
1 1
Elitegroup Computer Systems
CONN/
HEADER Title
System Block Diagram
Size Document Number Rev
B 945G-M3 1.0B
Date: Tuesday, June 14, 2005 Sheet 2 of 36
A B C D E
5 4 3 2 1
ICT_775_E23 1 STP3
ICT_775_E7 1 STP8
D D
ICT_775_F23 1 STP2
ICT_775_F6 1 STP9
R231 62-04
R240 62-04
COMP6 R238 60.4-1-04 VTT_OUT_R
MCH_GTLREF_CPU FORCEPH_N
9 MCH_GTLREF_CPU FORCEPH_N 15
VSSSEN VSS_SENSE_AN6 CPUVID0
29 VSSSEN CPUVID0 29
R211 0 CPUVID1
CPUVID1 29
VCCSEN VCC_SENSE_AN5 CPUVID2
29 VCCSEN CPUVID2 29
R213 0 CPUVID3
CPUVID3 29
VTT_OUT_R COMP7 CPUVID4
CPUVID4 29
R229 60.4-1-04 CPUVID5
CPUVID5 29
BC118 0.1uF R198 62-04
CPU1A
AM2
AM3
AM5
AM7
AC4
AH2
AN5
AN6
AN7
AE3
AE4
AE6
G10
AK6
AK4
D14
D16
D23
A20
E23
E24
B13
AL5
AL6
AL4
F23
F29
W1
G6
C9
D1
N4
N5
LGA775
E5
E6
E7
P5
V1
Y3
F6
J3
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED7
RESERVED8
RESERVED9
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
RESERVED10
RESERVED11
RESERVED12
RESERVED13
RESERVED14
RESERVED15
RESERVED16
RESERVED17
RESERVED18
RESERVED19
RESERVED20
RESERVED21
RESERVED22
RESERVED25
RESERVED26
RESERVED27
RESERVED28
RESERVED30
RESERVED31
RESERVED32
RESERVED33
RESERVED34
RESERVED35
VID_SELECT
H_D0 B4 L5 H_A3
9 H_D0 D0 A3 H_A3 9
H_D1 C5 P6 H_A4
9 H_D1 D1 A4 H_A4 9
H_D2 A4 M5 H_A5
9 H_D2 D2 A5 H_A5 9
H_D3 C6 L4 H_A6
9 H_D3 D3 A6 H_A6 9
H_D4 A5 M4 H_A7
9 H_D4 D4 A7 H_A7 9
H_D5 B6 R4 H_A8
9 H_D5 D5 A8 H_A8 9
H_D6 B7 T5 H_A9
9 H_D6 D6 A9 H_A9 9 VTT_OUT_R
C H_D7 A7 U6 H_A10 C
9 H_D7 D7 A10 H_A10 9
H_D8 A10 T4 H_A11
9 H_D8 D8 A11 H_A11 9
H_D9 A11 U5 H_A12
9 H_D9 D9 A12 H_A12 9
H_D10 B10 U4 H_A13
9 H_D10 D10 A13 H_A13 9
H_D11 C11 V5 H_A14
9 H_D11 D11 A14 H_A14 9
H_D12 D8 V4 H_A15 H_BPM0 ER91 47-04
9 H_D12 D12 A15 H_A15 9
H_D13 B12 W5 H_A16
9 H_D13 D13 A16 H_A16 9
H_D14 C12 AB6 H_A17 H_BPM1 ER87 47-04
9 H_D14 D14 A17 H_A17 9
H_D15 D11 W6 H_A18
9 H_D15 D15 A18 H_A18 9
H_D16 G9 Y6 H_A19 H_BPM2 ER85 47-04
9 H_D16 D16 A19 H_A19 9
H_D17 F8 Y4 H_A20
9 H_D17 D17 A20 H_A20 9
H_D18 F9 AA4 H_A21 H_BPM3 ER75 47-04
9 H_D18 D18 A21 H_A21 9
H_D19 E9 AD6 H_A22
9 H_D19 D19 A22 H_A22 9
H_D20 D7 AA5 H_A23 H_BPM4 ER84 47-04
9 H_D20 D20 A23 H_A23 9
H_D21 E10 AB5 H_A24
9 H_D21 D21 A24 H_A24 9
H_D22 D10 AC5 H_A25 H_BPM5 ER83 47-04
9 H_D22 D22 A25 H_A25 9
H_D23 F11 AB4 H_A26
9 H_D23 D23 A26 H_A26 9
H_D24 F12 AF5 H_A27
9 H_D24 D24 A27 H_A27 9
H_D25 D13 AF4 H_A28
9 H_D25 D25 A28 H_A28 9
H_D26 E13 AG6 H_A29
9 H_D26 D26 A29 H_A29 9
H_D27 G13 AG4 H_A30
9 H_D27 H_D28 F14
D27 A30
AG5 H_A31
H_A30 9 Please BPM TERMINATION NEAR to CPU
9 H_D28 D28 A31 H_A31 9
H_D29 G14 AH4
9 H_D29 H_D30 D29 A32
9 H_D30 F15 D30 A33 AH5
H_D31 G15 AJ5
9 H_D31 H_D32 D31 A34
9 H_D32 G16 D32 A35 AJ6
H_D33 E15
9 H_D33 H_D34 D33
9 H_D34 E16 D34
H_D35 G18 AJ2 H_BPM0
9 H_D35 H_D36 D35 BPM0 H_BPM1
9 H_D36 G17 D36 BPM1 AJ1
H_D37 F17 AD2 H_BPM2
9 H_D37 H_D38 D37 BPM2 H_BPM3
B 9 H_D38 F18 D38 BPM3 AG2 B
H_D39 E18 AF2 H_BPM4
9 H_D39 H_D40 D39 BPM4 H_BPM5
9 H_D40 E19 D40 BPM5 AG3
H_D41 F20
9 H_D41 H_D42 D41
9 H_D42 E21 D42
H_D43 F21 J16 ICT_775_J16 1 STP6
9 H_D43 H_D44 D43 DP0 ICT_775_H15
9 H_D44 G21 D44 DP1 H15 1 STP7
H_D45 E22 H16 ICT_775_H16 1 STP5 TESTHI12 R246 62-04 VTT_OUT_L VTT_OUT_L
9 H_D45 H_D46 D45 DP2 ICT_775_J17
9 H_D46 D22 D46 DP3 J17 1 STP4
H_D47 G22
9 H_D47 H_D48 D47
9 H_D48 D20 D48
H_D49 D17 K4 H_REQ0
9 H_D49 D49 REQ0 H_REQ0 9
H_D50 A14 J5 H_REQ1
9 H_D50 D50 REQ1 H_REQ1 9
H_D51 C15 M6 H_REQ2
9 H_D51 D51 REQ2 H_REQ2 9
H_D52 C14 K6 H_REQ3
9 H_D52 D52 REQ3 H_REQ3 9
H_D53 B15 J6 H_REQ4 TESTHI0 R152 62-04 V_FSB_VTT
9 H_D53 D53 REQ4 H_REQ4 9
H_D54 C18
9 H_D54 H_D55 D54 TESTHI2_7 R148 62-04
9 H_D55 B16 D55
H_D56 A17 AE8
9 H_D56 H_D57 D56 SKTOCC TESTHI1 R239 62-04
9 H_D57 B18 D57 VTT_OUT_L
H_D58 C21
9 H_D58 H_D59 D58 TESTHI0 TESTHI8 R232 62-04
9 H_D59 B21 D59 TESTH0 F26
H_D60 B19 W3 TESTHI1
9 H_D60 H_D61 D60 TESTH1 TESTHI9 R237 62-04
9 H_D61 A19 D61 TESTH2 F25
H_D62 A22 G25
9 H_D62 H_D63 D62 TESTH3 TESTHI10 R241 62-04
9 H_D63 B22 D63 TESTH4 G27
TESTH5 G26
G24 TESTHI11 R247 62-04
H_RS0_L TESTH6 TESTHI2_7
9 H_RS0_L B3 RS0 TESTH7 F24
H_RS1_L F5 G3 TESTHI8
9 H_RS1_L H_RS2_L A3
RS1 TESTH8
G4 TESTHI9
Please Rs & CAPs Close to CPU
9 H_RS2_L RS2 TESTH9 TESTHI10
TESTH10 H5
A TESTHI11 A
TESTH11 P1
W2 TESTHI12
TESTH12
BOOTSELECT Y1
Elitegroup Computer Systems
Title
P4 LGA775P Part A
Size Document Number Rev
Custom 945G-M3 1.0B
Date: Tuesday, June 14, 2005 Sheet 3 of 36
5 4 3 2 1
5 4 3 2 1
CPUGTLREF1 ER94 124-1 VTT_OUT_R VTT_OUT_R
1
210-1
MC50
1uF
ER82
R234
220pF
C131
C129
0.01uF
10
2
Place componets as close as possible to Processor socket
trace width to cap must be no smaller than 12 Mils CPUGTLREF0 ER99 124-1 VTT_OUT_R VTT_OUT_R
1
D D
210-1
MC52
1uF
ER100
R248
220pF
C133
C134
0.01uF
10
GTLREF= 0.67 * VTT = 0.8V
2
GTLREF GENERATION CIRCUITS
H29
H2
H1
R157 0
V_FSB_VTT CPU1B
1 2
GTLREF_SEL
GTLREF1
GTLREF0
MC18 1uF K3 A20M_L
A20M A20M_L 18
C23 D2 H_ADS_L
VCCIOPLL ADS H_ADS_L 9
L45 10uH-08 R6 H_A_STB0 H_IERR_L R244 62-04 VTT_OUT_R
ADSTB0 H_A_STB0 9
A23 AD5 H_A_STB1
VCCA ADSTB1 H_A_STB1 9
L46 10uH-08 AD3
EC30 100uF-16V BINIT H_BNR_L
+
B23 VSSA BNR C2 H_BNR_L 9
G8 H_BPRI_L
BPRI H_BPRI_L 9
1 2 F3 H_BREQ0_L
BR0 H_BREQ0_L 9
MC20 1uF AC2 HWRST_L
DBR HWRST_L 17,27
1000pF-04-O
CK_CPU_H F28 B2 H_DBSY_L
8 CK_CPU_H BCLK0 DBSY H_DBSY_L 9
CK_CPU_L G28 G7 H_DEFER_L
8 CK_CPU_L BCLK1 DEFER H_DEFER_L 9
C135
C1 H_DRDY_L
DRDY H_DRDY_L 9
AK3 ITPCLK0 EDRDY F2 1 STP17
AJ3 R3 FERR_L H_CPUPWRGD R245 100-04
ITPCLK1 FERR/PBE FERR_L 18
D4 H_HIT_L
COMP0 HIT H_HITM_L H_HIT_L 9
A13 COMP0 HITM E4 H_HITM_L 9
COMP1 T1 AB2 H_IERR_L TESTHI13 R235 62-04 VTT_OUT_L
COMP2 COMP1 IERR IGNNE_L
G2 COMP2 IGNNE N2 IGNNE_L 18
COMP3 R1 P3 HINIT_L
COMP3 INIT HINIT_L 18
COMP4 J2 C3 H_LOCK_L H_BREQ0_L R236 62-04
COMP4