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Ordering number : ENN5844

Monolithic Linear IC

LA76070
NTSC Color Television IC

Overview
The LA76070 is an NTSC color television IC. In addition to providing IIC bus control based rationalization of IC control and the adjustment manufacturing process associated with the TV tube itself, it also includes all functions actually required in mass-produced television sets. As such, it is an extremely practical bus control IC.
* The LA7840/41 or LA7845N/46N is recommended as the vertical output IC for use with this product.

Package Dimensions
unit: mm 3128-DIP52S
[LA76070]
52 27

15.24

13.8

1

26
46.0 5.1max 4.25

Functions
· I 2 C bus control, VIF, SIF, Y, C, and deflection integrated on a single chip.

0.48

1.05

1.78

0.75

SANYO: DIP52S

Specifications
Maximum Ratings at Ta = 25°C
Parameter Maximum power supply voltage Maximum power supply current Allowable power dissipation Operating temperature Storage temperature Symbol V4 max V26 max I21 max Pd max Topr Tstg Ta 65°C* Conditions Rating 9.6 9.6 25 1.3 ­10 to +65 ­55 to +150 Unit V V mA W °C °C

Note: *Provided on a printed circuit board: 83.2 × 86.0 × 1.6 mm, material: Bakelite

Operating Conditions at Ta = 25°C
Parameter Recommended power supply voltage Recommended power supply current Operating power supply voltage range Operating power supply current range Symbol V4 V26 I21 V4 op V26 op 121 op Conditions Rating 7.6 7.6 19 7.3 to 7.9 7.3 to 7.9 16 to 25 Units V V mA V V mA

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
70999 RM (OT) No. 5844-1/27

0.51min

3.8

0.25

LA76070 Electrical Characteristics at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA
Parameter [Circuit Voltages and Currents] Horizontal power supply voltage IF power supply current (V4) Video, chroma, and vertical power supply current (V26) [VIF Block] AFT output voltage with no signal Video output voltage with no signal APC pull-in range (U) APC pull-in range (L) Maximum RF AGC voltage Minimum RF AGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63) Maximum AFT output voltage Minimum AFT output voltage AFT detection sensitivity Video output amplitude Synchronization signal tip level Input sensitivity Video-to-sync ratio (@100 dBµ) Differential gain Differential phase Video signal-to-noise ratio 920 kHz beat level [Video and Switching Block] External video gain External video sync signal tip voltage External video crosstalk Internal video output level [SIF Block] FM detector output voltage FM limiting sensitivity FM detector output bandwidth FM detector output total harmonic distortion AM rejection ratio SIF signal-to-noise ratio [Audio Block] Maximum gain Adjustment range Frequency characteristics Muting Total harmonic distortion Signal-to-noise ratio [Chroma Block] ACC amplitude characteristics 1 ACC amplitude characteristics 2 B-Y/Y amplitude ratio Color control characteristics 1 Color control characteristics 2 ACCM1 ACCM2 CLRBY CLRMN CLRMM Color MAX/NOM Color MAX/MIN Input: +6 dB/0 dB, 0 dB = 40 IRE Input: ­14 dB/0 dB 0.8 0.7 100 1.6 33 1.0 1.0 125 1.8 40 1.2 1.1 140 2.1 50 times times % times dB AGMAX ARANGE AF AMUTE ATHD ASN 20 kHz 20 kHz 1 kHz, 400 m Vrms, Vo1: MAX DIN.Audio 65 75 1 kHz ­2.5 60 ­3.0 75 0.5 0.0 67 +3.0 +2.5 dB dB dB dB dB dB SOADJ SLS SF STHD SAMR SSN Output at ­3 dB Output at ­3 dB FM = ±25 kHz AM = 30 % 40 60 50 464 474 484 50 100 k 0.5 mVrms dBµ Hz % dB dB AUXG AUXS AUXC INTO Stair step, 1 V p-p Stair step, 1 V p-p 4.2 MHz, 1Vp-p 93 dBµ, 87.5% Video MOD 5.5 ­0.2 60 ­0.1 0.0 +0.1 6.0 0.0 6.5 +0.2 dB Vdc dB Vp-p VAFTn VOn fPU fPL VRFH VRFL RFAGC0 RFAGC63 VAFTH VAFTL VAFTS VO VOtip Vi V/S DG DP S/N I920 With no input signal With no input signal After APC and PLL DAC adjustment After APC and PLL DAC adjustment CW = 91 dBµ, DAC = 0 CW = 91 dBµ, DAC = 63 DAC = 0 DAC = 63 CW = 93 dBµ, variable frequency CW = 93 dBµ, variable frequency CW = 93 dBµ, variable frequency 93 dBµ, 87.5% Video MOD 93 dBµ, 87.5% Video MOD Output at ­3 dB 100 dBµ, 87.5% Video MOD 93 dBµ, 87.5% Video MOD 93 dBµ, 87.5% Video MOD CW = 93 dBµ V3.58 MHz/V920 kHz 55 2.4 6.2 0.5 33 1.8 2.4 6.5 0.9 25 2.0 2.6 43 2.5 2 2 58 ­50 2.8 4.7 1.0 1.0 7.7 0 96 86 7.6 1.2 17 2.2 2.8 46 3.0 10 10 % deg dB dB 8.2 0.2 9.0 0.4 3.8 4.9 4.8 5.1 Vdc Vdc MHz MHz Vdc Vdc dBµ dBµ Vdc Vdc mV/kHz Vp-p Vdc dBµ HVCC I4 (IFICC) I26 (YCVICC) IF AGC: 5 V 7.2 38 79.5 7.6 46 93.5 8.0 54 107.5 V mA mA Symbol Conditions Ratings min typ max Unit

Continued on next page.

No. 5844-2/27

LA76070
Continued from preceding page.
Parameter Color control sensitivity Tint center Tint control maximum Tint control minimum Tint control sensitivity Demodulator output ratio R-Y/B-Y Demodulator output ratio G-Y/B-Y Demodulator angle B-Y/R-Y Demodulator angle G-Y/B-Y Killer operating point Chrominance VCO free-running frequency Chrominance pull-in range (+) Chrominance pull-in range (­) Auto-flesh characteristic 73° Auto-flesh characteristic 118° Auto-flesh characteristic 163° [Video Block] Overall video gain (Contrast set to maximum) Contrast adjustment characteristic (Normal/maximum) Contrast adjustment characteristic (Minimum/maximum) Video frequency characteristic Trap & D = 0 Chrominance trap level Trap & D = 1 DC propagation Y delay, f0 = 1 Maximum black stretching gain (normal) Sharpness adjustment range (max) (min) Horizontal/vertical blanking output level [OSD Block] OSD fast switch threshold Red RGB output level Green RGB output level Blue RGB output level Analog OSD R output level gain matching Linearity Analog OSD G output level gain matching Linearity Analog OSD B output level gain matching Linearity [RGB Output (cutoff and drive) Block] Brightness control (normal) High brightness (maximum) Low brightness (minimum) BRT64 BRT127 BRT0 2.1 15 ­25 2.65 20 ­20 3.2 25 ­15 V IRE IRE FSTH ROSDH GOSDH BOSDH RRGB LRRGB GRGB LGRGB BRGB LBRGB 0.9 220 220 220 1.5 45 1.5 45 1.5 45 1.2 250 250 250 1.9 50 1.9 50 1.9 50 1.7 280 280 280 2.3 60 2.3 60 2.3 60 V IRE IRE IRE Ratio % Ratio % Ratio % CONT63 10 12 14 dB Symbol CLRSE TINCEN TINMAX TINMIN TINSE RB GB ANGBR ANGGB KILL CVCOF PULIN+ PULIN­ AF 073 AF 118 AF 163 5 ­7 ­20 10 0 ­10 0 dB = 40 IRE Deviation from 3.579545 MHz TINT NOM TINT MAX TINT MIN Conditions Ratings min 1 ­15 30 ­60 0.7 0.75 0.28 92 227 ­42 ­350 350 ­350 20 +7 ­5 0.85 0.33 99 237 ­37 45 ­45 typ 2 max 4 ­3 60 ­30 2.0 0.95 0.38 107 247 ­30 +350 deg deg dB Hz Hz Hz deg deg deg Unit %/bit deg deg deg deg/bit

CONT32

­7.5

­6.0

­4.5

dB

CONT0

­17

­14

­11

dB

Yf0

­6.0

­3.5

0.0

dB

Ctrap ClampG YDLY BKSTmax Sharp16 Sharp31 Sharp0 RGBBLK 6 4 9.0 ­6.0 1.4 95

­20 100 430 13 6 11.5 ­3.5 1.6 20 8 14.0 ­1.0 1.8 105

dB % ns IRE dB dB dB V

Continued on next page.

No. 5844-3/27

LA76070
Continued from preceding page.
Ratings min 2.1 2.45 typ 2.65 3.0 4 2.9 2.4 7 9 11 max 3.2 3.55

Parameter (minimum) Cutoff control (Bias control) (maximum) Resolution Maximum output Output attenuation [Deflection Block] Sync separator sensitivity Horizontal free-running frequency deviation Horizontal pull-in range Horizontal output pulse saturation voltage Horizontal output pulse phase Horizontal position adjustment range Horizontal position adjustment maximum variability X-ray protection circuit operating voltage [Vertical screen Size Adjustment] Vertical ramp output amplitude @32 Vertical ramp output amplitude @0 Vertical ramp output amplitude @63 [Vertical screen Position Adjustment] Vertical ramp DC voltage @32 Vertical ramp DC voltage @0 Vertical ramp DC voltage @63

Symbol Vbias0 Vbias127 Vbiassns RBout127 Gout127 RBout0

Conditions

Unit V V mV/Bit Vp-p Vp-p dB

Drive adjustment

Ssync fH fH PULL V Hsat HPHCEN HPHrange HPHstep 4 bits

3 15600 ±400 0 9.5

8 15734

13 15850

IRE Hz Hz

0.06 10.5 ±2

0.4 11.5

V µs µs

530

ns

VXRAY

0.54

0.64

0.74

V

Vsize32 Vsize0 Vsize63

VSIZE: 100000 VSIZE: 000000 VSIZE: 111111

0.47 0.13 0.80

0.82 0.48 1.15

1.17 0.83 1.50

Vp-p Vp-p Vp-p

Vdc32 Vdc0 Vdc63

VDC: 100000 VDC: 000000 VDC: 111111

3.6 3.2 4.0

3.8 3.4 4.2

4.0 3.6 4.4

Vdc Vdc Vdc

No. 5844-4/27

LA76070 LA76070 BUS: Initial Conditions
Initial test conditions Register T Enable Video Mute Sync Kill AFC Gain Horizontal Phase IF AGC SW AFT Defeat RF AGC Delay 0 HEX 1 HEX 0 HEX 0 HEX 4 HEX 0 HEX 0 HEX 20 HEX Video SW PLL Tuning Audio Mute APC Det Adjust V CD Mode Vertical DC Vertical Kill Col Kill Vertical Size Red Bias Green Bias Blue Bias Blanking Defeat Red Drive Blue Drive Color Difference Mode Enable Brightness Control Contrast Test Enable Contrast Control Trap & Delay Enable SW Auto Flesh Black Stretch Defeat Sharpness Control Tint Test Enable Tint Control Color Test Enable Color Control Vertical Test Video Level FM Level BNI Enable Audio SW Volume Control Initial test conditions Register 0 HEX 40 HEX 1 HEX 20 HEX 0 HEX 20 HEX 0 HEX 0 HEX 20 HEX 00 HEX 00 HEX 00 HEX 0 HEX 7F HEX 7F HEX 0 HEX 40 HEX 0 HEX 40 HEX 0 HEX 0 HEX 0 HEX 10 HEX 0 HEX 40 HEX 0 HEX 40 HEX 0 HEX 4 HEX 10 HEX 0 HEX 0 HEX 00 HEX (continued)

No. 5844-5/27

LA76070 LA76070 BUS: Control Register Descriptions
Control register descriptions Register name T Enable Video Mute Sync Kill AFC Gain Horizontal Phase IF AGC SW AFT Defeat RF AGC Delay Video SW PLL Tuning Audio Mute APC Det Adjust V Count Down Mode Vertical DC Vertical Kill Color Kill Vertical Size Red Bias Green Bias Blue Bias Blanking Defeat Red Drive Drive Test Blue Drive Color Difference Mode Enable Brightness Control Contrast Test Contrast Control Trap & Delay-SW Auto Flesh Enable Black Stretch Defeat Sharpness Control Tint Test Tint Control Color Test Color Control Vertical Test Video Level FM Level BNI Enable Audio SW Volume Control Bits 1 1 1 1 3 1 1 6 1 7 1 6 1 6 1 1 6 7 7 7 1 6 1 6 1 7 1 7 1 1 1 5 1 7 1 7 3 3 5 1 1 6 General descriptions Disable the Test SW & enable Video Mute SW Disable video outputs Force free-run mode Select horizontal first loop gain Align sync to flyback phase Disable IF and RF AGC Disable AFT output Align RF AGC threshold Select Video Signal (INT/EXT) Align IF VCO frequency Disable audio outputs Align AFT crossover Select vertical countdown mode Align vertical DC bias Disable vertical output Enable Color Killer Align vertical amplitude Align Red OUT DC level Align Green OUT DC level Align Blue OUT DC level Disable RGB output blanking Align Red OUT AC level Enable drive DAC test mode Align Blue OUT AC level Enable color difference mode Customer brightness control Enable Contrast DAC test mode Customer Contrast control Select luma filter mode Enable autoflesh function Disable black stretch Customer sharpness control Enable tint DAC test mode Customer tint control Enable color DAC test mode Customer color control Select vertical DAC test modes Align IF video level Align WBA output level Enable black noise inverter Select Audio Signal (INT/EXT) Customer volume control

No. 5844-6/27

LA76070 LA76070 BUS: Control Register Truth Table
Control register truth table Register name T Enable Audio Mute Video Mute Sync Kill AFC Gain IF AGC SW AFT Defeat BNI Enable Count Down Mode Vertical Kill F0 Select Auto Flesh Enable Overload Enable Tint DAC Test Color DAC Test Contrast DAC Test Drive DAC Test Black Stretch Defeat Blanking Defeat Color Diff Mode Enable Vertical Test 0 HEX Test Enable Active Active Sync active Slow AGC active AFT active BNI active Standard Vrt active 3.58 trap AF Off Ovld Off Normal Normal Normal Normal Blk Str On Blanking RGB Mode Normal 1 HEX Test Disable Mute Mute Sync Killed Fast AGC Defeat AFT Defeat BNI Defeat Non-Stand Vrt Killed 8.00 APF AF On Ovld On Test Mode Test Mode Test Mode Test Mode Blk Str Off No Blank C Diff Mode Ver Size Test

No. 5844-7/27

LA76070 LA76070 Bit Map (`96.08.01) IC address: BAH (101111010)
Sub address D0....D7 $00 (tr0) $01 (tr1) $02 (tr2) $03 (tr3) $04 (tr4) $05 (tr5) $06 (tr6) $07 (tr7) $08 (tr8) $09 (tr9) $0A (tr10) $0B (tr11) $0C (tr12) $0D (tr13) $0E (tr14) $0F (tr15) $10 (tr16) $11 (tr17) $12 (tr18) $13 (tr19) 1 N/I SW 0 VIDEO LEVEL 0 AUDIO SW 0 0 0 0 1 0 VOLUME 0 0 0 0 BLK_DEF 0 Drv_Test 0 C_Diff 0 Cot_Test 0 Trap & D_SW 0 Tint_Test 0 Col_Test 0 * 1 * 0 * 0 * 1 0 0 1 A Fresh 0 0 Black ST 0 1 0 Tint 0 Color 0 * 0 FM LEVEL 0 0 0 0 0 V_test 0 0 0 0 0 0 0 1 0 0 1 1 1 1 1 1 * 0 0 0 * 0 0 0 V CD MODE 0 Ver_kill 0 * 0 0 0 Col_kill 0 1 0 IFAGC SW 0 VIDEO SW 0 * 1 Aud_Mute 1 * 1 0 1 0 0 0 AFT DEF 0 1 0 * * * * MSB DA0 * DA1 * DA2 * DATA DA3 * DA4 T_Enable 0 AFC Gain 0 RF_AGC_Delay 0 PLL TUNING 0 APC DET ADJUST 0 Ver_dc 0 Ver_Size 0 R_Bias 0 G_Bias 0 B_Bias 0 R_Drive 1 B_Drive 1 Bright 0 Contrast 0 0 Sharpness 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 DA5 * DA6 Vid_Mute 1 H_Phase 0 0 LSB DA7 Sync_Kill 0

No. 5844-8/27

LA76070 Measurement Conditions at Ta = 25°C, VCC = V4 = V26 = 7.6 V, ICC = I21 = 19 mA
Parameter [Circuit Voltages and Currents] Horizontal power supply voltage HVCC Symbol Measurement point Input signal Measurement method Bus conditions

21 4 26
No signal

Apply a 19mA current to pin 21 and measure the pin 21 voltage at that time Apply a voltage of 7.6 V to pin 4 and measure (in mA) the DC current that flows into the IC. (Apply 5 V to the IF AGC.) Apply a voltage of 7.6 V to pin 26 and measure (in mA) the DC current that flows into the IC

Initial conditions

IF power supply current (pin 4)

I4 (IFICC) I26 (DEFICC)

Initial conditions

Video/vertical power supply current (pin 26)

Initial conditions

No. 5844-9/27

LA76070 VIF Block Input Signals and Measurement Conditions 1. All input signals are applied to PIF IN (pin 10) as shown in the measurement circuit diagrams. 2. The input signal voltage values are all the value of VIF IN (pin 10) as shown in the measurement circuit diagrams. 3. The table below lists the input signals and their levels.
Input signal Waveform Condition

SG1

45.75 MHz

SG2

42.17 MHz

SG3

41.25 MHz

SG4

Variable frequency

45.75 MHz SG5 87.5 % video modulation 10-step staircase waveform (Subcarrier: 3.58 MHz)

45.75 MHz 87.5 % video modulation SG6 Sweep signal (APL: 50 IRE Sweep signal level: 40 IRE)

45.75 MHz SG7 87.5 % video modulation Flat field signal

4. Perform the following D/A converter adjustments in the order listed before testing.
Item APC DAC PLL DAC Video possible Measurement point
13 13

Input signal No signal, IF.AGC.DEF = 1 SG1, 93 dBµ SG7, 93 dBµ

Adjustment Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible Set up the DAC value so that the pin 13 DC voltage is as close to 3.8 V as possible Set up the DAC value so that the pin 45 output level is as close to 2.0 V p-p as

45

No. 5844-10/27

LA76070
Measurement Input signal point

Parameter [VIF Block] AFT output voltage with no signal Video output voltage with no signal

Symbol

Measurement procedure

Bus conditions

VAFTn VOn

13 45

No signal No signal

Measure the pin 13 DC voltage when IF.AGC. DEF is "1" Measure the pin 45 DC voltage when IF.AGC. DEF is "1" Connect an oscilloscope to pin 45 and modify the SG4 signal to be a frequency above 45.75 MHz so that the PLL circuit becomes unlocked. (Beating will occur in this state.) Gradually lower the SG4 frequency and measure the frequency at which the PLL circuit locks. Similarly, modify the frequency to a value below 45.75 MHz so that the PLL circuit becomes unlocked. Gradually raise the SG4 frequency and measure the frequency at which the PLL circuit locks.

After performing the adjustments described in section 4 After performing the adjustments described in section 4

APC pull-in range (U), (L)

fPU, fPL

45

SG4 93 dBµ

After performing the adjustments described in section 4

Maximum RF AGC voltage Minimum RF AGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63)

VRFH VRFL RFAGC0

6 6 6 6 13 13 13 45 45 45

SG1 91 dBµ SG1 91 dBµ SG1

Set the RF AGC DAC to 0 and measure the pin After performing the adjustments 6 DC voltage described in section 4 Set the RF AGC DAC to 63 and measure the pin 6 DC voltage Set the RF AGC DAC to 0 and determine the input level such that the pin 6 DC voltage becomes 3.8 V ±0.5 V Set the RF AGC DAC to 63 and determine the input level such that the pin 4 DC voltage becomes 3.8 V ±0.5 V Set the SG4 signal frequency to 44.75 MHz and input that signal. Measure the pin 13 DC voltage at that time. Set the SG4 signal frequency to 46.75 MHz and input that signal. Measure the pin 13 DC voltage at that time. Modify the SG4 frequency to determine the frequency deviation (f) such that the pin 13 DC voltage changes from 2.5 V to 5.0 V. VAFTS = 2500/f [mV/kHz] Observe pin 45 with an oscilloscope and measure the p-p value of the waveform Measure the pin 45 DC voltage After performing the adjustments described in section 4 After performing the adjustments described in section 4 After performing the adjustments described in section 4 After performing the adjustments described in section 4 After performing the adjustments described in section 4

RFAGC63

SG1

Maximum AFT output voltage

VAFTH

SG4 93 dBµ SG4 93 dBµz

Minimum AFT output voltage

VAFTL

AFT detection sensitivity

VAFTS

SG4 93 dBµz SG7 93 dBµ SG1 93 dBµ

After performing the adjustments described in section 4 After performing the adjustments described in section 4 After performing the adjustments described in section 4

Video output amplitude Synchronization signal tip level

VO VOtip

Input sensitivity

Vi

SG7

Observe pin 45 with an oscilloscope and measure the peak-to-peak value of the waveform. Next, gradually lower the input level to determine the input After performing the adjustments described in section 4 level such that the output becomes ­3 dB below the video signal amplitude VO. Observe pin 45 with an oscilloscope and determine the value of the Vy/Vs ratio by After performing the adjustments measuring the peak-to-peak value of the sync described in section 4 waveform (Vs) and the peak-to-peak value of the luminance signal (Vy). Measure pin 45 with a vectorscope Measure pin 45 with a vectorscope Pass the noise voltage that occurs on pin 45 through a 10 kHz to 4 MHz bandpass filter, measure that voltage (Vsn) with an rms voltmeter. Use that value to calculate 20 × log (1.43/Vsn). Input SG1 at 93 dBµ and measure the pin 12 DC voltage (V12).Mix three signals: SG1 at 87 dBµ, SG2 at 82 dBµ, and SG3 at 63 dBµ, and input that signal to VIF IN. Now, apply the V12 voltage to pin 12 using an external power supply. Measure the difference between the 3.58 MHz component and the 920 kHz component with a spectrum analyzer. After performing the adjustments described in section 4 After performing the adjustments described in section 4

Video-to-sync ratio (@ 100 dBµ)

V/S

45 45 45 45

SG7 100 dBµ

Differential gain Differential phase

DG DP

SG5 93 dBµ SG5 93 dBµ

Video signal-to-noise ratio

S/N

SG1 93 dBµ

After performing the adjustments described in section 4

920 kHz beat level

I920

45

SG1 SG2 SG3

After performing the adjustments described in section 4

No. 5844-11/27

LA76070 Video Switch Block - Input Signals and Measurement Conditions 1. Unless otherwise indicated, these measurements are to be performed with no signal applied to PIF IN (pin 10) and with the D/A converter IF.ACG.SW set to "1". 2. The table below lists the input signals and their labels.
Input signal Waveform Condition

SG8

10-step staircase waveform 1 V p-p

SG9

4.2 MHz 1 Vp-p

Parameter [VIF Block]

Symbol

Measurement Input signal point

Measurement procedure

Bus conditions

External video gain

AUXG

42

Pin 1 SG8

Observe pin 42 with an oscilloscope, measure the peak-to-peak value of the waveform, and perform the following calculation. AUXG = 20 × log (Vp-p) [dB] Observe pin 42 with an oscilloscope and measure the synchronizing signal tip voltage in the waveform. Determine the voltage difference between this measured value and synchronizing signal tip level (VOtip) measured in the VIF block. Measure the 4.2 MHz component in the pin 42 signal with a spectrum analyzer.Convert this measurement to a V peak-to-peak value and perform the following calculation. AUXG = 20 × log (1.4/Vp-p) [dB]

VIDEO.SW = "1"

External video sync signal tip voltage

AUXS

42

Pin 1 SG8

VIDEO.SW = "1"

External video crosstalk

AUXC

42

Pin 1 SG8

VIDEO.SW = "0"

Internal video output level

INT0

42

Observe pin 45 with an oscilloscope and Pin 10 measure the peak-to-peak value of the SG7 waveform. Determine the difference between (VIF block) this measured value and the video output 93 dBµ amplitude (VO) measured in the VIF block.

After performing the adjustments described in section 4 IF. AGC. SW = "0" VIDEO. SW = "0"

No. 5844-12/27

LA76070 SIF Block (FM Block) - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. Bus control condition: IF.AGC.DEF = 1 2. SW: IF1 = off 3. Apply the input signal to pin 49 and use a 4.5 MHz carrier signal.
Parameter Symbol Measurement point Input signal Measurement procedure Bus conditions

FM detector output voltage

SOADJ

7 7 7 7 7

Adjust the DAC (FM.LEVEL) so that the pin 7 90 dBµ, FM detector output 1kHz component is as fm = 1 kHz, close to 474 mV rms as possible, and FM = ±25 kHz measure the output at that time in mV rms. Record this measurement as SV1. Determine the input level (in dBµ) such that fm = 1 kHz, the pin 7 FM detector output 1kHz component FM = ±25 kHz is ­3 dB down from the SV1 value Determine the modulation frequency 90 dBµ, bandwidth (Hz) that is ­3 dB or higher relative FM = ±25 kHz to the pin 7 FM detector output SV1 value 90 dBµ, Determine the total harmonic distortion in the fm = 1 kHz, pin 7 FM detector output 1kHz component FM = ±25 kHz 90 dBµ, fm = 1 kHz, AM = 30% Measure the pin 7 FM detector output 1kHz component (in mV rms). Record this measured value as SV2 and perform the following calculation. SAMR = 20 × log (SV1/SV2) [dB] Set SW1:IF1 to the "ON" Measure the pin 7 noise level (in mV rms). Record this measured value as SV3 and perform the following calculation. SSN = 20 × log (SV1/SV3) [dB] FM.LEVEL = adjusted value

FM limiting sensitivity

SLS

FM detector output bandwidth

SF

FM.LEVEL = adjusted value

FM detector output total harmonic distortion

STHD

FM.LEVEL = adjusted value

AM rejection ratio

SAMR

FM.LEVEL = adjusted value

SIF signal-to-noise ratio

SSN

7

90 dBµ, CW

FM.LEVEL = adjusted value

Audio Block - Input Signals and Test Conditions
Parameter Symbol Measurement point Input signal Measurement procedure Measure the output pin 1kHz component (V1: mV rms) and perform the following calculation. AGMAX = 20 × log (V1/400) [dB] Measure the output pin 1kHz component (V2: mV rms) and perform the following calculation. AGMAX = 20 × log (V1/V2) [dB] Measure the output pin 20kHz component (V3: mV rms) and perform the following calculation. AF = 20 × log (V3/V1) [dB] Measure the output pin 20kHz component (V4: mV rms) and perform the following calculation. AMUTE = 20 × log (V3/V4) [dB] Determine the total harmonic distortion in output pin 1kHz component Measure the noise level (DIN.AUDIO) on the output pin (V5: mV rms) and perform the following calculation. ASN = 20 × log (V1/V5) [dB] Bus conditions

Maximum gain

AGMAX

51 51 51 51 51 51

1 kHz, CW 400m Vrms

VOLUME = "111111" AUDIO.MUTE = "0"

Variability range

ARANGE

1 kHz, CW 400m Vrms

VOLUME = "000001" AUDIO.MUTE = "0"

Frequency characteristics

AF

20 kHz, CW 400m Vrms

VOLUME = "111111" AUDIO.MUTE = "0"

Muting

AMUTE

20 kHz, CW 400m Vrms 1 kHz, CW 400m Vrms

VOLUME = "000000" AUDIO.MUTE = "0" VOLUME = "111111" AUDIO.MUTE = "0" VOLUME = "111111" AUDIO.MUTE = "0"

Total harmonic distortion

ATHD

Signal-to-noise ratio

ASN

No signal

No. 5844-13/27

LA76070 Chrominance Block - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. VIF and SIF blocks: No signal 2. Deflection block: Input a horizontal and vertical composite synchronizing signal, and assure that the deflection block is locked to the synchronizing signal. (Refer to the "Deflection Block - Input Signals and Measurement Conditions" section.) 3. Bus control conditions: All conditions set to the initial conditions unless otherwise specified. 4. Y input: No signal 5. C input: The C1IN input (pin 40) must be used. 6. The following describes the method for calculating the demodulation angle. B-Y axis angle = tan-1 (B (0)/B (270) + 270° R-Y axis angle = tan-1 (R (180)/R (90) + 90° G-Y axis angle = tan-1 (G (270)/G (180) + 180°

R-Y axis

B-Y axis

G-Y axis

7. The following describes the method for calculating the AF angle. BR ... The ratio between the B-Y and R-Y demodulator outputs. ...... ANGBR: The B-Y/R-Y demodulation angle AFXXX = tan-1 × BR-Cos [R-Y/B-YSin ]

8. Attach a TV crystal externally to pin 15.

No. 5844-14/27

LA76070 Chrominance Input Signals

C-1

X IRE signal (L-X)

C-2

C-3
(However, if a frequency is specified that frequency must be used.)

C-4

C-5

No. 5844-15/27

LA76070
Measurement point

Parameter [Chroma Block]

Symbol

Input signal

Measurement procedure

Bus and other conditions

Bout ACC amplitude characteristic 1 ACCM1

30
Bout

C-1 0 dB +6 dB

Measure the output amplitudes when the chrominance signal input is 0 dB and when that input is +6 dB and calculate the ratio. ACCM1 = 20 × log (+6 dBdata/0dBdata) Measure the output amplitude when the chrominance signal input is ­14 dB and calculate the ratio. ACCM2 = 20 × log (­14 dBdata/0dBdata) Measure the Y output level (Record this measurement as V1) Next, input a signal to CIN, and (with YIN a sync-only signal) measure the output level. (Record this measurement as V2) Calculate CLRBY from the following formula. CLRBY = 100 × (V2/V1) + 15% Measure V1: the output amplitude when the color control is maximum, and V2: the output amplitude when the color control is nominal. Calculate CLRMN as V1/V2. Measure V3: the output amplitude when the color control is minimum. Calculate CLRMM as CLRMN = 20 × log (V1/V3). Measure V4: the output amplitude when the color control is 90, and V5: the output amplitude when the color control is 38. Calculate CLRSE from the following formula. CLRSE = 100 × (V4 ­ V5)/(V2 × 52) Measure all sections of the output waveform and calculate the B-Y axis angle Measure all sections of the output waveform, calculate the B-Y axis angle, and calculate TINMAX from the following formula. TINMAX = ­ TINCEN Measure all sections of the output waveform, calculate the B-Y axis angle, and calculate TINMIN from the following formula. TINMIN = ­ TINCEN TR24: Saturation 01111111 Saturation 01000000 TR28: Saturation 00000000 TR24: Saturation 01011010 Saturation 00100110 TR23: Tint 00111111 TR23: Tint 01111111

ACC amplitude characteristic 2

ACCM2

30

C-1 ­14 dB YIN: L77 C-1: No signal

B-Y/Y amplitude ratio

CLRBY

30
C-2

Color control characteristic 1

CLRMN

30 30 30 30 30 30 30 30

C-3

Color control characteristic 2

CLRMN

C-3

Color control sensitivity

CLRSE

C-3

Tint center

TINCEN

C-1

Tint control maximum

TINMAX

C-1

Tint control minimum

TINMIN

C-1

TR23: Tint 00000000

Tint control sensitivity

TINSE

C-1

Measure A1: the angle when the tint control is 85, TR23: Tint and A2: the angle when the tint control is 42, 01010101 and calculate TINSE from the following formula. 00101010 TINSE = (A1 ­ A2) /43

Demodulation output ratio R-Y/B-Y

RB

C-3

28
Demodulation output ratio G-Y/B-Y GB

Measure Vb: the BOUT output amplitude, and Vr: the ROUT output amplitude. Determine RB = Vr/Vb.

TR24: Saturation 01000000

29

C-3

Measure Vg: the GOUT output amplitude and determine GB = Vg/Vb

TR24: Saturation 01000000

Continued on next page.

No. 5844-16/27

LA76070
Continued from preceding page.

Parameter

Symbol

Measurement point

Input signal

Measurement procedure Measure the BOUT and ROUT output levels, calculate the angles of the B-Y and R-Y axes, and determine ANGBR as ­ . Measure the GOUT output level, calculate the angle of the G-Y axis, and determine ANGBG as ­ Gradually lower the input signal level, and measure the input signal level at the point the output level falls under 150 mV p-p Measure the oscillator frequency f, and determine CVCOF from the following formula. CVCOF = f ­ 3579545 (Hz) Gradually lower the input signal subcarrier frequency starting from 3.57545 MHz + 2000 Hz, and measure the frequency when the output waveform locks Gradually raise the input signal subcarrier frequency starting from 3.57545 MHz ­ 2000 Hz, and measure the frequency when the output waveform locks With Auto Flesh = 0, measure the level that corresponds to 73° for the BOUT and ROUT output waveforms, and calculate the angle AF073A. With Auto Flesh = 1, determine the angle AF073B in the same way. Calculate AF073 from the following formula. AF073 = AF073B ­ AF073A With Auto Flesh = 0, measure the level that corresponds to 118° for the BOUT and ROUT output waveforms, and calculate the angle AF118A. With Auto Flesh = 1, determine the angle AF118B in the same way. Calculate AF118 from the following formula. AF118 = AF118B ­ AF118A With Auto Flesh = 0, measure the level that corresponds to 163° for the BOUT and ROUT output waveforms, and calculate the angle AF163A. With Auto Flesh = 1, determine the angle AF163B in the same way. Calculate AF163 from the following formula. AF163 = AF163B ­ AF163A

Bus and other conditions

Demodulation angle B-Y/R-Y

ANGBR

30 28 29 30 15 30 30 30

C-1

Demodulation angle B-Y/G-Y

ANGBG

C-1

Killer operating point

KILL

C-3

Chrominance VCO free-running frequency

CVCOF

CIN No signal

Chrominance pull-in range (+)

PULIN +

C­1

Chrominance pull-in range (­)

PULIN ­

C­1

Auto flesh characteristic 73°

AF073

C­4

28 30
Auto flesh characteristic 118° AF118 C­4

TR22: Auto flesh: 0******* TR22: Auto flesh: 1*******

28 30
Auto flesh characteristic 163° AF163 C­4

TR22: Auto flesh: 0******* TR22: Auto flesh: 1*******

28

TR22: Auto flesh: 0******* TR22: Auto flesh: 1*******

No. 5844-17/27

LA76070 Video Block - Input Signals and Measurement Conditions · C IN input signal * chrominance burst signal: 40 IRE · Y IN input signal 100 IRE: 714 mV *0 IRE signal (L-0): Standard NTSC synchronizing signal

XIRE signal (L-X)

CW signal (L-CW)

Black stretch 0 IRE signal (L-BK)

· R/G/B input signal RGB input signal 1 (O-1)

RGB input signal 2 (O-2)

No. 5844-18/27

LA76070
Measurement point Bus conditions and input signals

Parameter [Video Block] Overall video gain (contrast: maximum) Contrast adjustment characteristics (normal/maximum) Contrast adjustment characteristics (minimum/maximum)

Symbol

Input signal

Measurement procedure

CONT127

30 30 30

L­50

Measure the output signal 50 IRE amplitude (CNTHB V p-p) and calculate CONT127 as 20 × log (CNTHB/0.357). Measure the output signal 50 IRE amplitude (CNTCB V p-p) and calculate CONT63 as 20 × log (CNTCB/CNTHB). Measure the output signal 50 IRE amplitude (CNTLB V p-p) and calculate CONT0 as 20 × log (CNTLB/CNTHB).

Contrast max 1111111 Contrast center 0111111 Contrast min 0000000

CONT63

L­50

CONT0

L­50

Video frequency characteristics

30
Brightness min 0000000 Contrast max 1111111 Brightness min 0000000 Contrast max 1111111

L­0 DC propagation ClampG

Measure the output signal 0 IRE DC level (BRTPL V) Measure the output signal 0 IRE DC level (DRVPH V) and the 100 IRE amplitude (DRVH V p-p), and calculate ClampG as 100 × (1 + (DRVPH - BRTPL)/DRVH).

30
L­100

Y delay

YDLY

30
Measure the output signal 0 IRE DC level at point A when the black stretch function is BKST defeat on (1) defeated (off). Record this value as BKST1 (V).

Maximum black stretching gain

BKSTmax

30

L­BK

Measure the output signal 0 IRE DC level at point A when the black stretch is enabled (on). Record this value as BKST2 (V). Calculate BKSTmax from the following formula. BKSTmax = 2 × 50 × (BKST1 ­ BKST2)/ CNTHB

BKST defeat off (0)

L­CW

Sharpness (peaking)

30

L­CW

L­CW Horizontal/vertical blanking output level

RGBBLK

30

L­100

Measure the output signal blanking period DC level. Record that value as RGBBLK V.

No. 5844-19/27

LA76070
Measurement point Bus conditions and input signals

Parameter [OSD Block] OSD fast switch threshold

Symbol

Input signal

Measurement procedure

FSTH

30 28

L­0 O­2 L­50 L­0 O­2

Apply a voltage to pin 36 and determine the pin 36 voltage when the output signal switches to Pin 35: Apply O-2 the OSD signal Measure the output signal 50 IRE amplitude (CNTCR V p-p) Measure the OSD output amplitude (OSDHR V p-p) Calculate ROSDH as 50 × (OSDHR/CNTCR) Pin 36: 2.0 V Pin 33: Apply O-2

Red RGB output level

ROSDH

Green RGB output level

GOSDH

L­50

29

Measure the output signal 50 IRE amplitude (CNTCG V p-p) Measure the OSD output amplitude (OSDHG V p-p) Calculate GOSDH as 50 × (OSDHG/CNTCG) Pin 36: 2.0 V Pin 34: Apply O-2

L­0 O­2

Blue RGB output level

BOSDH

L­50

30

Measure the output signal 50 IRE amplitude (CNTCB V p-p) Measure the OSD output amplitude (OSDHB V p-p) Calculate BOSDH as 50 × (OSDHB/CNTCB) Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 33: Apply O-1 signal and record those values as RGBLR and RGBHR V p-p, respectively Calculate RRGB as RGBLR/CNTCR Calculate LRRGB as 100 × (RGBLR/RGBHR) Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 34: Apply O-1 signal and record those values as RGBLG and RGBHG V p-p, respectively Calculate GRGB as RGBLG/CNTCG Calculate LGRGB as 100 × (RGBLG/RGBHG) Measure the amplitude of points A (the 0.35 V section in the input signal O-1) and B (the 0.7 V Pin 36: 2.0 V section in the input signal O-1) in the output Pin 35: Apply O-1 signal and record those values as RGBLB and RGBHB V p-p, respectively Calculate BRGB as RGBLB/CNTCB Calculate LBRGB as 100 × (RGBLB/RGBHB) Pin 36: 2.0 V Pin 35: Apply O-2

L­0 O­2

Analog OSD R output level

28
RRGB LRRGB

L­0 O­1

Gain matching Linearity

Analog OSD G output level

29
GRGB LGRGB

L­0 O­1

Gain matching Linearity

Analog OSD B output level

30
BRGB LBRGB

L­0 O­1

Gain matching Linearity

Parameter

Symbol

Measurement point

Input signal

Measurement procedure

Bus conditions and input signals

[RGB Output Block] (Cutoff and Drive Blocks)

28
Brightness control (normal) BRT63

29 30

L­0

Measure the output signal 0 IRE DC levels for the R output (28), G output (29), and B output (30). Record these values as BRTPCR, BRTPCG, and BRTPCB V, respectively. Calculate BRT63 as (BRTPCR + BRTPCG + BRTPCB)/3

Contrast max 1111111

(max)

BRT127

Measure the output signal 0 IRE DC levels for Brightness max the B output (30). Record this value as BRTPHB. 1111111 Calculate BRT127 as 50 × (BRTPHB ­ BRTPCB)/CNTHB Measure the output signal 0 IRE DC levels for Brightness min the B output (30). Record this value as BRTPLB. 0000000 Calculate BRT0 as 50 × (BRTPLB ­ BRTPCB)/CNTHB

(min)

BRT0

30

No. 5844-20/27

LA76070
Measurement point

Parameter

Symbol

Input signal

Measurement procedure

Bus and other conditions

[RGB Output Block] (Cutoff and Drive Blocks) (minimum) Vbias0 L­50 Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B Contrast max output (pin 30). Record these values as Vbias0 1111111 *(V).Here, * is R, G, and B, respectively. R bias max 1111111 G bias max 1111111 B bias max 1111111 Contrast max 1111111 R bias: 1010000 G bias: 1010000 B bias: 1010000 Contrast max 1111111 R bias: 0110000 G bias: 0110000 B bias: 0110000 Contrast max 1111111 Contrast max 1111111 Brightness min 0000000

(maximum) Bias (cutoff) control

Vbias127 Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as Vbias128*(V). Here, * is R, G, and B, respectively.

28 29 30
Bias (cutoff) control resolution Vbiassns Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as BAS48*(V). Here, * is R, G, and B, respectively. Measure the output signal 0 IRE DC levels for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as BAS80*. Here, * is R, G, and B, respectively.

Vbiassns* = (BAS80* ­ BAS48*)/32 Drive adjustment: Maximum output RGBout127 Measure the output signal 100 IRE amplitudes for the R output (pin 28), G output (pin 29), and B output (pin 30). Record these values as DRVH* (V p-p). Here, * is R, G, and B, respectively.

28
Output attenuation RGBout0

29 30

L­100

Contrast max 1111111 Measure the output signal 100 IRE amplitudes Brightness min for the R output (pin 28), G output (pin 29), and 0000000 B output (pin 30). Record these values as R drive min DRVL* (V p-p). 0000000 Here, * is R, G, and B, respectively. B drive min 0000000 RGBout0* = 20 × log (DRVH*/DRVL*)

No. 5844-21/27

LA76070 Deflection Block - Input Signals and Measurement Conditions Unless otherwise indicated, set up the following conditions for each of the following measurements. 1. VIF and SIF blocks: No signal 2. C input: No signal 3. SYNC input: Horizontal and vertical composite synchronizing signal (40 IRE and other conditions, such as timing, must conform to the FCC broadcast standards.) Caution: The burst and chrominance signals must not be below the pedestal level.

4. Bus control conditions: All conditions set to the initial conditions unless otherwise specified. 5. The delay between the rise of the horizontal output (the pin 23 output) and the rise of the F.B.P IN (the pin 24 input) must be 9 µs. 6. Unless otherwise specified, pin 25 (the X-ray protection circuit input) must be connected to ground. Caution: Perform the following operation if horizontal pulse output has stopped. 1. The bus data T_ENABLE bit must be temporarily set to 0 and then set to 1. (If the X-ray protection circuit operates, an IC internal latch circuit will be set. To reset that latch circuit, the T_ENABLE bit must be temporarily set to 0, even if there is no horizontal output signal being output.) Notes on Video Muting If horizontal pulse output has stopped, perform the operation described in item 1. above and then set the video mute bit set to 0. (This is because the video mute bit is forcibly set to the mute setting when the T_ENABLE bit is set to 0 or when the Xray protection circuit operates. This also applies when power is first applied.)
Parameter [Deflection Block] SYNC IN: horizontal and vertical synchronizing signal Gradually lower the level of the synchronizing signal input to Y IN (pin 37) and measure the level of the synchronizing signal at the point synchronization is lost Connect a frequency counter to the pin 23 output (Hout) and measure the horizontal freerunning frequency. Calculate the deviation from the following formula. fH = ­ 15.734 kHz Monitor the horizontal synchronizing signal input to Y IN (pin 37) and the pin 23 output (Hout), and measure the pull-in range by modifying the horizontal synchronizing signal frequency Symbol Measurement point Input signal Measurement procedure Bus conditions

Sync separator circuit sensitivity

Ssync

37

Horizontal free-running frequency deviation

fH

23

SYNC IN: No signal

Horizontal pull-in range

fH PULL

37

SYNC IN: horizontal and vertical synchronizing signal

Horizontal pulse output saturation voltage

V Hsat

23

SYNC IN: horizontal and Measure the voltage during the low-level period vertical in the pin 23 horizontal output pulse synchronizing signal

No. 5844-22/27

LA76070
Measurement point

Parameter

Symbol

Input signal

Measurement procedure Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the Y IN horizontal synchronizing signal

Bus conditions

23
Horizontal output pulse phase HPHCEN

37

SYNC IN: horizontal and vertical synchronizing signal

Horizontal position adjustment range

23
HPHrange

37

SYNC IN: horizontal and vertical synchronizing signal

Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the Y IN horizontal synchronizing signal when HPHASE is set to 0 and when it is set to 7, and calculate the difference between those measurements and HPHCEN

Hphase: 000 Hphase: 111

Horizontal position adjustment maximum deviation

23
HPHstep

37

SYNC IN: horizontal and vertical synchronizing signal

Measure the delay between the rise of the pin 23 horizontal output pulse and the fall of the SYNC IN horizontal synchronizing signal as HPHASE is set to each value from 0 to 7, and calculate the amount of the change at each step. Find the step size with the largest change.

Hphase: 000 to Hphase: 111

X-ray protection circuit operating voltage

23
VXRAY

25

SYNC IN: horizontal and vertical synchronizing signal

Connect a DC voltage source to pin 25 and gradually increase the voltage starting at 0 V. Measure the pin 25 DC voltage at the point that the pin 23 horizontal pulse output stops.

No. 5844-23/27

LA76070
Measurement point

Parameter [Vertical screen Size Adjustment]

Symbol

Input signal

Measurement procedure

Bus conditions

Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. SYNC IN: horizontal and vertical synchronizing signal Calculate Vsize32 from the following formula.

Vertical ramp output amplitude @32

Vsize32

17

Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. Calculate Vsize32 from the following formula. SYNC IN: horizontal and vertical synchronizing signal

Vertical ramp output amplitude @0

Vsize0

17

VSIZE: 0000000

Monitor the pin 17 vertical ramp output and measure the voltages at the line 22 and line 262. SYNC IN: horizontal and vertical synchronizing signal Calculate Vsize32 from the following formula. VSIZE: 1111111

Vertical ramp output amplitude @63

Vsize63

17

No. 5844-24/27

LA76070
Measurement point

Parameter [Vertical screen Position Adjustment]

Symbol

Input signal

Measurement procedure

Bus conditions

Monitor the pin 17 vertical ramp output and measure the voltage at line 142 SYNC IN: horizontal and vertical synchronizing signal

Vertical ramp DC voltage @32

Vdc32

17

Monitor the pin 17 vertical ramp output and measure the voltage at line 142 SYNC IN: horizontal and vertical synchronizing signal

Vertical ramp DC voltage @0

Vdc0

17

VDC: 0000000

Monitor the pin 17 vertical ramp output and measure the voltage at line 142 SYNC IN: horizontal and vertical synchronizing signal

Vertical ramp DC voltage @63

Vdc63

17

VDC: 1111111

No. 5844-25/27

LA76070

* For adjusting the crystal oscillator characteristic

No. 5844-26/27

LA76070

Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of July, 1999. Specifications and information herein are subject to change without notice. PS No. 5844-27/27