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L6B TFT- LCD TV
SERVICE MANUAL
CONTENTS PAGES
Safety instructions 1
Technical specifications 2
Panel Specification 3
Back appearance of TV 5
Interconnection Diagram 5
Block diagram 6
Block diagram of power supply 7
Service mode 8
Service Mode items and values 10
Data sheet of important IC's and parts 11
Recommended Part List 23
Frequency list of channels 25
L6B TECHNICAL SPECIFICATION
Receiving System PAL B/G+I+D/K SECAM L/L'
Comb Filter Adaptive 4H\2H
LTI, CTI Filters +
DVI 1.0 Compliant +
DVI Receiver Resolution VGA to SXGA
2 Pixel \ Clk Support +
Gamma Correction 8 to 10-bit LUT
PIP\PAP\POP\PAT +
OSD Graphics Based 8-bit\pixel
Level (1.5, 2.5, Teleweb) Teletext 1.5
Teletext Type (Fast\Top\Simple) Simple, Fast, Top
Page Memory 800p
WSS +
VPS\PDC +
4:3 +
16:9 +
Picture Formats 14:9 +
(4:3, 16:9, 14:9, Panorama, LetterBox, Panorama +
Subtitle) Letterbox +
Subtitle +
Zoom +
WSS (Wide Screen Signalling) +
ATS (Automatic Tuning System) Frequency Search
Manual Search Channel Table Search
Number of Program Storage +
No Ident Timer +
Picture Freeze +
Equalizer +
AVL (Automatic Volume Level) +
Sound Status Memory +
Picture Status Memory +
Swap +
Child Lock +
Program Lock +
Picture Format Switching Tru Pin 8 +
Auto RGB Detect Tru Pin 16 +
Off Timer (Sleep Timer) +
Timer
On Timer +
Picture Smart (User, Soft, Natural, Rich) +
Sound Smart (User, Music, Sports, Cinema,
+
Speech)
Scart2 Out Selectable +
S-Video Input Through Scart2 +
2x5W for 22"W, 23"W
Audio Output Power
2x10W for 26"W
RMS in Max at 10% THD)
2x10W for 30"W
Stereo (German A2, Nicam, BTSC) German A2, Nicam
S-video In (DIN) 1
AV In (3 RCA) 1
AV Out (3 RCA) 1
PC Audio (L, R) 1
D-Sub 15 1
Headphone 1
CVBS In 4
Y\C In 1
DVI In YES
CVBS Out 4
PANEL SPECIFICATION
Sizes 22" 23" 26" 27" 30" 32"
Samsung LG- Samsung LG- Chimei AUO
Manufacturer Samsung Chimei
Philips Hannstar Philips AUO LG-Philips
Interface Single LVDS Single LVDS Singlel LVDS Singel LVDS Single LVDS Single LVDS
Resolution WXGA (1280x720) WXGA (1280x768) WXGA (1280x768) WXGA (1280x720) WXGA (1280x768) WXGA (1280x768)
Brightness (cd/m2)>= 450 450 450 550 550 450
Contrast>= 500 400 400 600 600 700
Response Time
25 25 25 25 25 23
(Tr+Tf) msec =<
Viewing Angle
85/85 85/85 85/85 85/85 85/85/85/85 85/85/85/85 85/85/85/85 85/85/85/85
R\L\H\L>=
Adaptor nput 15V 24V Built-in TV Built-in TV Built-in TV Built-in TV
PoweR consumptions 100W 100W 120W 120W 140W 180W
St-By Power
<4W <4W <4W <4W <4W <4W
Consumption
Input Range 100V-240V/50- 60Hz 100V-240V/50- 60Hz 100V-240V/50- 60Hz 100V-240V/50- 60Hz 100V-240V/50- 60Hz 100V-240V/50- 60Hz
BACK SIDE APPEARANCES
CONTROL
BOARD
SPEAKERS
POWER
SWITCH
220VAC INPUT
LED/IR BOARD
POWER SUPPLY
MAIN BOARD
CHASSIS
NOTE: LOCATION AND THE SHAPE OF IR /LED BAORD, CONTROL BOARD AND MAIN SWITCH
BOARD MAY CHANGE ACCORDING TO THE COSMETIC OF THE TV AND SIZE
TO PANEL
MAIN CHASSIS CN1
JP452 JP451 JP453 POWER
SUPPLY
MODULE
S150
SPEAKER
S2
S550 CN3 CN2
TO
PANEL
S350
S50 JP450
TO HEADPHONE JACK MAIN POWER
SWITCH
MODULE
IR RECEIVER/LED KEY BOARD
MODULE MODULE 220V AC
INPUT
L6B BLOCK DIAGRAM
Video-Main
RF In SDRAM
Video Decoder
Multi Standard
IF IC TDA9886T
SAA7118MP
Tuner-Main MT48LC16M
QSS-Main
16 Bit
YUV PW1231
Tuner-PIP IF IC TDA9886T EEPROM
De-Interlacer
QSS-PIP
Main-Video
24C64
PIP-Video
24 Bit RGB
AV-Out Video Flash Memory
AV4 Video-In AM29VL160
Video Switch Video-PIP PW181
Video In/Out TDA6415C 16 Bit IMAGE
LVDS Transmitter
Video Decoder
Multi Standard
SAA7118MP
YUV PROCESSOR
DS090C385
De-Interlacer Progressive
SCART 1 2 3 Pin 8 Switch or Intrelaced
Scaler
Scart RGB
PCF8591 24 Bit Dual TO THE
OSD PANEL
I2C Communication RGB ,HS,VS
Micro-Cont.
Audio-In/Out
DE,PCLK
Gamma Corr.
SC1-SC2 RGB IR In
RGB Switch
Stand by
PI5V30
LED's
AV4
Reset
Audio-In
Mute
Audio-Switch B/L Enable
TDA6420 AUDIO PROCESSOR
Audio MSP3410D Digital Dim
In-Out
SVHS Y/C
48 Bit RGB VS/HS
AV Out Audio
Dual nterface for
FPD
Audio Amplifier AD9887
EEPROM
TA2024 24LC21
EEPROM
24LC21
Headphone RGB HS/VS-In
Amp. DVI Input
TDA1308
DVI Socket
PC DVI Audio -In SVHS Socket D-SUB 15 socket
Speaker
Headphone Jack
L6B POWER SUPPLY BLOCK DIAGRAM (MAIN CHASSIS)
J450
12V F450 +2,5V_STBY
U451 (5V) U454 +5V_STBY U458
FDS9933A LM2576 NCP1117
DC_IN
GND
F451 VOLTAGE
S450 DOUBLER +3,3V_STBY
12V '33V U450 +1,5V_STBY
NCP117
12V_AMP
U452
GND
FDS9933N
+5V
U457 U456 +8V
STAND_BY NCP1117 +3,3V LM317
U453 +12V U455 PANEL_POWER
FDS9933N LM2576
PNL_EN +12V_INVERTER
L6B SERVICE MENU
1. Activating the Service Menu
When the menu is on the screen press `9', `3', '0', '1' on the remote controller. This will
activate the service menu.
2. Service Menu Structure
The service menu has three items: display, calibre and version
2.1 Display
Display item has seven options:
a- Panel
Panel option gives information about the current panel resolution. It is a read only
option and can not be set.
b- Power on time
Power on time gives information about the last update time of the SW running. It
is a read only option and can not be set.
c- Backlight on time
Backlight on time option reserved.
d- Scart prescale
Scart prescale option sets the prescale values for the input sounds entering the scart
input of the MSP(Micronas Sound Processor). Changing this value you can adjust
the level of the output sound going to loudspeakers for all the sources except the
Tuners. The range is between 0 and 100.
e- nicam prescale
Nicam prescale option sets the prescale values for the Nicam standard sounds for
tuner inputs. Changing this value you can adjust the level of the output sound
going to loudspeakers for Nicam sounds entering the analog sound input of MSP.
The range is between 0 and 100.
f- fm/am prescale
fm/am prescale option sets the prescale values for the FM/AM standard sounds for
tuner inputs. Changing this value you can adjust the level of the output sound
going to loudspeakers for FM/AM sounds entering the analog sound input of MSP.
The range is between 0 and 100.
g- Agc(Automatic Gain Control) adjust
Agc adjust option sets the input voltage going to IF decoder AGC pin. Changing
this value you can adjust this voltage for optimum Tuner performance. The range
is between 0 and 31.
h- R/G/B Brightness/Contrast: These are used for color bias adjustment. The range is
Between 0 and 255
2.2 Calibre
Calibre item has nine options:
a- video format
Video format option force the video format to the desired format. Selectable
formats are Auto, Pal, NTSC and SECAM.
b- colorspace
Colorspace option gives the information about the video input colorspace input to
PW181 IC. Do not change this value unless an error occurred in the colors
displayed.
c- test pattern
This option activates the internal pattern of PW181 IC. There are 3 choices: none,
vert bars, solid color. None will deactivate the internal pattern. Vert bars choice
activates the bar pattern for the selected color component. Solid color activates the
solid pattern with one color selected in color component and also you can change
the level of the color by solid field level.
d- Color components:
This option selects the color for the internal pattern of PW181 IC. There are 4
choices: all, red, green and blue. If you choose all, you can see the white pattern
and if you choose one of the other choices you can see the test pattern with the
selected color.
e- solid field level
This option will adjust the level of the colors for the test pattern. The range is
betwwen 1 and 64.
f- Initial ATS
This option will enable or disable the Initial setup for the TV. Setting this option to
On, the TV will open from the Quick setup menu. Setting this option to Off will
disable this option.
g- factory reset
Factory reset option executes a reset operation for the NVRAM. Pressing OK
when this option is selected will erase the NVRAM and load default values to
NVRAM.
h- dpms
This option selects the Power option for the TV. Setting this option to On the TV
will switch to the last state for power on transition. Setting this to Off will disable
this option and the TV will always switch to Stand-by state while power on
transition.
i- osd timeout
This option sets the OSD timeout for the main menu structure. Selections are 5, 15
and 60 secs. The default is 60 sec.
2.3 Version
This item gives the information about the version of the software. Also you can see the
last modified time for the GUI(graphical user interface).
L6 CHASSIS SERVICE MODE ITEMS
display menu
ITEM TYPICAL VALUES/OPTIONS
panel 1280x768
power on time 03:39:45
back light time 03:39:45
scart prescale 25
nicam prescale 45
fm/am prescale 24
agc adjust 16
red brightness 128
red contrast 128
green brightness 128
green contrast 128
blue brightness 128
blue contrast 128
calibre menu
ITEM TYPICAL VALUES/OPTIONS
video format auto
color space RGB
test pattern none
color components all
solid field level 33
initial ats on
factory reset press to reset
dpms on
osd time out 60 sec
version
ITEM TYPICAL VALUES/OPTIONS
Software
SL630T_CH1_T13 L6B 1.22 Chi30
GUI
Project; L6B Toshiba
Generated Date: October 01,2004 at 22.42
TEA6415C
BUS-CONTROLLED VIDEO MATRIX SWITCH
s 20MHz BANDWIDTH
s CASCADABLE WITH ANOTHER TEA6415C
(INTERNAL ADDRESS CAN BE CHANGED BY
PIN 7 VOLTAGE)
s 8 INPUTS (CVBS, RGB, MAC, CHROMA, ...)
s 6 OUTPUTS
s POSSIBILITY OF MAC OR CHROMA SIGNAL
FOR EACH INPUT BY SWITCHING-OFF THE
DIP20
CLAMP WITH AN EXTERNAL RESISTOR (Plastic Package)
BRIDGE
s BUS CONTROLLED ORDER CODE : TEA6415C
s 6.5dB GAIN BETWEEN ANY INPUT AND OUT-
PUT
s -55dB CROSSTALK AT 5MHz
s FULLY ESD PROTECTED
DESCRIPTION
The main function of the TEA6415C is to switch 8
video input sources on the 6 outputs.
Each output can be switched to only one of the SO20
inputs whereas but any same input may be con- (Plastic Micropackage)
nected to several outputs.
All the switching possibilities are controlled through ORDER CODE : TEA6415CD
the I2C bus.
PIN CONNECTIONS
INPUT 1 20 INPUT
DATA 2 19 GROUND
INPUT 3 18 OUTPUT
CLOCK 4 17 OUTPUT
INPUT 5 16 OUTPUT
INPUT 6 15 OUTPUT
PROG 7 14 OUTPUT
INPUT 8 13 OUTPUT
VCC 9 12 GROUND
6415C-01.EPS
INPUT 10 11 INPUT
TEA6415C
BLOCK DIAGRAM
P ERI P ERI TTX LUMA PIP MAC
TV1 TV2 CHROMA DEC.
POWER
GND
18 17 16 15 14 13 12
CVBS
1
(MAC/DEC)
CVBS
3
(P ERI P LUG1)
CVBS
5
(AM TUNER)
MAC S IGNAL
6
(AMTUNER)
CVBS
8
(P ERI P LUG2)
CVBS
10
(FM TUNER)
MAC S IGNAL
11
(FM TUNER)
SYNCHRO
20
(TTX/BTX)
T
E
A
BUS
6
DECODER
4
1
5
C
2 7 4 9 19 6415C-02.EPS
DATA P ROG CLOCK VCC GND
GENERAL DESCRIPTION
The main functionof the IC is to switch 8 video input input (with external resistor bridge). All the switch-
sources on 6 outputs. ing possibilities are changed through the BUS.
Each output can be switched on only one of each Driving 75 load needs an external transistor.
input. On each input an alignment of the lowest It is possible to have the same input connected to
level of the signal is made (bottom of synch. top for several outputs.
CVBS or black level for RGB signals). The starting configuration upon power on (power
Each nominal gain between any input and output supply : 0 to 10V) is undetermined.
is 6.5dB. For D2MAC or Chroma signal the align- In this case, 6 words of 16 bits are necessary to
ment is switched off by forcing, with an external determine one configuration. In other case, 1 word
resistor bridge, 5 VDC on the input. Each input can of 16 bits is necessary to determine one configura-
be used as a normal input or as a MAC or Chroma tion.
I2C-bus controlled single and multistandard
TDA9885; TDA9886
alignment-free IF-PLL demodulators
1 FEATURES
· 5 V supply voltage
· Gain controlled wide-band Vision Intermediate
Frequency (VIF) amplifier, AC-coupled
· Multistandard true synchronous demodulation with
active carrier regeneration: very linear demodulation, · SIF-AGC for gain controlled SIF amplifier, single
good intermodulation figures, reduced harmonics, and reference QSS mixer able to operate in high
excellent pulse response performance single reference QSS mode and in
· Gated phase detector for L and L-accent standard intercarrier mode, switchable via I2C-bus
· Fully integrated VIF Voltage Controlled Oscillator · AM demodulator without extra reference circuit
(VCO), alignment-free, frequencies switchable for all · Alignment-free selective FM-PLL demodulator with high
negative and positive modulated standards via I2C-bus linearity and low noise
· Digital acquisition help, VIF frequencies of 33.4, 33.9,
· I2C-bus control for all functions
38.0, 38.9, 45.75, and 58.75 MHz
· I2C-bus transceiver with pin programmable Module
· 4 MHz reference frequency input: signal from Address (MAD)
Phase-Locked Loop (PLL) tuning system or operating
as crystal oscillator · Four I2C-bus addresses via MAD.
· VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector for negative 2 GENERAL DESCRIPTION
modulated signals and as a peak white detector for The TDA9885 is an alignment-free multistandard
positive modulated signals (PAL and NTSC) vision and sound IF signal PLL
· External AGC setting via pin OP1 demodulator for negative modulation only and
· Precise fully digital Automatic Frequency Control (AFC) FM processing.
detector with 4-bit digital-to-analog converter, AFC bits The TDA9886 is an alignment-free multistandard
readable via I2C-bus (PAL, SECAM and NTSC) vision and sound IF signal PLL
· TakeOver Point (TOP) adjustable via I2C-bus or demodulator for positive and negative modulation,
alternatively with potentiometer including sound AM and FM processing.
· Fully integrated sound carrier trap for 4.5, 5.5, 6.0,
and 6.5 MHz, controlled by FM-PLL oscillator 3 APPLICATIONS
· Sound IF (SIF) input for single reference Quasi Split
· TV, VTR, PC and STB applications.
Sound (QSS) mode, PLL controlled
4 ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME DESCRIPTION VERSION
TDA9885T/V3 SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
TDA9885TS/V3 SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
TDA9885HN/V3 HVQFN32 plastic, heatsink very thin quad flat package; no leads; 32 terminals; SOT617-1
body 5 × 5 × 0.85 mm
TDA9886T/V3 SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
TDA9886TS/V3 SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
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6
handbook, full pagewidth
alignment-free IF-PLL demodulators
I2C-bus controlled single and multistandard
BLOCK DIAGRAM
external reference signal
CVAGC(pos) VIF-PLL or 4 MHz crystal
filter
TOP TAGC VAGC (1) VPLL REF AFC
9 (8) 14 (15) 16 19 (21) 15 (16) 21 (23)
CAGC(neg) CBL
TUNER AGC VIF-AGC RC VCO DIGITAL VCO CONTROL AFC DETECTOR
VIF2 2 (31)
SOUND TRAPS (18) 17 CVBS
VIF1 1 (30) VIF-PLL
4.5 to 6.5 MHz video output: 2 V (p-p)
[1.1 V (p-p) without trap]
TDA9885
TDA9886
(7) 8 AUD
SINGLE REFERENCE QSS MIXER audio output
SIF2 24 (27) AUDIO PROCESSING
INTERCARRIER MIXER AND SWITCHES (3) 5 DEEM
AND AM DEMODULATOR
SIF1 23 (26)
de-emphasis
network
MAD
(4) 6 AFD
OUTPUT NARROW-BAND CAF
SUPPLY SIF AGC I 2C-BUS TRANSCEIVER
PORTS FM-PLL DEMODULATOR
CAGC
(6, 12, 13, 14, 17,
TDA9885; TDA9886
19, 25, 28, 29, 32)
20 (22) 18 (20) 13 3 (1) 22 (24) 11 (10) 10 (9) 7 (5) 12 (11) 4 (2)
VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD FMPLL MHC108
sound intercarrier output FM-PLL
and MAD select filter
(1) Not connected for TDA9885.
Pin numbers for TDA9885HN in parenthesis.
Fig.1 Block diagram.
TEA6420
BUS-CONTROLLED AUDIO MATRIX
.
. 5 STEREO INPUTS
. 4 STEREO OUPUTS
GAIN CONTROL 0/2/4/6dB/MUTE FOR EACH
.
.
OUTPUT
CASCADABLE (2 different addresses)
.
.
SERIAL BUS CONTROLLED
VERY LOW NOISE
VERY LOW DISTORSION SHRINK24
(Plastic Package)
ORDER CODE : TEA6420
DESCRIPTION
The TEA6420 switches 5 stereo audio inputs on SO28
4 stereo outputs. (Plastic Micropackage)
All the switching possibilities are changed through ORDER CODE : TEA6420D
the I2C bus.
PIN CONNECTIONS
SHRINK24 SO28
GND 1 24 SDA GND 1 28 SDA
CAPACITANCE 2 23 SCL CAPACITANCE 2 27 SCL
VS 3 22 ADDR VS 3 26 ADDR
L1 4 21 R1 L1 4 25 R1
L2 5 20 R2 L2 5 24 R2
L3 6 19 R3 L3 6 23 R3
L4 7 18 R4 NC 7 22 NC
L5 8 17 R5 NC 8 21 NC
LOUT1 9 16 ROUT4 L4 9 20 R4
ROUT1 10 15 LOUT4 L5 10 19 R5
LOUT1 11 18 ROUT4
6420-01.EPS / 6420-02.EPS
LOUT2 11 14 ROUT3
ROUT2 12 13 LOUT3 ROUT1 12 17 LOUT4
LOUT2 13 16 ROUT3
ROUT2 14 15 LOUT3
TEA6420
BLOCK DIAGRAM
RIGHT INPUTS
T
GAIN = 0/2/4/6dB
E
A
6
4 RIGHT
2 OUTP UTS
0
VS SDA
C SUPPLY BUS DECODER S CL
GND ADDR
LEF T
OUTP UTS
GAIN = 0/2/4/6dB
6420-03.EPS
LEF T INPUTS
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage 10.2 V
6420-01.TBL
o
Toper Operating Ambient Temperature 0, + 70 C
o
Tstg Storage Temperature - 20, + 150 C
THERMAL DATA
Symbol Parameter Value Unit
6420-02.TBL
o
R th(j-a) Junction Ambient Thermal Resistance SHRINK24 75 C/W
SO28 75
ELECTRICAL CHARACTERISTICS
TA = 25oC, VS = 10V, RL = 10k, RG = 600, f = 1kHz (unless otherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
SUPPLY
VS Supply Voltage 8 9 10.2 V
IS Supply Current 5 8 mA
SVR Ripple Rejection VIN = 500mVRMS, BW = 20 - 20kHz 70 80 dB
MATRIX
VIN Input DC Level 4.5 5 5.5 V
RI Input Resistance 30 50 100 k
6420-03.TBL
CS Channel Separation VIN = 2VRMS Gain = 0dB 80 90 dB
f = 1kHz Gain = 6dB 70 82 dB
PW1231
Product Specification
General Crystal
The PW1231 is a high-quality, digital video signal
processor that incorporates Pixelworks' patented
deinterlacing, scaling, and video enhancement
algorithms. The PW1231 accepts industry-standard video Video Digital
formats and resolutions, and converts the input into any
Video Decoder PW1231
Output
desired output format.The video algorithms are highly
efficient, providing excellent quality video.
The PW1231 Video SignalProcessor combines many
PW1231
functions into a single device, including memory System Block Diagram
SDRAM
controller, auto-configuration, and others. This high level
of integration enables simple, flexible, cost-effective
solutions featuring fewer required components.
Features
· Built-In Memory Controller
· Motion-Adaptive Deinterlace Processor
· Intelligent Edge Deinterlacing
· Digital Color/Luminance Transient Improvement (DCTI/DLTI)
· Interlaced Video Input Options, including NTSC and PAL
· Independent horizontal and vertical scaling
· Copy Protection
· Two-Wire Serial Interface
Applications:
For use with Digital Displays
· Flat-Panel (LCD, DLP) TVs
· Rear Projection TVs
· Plasma Displays
· LCD Multimedia Monitors
· Multimedia Projectors
Device Application Package
PW1231
Up to XGA 160-pin PQF
PW1231-L
NOTE: "L" denotes lead (Pb) free
Input Unit Memory Unit Display Unit
Display
Film-Mode
Tim ing
Detection
(3:2 & 2:2) Digital
Primary
Output
Video Port
Motion Previous Timing
ITU-R BT Detect and
Up
Video Deinterlacer
601 Noise Scaler
I-Channel Prim ary
Reduction
Picture RGB
Video
Secondary Input
Video Port
ITU-R BT Video YUV
656 Enhancem ents
Color Space
Converter (CSC)
Tw o-Wire
Interface Program m ing Unit
VSync / Digital
Blue
PW1231 HSync Output
Screen
Timing Data
Internal Block Diagram
Figure 1-1 Internal Block Diagram
Pinout Information Pin Diagram
XTALO
PVCLK
SVCLK
2W_A2
2W_A1
XTALI
CREF
PVDD
PVHS
SVHS
PVVS
SVVS
PVSS
VDD
VR7
VR6
VR5
VR4
VR3
VR2
VR1
VR0
VSS
VG7
VG6
VG5
VG4
VG3
VG2
VG1
VG0
VB7
VB6
VB5
VB4
VB3
VB2
VB1
VB0
NC
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
PVDD 121 80 PVDD
PVSS 122 79 PVSS
MPDVSS 123 78 DPAVSS
MPAVDD 124 77 DPAVDD
SCL 125 76 DPDVSS
SDA 126 75 DPDVDD
TDO 127 74 CGMS
TCK 128 73 DEN
TDI 129 72 TESTCLK
TMS 130 71 VSS
TRSTN 131 70 VDD
RESETn 132 69 MD0
VDD 133 68 MD15
VSS 134 67 MD1
TEST 135 66 MD14
DCLK 136 65 MD2
DVS 137 64 MD13
DHS 138 63 MD3
PW1231
DB0 139 62 MD12
DB1 140 61 MD4
DB2 141 60 MD11
DB3 142 59 MD5
DB4 143 58 MD10
DB5
DB6
144
145 (Top View) 57
56
MD6
MD9
PVDD 146 55 MD7
PVSS 147 54 MD8
DB7 148 53 PVSS
DG0 149 52 PVDD
DG1 150 51 MCLK
DG2 151 50 MWE
DG3 152 49 MCAS
DG4 153 48 MRAS
DG5 154 47 MCLKFB
DG6 155 46 MA12
DG7 156 45 MA11
DR0 157 44 MA13
DR1 158 43 MA9
DR2 159 42 MA10
PVDD 160 41 MA8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
VDD
PVDD
VSS
PVSS
PVSS
DR3
DR4
DR5
DR6
DR7
MA4
MA3
MA5
MA2
MA6
MA1
MA7
MA0
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Figure 2-1 PW1231 Pin Layout
PW181
Product Specification
General Description
The PW181 ImageProcessor is a highly integrated
Crystal
"system-on-a-chip" that interfaces computer graphics and
video inputs in virtually any format to a fixed-frequency flat
panel display. Video Video
Input Decoder
Computer and video images from NTSC/PAL to WUXGA PW181 Display
at virtually any refresh rate can be resized to fit on a fixed- Com puter ADC/