Text preview for : Teac-PDH300C cd.pdf part of Teac PDH300C cd
Back to : Teac-PDH300C cd.pdf | Home
PD-H300C
Compact Disc Player
TC9432AF/ TC9462AF (Digital Signal Processor)
PIN No. NAME I/O FUNCTIONAL DESCRIPTION REMARKS
1 TEST0 - Test mode terminal. Normally, keep at open. With pull-up resistor.
Playback speed mode flag output terminal.
2 HSO O UHSO HSO PLAYBACK SPEED
H H Normal -
H L 2 times
3 UHSO O L H 4 times
L L -
Subcode Q data emphasis flag output terminal.
4 EMPH O Emphasis ON at "H" level and OFF at "L" level. -
The output polarity can invert by command.
Channel clock output terminal. (44.1 kHz)
5 LRCK O L-ch at "L" level and R-ch at "H" level. -
The output polarity can invert by command.
6 VSS - Digital GND terminal. -
7 BCK O Bit clock output terminal. (1.4112 MHz) -
8 AOUT O Audio data output terminal. -
9 DOUT O Digital data output terminal. -
Buffer memory over signal output terminal.
10 MBOV O -
Over at "H" level.
Correction flag output terminal.
11 IPF O At "H " level, AOUT output is made to correction -
impossibility by C2 correction processing.
Subcode Q data CRCC check adjusting result output
12 SBOK O -
terminal. The adjusting result is OK at "H" level.
Subcode P~W data readout clock input/output termi-
13 CLCK I/O -
nal. This terminal can select by command bit.
14 VDD - Digital power supply voltage terminal. -
15 VSS - Digital GND terminal. -
16 DATA O Subcode P~W data output terminal. -
17 SFSY O Playback frame sync signal output terminal. -
18 SBSY O Subcode block sync signal output terminal. -
19 SPCK O Processor status signal readout clock output terminal. -
20 SPDA O Processor status signal output terminal. -
21 COFS O Correction frame clock output terminal. (7.35 kHz) -
Internal signal (DSP internal flag and PLL clock) output
22 MONIT O -
terminal. Selected by command.
23 VDD - Digital power supply voltage terminal. -
24 TESIO0 I Test input/output terminal. Normally, keep at "L" level. -
25 P2VREF - PLL double reference voltage supply terminal. -
26 HSSW O 2/4 times speed at "VREF" voltage. 2-state output (PVREF,HiZ)
27 ZDET O 1 bit DA converter zero detect flag output terminal. -
Phase difference signal output terminal of EFM signal 3-state output
28 PDO O
and PLCK signal. (P2VREF,PVREF,VSS)
TMAX detection result output terminal. Selected by
29 TMAXS O -
command bit (TMPS).
TMAX detection result output terminal. Selected by
command bit (TMPS).
30 TMAX O 3-state output
DIFFERENCE RESULT TMAX OUTPUT
(P2VREF,HiZ,VSS)
Longer than fixed ferq. "P2VREF"
Shorter than fixed freq. "VSS"
Within the fixed freq. "HiZ"
3
SERVICE MANUAL
PIN No. NAME I/O FUNCTIONAL DESCRIPTION REMARKS
This terminal controls IO0~IO3 terminal.
68 DMOUT At "L" level time, IO0, 1 out feed equalizer signal of With pull-up resistor.
I
2-state PWM. IO2, 3 out disk equalizer signal of 2-state
PWM.
69 CKSE I Normally, keep at open. With pull-up resistor.
70 DACT I DAC test mode terminal. Normally, keep at open. With pull-up resistor.
71 TESIN I Test input terminal. Normally, keep at "L" level. Analog input.
72 TESIO1 I Test input/output terminal. Normally, keep at "L" level. Analog input.
73 VSS - Digital GND terminal. -
Crystal oscillator connecting input terminal for DSP.
74 PXI I Normally, keep at "L" level. -
75 PXO O Crystal oscillator connecting output terminal for DSP.
76 VDD - Digital power supply voltage terminal. -
77 XVSS - Oscillator GND terminal for system clock. -
Crystal oscillator connecting input terminal for system
78 XI I clock. -
Crystal oscillator connecting output terminal for sys-
79 XO O tem clock. -
Oscillator power supply voltage terminal for system
80 XVDD - clock. -
81 DVSR - Analog GND terminal for DA converter. (R-ch) -
82 RO O R channel data forward output terminal. -
83 DVDD - Analog supply voltage terminal for DA converter. -
84 DVR - Reference voltage terminal for DA converter. -
85 LO O L channel data forward output terminal. -
86 DVSL - Analog GND terminal for DA converter. (L-ch) -
87 TEST1 I Test mode terminal. Normal, keep at open. With pull-up resistor.
88 TEST2 I Test mode terminal. Normal, keep at open. With pull-up resistor.
89 TEST3 I Test mode terminal. Normal, keep at open. With pull-up resistor.
90 BUS0 I/O
91 BUS1 I/O Schmit input.
Micom interface data input/output terminal.
92 BUS2 I/O With pull-up resistor.
93 BUS3 I/O
94 VDD - Digital Ppower supply voltage terminal. -
95 VSS - Digital GND terminal. -
96 BUCK I Micom interface clock input terminal. Schmit input.
Command and data sending/receiving chip enable sig-
97 CCE I nal input terminal. The bus Schmit input.
line becomes active at "L" level.
98 TEST4 I Test mode terminal. Normal, keep at open. With pull-up resistor.
99 TSMOD I Local test mode selection terminal. With pull-up resistor.
100 RST I Reset signal input terminal. Reset at "L" level. With pull-up resistor.
5
SERVICE MANUAL
TES IO1
DMOUT
TES I/N
2VREF
RFGC
XVDD
CKSE
XVSS
FLGD
FLGC
TEBC
DACT
FLGB
FLGA
DM/O
FMO
VDD
PXO
VDD
FVO
VSS
VSS
SEL
PXI
IO3
IO2
IO1
IO0
XO
XI
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
DVSR 81 50 VREF
RO 82 Servo PWM D/A 49 TRO
DAC
generator
1bit
LPF
Clock
DVDD 83 48 FOO
control
DVR 84 47 TEZI
LO 85 46 TEI
DVSL 86 45 TSIN
TEST1 87 44 SBAD
SERVICE MANUAL
TEST2 88 43 EF1
Address ROM Digital equalizer
TEST3 89 42 RFRP
A/D
circuit
Automatic adjustment
BUS0 90 RAM circuit
41 RFZI
Interface
Micom
BUS1 91 Correction 40 RFCT
circuit
BUS2 92 39 AVDD
BUS3 93 38 RF1
slicer
Data
VDD 94 CLV servo 37 SLCO
RAM
16K
Synchronous
VSS 95 guarantee 36 AVSS
EFM decode
BUCK 96 35 VCOF
CCE 97 VCO 34 VCOREF
Audio out
circuit
TEST4 98 33 PVREF
Digital out Sub code Status
TSMOD 99 decoder 32 LPFO
TMAX
PLL
RST 100 31 LPFN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
TEST 0
HSO
UHSO
EMPH
LRCK
VSS
BCK
AOUT
DOUT
MBOV
IPF
SBOK
CLCK
VDD
VSS
DATA
SFSY
SBSY
SPCK
SPDA
COFS
MONIT
VDD
TESIO 0
P2VREF
HSSW
ZDET
PDO
TMAXS
TMAX
6
TA2150FN
PIN No. SYMBOL I/O FUNCTION DESCRIPTION REMARKS
1 VCC - Power supply input terminal. -
RF amplitude adjustment control signal input termi-
nal. 3 signals input.
2 RFGC I (2VRO, VRo, GND)
Controlled by 3-PWM signals.
(PWM carrier = 88.2kHz)
3 GMAD l Open loop gain adjustment terminal for AGC amp. (Note 1)
Connected to pin diode
4 FNI l Main beam l-V amp input terminal. output B + D
(through resistor)
Connected to pin diode
5 FPI l Main beam l-V amp input terminal. output A + C
(through resistor)
Connected to pin diode
6 TPI l Sub beam l-V amp input terminal. output F.
Connected to pin diode
7 TNI l Sub beam l-V amp input terminal. output E.
Connected to pin monitor
8 MDI l Monitor photo diode amp input terminal. photo diode.
Connected to laser diode
9 LDO O Laser diode amp input terminal.
control circuit.
Laser diode control signal input terminal and APC
circuit ON/OFF control signal terminal.
SEL APC LDO DETECT
LEVEL CIRCUIT FREQUENCY 3 signals input.
10 SEL l Connected to Vcc
GND OFF Low (Vcc, Hiz, GND)
through resister (1 k )
Hiz ON Control signal output Low
Vcc ON Control signal output High
Tracking error balance adjustment signal input ter- 3 signals input
11 TEB l minal. Controlled by 3-PWM signal. (2VRO, VRO, GND)
(PWM carrier = 88.2 kHz)
Reference voltage (2VRO) output terminal. -
12 2VRO O
2VRO = 4.2 V when Vcc = 5 V
Connected to TEO through
13 TEN l TE amp negative input terminal.
feedback resistor.
14 TEO O TE error signal output terminal. -
15 SBAD O Sub beam adder signal output terminal. -
16 FEO O Focus error signal output terminal. -
Connected to FEO through
17 FEN l FE amp negative input terminal.
feedback resistor.
RFRP output circuit suitching terminal.
SEB LEVEL BOTTON PEAK
18 SEB l DETECTION DETECTION Low (GND) is for normal use.
GND GND GND
GND GND GND
7
SERVICE MANUAL
TA2150FN
PIN No. SYMBOL I/O FUNCTION DESCRIPTION REMARKS
Reference signal (VRO) output terminal. -
19 VRO O
VRO = 2.1 V when Vcc = 5 V
20 RFRP O Track count signal output terminal. -
Time constant adjustment terminal for bottom
21 BTC l Adjusted by capacitance.
detection.
22 RFCT O RFRP signal center level output terminal. -
Time constant adjustment terminal for peak detec- Adjusted by capacitance.
23 PKC l
tion.
24 RFRPIN l Input terminal for track count signal output amp. -
Output terminal for RF signal amplitude adjust- -
25 RFGO O
ment amp.
Amp (AGC, FE, TE) gain switching terminal.
GVSW MODE
26 GVSW l Low (GND) is for 5 times gain.
GND CD-RW
Hiz Normal
Vcc Normal
AGCIN l Input terminal for RF signal amplitude adjustment Connected to RFO through capac-
27
amp. itance.
28 RFO O Output terminal RF signal amp. -
29 GND - Ground terminal. -
Connected to pin-diode out-
30 RFN2 l input terminal for RF signal amp. put A + B + C + D (through
resistor).
8
SERVICE MANUAL
9
SERVICE MANUAL
11
SERVICE MANUAL
EXPLODED VIEW LIST
£
£
£
INCLUDED ACCESSORIES
13
SERVICE MANUAL
CD MAIN PCB ASSY CD MAIN PCB ASSY
£
£
£
£
£ CD SUB PCB ASSY
£
£
£
£
£
£
£
£
14
SERVICE MANUAL