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Chapter 4: Theory of Operation
The 150i Card Personalization System operates as a standalone card embosser. This chapter provides general theory of operation for the 150i. 150i Overview 4-2 Component Identification 4-2 Inside View of the 150i 4-3 Rear View of the 150i 4-4 Sequence of Operation 4-5 Memory Map 4-7 Electrical Block Diagram 4-8
Microprocessor 4-9 CPLD 4-9 Flash 4-9 DRAM 4-9 FPGA Controller 4-10 ROM 4-10 EEPROM 4-10 Power Inlet Module 4-10 36 Volt Power Supply 4-10 5 Volt Regulator 4-10 12 Volt Regulator 4-11 System Interlock 4-11 RS232 Transceiver 4-11 LCD Display/Keypad and LEDs 4-11
4
Main Control Board Schematics 4-12
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150i Overview
The 150i is a full featured single-pass card personalization system. The 150i embosses, encodes, and tops financial plastic cards. Depending on the options ordered, the 150i is also capable of indent printing and smart card personalization.
Component Identification
The follow bulleted list identifies the major components of the 150i. See Figure 4-1 for their location.
· · · · · ·
Output Hopper Door Single Card Access Door Keyhole Keypad Display Indicators and icons on display:
· · · · ·
Power Indicator Ready Indicator Error Indicator Service Indicator
· ·
Optional Indicator Top Cover Power Switch
Indicators
Display
Keypad Keyhole Output Hopper Door Single Card Access Door Power Switch
Figure 4-1: Component Identification
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Theory of Operation
Inside View of the 150i
The following bulleted list identifies the major modules inside of the 150i. See Figure 4-2 for their location.
· · · · · · · · · ·
Card Transport Module Embosser Module Front Indent Printing Module Good Card Tray (Output tray) Input Hopper Magnetic Stripe Encoding Module Reject Tray Smart Card Personalization (Optional) Topper Module Front/Rear Indent (Optional)
Top Cover
Reject Tray Front Indent Printing Module Topper Module Card Transport Module
Embossing Module
Input Hopper
SmartCard Personalization Module Magnetic Stripe Encoding Module
Good Card Tray
Figure 4-2: Inside View of the 150i
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Rear View of the 150i
The following bulleted list identifies the components on the rear of the 150i. See Figure 4-3 for their location.
· ·
· ·
· ·
On/Off Switch Communication Ports · Host · Service Smart Card 1 (Option) Smart Card 2 (Option) · Diagnose (Option) · Development (Option) Power Receptacle Fan
Communication Ports
On/Off Switch
Diagnose
Communication Ports
Host
Development
Service
Power Receptacle
Smart Card 1
Smart Card 2
C ommun ica tion Po rts
D iagno se
De ve lopm ent
Figure 4-3: Rear View of the 150i
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Theory of Operation
Sequence of Operation
When reading the Sequence of Operation, reference Figure 4-4. 1. After the 150i initializes on power up, cards can be produced. a. Once the system detects that a block of data has been received, the 150i acknowledges the data and signals the Topper Platen heater to turn on. 2. The 150i senses cards in the Input Hopper by checking the Input Hopper Empty sensor: a. The card pick mechanism picks a card and then the Card Picked sensor detects that a card is present. b. The card is transported to the Card Registration sensor to index the position of the card in the 150i. 3. The card is transported to the Magnetic Stripe module: a. Depending on the magnetic stripe setup, the card makes as many as three passes to read and write to the card's magnetic stripe tracks. b. If the magnetic stripe can not be written to or read from, the card is transported to the Reject Tray. 4. The Card Transport mechanism moves the card to the Embossing Wheel: a. The embossing wheel senses the home position (Wheel Home sensor) the first time a character is requested to print. The embossing wheel will move either clockwise or counter clockwise depending on how quickly the embossing character can be moved to be embossed on the card. b. The card will move in four directions as the punch and dies emboss characters on the card. c. The Die Cam Home sensor and the Punch Cam Home sensor detect when both cams are in their home position. Both the die and the punch cams work simultaneously to emboss characters on a card. 5. After a card is embossed, it is transported to the Topper assembly where the bottom half of the card is topped: a. The Topper Platen sensor detects that the platen is in its home position and up to temperature and ready to top cards. b. As a card is moved into the Topper assembly, a solenoid is activated to apply platen pressure and heat to the topping foil. This topping foil adheres to the raised embossed characters on the card. c. After a card is topped and removed from the Topping assembly, the topping foil is advanced. Movement of the foil is detected by the Topper Foil Motion sensor and the Topper Platen heater is turned off.
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6. After a card is topped, the completed card is transported to the Output Tray for delivery to the operator.
Card Registration Sensor Die Cam Home Sensor
Topper Assembly
Topper Platen Sensor
Wheel Home Sensor
Card Picked Sensor
REAR VIEW Topper Foil Motion Sensor
Input Home Sensor
Embossing Wheel
Punch Cam Home Sensor
Output Tray
Output Full Sensor
Input Hopper Empty Sensor
Figure 4-4: Sequence of Operation
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Theory of Operation
Memory Map
The following shows a memory map of the 150i system.
BIOS ROM-DOS Drive A: COMMAND Drive B: APPLICATION
MiniBIOS ROM-DOS KERNEL ROM DISK ROM AREA
FLASH DISK
DOS ROM 256K
BIOS RAM VECTORS
Figure 4-5: 150i Embedded System Memory Layout
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Electrical Block Diagram
The following section provides a brief description of the 150i Main Control Board. Refer to Figure 4-6 for details. The control board provides all the electronics to control all stepper motor functions, solenoid actions, and monitors all sensor activity.
Power Inlet Module
36 Volt Power Supply
System Interlock
5 Volt Regulator
12 Volt Regulator
Microprocessor
DRAM
CPLD DRAM Controller
Flash
RS232 Transceiver
FPGA Controller
LCD Display / Keypad & LEDs
ROM
EEPROM
Figure 4-6: 150i Main Control Board Block Diagram
4-8
Theory of Operation
Microprocessor
The microprocessor is the controlling element for all functions within the 150i system. It is a 32-bit microprocessor clocked at 50 MHz. The processor power is supplied by filtered 5.0 volt supply. There are 25 address lines to the processor which supports 16 MB of memory. The microprocessor supports the address bus A1 A25. There are two addition signals Byte High Enable (BHE) and Byte Low Enable (BLE) that are decoded by the CPLD to indicate which address space is desired. The microprocessor generates six chip selects (CS0 CS4 and UCS) that are used by the CPLD and FPGA for device enabling devices. The microprocessor supports four Interrupts (Int0 Int3) that are driven by the CPLD, FPGA, and interlock circuitry. There is one non-maskable interrupt (NMI) that is driven by a power supervisor chip (DS1231). When voltage drops below a set voltage, a (POWER_FAIL) signal is asserted to the NMI, which initiates a power-down sequence in the firmware code.
CPLD
This component performs the address decoding, DRAM control, flash control, additional chip select (CS) generation and microprocessor interface functions. The global RESETOUT is generated internally by the system RESET input. The display control signals are generated internally.
Flash
The flash memory chip is 8 MB (512K X 16 ) and contains the firmware code that controls and operates the 150i system Address line A0 is tied to ground with/BYTE time high. The flash memory chip is 16-bits wide. This component incorporates a Boot Block protection jumper (J2) that enables updating of the firmware without corrupting the boot code. A jumper placed on position 1-2 enables "Protection of the Boot Block." A jumper placed on position 2-3 enables "Programming of the Boot Block." There are two modes of flash control. J4 enables programming via a JTAG or invokes normal operation. A jumper placed on position 1-2 enables "Normal Operation." A jumper placed on position 2-3 enables JTAG programming of the firmware.
DRAM
There are two memory DRAMs and are 256K arranged to provide 512K X 16 of main memory for the microprocessor.
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FPGA Controller
The FPGA (Field Programmable Gate Array) performs the controlling functions of all the mechanical devices. It receives commands from the microprocessor and either drives the required outputs or sends a block of inputs back to the microprocessor. All the sensors, stepper motors, the DC motor, solenoids, interlock, and magnetic stripe functions are controlled by this chip. It is necessary to program this device on every power cycle. LED D18 is illuminated while the device is being programmed. D18 will be disabled when programming is complete.
ROM
The ROM (Read Only Memory) is configured in serial for loading of the Field Programmable Gate Array (FPGA). The device is a one-time programmable (OTP) device organized as a 262,144 X 1 bit map. The FPGA provides the Clock (CLK) and Chip Enable (CE) signals. The RESET (RST) is provided by the global reset signal.
EEPROM
The EEPROM (Electrically Erasable Programmable Read Only Memory) can be written to and changed many times and is used for data storage. This device is organized as an 8192 X 8 64 K serial device. A 2-Wire communication protocol is tied to the FPGA. Configurations, offsets, and settings are stored in this chip.
Power Inlet Module
The main system ON/OFF switch is contained on this module. A replaceable 250 volt 6.3 amp fuse is accessible on the rear of the module. A power line filter is embedded into the inlet module. This reduces the Electro Magnetic Interference (EMI) measured on the power cord.
36 Volt Power Supply
This switching power supplies 36V DC to the 150i system with a maximum output of 300 watts. The AC input voltage can be anywhere for 90 to 264V AC at 50/60 Hz
5 Volt Regulator
A switching regulator is utilized to create the 5.0-volt supply. An inductor and a barrier diode are incorporated as part of the regulation circuitry. The 5.0 volts (Vcc) is supplied to all IC's via a discrete Vcc plane within the printed circuit board.
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Theory of Operation
12 Volt Regulator
A linear regulator is utilized to create a 12.0-volt regulated supply. A voltage divider network connected to the Adj Input (pin #1) which controls the output voltage. The 12.0 volts is used to supply to the magnetic stripe driver circuitry.
System Interlock
The 36-volt supply is tied to the input of a safety rated SPST relay. The output creates a 36-volt interlock voltage plane within the main controller circuit board. This 36 volts supplies all the stepper motor drivers, solenoids, and the DC Topper Foil Transport motor. The coil of the relay is connected to the interlock safety switch on the 150i system.
RS232 Transceiver
The RS232 Transceiver device supports a 3-driver and 5-receiver RS232 transceiver configuration. The device incorporates an Electro-Static Discharge (ESD) circuit to withstand +/- 10 K volts shocks. The 150i Host and Debug ports support the modem control signals found on RS232 Comm lines. The transceivers inputs and outputs are tied directly to the microprocessor serial Comm ports.
LCD Display/Keypad and LEDs
The display incorporates a 2 X 20 LCD display. LCD control signals and 8-bit data bus are supplied to the display. Five independently controlled LED's provide visual status and control functions. A 10 digit keypad allows user input from the front panel.
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Main Control Board Schematics
The following Main Control Board schematics show the electronic circuitry for controlling the 150i system.
Figure 4-7: 150i Main Control Board Schematic (1 of 20) 4-12 Theory of Operation
Figure 4-8: 150i Main Control Board Schematic (2 of 20) 150i Card Personalization System Maintenance Manual 4-13
Figure 4-9: 150i Main Control Board Schematic (3 of 20) 4-14 Theory of Operation
Figure 4-10: 150i Main Control Board Schematic (4 of 20) 150i Card Personalization System Maintenance Manual 4-15
Figure 4-11: 150i Main Control Board Schematic (5 of 20) 4-16 Theory of Operation
Figure 4-12: 150i Main Control Board Schematic (6 of 20) 150i Card Personalization System Maintenance Manual 4-17
Figure 4-13: 150i Main Control Board Schematic (7 of 20) 4-18 Theory of Operation
Figure 4-14: 150i Main Control Board Schematic (8 of 20) 150i Card Personalization System Maintenance Manual 4-19
Figure 4-15: 150i Main Control Board Schematic (9 of 20) 4-20 Theory of Operation
Figure 4-16: 150i Main Control Board Schematic (10 of 20) 150i Card Personalization System Maintenance Manual 4-21
Figure 4-17: 150i Main Control Board Schematic (11 of 20) 4-22 Theory of Operation
Figure 4-18: 150i Main Control Board Schematic (12 of 20) 150i Card Personalization System Maintenance Manual 4-23
Figure 4-19: 150i Main Control Board Schematic (13 of 20) 4-24 Theory of Operation
Figure 4-20: 150i Main Control Board Schematic (14 of 20) 150i Card Personalization System Maintenance Manual 4-25
Figure 4-21: 150i Main Control Board Schematic (15 of 20) 4-26 Theory of Operation
Figure 4-22: 150i Main Control Board Schematic (16 of 20) 150i Card Personalization System Maintenance Manual 4-27
Figure 4-23: 150i Main Control Board Schematic (17 of 20) 4-28 Theory of Operation
Figure 4-24: 150i Main Control Board Schematic (18 of 20) 150i Card Personalization System Maintenance Manual 4-29
Figure 4-25: 150i Main Control Board Schematic (19 of 20) 4-30 Theory of Operation
Figure 4-26: 150i Main Control Board Schematic (20 of 20)
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Theory of Operation