Text preview for : Panasonic-CQ5101AU carradio.pdf part of Panasonic CQ510AU car radio
Back to : Panasonic-CQ5101AU carrad | Home
ORDER NO.ACED100202CE
C1
AUTOMOTIVE AFTERMARKET
Model No. CQ-5101AU
Heavy Duty CD Player/Weather Band
Receiver
TABLE OF CONTENTS
PAGE PAGE
1 Service Navigation ----------------------------------------------- 2
2 Specifications ----------------------------------------------------- 3
3 Features ------------------------------------------------------------- 4
4 Technical Descriptions ----------------------------------------- 5
5 Block Diagram----------------------------------------------------11
6 Wiring Connection Diagram ---------------------------------12
7 Schematic Diagram ---------------------------------------------13
8 Schematic Diagram ---------------------------------------------15
9 Printed Circuit Board-------------------------------------------16
10 Exploded View and Replacement Parts List -----------20
11 Schematic Diagram for Printing with Letter Size -----29
© Panasonic Corporation 2010.
Unauthorized copying and distribution is a
violation of law.
1 Service Navigation 1.4. Maintenance
Your products is designed and manufactured to ensure a mini-
1.1. About Lead Free Solder(PbF) mum of maintenance. Use a dry, a soft cloth for routine exterior
cleaning. Never use benzine, thinner or other solvents.
Distinction of PbF PCB
· PCBs(manufacture)using lead free solder will have a PbF 1.5. Notes
stamp on the PCB.
[RADIO BLOCK]
Caution
· Pb free solder has a higher melting point than standard sol- Do not align the AM/FM package block. When the package
der; Typically the melting point is 50 - 70°F (30 - 40°C) block is necessary, it will be supplied already aligned at the fac-
higher. Please use a soldering iron with temperature control tory.
and adjust it to 700 ± 20°F (370 ± 10°C). In case of using [CD DECK BLOCK]
high temperature soldering iron, please be careful not to This model has no servo alignment points because microcom-
heat too long. puter controls the servo circuit.
· Pb free solder will tend to splash when heated too high
(about 1100°F/600°C)
1.2. Laser Products
1.3. Replacing the Fuse
Use fuses of the same specified rating (15A). Using different
substitutes or fuses with higher ratings, or connecting the prod-
uct directly without a fuse, could cause fire or damage to the
stereo unit.
2
2 Specifications 2.2. Dimensions
2.1. Specfications
General
Power Supply 12 V DC (11 V - 16 V),
Test Voltage 14.4 V,Negative
ground
Current Consumption Less than 2.5 A (CD mode, 0.5 W
4-speaker)
Maximum Power Output 37 W×4channels at 400 Hz, Vol-
ume Control Maximum.
Tone adjustment range Bass:± 12 dB at100 Hz
Treble:± 12 dB at10 kz
Power Output 18 W per channel into 4, 40 to
30,000 Hz at 3 % THD
Suitable Speaker Impedance 4-8
Dimensions** 178(W)×50(H)×160(D) mm {7" x 1-
15/16" x 6-5/16"}
Weight** 1.4 kg {3 Ibs. 1 oz.}
Front AUX Input
Input impedance 10 k
Allowable external input 2.0 V
Connector 3.5 mm stereo mini pin
Input sensitivity 200 mVrms
FM Stereo Radio
Frequency Range 87.9 - 107.9 MHz
Usable Sensitivity 12 dBf. (1.1 V/ 75 , S/N 30 dB)
50 dB Quieting Sensitivity 17 dBf. (1.8 V/ 75 )
Frequency Response 30-15,000 Hz ± 3 dB
Alternate Channel Selectivity 75 dB
Stereo Separation 35 dB at 1 kHz
Signal/Noise Ratio 70 dB (Mono)
AM Radio
Frequency Range 530 kHz - 1710 kHz
Usable Sensitivity 28 dB/V (25V, S/N 20 dB)
Weather Band Radio
Frequency Range 162.400 - 162.550 MHz
Usable Sensitivity 3 dB (S/N 20 dB)
Signal/Noise Ratio (40 dB/V) 50 dB
CD Player
Sampling Frequency 8 times oversampling
DA Converter 1 bit DAC System
Pick-Up Type Astigma 3-beam
Light Source Semiconductor Laser
Wavelength 790 nm
Frequency Response 20 - 20,000Hz (±1 dB)
Signal to Noise Ratio 96dB
Wow and Flutter Below measurable limits
Channel Separation 75 dB
* Specifications and the design are subject to possible modification
without notice due to improvements.
** Dimensions and Weight shown are approximate.
3
3 Features
· 18-FM, 6-AM presets with preset scan
· Digital servo for reliable CD playback.
· AUX function.
4
4 Technical Descriptions Pin.
No.
Port Description I/O FM(V) AM(V) CD(V)
56 VSS GND -- 0 0 0
4.1. Main Block 57
58
N.C.
W.C.
Not connection.
EEPROM R/W control.
O
O
0
3.3
0
3.3
0
0
IC601:C2BBYY000768 59 N.C. Not connection. O 0 0 0
60 N.C. Not connection. O 0 0 0
61 RSTN Radio reset output pin. O 3.3 3.3 0
Pin. Port Description I/O FM(V) AM(V) CD(V) 62 RADIO_M Radio power control signal. O 5 5 0
No. ODE
1 DBGP0 On chip Debug port0. -- 0 0 0 63 N.C. Not connection. O 0 0 0
2 DBGP1 On chip Debug port1. -- 0 0 0 64 N.C. Not connection. O 0 0 0
3 DBGP2 On chip Debug port2. -- 0 0 0 65 N.C. Not connection. O 0 0 0
4 N.C. Not connection. I 0 0 0 66 BATT Battery power connected signal I 5 5 5
5 N.C. Not connection. I 0 0 0 detection. (H-ON, L-OFF)
6 N.C. Not connection. I 0 0 0 67 RDSINT I2C address selection. (For C2) O 3.3 3.3 3.3
7 N.C. Not connection. I 0 0 0 68 AMP_ST Amp control signal output. O 5.2 5.2 5.2
8 RESET Reset signal input. I 5.1 5.1 5.2 BY
9 XT1 Main crystal 1 (32.768KHz) con- -- 1.04 1.04 1.06 69 N.C. Not connection. O 0 0 0
nected. 70 AMP_MU
AMP_MUTE control signal out- O 5 5 5
10 XT2 Main crystal 2 (32.768KHz) con- -- 1.54 1.54 1.56 TE put.
nected. 71 N.C. Not connection. O 0 0 0
11 VSS GND -- 0 0 0 72 ACC ACC power connected signal I 4.72 4.72 4.72
12 CF1 Crystal (13.5MHz) connected. -- 1.54 1.54 1.56 detection.
13 CF2 Crystal (13.5MHz) connected. -- 1.54 1.54 1.56 73 RADIO_I2 Electronic Tuner data control O 3.3 3.3 0
14 VDD VDD +5V -- 5.2 5.2 5.2 C_DATA signal
15 INIT_A Initial distribution setup_A. I 5.15 5.15 5.2 74 RADIO_I2 Electronic Tuner clock control O 3.3 3.3 0
C_CLK signal
16 N.C. Not connection. I 0 0 0
75 N.C. Not connection. O 0 0 0
17 INIT_B Initial distribution setup_B. I 0 0 0
76 N.C. Not connection. O 0 0 0
18 N.C. Not connection. I 0 0 0
77 N.C. Not connection. O 0 0 0
19 INIT_C Initial distribution setup_C. I 0 0 0
78 N.C. Not connection. O 0 0 0
20 INIT_D Initial distribution setup_D. I 0 0 0
79 PWR_CN MAIN power control signal out- O 5.03 5.04 5.04
21 MODE_B Rotary clock signal B output. I 5.2 5.2 5.2
T put.
22 MODE_A Rotary clock signal A output. I 5.2 5.2 5.2
80 ANT_CN TUNER Motor Ant control. O 5.03 5.04 5.04
23 LCD_DI LCD data output. SO 5.1 5.1 5.1 T
24 LCD_DO LCD data input. SI 4.9 4.9 4.9 81 AMP_CN AMP control signal output. O 5.21 5.21 5.21
25 LCD_CLK LCD clock signal. SCK 5.1 5.1 5.1 T
26 N.C. Not connection. SO 0 0 0 82 AF_MUT AF MUTE control signal input O 5 5 5
27 N.C. Not connection. SI 0 0 0 E .
28 N.C. Not connection. SCK 0 0 0 83 POWER_ Power LED control signal. O 0 0 0
LED
29 LCD_CE LCD chip enable. O 5 5 5
30 N.C. Not connection. O 0 0 0 84 N.C. Not connection. O 0 0 0
85 N.C. Not connection. O 0 0 0
31 CD_EM CD eject control signal. O 0 0 0
86 N.C. Not connection. O 0 0 0
32 CD_LM CD loading control signal. O 0 0 0
33 CD_INS CD insert detection SW 1. I 0 0 0 87 VREG Bypass condenser connected. O 3.03 3.03 3.03
W1 88 VSS GND -- 0 0 0
34 CD_SW2 CD Mechanism SW 2. I 5 5 0 89 VDD(PLL) VDD +5V -- 5.11 5.11 5.11
35 N.C. Not connection. O 0 0 0 90 N.C. Not connection. O 0 0 0
36 CD_S/L CD connected detection. O 5.2 5.2 5.2 91 N.C. Not connection. O 0 0 0
37 CD_DMU CD motor driver IC action con- O 0 0 5.2 92 N.C. Not connection. O 0 0 0
TE trol signal. 93 N.C. Not connection. O 0 0 0
38 N.C. Not connection. O 0 0 0 94 N.C. Not connection. O 0 0 0
39 VSS GND -- 0 0 0 95 N.C. Not connection. O 0 0 0
40 VDD VDD +5V -- 5.2 5.2 5.2 96 N.C. Not connection. O 0 0 0
41 CD_MUT CD DSP driver IC mute control I 0 0 5.3 97 N.C. Not connection. O 0 0 0
E signal. 98 N.C. Not connection. O 0 0 0
42 SUB_RD CD intb1 connection. I 5.3 5.3 5.1 99 N.C. Not connection. O 0 0 0
Y
100 N.C. Not connection. O 0 0 0
43 PEG_RD CD control signal. I 5.3 5.3 0
Y IC101:C5ZBZ0000069
44 CD_LIMIT CD limit SW control signal. I 5.3 5.3 5.3
_SW
45 N.C. Not connection. O 0 0 0 Pin No. Port Description I/O (V)
(OSC_CN
1 EFMIN RF signal input port. I 1.58
T)
2 RFOUT RF signal output port. O 1.67
46 CD_RST CD reset signal output. O 5.1 5.1 5.1
3 LPF LPF capacitor connection port for O 1.64
47 N.C. Not connection. O 0 0 0
RF DC level detection.
48 N.C. Not connection. O 0 0 0
4 PHLPF LPF capacitor connection port for O 1.68
49 CD_DI CD data input. SO 0 0 3.6 detection.
50 CD_DO CD data output. SI 0 0 3 5 AIN A signal input port. I 1.66
51 CD_CLK CD clock signal output. SCK 0 0 3.7 6 CIN C signal input port. I 1.66
_O
7 BIN B signal input port. I 1.66
52 CD_CE CD chip enable control signal. O 0 0 3.6
8 DIN D signal input port. I 1.66
53 I2C_DAT Electronic Vol-IC data control O 5.2 5.2 5.2
9 FEC LPF capacitor connection port for O 1.6
A signal
FE signal.
54 I2C_CLK Electronic Vol-IC clock control O 5.2 5.2 5.2
10 RFMON LSI build-in analog signal monitor O 1.64
signal.
port.
55 VDD VDD +5V -- 5.2 5.2 5.2
11 VREF VREF voltage output port. O 1.66
5
Pin No. Port Description I/O (V) Pin No. Port Description I/O (V)
12 JITTC Capacitor connection port for JIT O 0 66 DVDD18 VDD capacitor connection port for O 1.84
signal. digital circuit.
13 EIN E signal input port. I 1.65 67 DVSS GND for digital system. Needed - 0
14 FIN F signal input port. I 1.66 connect with 0V.
15 TEC LPF capacitor connection port for O 1.57 68 DVDD VDD for digital system. - 3.25
TE signal. 69 DOUT Digital OUT output port. EIAJ for- O 0
16 TE TE signal output port. O 1.57 mat.
17 TEIN TE signal input port for TES. I 1.65 70 AMUTEB AMUTEB (general) ouput port. O 0
18 LDD Laser power detection output port. O 3.27 71 XVSS GND for oscillation circuit. Needed - 0
connect with 0V.
19 LDS Laser power detection input port. I 0
72 XOPUT Connected of 16.9344MHz oscilla- O 1.39
20 AVSS GND for analog. - 0
tion.
21 AVDD VDD for analog. - 3.27
73 XIN Connected of 16.9345MHz oscilla- I 1.35
22 FDO Focus control signal output port. O 1.65 tion.
D/A output.
74 XVDD VDD for oscillation circuit. I 3.19
23 TDO Tracking control signal output port. O 1.65
75 LCHO L channel output port. O 0
D/A output.
76 LRVDD VDD for LR channel. - 3.21
24 SLDO Thread control signal output port. O 1.64
D/A output. 77 LRVSS GND for LR channel. Needed con- - 0
nect with 0V.
25 SPDO Spindle control signal output port. O 1.64
D/A output. 78 RCHO R channel output port. O 0
26 VVSS1 Gnd for build-in VCO. - 0 79 AVDD VDD for analog. - 3.27
27 PDOUT1 Phase comparison output port1 for O 0 80 SLCO Slice level control output port. O 1.6
build-in VCO control.
28 PDOUT0 Phase comparison output port0 for O 0
Note 1 :
build-in VCO control. Voltage measuerments are with respect to ground, with a
29 PCKIST PDOUT01 output port for current I 1.07
setting.
voltmeter (internal resistance : 10M).
30 VVDD1 VDD for VCO. - 3.29
31 DMUTEB DMUTEB (GENERAL) output O 0 4.2. Display Block
port.
32 PUIN PUIN (GENERAL) I/O port.Built-in I/O 0
IC901:C0HBA0000225
pull-up resistance.
33 DEFFCT Detection signal output port. O 0
Pin No Port Descriptions I/O (V)
34 FSEQ Synchronous signal output port. - 0
36-39 NC No connection - -
35 C2F C2 error signal output port. O 0
40-43 COM1-4 LCD common O 2.5
36 DVDD VDD for Digital. - 3.29
44-49 KS1-6 Key data output O 0.9
37 DVSS GND for Digital. - 0
50-54 KI1-5 Key data input I 0
38 DVDD18 VDD capacitor connection port for O 1.83
digital circuit. 55 TEST (Connecting to ground) - 0
39 MONI 0 Monitor port 0. O 0 56 VDD +5V power supply - 5.1
40 MONI 1 Monitor port 1. O 0 57 VDD1 Ground through capacitor - 3.3
41 DVDD VDD for Digital. - 3.25 58 VDD2 Ground through capacitor - 1.7
42 DVSS GND for Digital. - 0 59 Vss Ground - 0
43 CE Host IF:Communication enable I 3.6 60 OSC CR oscillator - 3.9
signal input port. 61 DO Key data output O 4.4
44 CL Host IF:Data transfer clock input I 3.7 62 CE Chip enable I 0
port. 63 CLK LCD clock I 0
45 DI Host IF:Data input port. I 3.6 64 DI LCD data input I 0
46 DO Host IF:Data output port.Pull-up is O 3.3
necessary.
47 RESB "Reset input port.Make it ""L"" I 0
when power on."
48 INTB Interrupt signal output port.(Servo) O 3.25
49 SUB_READY 0 For host u-com IF:SUB-RDY out- O 0
put.Pull-up resistance is neces-
sary.
50 CD_MUTE 0 General I/O port2. I/O 5.31
51 LOW_BATI General I/O port1. I/O 5.16
52 CONT General I/O port0. I/O 0
53 OSCCNT OSCOFF control port.Connected I 0
with 0V when reset.
54 STREQ Stream data demand signal output I/O 0
port.
55 STCK Clock input port for stream data. I/O 0
56 STDATA Stream data input port. I/O 0
57 TEST 1 Input port for test.Needed con- I 0
nect with 0V.
58 DATA Lch/Rch data output port. O 0
59 DATACK Clock output port. O 0
60 LRSY Lch/Rch clock output port. O 0
61 VVDD 2 VDD for build-in VCO. - 3.25
62 VPREF 2 Built-in VCO oscillation cooking I 3.25
stove setting input terminal.
63 VCOC 2 Built-in VCO control voltage set- I 1.08
ting input port.
64 VPDOUT 2 Output port for built-in VCO con- O 0.08
trol.
65 VVSS 2 GND for building VCO. Needed - 0
connect with 0V.
6
4.3. IC Block Diagram
4.3.1. Main Block
PAC51:J3CZZZ000002
IC201:C1AB00002836
7
IC301:C1BB00001088
8
IC401:C0DAZHF00004
IC51:C0DBEJG00001
9
IC701:C1EA00000042
IC702:C0EBY0000389
10
5 Block Diagram
E-4C383
CN701
IC701 ISO POWER
IC201 CAR AUDIO PROCESSOR POWER AMP CONNECTOR
MUTE Q704/Q705 Q702/Q703 MUTE FL
FL 16 12 FL+
FR 5 14 FL+
FR 13 11 FL-
MUTE Q706/Q707 3 13 FL-
RL
RL 15 14 RL+
21 16 RL+
PAC51 AF MUTE RR 14
RR
15
23
RL-
15 RL-
E-VOL IC
POWER CONNEC TOR
FM/AM TUNER 6,20
4 STBY VCC
JK51 R FR+
R-CH 14 2 RADIO-L 22 MUTE 9 12 FR+
1 AM ANT FR-
L AUDIO +9V 7 11 FR-
L-CH 13 1 RADIO-R VDD 20 RR+
AUX-R
AUX-L
2 FM ANT 17 10 RR+
CD-R
CD-L
SDA
SCL
RR-
VCC 5V
RDSINT
19 9 RR-
RSTN
IC702
SDA
SCL
WC
19 18 3 4 7 9
4 9 10 11 7 6 RESET 1 BATT
L R AUX-IN L/Rch
L R 6 ACC
AUDIIO +9V IC51
CD L/Rch
17 FUSE 15A
82 53 54 68 70 66 8 18
A MP MUTE
AMP STB
BATT SENSE
SDA
AF MUTE
SCL
RESET
73
74
IC601
CD DMUTE/LM+/-/S/L
57 WC
SYSTEM CONTROL
62 RADIO MODE 2 GND
LCD DI/DO
MODE A,B
61 RSTN ACC SENSE 72
/CLK/CE
CD RST/DI/DO/CLK/CE/
SUB RDY/MUTE/LIMIT SWOSC CNT
POWER CTRL 79
P.LED
Optical Pick-up Ass'y
CN501
VDD
46,49~52,42,41,44,45
CN2
67 RDSINT
CN1 1 83
1
RF 1 CD L/Rch 23~25,29 21,22
14,40,55
CD L/Rch IC401
31,32,36,
AMP AUX-IN L/Rch
REGULATOR IC
SW+5V
IC101
37
SYS +3.3V CD +8V CD +8V 2 ANT-OUT
TRACKING CD DSP Q301
COIL 3 ACC-IN
VDD +5V
FOCUS 4 VDD +5V
CD +8V
COIL 17 ILL +8V
5 SW+5V
CN801
6 ACC-OUT
3 10 6 7 8 1 14 2 4 5 9 12 11
8 VCC
LIMIT SW CN901
10 AUDIO +9V
3 10 6 8 1 14 2 4 5 9 12 11
4P WIRE
7
11 CTRL
M VDD 5V MODE A/B P.LED ILL +8V AUX
L/R CH
LOADING MOTOR
IC301 LCD DI/DO/CD/CLK
Q901 12 CD 8V
MOTOR 14 ILL +9V
SW901 D901 GND
DRIVER KEY MATRIX SEL
15
MODE SW
LCD901
5P WIRE
IC901
LCD COM
M LCD DRIVER
LCD SEGMENT LCD DISPLAY
SPINDLE MOTOR 22 22 JK901
AUX-IN
E-4C384 E-4C327
CQ-5101AU
11
6 Wiring Connection Diagram
POWER 4 SPK FL+
CONNECTOR FL-
BATTERY
FR+
ACC
FR-
GROUND
RL+
RL-
RR+
RR-