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ORDER NO. ACED091204CE
C1
Model No. CQ-5105U
CD Player/Weather Band Receiver
TABLE OF CONTENTS
PAGE PAGE
1 Service Navigation ----------------------------------------------- 2
2 Specifications ----------------------------------------------------- 3
3 Features ------------------------------------------------------------- 4
4 Technical Descriptions ----------------------------------------- 5
5 Block Diagram----------------------------------------------------13
6 Wiring Connection Diagram ---------------------------------14
7 Schematic Diagram ---------------------------------------------15
8 Printed Circuit Board-------------------------------------------19
9 Exploded View and Replacement Parts List -----------25
10 Schematic Diagram for Printing with Letter Size -----34
© Panasonic Corporation 2010.
Unauthorized copying and distribution is a
violation of law.
1 Service Navigation 1.4. Notes
[RADIO BLOCK]
1.1. About Lead Free Solder(PbF) Do not align the AM/FM package block. When the package
block is necessary, it will be supplied already aligned at the fac-
Distinction of PbF PCB
tory.
· PCBs(manufacture)using lead free solder will have a PbF
[CD DECK BLOCK]
stamp on the PCB.
This model has no servo alignment points because microcom-
Caution
· Pb free solder has a higher melting point than standard sol- puter controls the servo circuit.
der; Typically the melting point is 50 - 70°F (30 - 40°C)
higher. Please use a soldering iron with temperature control
and adjust it to 700 ± 20°F (370 ± 10°C). In case of using
high temperature soldering iron, please be careful not to
heat too long.
· Pb free solder will tend to splash when heated too high
(about 1100°F/600°C)
1.2. Laser Products
1.3. Maintenance
Your products is designed and manufactured to ensure a mini-
mum of maintenance. Use a dry, a soft cloth for routine exterior
cleaning. Never use benzine, thinner or other solvents.
2
2 Specifications 2.2. Dimensions
2.1. Specfications
General
Power Supply : 12V DC (11V - 16V),
Test Voltage 14.4 V
Negative Ground
Current consumption : Less than 2.5 A (CD mode, 0.5 W
4-speaker)
Maximum Power Output : 37W × 4 channels at 400 Hz, Vol-
ume Control Maximum
Tone adjustment range: Bass : ±12 dB at 100 Hz
Treble : ±12 dB at 10 kHz
Power Output : 18 W per channel into 4, 40 to
30,000 Hz at 3% THD
Suitable Speaker Impedance : 4
Dimensions (W×H×D) : 178×50×160mm {7" x 1-15/16" x 6-
5/16"}
Weight : 1.4 kg {3 lbs. 1 oz}
Front AUX Input
Input impedance : 10 k
Allowable external input : 2.0 V
Connector : 3.5 mm stereo mini pin
Audio input sensitivity : 200 mVrms
FM Stereo Radio
Frequency Range : 87.9 MHz-107.9 MHz
Usable Sensitivity : 12 dBf (1.1V/75, S/N 30dB)
50 dB Quieting Sensitivity : 17 dBf (1.8V/75)
Frequency Response : 30-15,000 Hz ± 3 dB
Alternate Channel Selectivity : 75 dB
Stereo Separation : 35 dB at 1 kHz
Signal/Noise Ratio : 70 dB (Mono)
AM Radio
Frequency Range : 530 kHz-1710 kHz
Usable Sensitivity : 28 dB/V (S/N 20 dB)
Weather Band Radio
Frequency Range : 162.400 MHz - 162.550 MHz
Usable Sensitivity : 3 dB/V (S/N 20 dB)
Signal / Noise Ratio (40 dB/V) : 50 dB
CD Player
Sampling Frequency : 8 times oversampling
DA Converter : 1 bit/4 DAC System
Error Correction System : Spot size detection method
Pick-Up Type : 3-beam
Light Source : Semiconductor Laser
Wavelength : 790nm
Frequency Response : 20 - 20,000 Hz (±1 dB)
Signal to Noise Ratio : 85 dB
Total Harmonic Distortion : 0.01 % (1 kHz)
Wow and Flutter : Below measurable limits
Channel Separation : 75 dB
* Specifications and the design are subject to possible modification
without notice due to improvements.
** Dimensions and Weight shown are approximate.
3
3 Features
· Front AUX terminal.
· Sound Control(FLAT,ROCK,POP and VOCAL).
· Illumination interlock control.
· Alarm Function.
4
4 Technical Descriptions PIN
No.
Port Description I/O FM
(V)
AM
(V)
CD
(V)
49 N.C. Not connection. O 0 0 0
4.1. Terminals Description 50 N.C. Not connection. I 0 0 0
51 N.C. Not connection. O 0 0 0
4.1.1. Main Block 52 N.C. Not connection. O 0 0 0
IC600:LC8783J3PA 53 E- Electronic Vol-IC data con- I/O 5.12 5.12 5.12
VOL_I2C_S trol signal.
DA
54 E- Electronic Vol-IC clock con- O 5.12 5.12 5.13
PIN Port Description I/O FM AM CD
VOL_I2C_S trol signal.
No. (V) (V) (V)
CK
1 DBGP0 On chip Debug port0. - 0 0 0
55 VDD VDD +5V - 5.11 5.11 5.11
2 DBGP1 On chip Debug port1. - 0 0 0
56 VSS GND - 0 0 0
3 DBGP2 On chip Debug port2. - 0 0 0
57 N.C. Not connection. O 0 0 0
4 N.C. Not connection. O 0 0 0
58 POWER_C Power-on control signal O 5.1 5.1 5.1
5 N.C. Not connection. O 0 0 0 NT output
6 N.C. Not connection. O 0 0 0 59 AMP_STB Amp stby control signal O 5.11 5.11 5.11
7 N.C. Not connection. O 0 0 0 output
8 RESET Reset signal input. I 5.11 5.11 5.11 60 LCD_DI LCD data output. O 4.85 4.85 4.85
9 XT1 Main crystal 1 (32.768KHz) I 0.99 0.99 0.99 61 LCD_CE LCD chip enable . O 0 0 0
connected. 62 N.C. Not connection. O 0 0 0
10 XT2 Main crystal 2 (32.768KHz) O 1.54 1.54 1.56 63 N.C. Not connection. O 0 0 0
connected.
64 BEEP Alarm O 0 0 0
11 VSS GND - 0 0 0
65 N.C. Not connection. I 0 0 0
12 CF1 Crystal (13.5MHz) con- I 1.5 1.5 1.5
66 ACC ACC power connected sig- I 5.31 5.31 5.31
nected.
nal detection.
13 CF2 Crystal (13.5MHz) con- O 1.5 1.5 1.5
67 N.C. Not connection. I 0 0 0
nected.
68 MODE_B Rotary clock signal B out- I 4.16 4.16 4.16
14 VDD VDD +5V - 5.14 5.14 5.14
put
15 N.C. Not connection. (Initial dis- I 0 0 0
69 MODE_A Rotary clock signal A out- I 4.16 4.16 4.16
(INIT_A) tribution setup_B)
put
16 VSM FM/AM SD signal input. I 1.37 2.16 1.07
70 N.C. Not connection. I 0 0 0
17 INIT_B Initial distribution setup_B I 0 0 0
71 N.C. Not connection.(Detach I 0 0 0
18 N.C. Not connection. I 0 0 0 (PANEL_IN) panel connection detection)
19 N.C. Not connection. O 0 0 0 72 BATT Battery power connected I 4.72 4.72 4.72
20 N.C. Not connection. I 0 0 0 signal detection
21 BATT_LEV Battery voltage level detec- I 4.03 4.05 4..05 73 ILL_PWM ILLM PWM control signal O 0 0 0
EL tion. output.
22 ST_SW Steering sw A/D signal I 0 0 0 74 ILL_CNT ILLM PWM control signal I 0 0 0
input. input.
23 N.C. Not connection. O 0 0 0 75 N.C. Not connection. O 0 0 0
24 PDM_SDA Radio preset direct mem- I/O 5.11 5.11 5.11 76 N.C. Not connection. O 0 0 0
ory EEPROM I2C data sig- 77 N.C. Not connection. O 0 0 0
nal output.
78 N.C. Not connection. I 0 0 0
25 PDM_SCK Radio preset direct mem- O 5.11 5.11 5.11
79 FM/AM_SW FM/AM control signal out- O 5 0 0
ory EEPROM I2C clock
put.
signal input.
80 RADIO_MO Radio power control signal O 5 5 5
26 CD_DI(CD_ CD DSP data input. O 0 0 4.82
DE output.
SI)
81 ILL_P_SEN ILLM PWM control signal I 5.21 5.21 5.21
27 CD_DO(CD CD DSP data output. I 3.43 3.43 2.29
S output.
_SO)
82 ST FM stereo signal input I 0.4 5.1 2.5
28 CD_CLK CD clock signal output. O 0 0 4.91
83 N.C. Not connection. O 0 0 0
29 CD_CE(FS) CD chip enable control sig- O 0 0 1.58
(ROM_COR
nal output.
_DI/DO)
30 LCD_CLK LCD clock signal output. O 4.72 4.72 4.72
84 N.C. Not connection. O 0 0 0
31 LCD_DO LCD data output. I 3.05 3.05 3.05 (ROM_COR
32 N.C. Not connection. I 0 0 0 _CS)
33 SUB_READ CD intb1 connection. I 5.2 5.2 5.2 85 N.C. Not connection. O 0 0 0
Y (ROM_COR
34 REG_REA CD control signal. I 5.2 5.2 0 _CLK)
DY 86 WB_MODE WB power control signal O 0 0 5
35 CD_SW1 CD insert detection SW 1. I 0 0 0 output.
36 CD_SW2 CD Mechanism SW 2. I 0 0 0 87 VREG Bypass condenser con- O 3.03 3.03 3.03
37 CD_MUTE CD DSP driver IC mute I 0.22 0.22 5.2 nected.
control signal. 88 VSS GND - 0 0 0
38 CD_LIMIT_ CD limit SW control signal. I 5.2 5.2 5.2 89 VDD(PLL) VDD +5V - 5.11 5.11 5.11
SW 90 OSC_FM/ FM/AM OSC signal input I 1.46 1.46 0
39 VSS GND - 0 0 0 AM
40 VDD VDD +5V - 5.11 5.11 5.11 91 OSC_WB WB local oscillator signal I 0 0 0
41 CD_DMUT CD motor driver IC action O 0 0 5.11 input.
E control signal. 92 FM/AM_IFC FM/AM IFC signal input I 1.46 1.46 0
42 CD_S/L CD connected detection. O 5.12 5.12 5.11 93 N.C. Not connection. I 0 0 0
43 CD_F/R CD deck frame sync control O 0 0 0 94 EO1 PLL phase comparison O 1.36 1.35 1.36
signal. error output
44 CD_RESET CD reset signal output. O 5.1 5.1 5.1 95 SUBFD Sub charge pump output. O 0 0 0
45 N.C. Not connection. O 0 0 0 96 SSC Tuner search sensitivity O 0 0 0
46 N.C. Not connection. O 0 0 0 change.
47 N.C. Not connection. O 0 0 0 97 AMP_CNT Amp control signal output. O 5.13 5.13 5.13
48 N.C. Not connection. O 0 0 0 98 N.C. Not connection. O 0 0 0
5
PIN Port Description I/O FM AM CD PIN No. Port Description I/O CD
No. (V) (V) (V) (V)
99 AF_MUTE AF mute control signal out- O 5.11 5.13 5.11 49 SUB_READY 0 For host u-com IF:SUB-RDY out- O 5.05
put(Pre-out). put.Pull-up resistance is neces-
100 AMP_MUT Amp mute control signal O 5.11 5.13 5.11 sary.
E output. 50 CD_MUTE 0 General I/O port2. I/O 5.22
51 LOW_BATI General I/O port1. I/O 0
IC803:C5ZBZ0000069 52 CONT General I/O port0. I/O 0
53 OSCCNT OSCOFF control port.Connected I 3.06
with 0V when reset.
PIN No. Port Description I/O CD 54 STREQ Stream data demand signal output I/O 0
(V) port.
1 EFMIN RF signal input port. I 1.65 55 STCK Clock input port for stream data. I/O 0
2 RFOUT RF signal output port. O 1.56 56 STDATA Stream data input port. I/O 0
3 LPF LPF capacitor connection port for O 1.63 57 TEST 1 Input port for test.Needed con- I 0
RF DC level detection. nect with 0V.
4 PHLPF LPF capacitor connection port for O 2.12 58 DATA Lch/Rch data output port. O 0
detection.
59 DATACK Clock output port. O 3.08
5 AIN A signal input port. I 2.12
60 LRSY Lch/Rch clock output port. O 0
6 CIN C signal input port. I 1.78
61 VVDD 2 VDD for build-in VCO. - 3.08
7 BIN B signal input port. I 1.74
62 VPREF 2 Built-in VCO oscillation cooking I 0
8 DIN D signal input port. I 1.75 stove setting input terminal.
9 FEC LPF capacitor connection port for O 1.69 63 VCOC 2 Built-in VCO control voltage set- I 0
FE signal. ting input port.
10 RFMON LSI build-in analog signal monitor O 1.52 64 VPDOUT 2 Output port for built-in VCO con- O 0
port. trol.
11 VREF VREF voltage output port. O 1.56 65 VVSS 2 GND for building VCO. Needed - 0
12 JITTC Capacitor connection port for JIT O 0 connect with 0V.
signal. 66 DVDD18 VDD capacitor connection port for O 1.55
13 EIN E signal input port. I 1.87 digital circuit.
14 FIN F signal input port. I 1.87 67 DVSS GND for digital system. Needed - 0
15 TEC LPF capacitor connection port for O 1.85 connect with 0V.
TE signal. 68 DVDD VDD for digital system. - 3.07
16 TE TE signal output port. O 1.56 69 DOUT Digital OUT output port. EIAJ for- O 0
17 TEIN TE signal input port for TES. I 1.57 mat.
18 LDD Laser power detection output port. O 2.27 70 AMUTEB AMUTEB (general) ouput port. O 3.07
19 LDS Laser power detection input port. I 0.13 71 XVSS GND for oscillation circuit. Needed - 0
20 AVSS GND for analog. - 0 connect with 0V.
21 AVDD VDD for analog. - 3.12 72 XOPUT Connected of 16.9344MHz oscilla- O 1.56
tion.
22 FDO Focus control signal output port. O 1.54
D/A output. 73 XIN Connected of 16.9345MHz oscilla- I 1.51
tion.
23 TDO Tracking control signal output port. O 1.57
D/A output. 74 XVDD VDD for oscillation circuit. - 3.06
24 SLDO Thread control signal output port. O 1.83 75 LCHO L channel output port. O 3.07
D/A output. 76 LRVDD VDD for LR channel. - 1.53
25 SPDO Spindle control signal output port. O 1.64 77 LRVSS GND for LR channel. Needed con- - 1.54
D/A output. nect with 0V.
26 VVSS1 Gnd for build-in VCO. - 0 78 RCHO R channel output port. O 1.54
27 PDOUT1 Phase comparison output port1 for O 1.2 79 AVDD VDD for analog. - 0
build-in VCO control. 80 SLCO Slice level control output port. O 1.57
28 PDOUT0 Phase comparison output port0 for O 1.2
build-in VCO control. Note 1 :
29 PCKIST PDOUT01 output port for current I 1.09 Voltage measuerments are with respect to ground,
setting.
30 VVDD1 VDD for VCO. - 3.08 with a voltmeter (internal resistance : 10M).
31 DMUTEB DMUTEB (GENERAL) output O 3.08
port. 4.1.2. Display Block
32 PUIN PUIN (GENERAL) I/O port.Built-in I/O 5.22 IC901:C0HBA0000246
pull-up resistance.
33 DEFFCT Detection signal output port. O 0
34 FSEQ Synchronous signal output port. - 3.07 PIN No. Port Description I/O (V)
35 C2F C2 error signal output port. O 0 1 P1 General-purpose output O 5.1
36 DVDD VDD for Digital. - 3.08 2 P2 General-purpose output O 5.1
37 DVSS GND for Digital. - 0 3 P3 General-purpose output O 5.1
38 DVDD18 VDD capacitor connection port for O 1.58 4 P4 NC - 0
digital circuit.
5 S5 Segment outputs O 2.58
39 MONI 0 Monitor port 0. O 3.08
6 S6 Segment outputs O 2.58
40 MONI 1 Monitor port 1. O 0
7 S7 Segment outputs O 2.58
41 DVDD VDD for Digital. - 3.08
8 S8 Segment outputs O 2.58
42 DVSS GND for Digital. - 0
9 S9 Segment outputs O 2.58
43 CE Host IF:Communication enable I 1.01
10 S10 Segment outputs O 2.58
signal input port.
11 S11 Segment outputs O 2.58
44 CL Host IF:Data transfer clock input I 3.15
port. 12 S12 Segment outputs O 2.58
45 DI Host IF:Data input port. I 4.71 13 S13 Segment outputs O 2.58
46 DO Host IF:Data output port.Pull-up is O 2.26 14 S14 Segment outputs O 2.58
necessary. 15 S15 Segment outputs O 2.58
47 RESB "Reset input port.Make it ""L"" I 4.9 16 S16 Segment outputs O 2.58
when power on." 17 S17 Segment outputs O 2.58
48 INTB Interrupt signal output port.(Servo) O 0 18 S18 Segment outputs O 2.58
6
PIN No. Port Description I/O (V)
19 S19 Segment outputs O 2.58
20 S20 Segment outputs O 2.58
21 S21 Segment outputs O 2.58
22 S22 Segment outputs O 2.58
23 S23 Segment outputs O 2.58
24 S24 Segment outputs O 2.58
25 S25 Segment outputs O 2.58
26 S26 Segment outputs O 2.58
27 S27 Segment outputs O 2.58
28 S28 Segment outputs O 2.58
29 S29 Segment outputs O 2.58
30 S30 Segment outputs O 2.58
31 S31 Segment outputs O 2.58
32 S32 Segment outputs O 2.58
33 S33 Segment outputs O 2.58
34 S34 Segment outputs O 2.58
35 S35 Segment outputs O 2.58
36 S36 Segment outputs O 2.58
37 S37 Segment outputs O 2.58
38 S38 Segment outputs O 2.58
39 COM4 Common driver outputs O 2.58
40 COM3 Common driver outputs O 2.58
41 COM2 Common driver outputs O 2.58
42 COM1 Common driver outputs O 2.58
43 KS1 NC - 2.56
44 KS2 Key scan outputs O 5.17
45 KS3 Key scan outputs O 5.17
46 KS4 Key scan outputs O 5.17
47 KS5 Key scan outputs O 5.17
48 KS6 Key scan outputs O 5.17
49 KI1 Key scan inputs I 0.1
50 KI2 Key scan inputs I 0
51 KI3 Key scan inputs I 0
52 KI4 Key scan inputs I 0
53 KI5 Key scan inputs I 0
54 VDD Logic block power supply - 3.3
55 VLCD LCD driver block power supply - 5.18
56 VLCD1 LCD drive bias voltage - 3.4
57 VLCD2 LCD drive bias voltage - 1.72
58 VSS Ground - 0
59 TEST Must be connected to ground I 0
60 OSC Oscillator circuit port I/O 2.3
61 DO Output data O 3.3
62 CE Chip enable I 0
63 CL Synchronization clock I 2.7
64 DI Transfer data I 2.6
7
4.2. IC Block Diagram
4.2.1. Main Block
P50:C5BA00000122
P51:J3CZAB000001
8
IC200:C1EA00000042
IC201:C1BB00000543
9
IC400:C1BB00001088
10
IC603:C3EBCY000018
IC700:C0DAZHF00004
11
IC701:C0EBY0000389
12
5 Block Diagram
E-4C389
P50
AF MUTE
IC201
VDD +5V
FM/AM TUNER CAR AUDIO PROCESSOR Q201/Q202
MUTE MUTE IC200
CN700
Q203/Q204 Q205/Q206
ANT51 1 AM ANT
L-CH
POWER AMP
L-CH 12 11 RADIO-L
ISO 36PIN POWER CONNECT OR
FL
2 FM ANT R-CH FL 21 12 FL+
MODE FM/AM
R-CH 13 9 RADIO-R FR 5 6 FL+
FM/AM OSC
FR 18 11 FL-
FM/AM IFC
FM/AM ST
3 3 AUX-L 3 8 FL-
10
S-METER 16 AUX L/R-CH
4 AUX-R E-VOL IC RL 20
RL
RR
14
21
RL+
2 RL+
VCC
VT 6 RR 19 15
14 Q57 23
RL-
4 RL-
7 8 9 15 17 6,20
CHARGE 4 STBY VCC
CD-R
CD-L
WB-L
VDD
SDA
FR+
SCL
PUMP 22 MUTE 9 10 FR+
FR-
26 25 24 7 6 5 15
BEEP IC701 7
17
RR+
12 FR-
14 RR+
AUDIO +9V RR-
RESET 19 16 RR-
1
VT Q52/Q54
ANT
VT 4
SD
SD 7
P51
ACC ACC ACC
15 ACC
VDD 5V
11 ILL-IN
2 WB TUNER AF 8
AUDIO +9V
VDD 5V VDD 5V Q701 13 PARK-LIGHTS
6
BATT
1 BATT
+B
WB OSC 5
3 26 ST-SW
Q50/Q53
IC700
IC603
EEPROM 3,5,7,31~34
Q55/Q58 PWR-GND
REGULATOR IC Q51 +9V
80 54 94 90 24 25 53 54 64 81 72 99 8
EO1
RADIO MODE
SDA
SCL
PDM_SDA
PDM_SCK
FM/AM SW
FM/AM OSC
RESET
BATT
AF MUTE
BEEP
ILL-P-SENSE
16 VSM
ANT-OUT 2
82 ST AMP STB 59
ACC-IN 3 R