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Compact disc recorder
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Service
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SERVICING
For servicing CDR775, the set can divided into three parts. The display board (partly) 1 002, the I/O board 1004, the headphone board (partly) 1002, the IR board (partly) 1002, the ON/ OFF & Standby LED board (partly) 1002 and the CD-out board (partly) 1002 have to be repaired at component level. The power supply unit 1003 is available as spare part, but can also be repaired at component level. 2. The CDR module (containing the CDR loader 81, CDR main board 1001 and loader bracket 82, 83) will be exchanged completely in case of failure. This complete CDR module is available as spare part. Defective modules have to be returned for central repair. 3. The CD module (containing the CD loader 131, CD main board 1005 and loader bracket 132) is a new module with VAL1250 loader assy but also a separate CDM and separate loader parts will be available via service stock. The CD main board can be repaired at component level. Also available: Circuit Description " The Basics of Compact Disc Recordable/Rewriteable". Service code number 4822 725 25242. 1.
Contents
1. 2. 3. 4. Technical Specifications Warning and Servicing Hints User Instructions Mechanical Instructions Wiring Diagram CDR Wiring Diagram CD loader Exploded View CDR Exploded View CD loader Dismantling Instructions 5. Electrical and Circuit Diagrams Overall Blockdiagram Display Board IR / On/Off &Standby LED Board Headphone / CD-out Board I/O Board Power supply unit CD-Mainboard 1A CD-Mainboard 1B CD-Mainboard 1C CD-Mainboard 2 Diagnostic Software Faultfinding Trees Faultfinding Guide List of Abbreviations Partslist (mechanical and electrical)
Page
2 4 7 19
19 20
21 22 23
Diagram 24 PWB 26 27 28 30 32 37/38 37/38 37/38 37/38
6. 7. 8. 9. 10.
26 27 28 29 31 33 34 35 36 39 43 49 65 71
Copyright reserved 1999 Philips Consumer Electronics B.V. Eindhoven, The Netherlands. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Published by RH 9969 Service DPS Hasselt Printed in the Netherlands Subject to modification
<§§> 3104 125 40030
PHILIPS
Warnings and Servicing Hints
SERVICING HINTS In the set, chip components have been applied. For disassembly and assembly check the figure below.
CL 96532086_022.eps 080999
CDR775
Warnings and Servicing Hints
SAFETY GUIDELINES FOR THE PROFESSIONAL SERVICE TECHNICIAN
Important Proper service and repair is Important to the safe, reliable operation of all Philips equipment. The service procedures recommended by Philips and described In this service manual are effective methods of performing service operations. Some of these service operations require the use of tools specially designed for the purpose. The special tools should be used when and as recommended, It is Important to note that this manual contains various CAUTIONS and NOTICES which should be carefully read In order to minimize the risk of personal injury to service personnel. The possibility exists that Improper service methods may damage the equipment. It also Is Important to understand that these CAUTIONS and NOTICES ARE NOT EXHAUSTIVE, Philips could not possibly know, evaluate and advise the service trade of all conceivable ways In which service might be done or of the possible hazardous consequences of each way. Consequently, Philips has not undertaken any such broad evaluation. Accordingly, a servicer who uses a service procedure or tool which Is not recommended by Philips must first satisfy himself thoroughly that neither his safety nor the safe operation of the equipment will be Jeopardized by the service method selected. Safety C h e c k s After the original service problem has been corrected, a complete safety check should be made. Be sure to check over the entire set, not Just the areas where you have worked. Some previous servicer may have left an unsafe condition, which could be unknowingly passed on to your customer. Be sure to check all of the following: Fire a n d S h o c k Hazard (Continued) 9, After reassembly of the unit, always perform an ac leakage test or resistance test from the line cord to all exposed metal parts of the cabinet, Also, check all metal control shafts (with knobs removed), antenna terminals, handles, screws, etc. to be sure the unit Is safe to operate without danger of electrical shock, Broken line: an
Leakage C u r r e n t Cold C h e c k
1,
Unplug the ac line cord and connect a Jumper between the two prongs of the plug, Turn on the power switch. Measure the resistance value between the Jumpered ac plug and all exposed cabinet parts of the receiver, such as screw heads, antennas, and control shafts. When the exposed metallic part has a return path to the chassis, the reading should be between 1 megohm and 5.2 megohms. When the exposed metal does not have a return path to the chassis, the reading must be Infinity. Remove the jumper from the ac line
cord.
Fire and Shock Hazard
1. Be sure all components are positioned In such a way as to avoid the possibility of adjacent component shorts. This is especially important on those units which are transported to and from the service shop. Never release a repaired unit unless all protective devices such as insulators, barriers, covers, strain reliefs, and other hardware have been installed according to the original design, Soldering and wiring must be inspected to locate possible cold solder Joints, solder splashes, sharp solder points, frayed leads, pinched leads, or damaged Insulation (Including the ac c o r d ) . Be certain to remove loose solder balls and aH other loose foreign particles. Check across-the-line components and other components for physical evidence of damage or deterioration and replace if necessary. Follow original layout, lead length, and dress. No lead or component should touch a resistor rated at 1 watt or more. Lead tension around protruding metal surfaces or edges must be avoided. Critical components having special safety characteristics are Identified with a A b y the Ref. No. In the parts list and enclosed within a broken line* (where several critical components are grouped In one area) along with the safety symbol A on the schematic diagrams and/or exploded views. Replacement parts without the same safety characteristics may create shock, fire, or other hazards. When servicing any unit, always use a separate Isolation transformer for the chassis. Failure to use a separate isolation transformer may expose you to possible shock hazard, and may cause damage to servicing instruments. Many electronic products use a polarized ac line cord (one wide pin on the plug). Defeating this safety feature may create a potential hazard to the servicer and the user. Extension cords which do not Incorporate the polarizing feature should n»ver be used.
TO INSTRUMENTS EXPOSED METAL PARTS
1500H, 10VV
WATER PIPE (EARTH GROUND)
Leakage C u r r e n t Hot C h e c k 1. 2. 3. 4. Do not use an isolation transformer for this test. Plug the completely reassembled unit directly into the ac outlet. Connect a 1.5k, 10W resistor paralleled by a 0,15uF. capacitor between each exposed metallic cabinet part and a good earth ground such as a water pipe, as shown above. Use an ac voltmeter with at least 5000 ohms/volt sensitivity to measure the potential across the resistor. The potential at any point should not exceed 0.75 volts. A leakage current tester may be used to make this test; leakage current must not exceed 0.5 mllllamps. If a measurement Is outside of the specified limits, there Is a possibility of shock hazard. The receiver should be repaired and rechecked before returning It to the customer. Repeat the above procedure with the ac plug reversed. (Note: An ac adapter Is necessary when a polarized plug Is used. Do not defeat the polarizing feature of the plug.)
2. 3.
4. 5. 6.
5.
Parts R e p l a c e m e n t 1. Many electrical and mechanical parts In Philips equipment have special safety related characteristics. These characteristics are often not evident from visual inspection nor can the protection afforded by them necessarily be obtained by using replacement components rated for higher voltage, wattage, etc. The use of a substitute part which does not have the same safety characteristics as the Philips recommended replacement part shown in this service manual may create shock, fire, or other hazards. Under no circumstances should the original design be modified or altered without written permission from Philips. Philips assumes no liability, express or implied, arising out of any unauthorized modification of design. Servicer assumes all liability. All ICs and many other semiconductor parts are susceptible to electrostatic discharges (ESD). Careless handling during repair can reduce the life of the part drastically.
7.
8.
2.
LASER N O T E : DANGER Invisible laser radiation when open. AVOID DIRECT EXPOSURE TO BEAM. CAUTION - Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure. C A U T I O N - The use of optical Instruments with this product will Increase eye hazard.
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Diagnostic Software
6. Diagnostic Software
6.1 Dealer mode
The purpose of the dealer mode is to prevent people taking out the CD inside the player at exhibitions, showrooms etc.. This mode disables the open/close function of the player, The dealer mode can be switched on and off pressing keys [OPEN/CLOSE] and [STOP] of the CDR player simultaneously while switching on the unit. The dealer mode is stored in the flash memory and can only be changed by executing the above actions. 6.2.2 Requirements to perform the test · · Working keyboard to start up the test. Working local display to check the output messages.
6.2
Dealer diagnostics
CL96532086-024.eps 090999
Figure 6-1 6.2.1 Description The intention of the dealer diagnostics is to give an indication of the CDR player status. An inexperienced, even nontechnical dealer will/can perform the test. Tests are executed automatically without need for external tools or disassembly of the unit. This test checks the CDR main board using the same tests as the electrical service diagnostics program. Only the result of the test, "PASSED" or "ERROR", will be shown on the display. Pressing keys [F FWD] and [REWIND] simultaneously while switching on the unit, starts the test. Switching off the unit ends the test.
CDB775 6.3 Electrical service diagnostics
Diagnostic Software
ELECTRICAL SERVICE DIAGNOSTICS (software versions, test for defective components)
Figure 6-2
Diagnostic Software
6.3.1 Description The intention of the electrical service diagnostics is to show the software versions present in the player and to direct the dealer towards defective internal units. The units are : the CDR main board, the CDR loader, the CD loader in case of a CDR775 and the keyboard/display board. A sequence of tests is executed automatically. Some of the tests can be aborted or skipped without the result being taken Into account. External tools or disassembly of the unit is not necessary to get the diagnostic information. Pressing keys [PLAY/PAUSE] and [F FWD] simultaneously while switching on the unit, starts the test. Switching off the unit ends the test. 6.3.2 Requirements to perform the test · · · Working keyboard to start up the test. Working local display to check the output messages. A CD-DA disc with a minimum of 3 tracks in all trays to perform the disc test.
CDR775
disc test is executed to check focus control, disc motor control, radial control and jump grooves control. The disc test is performed by audio play-back of 5 seconds at the beginning, middle and end of the disc. CDR loader test During the test, the current disc time is shown. In case of an error the message "BERR1" will be displayed and the [F FWD] key must be pressed to continue with the following test. Pressing the [F FWD] key also aborts this test. CD loader test For CDR775 only. During the test, the current disc time is shown. In case of an error the message "BERR2" will be displayed and the [F FWD] key must be pressed to continue with the following test. Pressing the [F FWD] key also aborts this test. Display test All segments will blink at a frequency of 1 Hz. Pressing the [F FWD] key will start the next test because the user has to check for himself if all segments work properly. Keyboard and remote control tests The test will give the user the ability to test every key without executing the function assigned to it. Therefore, the user needs to press every key on the keyboard and the remote control. The display will show the name of the key being pressed. Pressing more than one key at once will give an unpredictable result except for the service combinations: [PLAY/PAUSE] + [STOP], [PLAY/PAUSE] + [F FWD], [F FWD] + [REWIND], [ERASE] + [RECORD], [PLAY/PAUSE] + [RECORD], [OPEN/CLOSE] + [PROGRAM].
6.3.3
Description of the tests Player Information In this part of the test the following Important Information can be checked without removing the cover: Recorder ID. · SW-version back end of player. SW-version CDR loader. · SW-version CD loader (only for CDR775). CDR main board test [F FWD] key. The message "DERRn" will be displayed with n indicating the faulty test number. If one of the tests is aborted with the [F FWD] key, no error message will be displayed for this test. The flash data erase test ("DTST3") can not be aborted ! The CDR main board test consists out of: DRAM test Display : "DTST1", The DRAM used for buffer management is tested by writing, reading and verifying test patterns. Flash checksum test Display : "DTST2". This test checks the checksum of the player's SW stored in the flash. Flash data erase Display : "DTST3". During this test, all temporary information (CDtxt) in the flash is erased. CODEC (ADC/DAC) test Display : "DTST4". This test checks the CODEC IC by writing, reading and verifying test patterns. The test is not applicable for CDR950. CDR communication test Display : "DTST5". The communication between the host processor (DASP) and the CDR loader via the DSA-R-bus is tested. CD communication test Display : "DTST6"). The communication between the host processor (DASP) and the CD loader is tested. The test is only applicable for CDR775. Loader tests These tests determine if the CDR loader and the CD loader in case of a CDR775 work correctly. A CD-DA disc with a minimum of 3 tracks needs to be inserted in both loaders. A
6.4
Mechanical service diagnostics
6.4.1
Description No external tools are required to perform this test. The cover needs to be removed because the user has to check the movements of the tray, focus and sledge visually. Pressing keys [PLAY/PAUSE] and [STOP] simultaneously while switching on the unit, starts the test. Switching off the unit ends the test. In case of a CDR775, one can check the CD loader mechanics in the same way by pressing the above key combination on the CD player keys.
B S E M
6.4.2
H H
I H Q ^ ^ H H
Diagnostic Software
i.5.1 Description This test is initiated by pressing [ERASE] and [RECORD] simultaneously while switching on the unit. The player will erase a complete CD-RW disc (including PMA and ATIP lead out area) at speed N=2. The display shows the countdown of the remaining time required for the operation to complete, The format is "ER mm:ss", where "mm" are the remaining minutes and "ss" the remaining seconds. After completion the message "PASSED" is shown, and the player has to be switched off and on again to start up in normal operating mode. Switching off the unit before completion of the test, leaves the disc in an unpredictable state. In such case only a complete DC-erase procedure can recover the CD-RW disc. 5.5.2 Requirements to perform the test ·· * Functional CDR player. A CD-RW audio disc must be present in the tray.
Requirements to perform the test · Working keyboard to cycle through the tests and to start up the test. Working local display to check the output messages.
6.4.3
Description of the tests Focus control test The focussing lens is continuously moving up and down. The display reads "BUSY". Sledge control test After pressing [F FWD] the sledge continuously moves up and down. Pressing [REWIND] stops the sledge at the position it is in and the focus control test resumes. The display reads "BUSY". Tray control test This test starts from within the focus control test routine. Pressing [OPEN/CLOSE] moves the tray in or out. In the tray open position one can initiate focus and sledge tests by pressing [F FWD]. One has to stop these tests pressing [REWIND] before it is possible to close the tray again. Depending on the action the display reads "OPEN", "OPENED", "CLOSE" or "BUSY".
6.5
D C - e r a s e service m o d e
Figure 6-4
Faultfinding trees
CDR775
7. Faultfinding trees
7.1 CDR-Module
Figure 7-1
CDR775
Faultfinding trees
Figure 7-2
Faultfinding trees
CDR775
Figure 7-3
CDR775
Faultfinding trees
Faultfinding trees 7.2 CD Module
C0R775
·pMiiiap»|»iMM
Figure 7-5
CDR775
Faultfinding trees
Faultfinding Guide
CDR775
8. Faultfinding Guide
8.1 8.1.1 Display Board Description of display board General description The display board has three major parts : the FTD (Fluorescent Tube Display), the display controller TMP87C874F and the keyboard. The display controller Is controlled by the DASP master processor on the CDR main board. The communication protocol used is I2C. So all the information between DASP and display controller goes via the SDA or I2C DATA and SCL or I2C CLK lines. Communication is always initiated by the DASP on the CDR main board. Unlike the previous generations of CDR players, the interrupt generated by the display controller at key-press or reception of remote control is not used. Instead, the DASP polls the display controller for these events. Display controller TMP87C874F TMP87C874F (IC7104) Is a high speed and high performance 8-bit single chip microprocessor, containing 8-bit A/D conversion inputs and a VFT (Vacuum Fluorescent Tube) driver. In this application, its functions are : · slave microprocessor. · FTD driver, · generates the square wave for the filament voltage required for an AC FTD. · generates the grid and segment scanning for the FTD. · generates the scanning grid for the key matrix. · input for remote control. All the communication runs via the serial bus interface I2C. The display controller uses an 8MHz resonator as clock driver.
PIN DESCRIPTIONS INTO INT1 RESETN SCL SDA TEST VAREF VASS VDD VKK VSS XIN, XOUT external interrupt input 0 external interrupt input 1 reset signal input, active low l2C-bus serial clock input/output l2C-bus serial data input/output test pin, tied to low analog reference voltage input analog reference ground +5V VFT driver power supply ground resonator connecting pins for high-frequency clock Figure 8-1
CL 96532076_028.eps 290799
CDR775
8.1.2 Test instructions
Faultfinding Guide
Grid lines Level and timing of all grid lines, G1-->G15, can be checked either at the FTD itself or at the display controller. Grid lines G13, G14andG15 each have an extra current amplifier in line : T7203 for G13, T7204 for G14 and T7100 for G15, A typical grid line signal shows in the oscillogram below.
Supply voltages The display board receives several voltages via connector 1119 (and connector 1121 for CDR570/930). · VFTD : -38V ±5% measured at pin 2 of conn. 1119. · VDC1-VDC2 : 3V8 ±10% measured between pin 1 and 3 of conn. 1119. · +5V : +5V ±5% measured at pin 10 of conn. 1119 (pin 4 of conn. 1121 for CDR770). Voltages VFTD, VDC1 and VDC2 are produced in the power supply unit and sent to the display board via the CDR main board. The +5V voltage is produced on the CDR main board as D5V. Clock signal As clock driver for the display controller, a resonator of 8 MHz (1110) is used. The signal can be measured at pins 8 and 9 of the display controller: 8 MHz ±5%. Control signals RESET The reset signal comes via pin 4 of conn. 1119 from the DASP master processor on the CDR main board (SYS_RESET). The reset is low active. It should be kept low during power up for at least 3 machine cycles with supply voltage in operating range and a stable clock signal (1 machine cycles 12 x 1/Fc(8MHz) sec). During normal operation, the reset should be high (3V3). The high signal is 3V3 because the DASP operates on 3V3. I2CDA TA/I2C CLK These lines connect to the DASP master processor via respectively pin 5 and pin 7 of conn. 1119 (pin 5 of conn. 1119 and pin 1 of conn. 1121 for CDR570/930). When there Is no communication, they should have the high level (+5V), The oscillogram below gives an indication of how these signals should look like.
Figure 8-3 'Gridline' Segment lines Level and timing of all segment lines, P1-->P21 (P1-->P20 for CDR770), can be checked either at the FTD itself or at the display controller. The data on these segment lines however, depends on the characters displayed. The oscillogram below shows a segment line with data. A segment line without data maintains a -38V level.
Figure 8-4 'Segment line' Figure 8-2 'I2C signals' FTD drive lines Filament voltage Should measure 3.8V ±10% (=VDC1 -VDC2) between pins 1 -23 and pins 45-46-47 (pins 1-2 and pins 48-49 for CDR770) of the FTD (1113). Key matrix lines The lines connected to pins 34, 35, 36 and 37 of the display controller act as matrix scanners. Without a key pressed, they maintain a low level. As soon as a key is pressed, the scanning line connected to that key puts out a scanning signal, which should look like the oscillogram below. This scanning signal goes via the pressed key to I/O port 4 of the display controller (pins 28 to 33). The display controller can now determine which key has been pressed. Without a key pressed, pins 28 to 33 of the display controller maintain a high level (+5V).
Faultfinding Guide
CDR775
The pulses created this way arrive at pin 16 and 17 of the display controller. The first pulse to arrive tells the controller the direction of the rotation. Counting the pulses reveals the amount of rotation. Combining and decoding this information, the display controller will execute the appropriate task. Push button operation This button connects to the key matrix lines and thus the operation is identical to the ordinary keys. Without being pressed, pin 4 of the easy jog maintains the low level, pin 5 the high level. When pressed the scanning signal goes through the closed contact of pins 4 and 5, and can be checked at both pins. IR receiver · remote control In the CDR570/930 the IR receiver TSOP1736 (6101) is mounted on the display board. In the CDR770 that same IR receiver (6200) is mounted on a small board together with the headphone socket. In the CDR775 the IR receiver (6200) is mounted on its own small board. In all versions the IR receiver connects to the display controller. The signal coming from the receiver can be checked at pin 22 of the display controller. This signal is normally high (+5V). When the remote control is being operated, pulses mixed in with the +5V can be measured. The oscillogram gives an indication of how the signal looks like with the RC being operated.
Figure 8-5 'Key matrix scan line' Easy jog knob Rotary operation The easy jog knob (1050) incorporates a whole heap of user control possibilities in just one knob. Without the knob being operated, pin 1 and 3 of the knob (and thus pin 16 and 17 of the display controller), maintain the +5V level. Turning the knob clockwise briefly connects pin 1 to GND followed by pin 3.
Figure 8-8 'IR receiver signal' Figure 8-6 Turn clockwise' Turning the knob anti-clockwise briefly connects pin 3 to GND followed by pin 1.
Figure 8-7 'Turn anti-clockwise'
CDR775
8.1.3 Display board troubleshooting guide
Faultfinding Guide
Faultfinding Guide 8.2
8.2.1
CDR775
cycle is regulated so that the output voltages are independent of load or input voltage variations. The controlling device MC44603 is an integrated pulse width modulator. A clock signal initiates power pulses at a fixed frequency. The termination of each output pulse occurs when a feedback signal of the inductor current reaches a threshold set by the error signal. In this way the error signal actually controls the peak inductor current on cycle-by-cycle basis.
Power Supply Unit 20PS317
Description of PSU 20PS317 MOSFET 7125 is used as a power switch controlled by the controller IC7110. When the switch is closed, energy is transferred from mains to the transformer. This energy is supplied to the load when the switch is opened. Through control of the switch-on time, the energy transferred in each
Figure 8-10 'Blockdiagram PSU 20PS317' Description of controller MC44603 The MC44603 is an enhanced high performance controller that is specifically designed for off-line and DC-to-DC converter applications. This device has the unique ability of automatically changing operating modes if the converter output is overloaded, unloaded or shorted. The MC44603 has several distinguishing features when compared to conventional SMPS controllers. These features consist of a foldback facility for overload protection, a standby mode when the converter output is slightly loaded, a demagnetization detection for reduced switching stresses on transistor and diodes, and a high current totem pole output ideally suited for driving a power MOSFET. It can also be used for driving a bipolar transistor in low power converters. It is optimised to operate in discontinuous mode but can also operate in continuous mode. Its advanced design allows use in current mode or voltage mode control applications. Figure 8-11
JSJ-fcM H M ^ M i i i M M ^ ^
Pin function description
Faultfinding Guide
Pin 1 2 3 4 5 6 7 8
Name
Description This pin is the positive supply of the IC. The operating voltage range after start-up is 9.0 to 14.5 V, The output high state (VOH) is set by the voltage applied to this pin. Peak currents up to 750 rnA can be sourced or sunk, suitable for driving either MOSFET or bipolar transistors. The groundpin is a single return, typically connected back to the power source. The foldback function provides overload protection. When the overvoitage protection pin receives a voltage greater than 2.5V, the device is disabled and requires a complete restart sequence, A voltage proportional to the current flowing into the power switch is connected to this input. A voltage delivered by an auxiliary transformer winding provides to the demagnetisation pin an indication of the magnetisation state of the flyback transformer. A zero voltage detection corresponds to complete core saturation. The synchronisation input pin can be activated with either a negative pulse going from a level between 0.7V and 3.7V to Gnd or a positive pulse going from a level between 0.7V and 3.7V up to a level higher than 3.7V. The oscillator runs free when Pin 9 is connected to Gnd, The normal mode oscillator frequency is programmed by the capacitor CT choice together with the Rref resistance value. CT, connected between Pin 10 and Gnd, generates the oscillator sawtooth. A capacitor, resistor or a voltage source connected to this pin limits the switching duty-cycle. This pin can be used as a voltage mode control input. By connecting Pin 11 to Ground, the MC44603 can be shut down. A voltage level applied to the RP Standby pin determines the output power level at which the oscillator will turn into the reduced frequency mode of operation (i.e. standby mode). An internal hysteresis comparator allows to return in the normal mode at a higher output power level, The error amplifier output is made available.for loop compensation, This Is the inverting input of the Error Amplifier. It can be connected to the switching power supply output through an optical (or other) feedback loop. The reduced frequency or standby frequency programming is made by the RF Standby resistance choice. Rref sets the internal reference current. The internal reference current ranges from 100^A to 500fiA. This requires that 5.0W2 < Rref S 25kQ.
CL 96532076_031 .eps 290799
vcc vc
Output Gnd Foldback Input Overvoitage Protection Current Sense Input Demagnetisation Detection Synchronisation Input
CT
9
10 11
SoftStart/Dmax/Volta ge-Mode RP Standby
12
13 14 15 16
E/A Out Voltage Feedback RF Standby Rref
Figure 8-12
Faultfinding Guide
Block diagram of MC44603
CDR775
Figure 8-13 Operating description of MC44603 The input voltage Vcc (pin 1) Is monitored by a comparator with hysteresis, enabling the circuit at 14.5V and disabling the circuit below 7.5V. The error amplifier compares a voltage Vfb (pin 14) related to the output voltage of the power supply, with an internal 2.5V reference. The current sense comparator compares the output of the error amplifier with the switch current Isense (pin 7) of the power supply. The output of the current sense comparator resets a latch, which is set every cycle by the oscillator. The output stage is a totem pole, capable of driving a MOSFET directly. Start up sequence of PSU 20PS317 t1: Charging the capacitors at Vcc C2129 will be charged via R3123 and R3134, C2133 and C2111 via R3129. The output is switched off during t1. t2: Charging of output capacitors When the input voltage of the IC exceeds 14.5V, the circuit is enabled and starts to produce output pulses. The current consumption of the circuit increases to about 17mA, depending on the external loads of the IC. At first, the capacitors at the Vcc pin will discharge because the primary auxiliary voltage, coming from winding 7-9 is below the Vcc voltage. At some moment during t2, the primary auxiliary voltage reaches the same level as Vcc. This primary auxiliary voltage now determines the Vcc voltage. t3: Regulation The output voltage of the power supply is in regulation. t4: Overload When the output is shorted, the supply voltage of the circuit will decrease and after some time drop below the lower threshold voltage. At that moment, the output will be disabled and the process of charging the Vcc capacitors starts again. If the output is still shorted at the next t2 phase, the complete startand stop sequence will repeat. The power supply goes in a hiccup mode. Figure 8-14 'Start-up sequence' Regulation of PSU 20PS317 Figure 8-14 shows the most relevant signals during the regulation phase of the power supply. The oscillator voltage ramps up and down between V1 and V2. The voltage at the current sense terminal is compared every cycle with the output of the error amplifier Vcomp. The output
CDR775
Faultfinding Guide
is switched off when the current sense level exceeds the level at the output of the error amplifier. TimeON phase : A drain current will flow from the positive supply at pin 2 of the transformer through the transformer's primary winding, the MOSFET and Rsense to ground. As the positive voltage at pin 2 of the transformer is constant, the current will increase linearly and create a ramp dependent on the mains voltage and the inductance of the primary winding. A certain amount of energy is stored In the transformer in the form of a magnetic field. The polarity of the voltages at the secondary windings is opposite to the primary winding so that the diodes are non-conducting in this phase. TimeDIODE phase : When the MOSFET is switched off, energy is no longer supplied to the transformer. The inductance of the tranformer now tries to maintain the current which has been flowing through it at a constant level. The polarity of the voltage from the transformer therefore reverses. This results in a current flow through the transformer's secondary winding via the now conducting diodes, electrolytic capacitors and the load. This current is also ramp shaped but decreasing. TimeDEAD phase : when the stored energy has been supplied to the load, the current in the secondary windings stops flowing. At this point, the drain voltage of the MOSFET will drop to the voltage of C2121 with a ringing caused by the drain-source capacitance with the primary inductance. The oscillator will start a next cycle which consists of the above described three phases. The time of the different phases depends on the mains voltage and the load, TimeDEAD is maximum with an input of 400VDC and a minimum load. It will be zero with an input of 100VDC and an overload.
Figure 8-15 'Regulation'
Figure 8-16 'Oscillograms'
Faultfinding Guide
Circuit description of PSU 20PS317 Input circuit The input circuit consists of a lightning protection circuit and an EMI filter. The lightning protection comprises R3120, gasarrestor 1125 and R3124. The EMI filter is formed by C2120, L5120, C2125 and C2126. It prevents inflow of noise into the mains. Primary rectifier/smoothing The AC input is rectified by rectifier bridge 6102 and smoothed into C2121. The voltage over C2121 is approximately 300V. It can vary from 100V to 390V. Start up circuit and Vcc supply This circuit is formed by R3123, R3134, C2129, D6129, R3129, R3111, C2133andC2111. When the power plug is connected to the mains voltage, the stabilised voltage over D6129 (24V) will charge C2133 via R3129. When the voltage reaches 14.5V across C2111, the control circuit of IC7110 is turned on and the regulation starts. During regulation, Vcc of IC7110 will be supplied by the rectified voltage from winding 7-9 via L5132, D6132 and C2133. Control circuit The control circuit exists of IC7110, C2102, C2104, C2107, C2109, C2110, R3102, R3103, R3104, R3107, R3108, R3109 and R3110. C2102 and R3110 define the frequency of the oscillator. Power switch circuit This circuit comprises MOSFET7125, Rsense 3126,3127 and 3128, R3125.C2127.L5125, R3112 and R3113. R3125isa pull-down resistor to remove static charges from the gate of the MOSFET. Regulation circuit The regulation circuit comprises opto-coupler 7200 which isolates the error signal from the control IC on the primary side and a reference component 7201. The TL431(7201) can be represented by two components: a very stable and accurate reference diode a high gain amplifier
CDR775
Demagnetisation The auxiliary winding (7-9) voltage is used to detect magnetic saturation of the transformer core and connected via R3101 to pin 8 of IC7110. During the demagnetisation phase, the output will be disabled. Overvoltage protection circuit This circuit consist of D6114, C2114, R3115and R3116. When the regulation circuit is interrupted due to an error in the control loop, the regulated output voltage will increase (overvoltage). This overvoltage is sensed at the auxiliary winding 7-9, When an overvoltage longer than 2.0 (s is detected, the output is disabled until VCC is removed and then re-applied. The power supply will come in a hiccup mode as long as the error in the control loop is present. Secondary rectifier/smoothing circuit There are 5 rectifier/smoothing circuits on the secondary side. Each voltage depends on the number of windings of the transformer. The -8V supply is regulated by voltage regulator 7249. On/off circuit In off mode pin 1 and pin 2 of connector 0206 are connected. The high voltage (-8V, +12V) over opto coupler 7200 forces this one to conduct. IC7110 is switched off and thus the output supply voltages.
TL431 will conduct from cathode to anode when the reference is higher than the internal reference voltage of about 2.5V. If the reference voltage is lower, the cathode current is almost zero. The cathode current flows through the LED of the opto-coupler. The collector current of the opto-coupler flows through R3106, producing an error voltage, connected to voltage feedback pin 14 of IC7110.
CDR775
8.2.2 Troubleshooting PSU 20PS317
Faultfinding Guide
8.3
CD Main Board
The CD main board is built around the compact disc mechanism VAM1250 and a loader 1250. The CDM delivers diode signals and an unequalised high frequency signal. These signals are necessary inputs for the decoder CD10. Based on these signals the decoder will control the disc. The decoder is able to control the sledge, focus motor, radial motor and turn table. When everything is "locked", the decoder delivers a digital output according to IEC958 standard, subcode to the microprocessor and I2S for reproducing analog audio signals by means of a D/A converter,
The microprocessor controls the CD10 and is slave of the master processor on the CDR main board in the CDR775. Both processors communicate via a DSA connection (data, strobe and acknowledge).
Faultfinding Guide
·
CDR775
Connect on pin 2 of position 1208 a clock signal of 8.4672 MHz (10Oppm minimum rise time of 50ns and at TTL level (0V and +5V). Keep microprocessor 7202 in reset by forcing pin 7 at position 1208 to+5V. Release the reset. Now, the processor will reset the CD 10 for at least 75u.s. The output clock CL11 should be available now at pin 42 of theCDIO.
· · ·
Check the following frequencies :
Point Position 7000 pin 16 Position Position Position Position 7202 7309 7309 7309 pins 14,15 pin 6 pin 1 pin2 Frequency 8.4672 MHz ±100ppm 12MHz ± 5 % 11.2896 MHz ±100ppm 2.1168 MHz ±100ppm 44.1kHz ±100ppm
CL96532086_050.eps 080999
Figure 8-19 8.3.1 Supply Voltages Description The CD main board receives +5V and +12V from the CDR main board via respectively pin 16 and pin 15 of connector 1208. The +5V is split up into +5VHF and +5V. The +5VHF is used mainly for the diode currents and the HF*amplifler. The +5V is used for the digital part of the board. On the board a +3V3 is made from the +5V for the decoder CD10 and an A3V3 for the DAC UDA1320. The +12V is split up into A12V for the audio output stage and +12V for the power drivers of the CDM. Measurements Connect following supplies to next pins : · · · +5V + 5% to pin 16 of connector 1208. +12V + 5% to pin 15 of connector 1208. Ground reference to pin 17 of connector 1208.
Figure 8-21 8.3.3 CD10 Decoder/Servo S AA7324 (7000) Description The CD10 is a single chip combining the functions of a CD decoder, digital servo and bitstream DAC. The decoder/servo part is based on the CD7. The decoding part supports a full audio specification and can operate at single speed (n=1) and double speed (n=2). Block Diagram
Keep microprocessor 7202 in reset by forcing pin 7 of connector 1208 to +5V. Check the following voltages :
Point Position 1000 Position 7000 Position 7005 Position 7020 Position 7020 Position 7021 Position 7022 Position 7025 Position 7202 Position 7309 Position 7120
Voltage pins 1,3 pins 5,17,21,57 pin 14 pins 25 pins 26,27,28 pin 5 pin 5 pin 16 pin 38 pins 4,13 pin 8 +5V ± 5% +3.3V ± 5% +5V ± 5% +5V ± 5% +10 ± 1 0 % +12V±10 +12V±10 +5V ± 5% +5V ± 5% ( other appl. 3V3 possible) +3V3 ± 5% +12V±10
Clfl6532086_049.eps
Figure 8-20 8.3.2 Clock Signals Description The microprocessor has its own Xtal or resonator of 12MHz. The CD10 needs a clock of 8.4672MHz + 100ppm. This speed also relates to the disc speed. To avoid locking problems between the two drives in the CDR775, both drives run on the same clock. Therefore the CD main board gets the clock for the decoder from the CDR main board via pin 2 of connector 1208. The DAC needs a system clock to drive its internal digital filters and to clock the I2S signals from the decoder. In our case this is 11.2896MHz (CL11) generated bytheCDIO. Measurements · Connect the power supply as described above in "1.1.1. Supply Voltages".
Figure 8-22
CPR775
Faultfinding Guide
Pin 9 12 13 16 9 12 13 16
Location 7022 7022 7022 7022 7021 7021 7021 7021
FOC FOC RAD RAD SLE SLE TRAYTRAY+
Value DC 5.8V ±10% 5.8V 5.8V 5.8V 5.8V 5.8V 5.8V 5.8V
CL96533086_054.eps 080999
Figure 8*25 8.3.5 BA6856FP Turn Table Motor Driver (7020) Description This component is a 3 phase, full wave pseudo linear driving system with inbuilt Hall Bias circuit and 3 phase parallel output. Measurements Keep processor 7202 in reset by forcing pin 7 of connector 1208 to +5V. The outputs 9, 10, 11 of connector 1006 are 0V. Pin 21 of the motor driver 7020 is 2.5V ( 10%. Pin 22 of the motor driver 7020 is 2.5V ( 10%. Pin 23 of the motor driver 7020 is 0V. Pin 19 of the motor driver 7020 Is 5V (10%. Put the processor out of reset to continue the measurement. Check MOT1 at pin 59 of CD10. The duty cycle of the output should be 50%. Check wave form at pin 11 of 7005-D : amplitude 5V + 5% duty cycle 50%. The motor driver 7020 can be measured dynamically by connecting a hall motor to the application panel. Apply a pulse of 1V 10Hz and 15% duty cycle to pin 22 (Ec) as input value with reference to pin 21 (Ecr=2.5V). Measure the output signals on the driver. This will give as response a square wave on pin 17 and pin 18. When a positive voltage is applied, the square wave on pin 17 will go ahead of the square wave on pin 18. All signals will have a value as shown in the truth table. Check the following output signals :
CL86S32086_052.ep«
Figure 8-23 .3.4 TDA7073A Power Drivers (7021, 7022) Description The TDA7073A is a dual power driver circuit for servo systems with a single supply. In this configuration it is used to drive the sledge, tray, focus and radial. Measurements Keep microprocessor 7202 in reset by forcing pin 7 of connector 1208 to +5V. Connect the power supply as described above in "1.1.1. Supply Voltages". Check the following voltages :
Pin 5 5 1 2 6 7 1 2 6 7
Location 7021 7022 7022 7022 7022 7022 7021 7021 7021 7021
Value 12V ±10% 12V ±10% 1.65V ±10% 1.65V ±10% 1.65V ±10% 1.65V ±10% 5.0 ±10% 5.0 ±10% 1.65V ±10% 1.65V ±10%
CL96532086_053.eps 080999
Figure 8-24
Faultfinding Guide
l i j » 1 zViflWMttM WEWRH MM-MM
Motor controller truth table
6 U+ L H M M H L Input conditions conn 1006 pin 4 7 3 8 VW+ V+ UM M H M M M M L M M H L M M L H M M M L M M M H 2 WM M M M M M 9 UCOIL 6V OV OV 6V OV 6V Outputs conn 1006 10 11 WCOIL VCOIL OV 0V 6V 6V 6V 0V 6V 0V 6V OV 6V 0V 18 HALL_U OV 5V Test points on driver 17 16 HALL V HALL W 5V OV OV 5V 5V 0V 5V 0V 0V 5V
CL96532086_055.eps 080999
Figure 8-26
Hall-elements input signal voltage levels
Input voltage H M L Level 2.8 2.5 2.2 Tolerance 0.1 0.1 0.1 Unit V V V
CL96532086_056.eps 080999
Figure 8-27 8.3.6 Tray Control Description The tray control consists of a TDA7073A power driver (7021) controlled by the processor 7202 via pin 19 TRAYIN and pin 20 TRAYOUT. If pin 20 is low and pin 19 high, the TRAY+ signal at pin 16 of 7021 is forced to +8V and the TRAY- signal at pin 13 of 7021 to GND : the tray will open. If pin 20 is high and pin 19 low, TRAY+ becomes GND and TRAY- becomes +8V : the tray will close. If pin 19 and 20 of the processor have the same value, TRAY+ and TRAY- will have the same value as well: the tray stops moving. Measurements Keep procesor7202 in reset by forcing pin 7 of connector 1208 to +5V. Connect a load of 15H, 7W between pin 3 and 4 of connector 1002. Check the voltage over the load with TRAY+ (pin 3) as positive reference. Check also the levels of pins 19 and 20 of the processor. U TRAY+.TRAY- = <100mV Pin 20 » +5V Pin 19 = +5V Force pin 20 of the processor to ground, and check the voltages. U TRAY+.TRAY- = -6.5V( 10% Pin 20 a +0V Pin19 = +5V Force pin 19 of the processor to ground as well and check the levels again. UTRAY+,TRAY- = <100mV Pin 20 = +0V Pin 19 = +0V Release pin 20 of the processor and check the levels. U TRAY+.TRAY- * 6.5V( 10% Pin 20 = +5V Pin 19 = +0V Release pin 19 of the processor and check the levels again: U TRAY+.TRAY- = <100mV Pin 20 = +5V Pin 19 = +5V
CDR775
8.3.7 HF Path
Faultfinding Guide
another amplification and filtering circuit. The filtering again is controlled by the S1 and S2 lines, dependant on whether the disc starts up (speed n=1, S1 and S2 Low), disc plays at speed n=1 (S1 Low, S2 High) or disc plays at speed n=2 (S1 and S2 High).
t The
Description pre-amplified HF-signal is presented to both n=1 and n=2 amplifier circuits. The mux/demux switches via software and micro processor controlled S1 and S2 lines between either one of the amplified n=1 or n=2 signals, The signal will then follow
DC Settings Set the power and reset connections as described above in "1.1.1. Supply Voltages". Check the following voltages ;
Force S1 S1 S1 S1 S1 S1 and and and and and and S2 "HIGH" S2 "LOW" S2 "HIGH" S2 "LOW" S2 "HIGH" S2 "LOW" Pin Emitter Collector Collector 13 13 3 3 Location 7006 7010 7010 7025 7025 7025 7025 Measure 2.4 ±10% 1.9 ± 1 0 % 1.9 ± 1 0 % 1.6 ±10% 1.6 ± 1 0 % 3.2 ± 1 0 % 3.2 ±10%
CL96S32O86_068.ep» 080989
Figure 8-29
Faultfinding Guide
Transfer Characteristics Set the power and reset connections as described above in "1.1.1. Supply Voltages". Connect a function generator via a serial resistor of 1k5 to pin 4 of connector 1000. Use the S1 and S2 "low" Input V.,, Pin 2 at 7000 200mV < 100mV±20% 200mV 295mV ± 20% 200mV 310mV±20% 200mV 385 mV ± 20% 200mV 655 mV ± 20% 200mV 1.1V ±20% 200mV 1.1V ±20%
HB3EE32SHH K 9 I
E l E S
function generator as a sine wave generator with output level of 1 Vtt. Check this AC value with an AC mV-meter connected to the input (pin 2) of the CD10 (7000):
Frequencies 300 Hz 10 kHz 100 kHz 300 kHz 800 kHz 1.5 MHz 3MHz
Input V.. 200mV 200mV 200mV 200mV 200mV 200mV 200mV
S1 and S2 "high" Pin 2 at 7000 <100mV±20% 330rnV ± 20% 330 mV ± 20% 335 mV ± 20% 485 mV ± 20% 760 mV ± 20% 1.1V ±20%
CL96532086_059.eps 080999
Figure 8-30 HFDET Setting Set the power and reset connections as described above in "1.1.1. Supply Voltages". Connect a function generator via a serial resistor of 1k5 to pin 4 of connector 1000. Use the function generator as a sine wave generator with output level of 500 kHz, 1 Vtt. Check this AC value with an AC mV-meter:
Location F190 F192 F206 NoHF 4.8V± 20% < 100mV 4.9V± 20%
Voltage DC HF 4.8V± 20% 1.1V±20% 150mV±20%
Voltage AC 175mV±20%
CL96532086_060.eps 080999
igure 8-31 8.3.8 Audio Part - DAC Description The DAC used, is the UDA1320 bit stream, continuous calibration. I2S signals from various formats can be entered at pins 1,2 and 3. If these signals are in phase with the delivered system clock at pin 6, the DAC will reproduce analog output signals at pins 14 and 16. OdB level is 0.85Vrms. These analog signals are at 1.65Vdc level. The DAC has features which can be checked on the input pins. Mute will switch off the analog signals. De-emphasis is not used, since this is done in the decoder. Attenuation of -12dB is not used because this is also done in the decoder. I2S I2S is a kind of digital audio format, consisting out of 3 lines : CLOCK, WORDSELECT and DATA. WORD-SELECT Word select (WS) indicates whether the data-sample is from the left or the right audio-channel. It has the same frequency as the sample rate of the digital audio signal. This can be 32, 44.1 or 48kHz. Normal polarity is low for a left sample and high for a right sample. So within the low state of the WS-line the data bits for the left channel are transferred, and within the high state the data bits of the right channel are transferred. CLOCK The CLOCK signal (CLK) indicates when DataTips must be set, and when DataTips must be read. The frequency depends on the speed of the l2S-bus, but is always a factor of the frequency of the WS-signal. It can be 48x, 64x, 96, 128x... .In our case it is 48x the sample rate frequency = 2.1168MHz. The signal is in phase with the WS-signal. Transition of the WS always happens on a falling edge of the CLK. DATA DATA contains all data-bits. Data bits are set by the transmitting device, and read by the receiving device. The position of the DATA-bits within the WS-signal is very important. There are several formats for this. In our case we always use Philips I2S format, no Japanese or Sony format. The number of data-bits per channel depends on the used devices. Timing of the l2S-bus, in case of Philips I2S is shown in the next figure :
CDR775
Measurements
Faultfinding Guide
Figure 8-33 Keep processor 7202 in reset by forcing pin 7 of connector 1208 to +5V. This puts the processor outputs in tristate. Check the reset at pin 4 of processor 7202 to make sure that the processor is in reset. Now, force port 0-4 pin 33 at 7202 to 0V to set the decoder outputs (SCLK, WCLK, DATA, and CL11). Check the MUTE pin 11 at 7309 : this pin should be low. Connect via an I2S generator l2S-signals to the DAC : Pin 1 at7309:SLCK. Pin 2 at 7309: WCLK. Pin 3 at 7309: DATA. Connect also the SYSCLK pin 6 at position 7309 to a clock signal of 11.2896 MHz (10Opprn. Generate an I2S signal equivalent with a sine wave of 1 kHz at OdB for both left and right channels. Check if 0.8 VRMS at pins 14 and 16 at location 7209 with a DC of 1.65VDC. Check if 1.7 VRMS ( 2 dB at connector pins land 3 at location 1209. Force MUTE Pin 11 at 7309 high. Measure again at pins 1 and 3 at location 1209 : both signals should be at -90 dB.
List of Abbreviations
CDR775
9. List of Abbreviations
SIGNAL NAME +12V +12VA +5V +5VA +9SRVPWR 12VPWR -8V -8VA A(1:20) A(10:20) At A1LF, A2LF A2 A-8V AEGER AINTON ALE ALPHAO ALS ASTROBE ATIP ATIPSYNC ATT B1LF, B2LF BCLK BE_RESET BIASC BKPT C1LF, .. , C 4 L F CAGAIN CAHF CALF CASO CAS1 CDR CDR60CFLG CDR60CL1 CDR60CS CDR60INT CDR60LWRT IC7300->IC7270 IC7270 -> R3717, R3722IC7270 -> IC7701 CONN1000->IC7010 IC7701 -> R3898A -> IC7300 IC7701 -> R3261 -> IC7270IC7701 -> R3716 IC7008 -> R3056 CONN1819, R3907 -> IC7701 CONN1000-> IC7010 R3016,R3115->IC7010 CONN1000 -> C2374 IC7010->IC7270 IC7701 -> IC7702 IC7701 ·> IC7702 IC7008 -> IC7355 IC7300 -> R3382B -> CONN1812 IC7300 -> R3382C -> CONN1812 IC7270 -> R3235B -> R3702, IC7300 IC7300 -> IC7270 IC7300 -> R3048 IC7008-> IC7010 IC7270->R3213->IC7209, IC7300IC7270 -> R3230 IC7270->IC7010 IC7008->IC70tO IC7008->IC7010 SIGNAL FLOW main supply voltage from PSU supply voltage main supply voltage from PSU supply voltage IC7558 ->- IC7240 supply voltage main supply voltage from PSU supply voltage IC7701 -> R3818.R3819, R3820, R3821, R3897 -> IC7703 IC7701 -> R3819, R3820, R3821 -> IC7702 IC7010->IC7270 CONN1000->IC7010 IC7010->IC7270 supply voltage FUNCTION AND DESCRIPTION +12V supply voltage from PSU +12V supply voltage for Audio part +5V supply voltage from PSU +5V supply voltage for Audio part PoWeR supply for SeRVo driver IC +12V supply voltage for servo part ·8V supply voltage from PSU -8V supply voltage for Audio part Address lines 1 to 20 between DASP and flash ROM Address lines 10 to 20 between DASP and DRAM amplitude of the "land" reflection relative to the average EFM, voltage output, OPC input satellite photo diodes A1, A2 current output amplitude of the "pit" reflection relative to the average EFM, voltage output, OPC input -8V supply voltage for servo part Analog Error signal GEnerator for Recordable Alpha INTegrator ON (to AEGER) Address Latch Enable; external address latch strobe line, freeze address when low analog voltage mode output from OPC D/A converter Alpha Loop Switch (to AEGER) Alpha STROBE (to AEGER) Absolute Time In Pre-groove (sync signal) ATIP SYNC signal ATTenuation request from MACE2 to audio DAC, active low; means that the output can be attenuated in case of search activities satellite photo diodes B 1 , B2 current output I2S1 BitCLocK from DASP to CDR60 (playback and record) Basic Engine RESET, active high BIAS Current switch CDRW output JTAG mode select / debug mode BreaKPoinT Central photo diodes C 1 , C2, C3, C4 current output set-point laser power on disc, current input Central Aperture (central photo diodes) High Frequency current output (C1+C2+C3+C4) Central Aperture (central photo diodes) Low-pass Filtered signal (DC coupled EFM signal), voltage output, OPC input Column Address Strobe DRAM for upper byte Column Address Strobe DRAM for lower byte CDR strategy detected output (active high) serial output of error corrector status information of the CDR60decoder, to be measured at test connector output of CLock signal for testing system clock of IC CDR60 at test connector CDR60 Chip Select, active high CDR60 INTerrupt line, active low CDR60 Laser WRiTe control output
CDR775
CDR60MEAS1
List of Abbreviations
serial output of information about jitter, PLL frequency and asymmetry of bit recovery block in CDR60, to be measured at test connector CDR60 clock multiplier enable, active high inverted CDR-strategy-detected signal system CLocK OUT oscillator output Hall feedback signal from sledge motor Hall feedback signal from sledge motor Chip Select for FLASH or boot device Chip Select SRAM, active low Databus bit 16 to 31 between DASP, flash ROM and DRAM +3.3V supply voltage for Digital part +5V supply voltage for Digital part +5V supply voltage for Servo part ALPHA error signal for laser power control Digital Audio Signal Processor
IC7300 -> R3382A -> CONN1812
CDR60PLL CDRW CLK_OUT CLK_SYS COSCOS+ CSFLASH CSRAM D(16:31) D3V3 D5V D5VS DALPHA DASP DATA I DATAO DEEMP DELTAP DIG_OUT_C DISPLAY_INT DMON DOBM_CD DOBM_CDR DRAM_RW DSA_ACK_CD DSA_ACK_CD R DSA_DATA_CD DSA_DATA_CD R DSA_STR_CD DSA_STR_CD R DSCLK DSI EFM
IC7270 -> R3305 -> IC7300 IC7355D -> IC7355CIC7355D -> CONN1000 IC7701 -> R3771 -> CONN1819 IC7701 -> R3727, R3731 CONN1220->IC7225B CONN1220->IC7225B IC7701 -> IC7703 IC7270 -> R3235A -> R3703, IC7802 IC7701 <-> R3822, R3823, R3824, R3825 <-> IC7703, IC7702 supply voltage supply voltage supply voltage IC7010->R3037
IC7701 -> R3898C ·> IC7300 IC7300-> R3314->IC7701 IC7270 -> R3719, R3724IC7270 -> IC7701 IC7016->R3126 IC7701 -> R3706 -> C2707, CONN1400 F 9 3 4 - > R 3 8 1 2 , IC7701 IC7270 -> R3324 CONN1708, C2731 -> R3757 -> R3903 > IC7701 IC7300 -> R3382D -> C2379, IC7701 IC7701 -> IC7702 IC7701 <-> R3830 <-> R3831 <-> CONN1708IC7701 <-> R3830 <-> C2735 IC7701 -> R3729 -> IC7270, CONN1830IC7701 ·> R3729 -> R3769 IC7701 <-> R3828 <-> R3829 <-> CONN1708IC7701 <-> R3828 <-> C2733 IC7270<->R3246 <-> R3813 <-> IC7701, CONN1830IC7270<->R3246 <-> R3767 IC7701 <-> R3835 <-> R3832 <-> CONN1708IC7701 <-> R3835 <->C2734 IC7270 -> R3245 -> IC7701, CONN1830IC7270 -> R3245 -> R3768 CONN1819, R3908 -> IC7701 CONN1819, R3909 -> IC7701
I2S1 DATA In from DASP to CDR60 (recording) I2S1 DATA Out from CDR60 to DASP (playback) DE-EMphasis control for audio DAC from MACE2, active high; means that de-emphasis is needed in digital filter DELTA Power current source drive signal from XDAC Common DIGital OUTput (consumer) DISPLAY INTerrupt power save at stop, active low Digital Output (EBU output) from CD player in CDR775 to DASP Digital Output (EBU output) from CDR60 to DASP ReadAVrite strobe for DRAM Data/Strobe/Acknowledge serial communication between DASP and CD-player in CDR775 Data/Strobe/Acknowledge serial communication between MACE2 and DASP for CDR; acknowledge input for MACE2 is strobe output for DASP Data/Strobe/Acknowledge serial communication between DASP and CD-player in CDR775 Data/Strobe/Acknowledge serial communication between MACE2 and DASP for CDR Data/Strobe/Acknowledge serial communication between DASP and CD-player in CDR775 Data/Strobe/Acknowledge serial communication between MACE2 and DASP for CDR (strobe output for MACE2 is acknowledge input for DASP) reset in / Debug Serial CLocK in JTAG reset in / Debug Serial clock In Eight to Fourteen Modulation = modulation method used for CD storage, also the actual raw CD signal as written or read on or from the CD disc
EFMCLK EFM DATA EFMTIM3 EPON EPONO EPONRC
IC7300 -> IC7008 IC7300 -> IC7008
EFM CLocK output EFM DATA output EFM TIMing generator
IC7008 -> R3010IC7008 -> C2010 IC7008->R3107 R3004-> CONN1000
Erase Power ON Erase Power ON Open drain output Erase Power ON (after RC circuit)
List of Abbreviations
ERASEC ERON EXT_DIG_IN1 EXT_DIG_IN2 EXTJDPTJN F_READY F_RW FEN FOCFOC+ FS30V FSA FSCLR FSOF FSON FSR FSRS FSW FSWS FWEN HALLJJ, HALL_V, HALL_W HFSO I2C I2C_CLK I2C_DATA IC7701, R3711 -> R3715 -> C2709 -> F934IC7701, R3711 -> IC7801 IC7701, R3712 <-> R3713 <-> C2708, R3714 <-> F934IC7701, R3712 <-> IC7801 R3248B -> IC7207, R3247C IC7207 -> IC7008IC7207 -> IC7010IC7207 -> R3248B IC7207 <-> IC7008IC7207 <-> IC7010IC7207 <-> R3248A R3248A < > IC7270.R3247D IC7701 -> R3814->IC7406 IC7701 -> R3894A -> IC7406 CONN1708, C2739 -> R3834 -> IC7701 CONN1708, C2739 -> R3834 -> IC7701 IC7406-> IC7701 IC7701 -> R3894C -> IC7406 CONN1708, C2738 -> R3836 -> IC7701 CONN1708, C2738 -> R3836 -> IC7701 IC7701 -> R3743 -> IC7406 IC7701 -> R3894B -> IC7406 CONN1708, C2740 -> R3833 -> IC7701 CONN1708, C2740 -> R3833 -> IC7701 IC7270->R3910, IC7701 T7121 ->CONN1000 IC7008 -> R3087 IC7008->IC7010 CONN1400->IC7701 CONN1702, C2767, C2721 -> R3701 >IC7701 CONN1400, C2722 -> R3708 -> IC7701 IC7703 -> R3817 -> IC7701CONN1701 > IC7701 IC7701 -> IC7708B IC7010->IC7270 IC7240-> CONN 1000 IC7240->CONN1000 D6500->CONN1000 CONN1000 -> T7119, T7120 IC7008->IC7126 IC7008 -> R3052 IC7008 -> R3051 R3040 -> IC7270 IC7008->IC7126D R3050-> IC7270 IC7008->IC7126C IC7270 -> IC7208, R3806 IC7330 -> IC7300, CONN1812
8MM*J!ljilg<^^^M K B
ERASE Current switch CDRW output ERrorON(toAEGER) EXTernal DIGital INput 1 EXTernal DIGital INput 2 (CDR950 only) EXTernal OPTical INput
la-Iali
Flash READY detection, this line is forced low as long as the flash is busy with erase or program algorithm ReadAA/rite strobe for Flash ROM Focus Error Normalized current output FOCus actuator drive signal negative connection FOCus actuator drive signal positive connection Forward Sense diode 30V power supply Forward Sense photo diode current output Forward Sense signals CLeaR switch Forward Sense photo diode sampling OFf Forward Sense photo diode sampling ON Forward Sense signal while Reading for read control loop Forward Sense photo diode Read Sampling Forward Sense signal while Writing for write control loop Forward Sense photo diode Write Sampling Flash EPROM Write ENable HALL feedback signals from turn table motor via hall motor driver
IC7270 -> R3249-> IC7360
select HF circuit Inter IC I2C CLocK line used for display slave processor and digital potmeter I2C DATA line used for display slave processor and digital potmeter
I2CL I2CSCL I2CSDA I2DA I2S_BCLK_AI I2S_BCLK_A0 I2S_BCLK_CD I2S_BCLK_MIC I2S_DATA_AI I2S_DATA_A0 I2S_DATA_CD I2S_DATA_MIC I2S_WS_AI I2S_WS_A0 I2S,,WS_CD I2S_WS_MIC I2S1_MS IE
I2C CLock line I2C Serial CLock line I2C Serial DAta line I2C DAta line I2S4 Bit CLocK for CODEC (ADC for CDR950) Analog Input (record from analog source) I2S2 Bit CLocK for CODEC (DAC for CDR950) Analog Output I2S3 Bit CLocK from CD player (record n=2) (CDR775 only) I2S3 Bit CLocK from MICrophone (CDR950 only) I2S4 DATA from CODEC (ADC for CDR950) Analog Input (record from analog source) I2S2 DATA for CODEC (DAC for CDR950) Analog Output I2S3 DATA from CD player (record n=2) (CDR775 only) I2S3 DATA from MICrophone (CDR950 only) I2S4 Word CLocK for CODEC (ADC for CDR950) Analog Input (record from analog source) I2S2 Word CLocK for CODEC (DAC for CDR950) Analog Output I2S3 Word CLocK from CD player (record n=2) (CDR775 only) I2S3 Word CLocK from MICrophone (CDR950 only) I2S1 Master-Slave interrupt from MACE2 laser Erase drive current signal
CDR775
INT_COPY_AN A IR IW KEY_PRESSE D KILL KILLJDUT L12V L3_CLK L3_DATA L3_MODE L5V L-5V LASCK LASDACCK LASDACDI LASDACLD LASDD LASLD LEFT LLP LWRT MA(16:17) MA(8:15) MACE2 MAD(0:7) MIRN MOTOI MRDN MUTE MWRN NMUTE OFFTRACK OPC P12VKILL PCS PCSCOS PCSSIN PDAR PERASE supply voltage
List of Abbreviations
select INTernal COPY ANAlog (in case of copy protected disc or track on CD drive) (CDR775 only) laser Read drive current signal laser Write drive current signal KEY PRESSED interrupt KILL signal from power supply part to audio outputs disables the KILL activity from the PSU; 1 = no kill.O = kill active +12V supply voltage for servo/Laser part L3 interface CLocK line / control CODEC (not for CDR950) L3 interface DATA line with CODEC (not for CDR950) L3 interface MODE line selects data or address transfer mode for CODEC (not for CDR950) +5V supply voltage for servo/Laser part -5V supply voltage for servo/Laser part ClocK line DAC LASer control ClocK line DAC LASer control Data line DAC LASer control LoaD line DAC LASer control Data line DAC LASer control LoaD line DAC LASer control audio output LEFT channel from CD-player in CDR775 Laser Low Power (active high), switches the laser from write to read power whenever the device tends to go offtrack Laser WRiTe control input bank switch higher address lines address bus high byte Mini All Cd Engine (minus decoder + OPC + PCS + extra RAM)
IC7701 -> R3721 -> IC7401IC7701 ·> R3721 -> R3410 T7135 -> CONN1000T7135 -> R3056T7135->IC7008 T7122 -> CONN1000T7122 -> D6003 IC7706B -> R3816 -> IC7701 T7560, T7561, R3560 -> CONN1400, R3424, R3428 IC7701 -> R3532 supply voltage IC7701 -> R3725 -> IC7406 IC7701 <-> R3728 <-> IC7406 IC7701 -> R3735 -> IC7406 supply voltage supply voltage IC7270 <-> R3248D R3248D<->IC7016 R3248C<-> IC7016 R3212<->IC7016 IC7270 <-> R3248C IC7270 <-> R3238 <-> R3212IC7270 <-> R3232 CONN1708, C2743 -> IC7401C, IC7407C IC7270 -> IC7300 R3048 -> IC7008 IC7270 <-> IC7208 IC7270 <-> IC7802 <-> IC7208
IC7270 <-> IC7209 <-> IC7802 <-> IC7208 <-> IC7300 IC7010-> IC7270 IC7300-> IC7355A IC7270 -> R3276 -> R3242A, IC7802, IC7300 IC7270 -> R3718, R3723IC7270 -> IC7701 IC7270 -> R3280 -> R3242B, IC7802, IC7300 IC7701 -> R3726, IC7406 IC7270->IC7300
bi-directional data bus / address bus low byte MIRror Normalized (disc reflection) current output turn table MOTOr control output Master ReaD, read strobe for external peripherals, active low MUTE control from MACE2 to DASP, active low Master WRite, write strobe for external peripherals, active low MUTE output, low active OFFTRACK detection flag Optimum Power Calibration +12V supply voltage for KILL-circuit Position Control Sledge
IC7225B, C2229 -> IC7270, CONN1812 IC7225A, C2227 -> IC7270, CONN1812
Position Control Sledge COS feedback signal Position Control Sledge SIN feedback signal Photo Diode Amplifier Recordable
R3036, R3031, R3030, R3029, R3028, R3027, R3020 -> IC7002C, R3043, T7113 IC7270 -> R3243C.R3556, R3538 IC7010->IC7050C
laser Power switch for ERASE
POWER_UP PPN
standby pin, high level activates essential powers necessary for full function; overrules HI_POWER setting Push-Pull signal, Normalized, balanced, voltage output
List of Abbreviations
PRCOARSE PRFINE PROF,,EBU PSENn PW PWB PWD PWMAX PWMIN PWRITE IC7016-> R3057 IC7016->R3058 IC7701 ->CONN1820
fetiM^fiiMIWM
E i
M-Mli
drive signal from Power Read COARSE DAC for read current source drive signal from Power Read FINE DAC for read current source PROFessional digital output (CDR950 only) Program Store ENable; external ROM output enable line, active low Write Power signal to OPC input of MACE2 drive signal to XDAC<->s for write and erase current sources and VCAGAIN drive signal from XDAC for write and erase current sources PW MAXimum signal from DAC used for determining set point for laser power during writing PW MINimum signal from DAC used for determining set point for laser power during writing laser Power switch for WRITE
IC7270 -> R3260 -> IC7208IC7270 -> R3231 R3081 -> IC7008 IC7001C->IC7016 IC7016 ·> IC7002BIC7016 -> IC7002C IC7016-> R3073 IC7016->R3072 R3035, R3026, R3025, R3024, R3023, R3022, R3021 -> IC7002B, R3044, T7124 IC7240-> CONN 1000 IC7240->CONN1000 IC7701 -> IC7702 IC7300->R3319-> IC7701 IC7008 -> R3054 IC7008 -> C2027 IC7008 -> C2060 IC7010->IC7215A IC7008->IC7010IC7008-> CONN1000IC7008 -> IC7355C IC7010->IC7270 CONN1708, C2742 -> IC7401 A, IC7407A CONN1818->IC7701 Referenve Voltage Reference Voltage IC7701 -> R3720 -> IC7407 IC7701 -> R3756 -> IC7300 CONN1220->IC7225A CONN1220->IC7225A IC7240 -> R3265 -> CONN1220 IC7240->CONN1220 IC7270 -> R3243B, IC7300 IC7270 -> R3807 -> R3887 -> IC7701 IC7701 - > R 3 7 1 0 - > IC7300 IC7701 -> R3732 -> IC7406 IC7701 -> R3894D-> IC7706A IC7706A -> R3815 -> CONN1708 IC7706A -> R3826 -> IC7270 IC7701 -> R3758 -> CONNF934IC7701 > R3770 -> T7707 -> CONN 1708 CONN1819 -> R3906, IC7701 IC7701 ->CONN1819 IC7270<->CONN1818 IC7010->IC7270 IC7240->CONN1200 IC7240->CONN1200
RADRAD+ RASO RCK RDGAIN1 RDGAIN2 RDGAIN3 RE RECORDING REN RIGHT RXDJTOOL S1V65 S2V9 SEL_HP_OUT SFSY SINSIN+ SLSL+ SRSTN STANDBY SUB SYS_CLK_11W SYS_CLK_16W SYS_CLK_8W SYS_CLK_BE SYS_RESET TCK TDSO TERMB TLN TRTR+
Radial actuator drive signal negative connection Radial actuator drive signal positive connection Row Address Strobe DRAM EIAJ subcode clock from CDR60 to DASP (CD text interface) forward sense ReaD GAIN switch 1 forward sense ReaD GAIN switch 2 forward sense ReaD GAIN switch 3 Radial Error signal for fast track counting, voltage output RECORDING output (active high) Radial Error Normalized current output audio output RIGHT channel from CD-player in CDR775 Receive of UART for test TOOL 1.65V delivered by IC7215B for Servo part 2.9V delivered by IC7010 for Servo part SELect Headphone OUTput in DJ-mode (for CDR775 only) EIAJ subcode synchronisation from DASP to CDR60 (CD text interface) Hall feedback signal from sledge motor Hall feedback signal from sledge motor SLedge motor drive signal negative connection SLedge motor drive signal positive connection Slave ReSeT out (CDR60 reset), active low STANDBY pin, high level activates essential powers necessary for full function;