Text preview for : clevo d900t Service manual_Part4.pdf part of Clevo D900T Service Manual for Clevo D900T Notebook (Alienware M7700)



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Schematic Diagrams

Clock Generator
CKVDD L90 1 2 HCB-2012K-121T30 C587 C588 0.1UF 10UF(0805) C562 1UF(0603) C570 0.1UF C578 0.1UF C580 0.01UF C566 0.01UF U6 42 21 28 34 37 VDDCPU VDDSRC VDDSRC VDDSRC VDDA REFOUT 52 REFOUT R108 R110 R111 R113 RP12 1 2 1 2 RP13 +3VS L89 1 2 HCB1608K-121T25 C555 0.1UF 38 2 6 13 29 45 51 C VTT1.2VS VCORE R420 R416 220(R) 220 C586 0.01UF(R) B E Q31 2N3904 R421 1K(R) 17 Vtt_PwrGd#/PD SRCCLK4_SATA SRCCLK#4_SATA# 26 27 SRCCLK4 SRCCLK#4 RP19 4 3 4P2RX33 SRCCLK_SATA 1 SRCCLK_SATA# 2 11 VDD48 CPUCLK2_ITP/SRCCLK7 CPUCLK#2_ITP/SRCCLK#7 GNDA GND GND GND GND GND GND 36 35 CPUCLK2 CPUCLK#2 RP16 1 2 ICHCLK14 33 33(R) CODECCLK14 33 33 USBCLK48 SIOCLK48

+3VS

ICHCLK1411 CODECCLK14 24 USBCLK4811 SIOCLK4821 CPUCLK4 CPUCLK#4 MCHCLK5 MCHCLK#5

ICHCLK14 USBCLK48
SIOCLK48 PCLKLAN PCLK1394 PCLKH8 PCLKPCM PCLKICH PCLKMINI1

C537 C550 C554 C521 C522 C528 C534 C540 C532 C527 C525 C515

10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R) 10PF(R)

USB_48MHz

12

USBCLK

+3VS C518 0.1UF

L84 1 2 HCB-2012K-121T30 C517 10UF(0805) C535 0.1UF C547 0.01UF C548 0.01UF

1 7 48

VDDPCI VDDPCI VDDREF

CPUCLK0 CPUCLK#0 CPUCLK1 CPUCLK#1

44 43 41 40

CPUCLK0 CPUCLK#0 CPUCLK1 CPUCLK#1

4P2RX33 CPUCLK 4 CPUCLK# 3 4 3 MCHCLK MCHCLK#

4P2RX33 4P2RX33 ITPCLK 4 ITPCLK# 3

ITPCLK4 ITPCLK#4

PCLKSIO PCLKMINI2 PCLK_RAID

B.Schematic Diagrams

10PF(R)

+3VS

R422

1K

SRCCLK1 SRCCLK#1 SRCCLK2 SRCCLK#2 SRCCLK3 SRCCLK#3

19 20 22 23 24 25

SRCCLK1 SRCCLK#1 SRCCLK2 SRCCLK#2 SRCCLK3 SRCCLK#3

RP15 4 3 RP17 4 3 RP18 4 3

4P2RX33 SRCCLK_MCH 1 SRCCLK_MCH# 2 4P2RX33 SRCCLK_ICH 1 SRCCLK_ICH# 2 4P2RX33 SRCCLK_VGA 1 SRCCLK_VGA# 2

SRCCLK_MCH 5 SRCCLK_MCH# 5 SRCCLK_ICH 11 SRCCLK_ICH# 11 SRCCLK_VGA13 SRCCLK_VGA#13

CPUCLK CPUCLK# MCHCLK MCHCLK#

C942 C943 C944 C945

10PF(R) 10PF(R) 10PF(R) 10PF(R)

Sheet 2 of 37 Clock Generator

SRCCLK_SATA11 SRCCLK_SATA#11

CPUCLK CPUCLK# MCHCLK

R382 R386 R392 R397 R403 R412 R395 R400 R399 R404 R413 R415 R426 R423 R387 R394

33_1% 33_1% 33_1% 33_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1% 51.1_1%

8,9,11,19,26 SMBDATA 8,9,11,19,26 SMBCLK C557 100PF(R) C552 100PF(R)

SMBDATA SMBCLK

47 46

SDATA SCLK

SRCCLK5 SRCCLK#5 SRCCLK6 SRCCLK#6

31 30 33 32 14 15

SRCCLK5 SRCCLK#5 SRCCLK6 SRCCLK#6 DOT_96 DOT_96# RP14 4 3 4P2RX33(R) DOTCLK 1 DOTCLK# 2

MCHCLK# ITPCLK ITPCLK# SRCCLK_MCH

C530 20PF 2 X1 14.31M C529 20PF

50

X1

DOT_96MHz DOT#_96MHz

DOTCLK5 DOTCLK#5

SRCCLK_MCH# SRCCLK_ICH

49

X2

PCICLK2 PCICLK3 PCICLK4 PCICLK5 ITP_EN/PCICLK_F0

56 3 4 5 8 9 10 54 55

PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK_F0 PCICLK_F1 PCICLK_F2 PCICLK0 PCICLK1

R98 R99 R101 R105 R367 R109 R375 R103 R100 R703

33 33 33 33 33 33 33 33 33 33

PCLKLAN PCLK1394 PCLKH8 PCLKPCM PCLK_RAID PCLKICH PCLKSIO PCLKMINI1 PCLKMINI2 PCLK_FWH

PCLKLAN 19 PCLK1394 18 PCLKH823 PCLKPCM16 PCLK_RAID20 PCLKICH11 PCLKSIO21 PCLKMINI1 28 PCLKMINI2 28
PCLK_FWH 21

SRCCLK_ICH# SRCCLK_VGA SRCCLK_VGA# SRCCLK_SATA SRCCLK_SATA# DOTCLK DOTCLK#

R405

1 475_1%

39

IREF PCICLK_F1 FS_A PCICLK_F2 FS_B/TEST_MODE PCICLK0 FS_C/TEST_SEL PCICLK1 ICS954101DG(ICS954141AF)

4 4 4

FSBSEL0 FSBSEL1 FSBSEL2

R385 R378 R377

8.2K 8.2K 8.2K

18 16 53

P.U --> Pin35/36 For ITPCLK P.D --> Pin35/36 For SRCCLK7
VTT1.2VS VTT1.2VS 3,4,5,7,12,30 +3VS

+3VS

4,8,9,11,12,13,14,15,18,19,20,21,23,24,26,28,30,31

Clock Generator (71-D90T0-D05) B - 3

Schematic Diagrams

CPU-1 Host/Power
U24A 5 HA[3..16] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HADSTB#0 HPCREQ# HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AD5 D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 HBR#0 TESTHI8 TESTHI9 TESTHI10 F3 G3 G4 H5 J16 H15 H16 J17 HGTLREF CPURST# C80 22PF 5 5 5 RS#0 RS#1 RS#2 RS#0 RS#1 RS#2 H1 G23 B3 F5 A3 A03# A04# A05# A06# A07# A08# A09# A10# A11# A12# A13# A14# A15# A16# RSVD RSVD REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0# PC_REQ# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1# ADS# BNR# HIT# RSP# BPRI# DBSY# DRDY# HITM# IERR# INIT# LOCK# TRDY# BINIT# DEFER# EDRDY# MCERR# AP0# AP1# BR0# TESTHI08 TESTHI09 TESTHI10 DP0# DP1# DP2# DP3# GTLREF RESET# RS0# RS1# RS2# CPU LGA775-P4 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0# B4 HD0 C5 HD1 A4 HD2 C6 HD3 A5 HD4 B6 HD5 B7 HD6 A7 HD7 A10 HD8 A11 HD9 B10 HD10 C11 HD11 D8 HD12 B12 HD13 C12 HD14 D11 HD15 A8 DBI#0 C8 HDSTBN#0 B9 HDSTBP#0 HD[0..15] 5 VCORE U24C AA8 AB8 AC23 AC24 AC25 AC26 AC27 AC28 AC29 AC30 AC8 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD8 AE11 AE12 AE14 AE15 AE18 AE19 AE21 AE22 AE23 AE9 AF11 AF12 AF14 AF15 AF18 AF19 AF21 AF22 AF8 AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30 AG8 AG9 AH11 AH12 AH14 AH15 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30 AL8 AL9 AM11 AM12 AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30 AM8 AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 AN25 AN26 AN29 AN30 AN8 AN9 J10 J11 J12 J13 J14 J15 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J8 J9 K23 K24 K25 K26 K27 K28 K29 K30 K8 L8 M23 M24 M25 M26 VCORE VCORE U24D VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC M27 M28 M29 M30 M8 N23 N24 N25 N26 N27 N28 N29 N30 N8 P8 R8 T23 T24 T25 T26 T27 T28 T29 T30 T8 U23 U24 U25 U26 U27 U28 U29 U30 U8 V8 W23 W24 W25 W26 W27 W28 W29 W30 W8 Y23 Y24 Y25 Y26 Y27 Y28 Y29 Y30 Y8 VCORE

HOST DATA

5

5 HREQ#0 5 HREQ#1 5 HREQ#2 5 HREQ#3 5 HREQ#4 5 HADSTB#0 5 HPCREQ# HA[17..31]

DBI#0 5 HDSTBN#0 5 HDSTBP#0 5 HD[16..31] 5

HOST ADDRESS

B.Schematic Diagrams

Sheet 3 of 37 CPU Host/Power 1 of 2
VTT1.2VS

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1#

G9 HD16 F8 HD17 F9 HD18 E9 HD19 D7 HD20 E10 HD21 D10 HD22 F11 HD23 F12 HD24 D13 HD25 E13 HD26 G13 HD27 F14 HD28 G14 HD29 F15 HD30 G15 HD31 G11 DBI#1 G12 HDSTBN#1 E12 HDSTBP#1

DBI#1 5 HDSTBN#1 5 HDSTBP#1 5 HD[32..47] 5

5 5 5 5 5 5 5 5 5 5 5 5

HADSTB#1 HADS# BNR# HIT# BPRI# DBSY# DRDY# HITM#

HADSTB#1 HADS# BNR# HIT# BPRI# DBSY# DRDY# HITM# IERR# HLOCK# HTRDY# DEFER# EDRDY#

R43 11 HINIT# C71 33PF

62 HINIT#

HOST DATA

HLOCK# HTRDY# DEFER# EDRDY#

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2#

G16 HD32 E15 HD33 E16 HD34 G18 HD35 G17 HD36 F17 HD37 F18 HD38 E18 HD39 E19 HD40 F20 HD41 E21 HD42 HD43 F21 G21 HD44 E22 HD45 D22 HD46 G22 HD47 D19 DBI#2 G20 HDSTBN#2 G19 HDSTBP#2

CPU LGA775-P4

DBI#2 5 HDSTBN#2 5 HDSTBP#2 5 HD[48..63] 5

VCORE

VTT_OL 5 HBR#0 VTT_OL

R58 R57 R59 R63

62 62 62 62

C75 R66 62

220PF

VTT_OR 4,5 CPURST#

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3#

D20 HD48 D17 HD49 A14 HD50 C15 HD51 C14 HD52 HD53 B15 C18 HD54 B16 HD55 A17 HD56 B18 HD57 C21 HD58 B21 HD59 B19 HD60 A19 HD61 A22 HD62 B22 HD63 C20 DBI#3 A16 HDSTBN#3 C17 HDSTBP#3

CPU LGA775-P4 C348 VCORE 10UF(0805) 10UF(0805) 10UF(0805) 10UF(0805) 10UF(0805) 10UF(0805) C345 C346 C347 C369 C370

C371 10UF(0805)

C359 10UF(0805)

C368 10UF(0805)

C358 10UF(0805)

C357 10UF(0805)

C344 VCORE 10UF(0805)

C372 VCORE DBI#3 5 HDSTBN#3 5 HDSTBP#3 5 C70 10UF(0805) C62 10UF(0805) C61 10UF(0805) C60 10UF(0805) C69 10UF(0805) C68 VCORE 10UF(0805) 10UF(0805)

C57 10UF(0805)

C25 10UF(0805)

C54 10UF(0805)

C55 10UF(0805)

C56 10UF(0805)

VTT_OL

PLEASE COLSE TO Pin-H1
VCORE R55 100_1% R56 210_1% HGTLREF C74 1UF_X7R VTT_OR VTT_OR VTT_OL VTT_OL 4 4 VTT1.2VS VTT1.2VS 2,4,5,7,12,30 C811 0.1UF(0402) C813 0.1UF(0402) C815 0.1UF(0402) C812 0.1UF(0402) 1 1 1 1 C814 0.1UF(0402) C816 0.1UF(0402) C820 0.1UF(0402) 2 VCORE

C67 10UF(0805)

C66 10UF(0805)

C303 10UF(0805)

C304 10UF(0805)

C305 10UF(0805)

C78 10UF(0805)

C72 0.01UF_X7R

+ C23 470UF/2.5V 2

+ C22 470UF/2.5V 2

+ C21 470UF/2.5V 2

+ C76 470UF/2.5V

C77 10UF(0805)

B - 4 CPU-1 Host/Power (71-D90T0-D05)

Schematic Diagrams

CPU-2 GTL+ / GND
VCCA_VSSA_VCOREPLL Trace width donesn't less than 12 Mil
VTT1.2VS L31 VCCA C89 C90 1 10U2012K-500T40 1UF(0603) 10UF(0805) 22UF VSSA 2 + C91 R68 0(R) 11 11 11 11 11 11 11 CPU_SMI# K_A20M# FERR# INTR NMI IGNNE# STPCLK# VCCA VSSA VCOREPLL RP51 8 7 6 5 R247 R248 8P4RX680_0402 VID3 1 2 VID1 3 VID2 4 VID0 680 VID4 680 VID5 VID0 VID1 VID2 VID3 VID4 VID5 CPUCLK CPUCLK# CPU_SMI# K_A20M# FERR# INTR NMI IGNNE# STPCLK# P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23 AM2 AL5 AM3 AL6 AK4 AL4 AM5 F28 G28 AE8 VTT_OR C821 10UF(0805) C822 0.1UF(0402) C36 C823 0.01UF(0402) 1000PF 1000PF C34 VCORE THERMDA THERMDC AL1 AK1 AN3 AN4 AN5 AN6 F29 AD1 AF1 AC1 AJ2 AJ1 AD2 AG2 AF2 AG3 AE1 AG1

As close as possible to CPU socket

2 2 2

FSBSEL0 FSBSEL1 FSBSEL2

FSBSEL0 FSBSEL1 FSBSEL2

R319 R70 R323

10K 10K 10K

BSEL0 BSEL1 BSEL2

BSEL0 BSEL1 BSEL2

5 5 5 CPUPWROK PROCHOT# THERMTRIPA# FERR#

C31 R14 R16 R53 R50

1000PF 100 120(R) 62 62 VTT_OL VTT_OR VTT1.2VS A12 A15 A18 A2 A21 A24 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF30 AF3 AF6 AF7 AG10 AG13 AG16 AG17 AG20

U24E VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VID7/VSS VSS VSS VSS VSS VSS VSS AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AM7 AN1 AN10 AN13 AN16 AN17 AN2 AN20 AN23 AN24 AN27 AN28 AN7 B1 B11 B14 B17 B20 B24 B5 B8 C10 C13 C16 C19 C22 C24 C4 C7 D12 D15 D18 D21 D24 D3 D5 D6 D9 E11 E14 E17 E2 E20 E25 E26 E27 E28 E29 E8 F10 F13 F16 F19 F22 F4 F7 G1 H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29

U24F VSS VSS VSS VSS VSS VIDSELECT VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS GTLREF_SEL CPU LGA775-P4 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H3 H6 H7 H8 H9 J4 J7 K2 K5 K7 L23 L24 L25 L26 L27 L28 L29 L30 L3 L6 L7 M1 M7 N3 N6 N7 P23 P24 P25 P26 P27 P28 P29 P30 P4 P7 R2 R23 R24 R25 R26 R27 R28 R29 R30 R5 R7 T3 T6 T7 U1 U7 V23 V24 V25 V26 V27 V28 V29 V30 V3 V6 V7 W4 W7 Y2 Y5 Y7

U24B SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD VCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 RSVD BCLK0 BCLK1 SKTOCC# THERMDA THERMDC VCC_SENSE VSS_SENSE RSVD RSVD VTT_PKGSENSE/RSVD TDI TDO TMS BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# TCK TRST# BOOTSELECT LL_ID0 LL_ID1 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTTPWRGD VTT_OUT VTT_OUT VTT_SEL RSVD RSVD RSVD RSVD RSVD RSVD NC NC NC NC NC NC Y1 BOOTSEL R46 V2 LL_ID0 AA2 A25 A26 A27 A28 A29 A30 B25 B26 B27 B28 B29 B30 C25 C26 C27 C28 C29 C30 D25 D26 D27 D28 D29 R74 D30 R73 AM6 AA1 J1 F27 R321 N5 AE6 C9 G10 D16 A20 D43 E23 E24 F23 H2 J2 J3 THERMTRIPA# C A F01J2E 62(R) LL_ID0 29 TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHI06 TESTHI07 RSVD RSVD SLP# RSVD PWRGOOD PROCHOT# THERMTRIP# COMP0 COMP1 COMP2 COMP3 F26 W3 P1 W2 F25 G25 G27 G26 G24 F24 AK6 G6 L2 AH2 N1 AL2 M2 A13 T1 G2 R1 TESTHI0 TESTHI1 TESTHI11 TESTHI12 R65 R44 R51 R45 62 62 62 62 VTT1.2VS

VTT_OL

C82 L29 10U2012K-500T40 1UF(0603) VCOREPLL

TESTHI2_7 R72 RSVD AK6 R3 RSVD G6 R62 C73 CPUSLP# CPUPWROK PROCHOT# THERMTRIPA# COMP0 COMP1 COMP2 COMP3 R67 R48 R60 R47

62 62(R) 62(R) 33PF

VTT1.2VS VTT_OR VTT_OL

29

VID[0..5]

CPUSLP# 11 CPUPWROK 11 THERMTRIPA# 11

VTT_OR

2 2

CPUCLK CPUCLK#

60.4_1% 60.4_1% 100_1% 100_1% C59 VTT_OR

B.Schematic Diagrams

Place outside of CPU socket
VTT_OL 0.1UF_X7R

VCORE

VTT1.2VS

VTT_PKGSENSE
VTT_OL C824 10UF(0805) C825 0.1UF(0402) C826 0.01UF(0402) VTT_OR R38 R34 R39 R28 R20 R36 R30 R35 R29 R37 R27 VTT_OR VTT_OL 11 VTT_OL VTT1.2VS VTT1.2VS 2,3,5,7,12,30 VDD3 VDD3 +3VS +3VS 2,8,9,11,12,13,14,15,18,19,20,21,23,24,26,28,30,31 12,13,15,17,23,25,31,32 VTT1.2VS 3 ITPCLK ITPCLK# SYS_RST# R18 R19 R320 R71 R322 0 0 470 470 470 3 51_1% 51_1% 51_1% 51_1% 51_1% 51_1% 51_1% 51_1% 51_1% 51_1% 680_1% TDI TDO TMS BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 TCK TRST#

Sheet 4 of 37 CPU GTL+ / GND 2 of 2

VTT_OR

VTT1.2VS R589 2.43K 0 0 A C941 0.01UF F01J2E VTT_OR VTT_OL 1K(R) +3VS VDD3 D42 C VTT1.2VS_PWRGD 29,30

SYS_RST# AC2 H_ITPCLK H_ITPCLK# FSBSEL0 FSBSEL1 FSBSEL2 AK3 AJ3 G29 H30 G30 AC4 AE3 AE4 D1 D14 E5 E6 E7 F6 B13 T2 V1 W1 Y3

DBR# ITP_CLK0 ITP_CLK1 BSEL0 BSEL1 BSEL2 RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD CPU LGA775-P4

R64 1K

CPU LGA775-P4

THERMTRIP# 23

VDD3 R592 R593 23 THERMER_RST Q44G 2N7002 S C38 R266 22(0805) D 0.1U U2 THERMDA 10 MILE THERMDC 10 MILE C35 2200P 1 2 3 4 VDD SCLK D+ SDATA DALERT# THERM# GND ADM1032ARM R256 D7 VDD3 C R12 10K F01J2E(R) A DD_ON 23,26,31 0 8 7 6 5 TMP_SMCLK TMP_SMDATA 0(R) TMP_SMCLK 15,23 TMP_SMDATA 15,23 CPU_ALERT# 23 R261 20K 4.7K 4.7K

VTT1.2VS C827 10UF(0805) C829 10UF(0805) VTT1.2VS C831 0.1UF(0402) C832 0.1UF(0402) C834 0.1UF(0402) C836 0.01UF(0402) C828 10UF(0805) C830 10UF(0805)

ITP_STPWR R289 FBI R287

1.5K C833 0.1UF(0402) 220(R) C835 0.01UF(0402)

JITP1 BPM#0 BPM#1 BPM#4 BPM#5 R286 TCK ITPCLK ITPCLK# 1 3 5 7 9 11 13 15 17 19 21 23 25 1 3 5 7 9 11 13 15 17 19 21 23 25 *ITP 2 4 6 8 10 12 14 16 18 20 22 24 26 2 4 6 8 10 12 14 16 18 20 22 24 26

FPRST# FPRST# TDI TMS TRST# TCK FBI ITP_STPWR TDO R280

R278

10K(R)

+3VS

1 + C837 220UF/2.5V 2

0 SYS_RST#

R255

3,5 2 2

CPURST# ITPCLK ITPCLK#

1K

ITP_RST#

CPU-2 GTL+ / GND (71-D90T0-D05) B - 5

Schematic Diagrams

GMCH-1 Host/ PCI-E/ DMI
13 PCIE_TXP[0..15] 13 PCIE_TXN[0..15] U7A 3 HA[3..31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HADSTB#0 HADSTB#1 H29 K29 J29 G30 G32 K30 L29 M30 L31 L28 J28 K27 K33 M28 R29 L26 N26 M26 N31 P26 N29 P28 R28 N33 T27 T31 U28 T26 T29 F33 E32 H31 G31 F31 J31 N27 HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31# HREQ0# HREQ1# HREQ2# HREQ3# HREQ4# HADSTB0# HADSTB1# HDSTBP0 HDSTBN0# HDINV0# HDSTBP1 HDSTBN1# HDINV1# HDSTBP2 HDSTBN2# HDINV2# HDSTBP3 HDSTBN3# HDINV3# HADS# HBNR# HBPRI# HBREQ0# HCPURST# HDBSY# HDEFER# HDRDY# HEDRDY# HHIT# HHITM# HLOCK# HPCREQ# HRS0# HRS1# HRS2# HTRDY# GRANTSDALE(DDR2) HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63# HXSWING HXSCOMP HXRCOMP HVREF HCLKINP HCLKINN J33 H33 J34 G35 H35 G34 F34 G33 D34 C33 D33 B34 C34 B33 C32 B32 E28 C30 D29 H28 G29 J27 F28 F27 E27 E25 G25 J25 K25 L25 L23 K23 J22 J24 K22 J21 M21 H23 M19 K21 H20 H19 M18 K18 K17 G18 H18 F17 A25 C27 C31 B30 B31 A31 B27 A29 C28 A28 C25 C26 D27 A27 E24 B25 A23 D24 B23 A24 M23 M22 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 HSWNG HSCOMP HRCOMP MCH_GTLREF MCHCLK MCHCLK# HD[0..63] 3 13 PCIE_RXN[0..15] 13 PCIE_RXP[0..15] PCIE_TXP[0..15] PCIE_TXN[0..15] PCIE_RXP[0..15] PCIE_RXN[0..15] PCIE_RXP0 PCIE_RXN0 PCIE_RXP1 PCIE_RXN1 PCIE_RXP2 PCIE_RXN2 PCIE_RXP3 PCIE_RXN3 PCIE_RXP4 PCIE_RXN4 PCIE_RXP5 PCIE_RXN5 PCIE_RXP6 PCIE_RXN6 PCIE_RXP7 PCIE_RXN7 PCIE_RXP8 PCIE_RXN8 PCIE_RXP9 PCIE_RXN9 PCIE_RXP10 PCIE_RXN10 PCIE_RXP11 PCIE_RXN11 PCIE_RXP12 PCIE_RXN12 PCIE_RXP13 PCIE_RXN13 PCIE_RXP14 PCIE_RXN14 PCIE_RXP15 PCIE_RXN15 DMI_RXP0 DMI_RXN0 DMI_RXP1 DMI_RXN1 DMI_RXP2 DMI_RXN2 DMI_RXP3 DMI_RXN3 E11 F11 J11 H11 F9 E9 F7 E7 B3 B4 D5 E5 G6 G5 H8 H7 J6 J5 K8 K7 L6 L5 P10 R10 M8 M7 N6 N5 P7 P8 R6 R5 U5 U6 T9 T8 V7 V8 V10 U10 A11 B11 K13 J13 4 4 4 HRCOMP R396 +1.5VS R383 20_1% R402 1K(R) M-TYPE R398 1K +1.5VS M-TYPE 1K(R) BSEL0 BSEL1 BSEL2 BSEL0 BSEL1 BSEL2 H16 E15 D17 M16 F15 C15 A16 B15 C14 K15 L10 AN19 AL28 AJ14 AH24 AG6 AD30 P30 L19 L12 K12 J12 H17 H15 H12 G12 F24 F12 E16 C16 AJ21 AK21 AK24 AL21 AL20 AK18 AJ24 AJ23 AJ18 AJ20 U7D EXPARXP0 EXPARXN0 EXPARXP1 EXPARXN1 EXPARXP2 EXPARXN2 EXPARXP3 EXPARXN3 EXPARXP4 EXPARXN4 EXPARXP5 EXPARXN5 EXPARXP6 EXPARXN6 EXPARXP7 EXPARXN7 EXPARXP8 EXPARXN8 EXPARXP9 EXPARXN9 EXPARXP10 EXPARXN10 EXPARXP11 EXPARXN11 EXPARXP12 EXPARXN12 EXPARXP13 EXPARXN13 EXPARXP14 EXPARXN14 EXPARXP15 EXPARXN15 DMIRXP0 DMIRXN0 DMIRXP1 DMIRXN1 DMIRXP2 DMIRXN2 DMIRXP3 DMIRXN3 GCLKINP GCLKINN SDVOCTRLDATA SDVOCTRLCLK BSEL0/NOA0 BSEL1/NOA1 BSEL2/NOA2 NOA3 NOA4 MTYPE/NOA5 EXP_SLR/NOA6 NOA7 NOA8 NOA9 DREFSSCLKINP NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD CRTHSYNC CRTVSYNC CRTRED CRTGREEN CRTRBLUE CRTREDB CRTGREENB CRTRBLUEB CRTDOCDATA CRTDOCCLK DREFCLKINP DREFCLKINN CRTREF NC NC NC NC NC NC NC NC NC NC RMEXTTS# PMBMBUSY# TESTIN# RSTIN# PWORK ICH_SYNC# MCHDETECT RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD E12 D12 F14 D14 H14 G14 E14 J14 L14 M15 M13 M12 A15 AR35 AR34 AR2 AR1 AP35 AP1 B35 B1 A34 A2 K16 G16 R35 AF7 AG7 M14 A35 V30 U30 Y30 AB29 R31 R30 AA31 AA30 R419 10K R427 R428 0 R114 R401 10K 10K EXPATXP0 EXPATXN0 EXPATXP1 EXPATXN1 EXPATXP2 EXPATXN2 EXPATXP3 EXPATXN3 EXPATXP4 EXPATXN4 EXPATXP5 EXPATXN5 EXPATXP6 EXPATXN6 EXPATXP7 EXPATXN7 EXPATXP8 EXPATXN8 EXPATXP9 EXPATXN9 EXPATXP10 EXPATXN10 EXPATXP11 EXPATXN11 EXPATXP12 EXPATXN12 EXPATXP13 EXPATXN13 EXPATXP14 EXPATXN14 EXPATXP15 EXPATXN15 DMITXP0 DMITXN0 DMITXP1 DMITXN1 DMITXP2 DMITXN2 DMITXP3 DMITXN3 EXPACOMPO EXPACOMPI C10 C9 A9 A8 C8 C7 A7 A6 C6 C5 C2 D2 E3 F3 F1 G1 G3 H3 H1 J1 J3 K3 K1 L1 L3 M3 M1 N1 N3 P3 P1 R1 R3 T3 T1 U1 U3 V3 V5 W5 Y10 W10 PCIE_TXP0 PCIE_TXN0 PCIE_TXP1 PCIE_TXN1 PCIE_TXP2 PCIE_TXN2 PCIE_TXP3 PCIE_TXN3 PCIE_TXP4 PCIE_TXN4 PCIE_TXP5 PCIE_TXN5 PCIE_TXP6 PCIE_TXN6 PCIE_TXP7 PCIE_TXN7 PCIE_TXP8 PCIE_TXN8 PCIE_TXP9 PCIE_TXN9 PCIE_TXP10 PCIE_TXN10 PCIE_TXP11 PCIE_TXN11 PCIE_TXP12 PCIE_TXN12 PCIE_TXP13 PCIE_TXN13 PCIE_TXP14 PCIE_TXN14 PCIE_TXP15 PCIE_TXN15 DMI_TXP0 DMI_TXN0 DMI_TXP1 DMI_TXN1 DMI_TXP2 DMI_TXN2 DMI_TXP3 DMI_TXN3 GRCOMP R438

B.Schematic Diagrams

Sheet 5 of 37 GMCH Host/ PCI-E/ DMI 1 of 2

3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3,4 3 3 3 3 3 3 3 3 3 3 3 3

HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4 HADSTB#0 HADSTB#1 HDSTBP#0 HDSTBN#0 DBI#0 HDSTBP#1 HDSTBN#1 DBI#1 HDSTBP#2 HDSTBN#2 DBI#2 HDSTBP#3 HDSTBN#3 DBI#3 HADS# BNR# BPRI# HBR#0 CPURST# DBSY# DEFER# DRDY# EDRDY# HIT# HITM# HLOCK# HPCREQ# RS#0 RS#1 RS#2 HTRDY#

HOST INTERFACE

VTT1.2VS

PCI EXPRESS x16

R376 60.4_1% HSCOMP

HDSTBP#0 E33 HDSTBN#0 E35 E34 DBI#0 HDSTBP#1 H26 HDSTBN#1 F26 J26 DBI#1 HDSTBP#2 J19 HDSTBN#2 F19 K19 DBI#2 HDSTBP#3 B29 HDSTBN#3 C29 B26 DBI#3 HADS# BNR# BPRI# HBR#0 CPURST# DBSY# DEFER# DRDY# EDRDY# HIT# HITM# HLOCK# HPCREQ# RS#0 RS#1 RS#2 HTRDY# M31 M35 E30 R33 G24 L35 J35 M32 P33 L34 N35 L33 E31 K34 P34 J32 N34

11 11 11 11 11 11 11 11

DMI_RXP0 DMI_RXN0 DMI_RXP1 DMI_RXN1 DMI_RXP2 DMI_RXN2 DMI_RXP3 DMI_RXN3

DMI

DMI_TXP011 DMI_TXN011 DMI_TXP111 DMI_TXN111 DMI_TXP211 DMI_TXN211 DMI_TXP311 DMI_TXN311
VCC1_5PCIEX 24.9_1%

2 SRCCLK_MCH 2 SRCCLK_MCH# C538 22PF

+2.5VS

+1.5VS

INTERNAL VGA

DOTCLK 2 DOTCLK# 2 0

HIGH : DDR LOW : DDRII

MCHCLK 2 MCHCLK# 2

+2.5VS

VTT1.2VS

PLTRST# 11,13,21 PWROKICH 11,12 ICHSYNC# 11

VTT1.2VS R104 301_1% R94 49.9_1% MCH_GTLREF HSWNG

+1.5VS L36 2 BK3216HS800 1 1

VCC1_5PCIEX VCC1_5PCIEX

VCC1_5PCIEX 7
C635 10UF(0805)

+ C506 0.01UF_X7R R97 100_1% C507 0.1UF_X7R C519 220PF R102 102_1% C531 0.1UF C134 470UF 2 C640 10UF(0805)

GRANTSDALE(DDR2) PLTRST# PWROKICH C658 +2.5VS +2.5VS 7,12,29 VTT1.2VS VTT1.2VS 2,3,4,7,12,30 +1.5VS +1.5VS 7,11,12,30 22PF C750 10PF

B - 6 GMCH-1 Host/ PCI-E/ DMI (71-D90T0-D05)

Schematic Diagrams

GMCH-2 DDR2
U7B MAAA0 MAAA1 MAAA2 MAAA3 MAAA4 MAAA5 MAAA6 MAAA7 MAAA8 MAAA9 MAAA10 MAAA11 MAAA12 MAAA13 8,10 WEA# 8,10 SCASA# 8,10 SRASA# 8,10 SBSA0 8,10 SBSA1 8,10 SBSA2 8,10 8,10 8,10 8,10 8,10 8,10 8,10 8,10 SCSA#0 SCSA#1 SCSA#2 SCSA#3 CKEA0 CKEA1 CKEA2 CKEA3 WEA# SCASA# SRASA# SBSA0 SBSA1 SBSA2 SCSA#0 SCSA#1 SCSA#2 SCSA#3 CKEA0 CKEA1 CKEA2 CKEA3 SODTA0 SODTA1 SODTA2 SODTA3 DDRCLKA0 DDRCLKA#0 DDRCLKA1 DDRCLKA#1 DDRCLKA2 DDRCLKA#2 DDRCLKA3 DDRCLKA#3 DDRCLKA4 DDRCLKA#4 DDRCLKA5 DDRCLKA#5 AP26 AR24 AL24 AP23 AR23 AP22 AN23 AP21 AN22 AN21 AM27 AM21 AR20 AP31 AN28 AN29 AP27 AR27 AN27 AN20 AR29 AP32 AR28 AN31 AP19 AM18 AN18 AR19 AP30 AN32 AP29 AP33 AN26 AP25 AM2 AM3 AC34 AC35 AN25 AM24 AN3 AN2 AC33 AB34 SMA_A0 SMA_A1 SMA_A2 SMA_A3 SMA_A4 SMA_A5 SMA_A6 SMA_A7 SMA_A8 SMA_A9 SMA_A10 SMA_A11 SMA_A12 SMA_A13 SWE_A# SCAS_A# SRAS_A# SBS_A0 SBS_A1 SBS_A2 SCS_A0# SCS_A1# SCS_A2# SCS_A3# SCKE_A0 SCKE_A1 SCKE_A2 SCKE_A3 SODT_A0 SODT_A1 SODT_A2 SODT_A3 SCLK_A0 SCLK_A0# SCLK_A1 SCLK_A1# SCLK_A2 SCLK_A2# SCLK_A3 SCLK_A3# SCLK_A4 SCLK_A4# SCLK_A5 SCLK_A5# SDQS_A0 SDQS_A0# SDM_A0 SDQ_A0 SDQ_A1 SDQ_A2 SDQ_A3 SDQ_A4 SDQ_A5 SDQ_A6 SDQ_A7 SDQS_A1 SDQS_A1# SDM_A1 SDQ_A8 SDQ_A9 SDQ_A10 SDQ_A11 SDQ_A12 SDQ_A13 SDQ_A14 SDQ_A15 AG1 AG2 AF2 AE3 AF3 AH3 AJ2 AE2 AE1 AG3 AH2 AL3 AL2 AL1 AK2 AK3 AN4 AP4 AJ1 AJ3 AP2 AP3 AP7 AR7 AN7 AR5 AP6 AP9 AN9 AN5 AP5 AN8 AR8 AF17 AG17 AH16 AL17 AJ17 AF19 AH18 AK16 AF16 AD17 AE19 AM30 AL29 AK29 AK27 AJ28 AL31 AK31 AH27 AL27 AN30 AL30 AG35 AG33 AG34 AH33 AH35 AF33 AE33 AJ33 AJ34 AG32 AF34 AA34 AA35 AA33 AD31 AD35 Y33 W34 AE35 AE34 AA32 Y35 U34 U35 U33 V34 V33 R32 R34 W35 W33 T33 T35 DQSA0 DQSA#0 SDMA0 MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 DQSA1 DQSA#1 SDMA1 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 DQSA2 DQSA#2 SDMA2 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 DQSA3 DQSA#3 SDMA3 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 DQSA4 DQSA#4 SDMA4 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 DQSA5 DQSA#5 SDMA5 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 DQSA6 DQSA#6 SDMA6 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 DQSA7 DQSA#7 SDMA7 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 MAAB0 MAAB1 MAAB2 MAAB3 MAAB4 MAAB5 MAAB6 MAAB7 MAAB8 MAAB9 MAAB10 MAAB11 MAAB12 MAAB13 AM15 AR15 AN15 AL15 AP14 AM12 AP13 AL12 AN13 AR12 AP15 AP11 AR11 AL33 U7C SMA_B0 SMA_B1 SMA_B2 SMA_B3 SMA_B4 SMA_B5 SMA_B6 SMA_B7 SMA_B8 SMA_B9 SMA_B10 SMA_B11 SMA_B12 SMA_B13 SDQS_B0 SDQS_B0# SDM_B0 SDQ_B0 SDQ_B1 SDQ_B2 SDQ_B3 SDQ_B4 SDQ_B5 SDQ_B6 SDQ_B7 SDQS_B1 SDQS_B1# SDM_B1 SDQ_B8 SDQ_B9 SDQ_B10 SDQ_B11 SDQ_B12 SDQ_B13 SDQ_B14 SDQ_B15 SDQS_B2 SDQS_B2# SDM_B2 SDQ_B16 SDQ_B17 SDQ_B18 SDQ_B19 SDQ_B20 SDQ_B21 SDQ_B22 SDQ_B23 SDQS_B3 SDQS_B3# SDM_B3 SDQ_B24 SDQ_B25 SDQ_B26 SDQ_B27 SDQ_B28 SDQ_B29 SDQ_B30 SDQ_B31 SDQS_B4 SDQS_B4# SDM_B4 SDQ_B32 SDQ_B33 SDQ_B34 SDQ_B35 SDQ_B36 SDQ_B37 SDQ_B38 SDQ_B39 SDQS_B5 SDQS_B5# SDM_B5 SDQ_B40 SDQ_B41 SDQ_B42 SDQ_B43 SDQ_B44 SDQ_B45 SDQ_B46 SDQ_B47 SDQS_B6 SDQS_B6# SDM_B6 SDQ_B48 SDQ_B49 SDQ_B50 SDQ_B51 SDQ_B52 SDQ_B53 SDQ_B54 SDQ_B55 SDQS_B7 SDQS_B7# SDM_B7 SDQ_B56 SDQ_B57 SDQ_B58 SDQ_B59 SDQ_B60 SDQ_B61 SDQ_B62 SDQ_B63 AK5 AL4 AJ5 AH4 AJ6 AL6 AN6 AG9 AH7 AL5 AM5 AK10 AH10 AH9 AJ8 AL8 AF11 AE11 AJ7 AL7 AG10 AG11 AK13 AL14 AH13 AF13 AH12 AD14 AD15 AD12 AE13 AG14 AF14 AD20 AF20 AG20 AK19 AH19 AH21 AD21 AD18 AL18 AE22 AF22 AH25 AG26 AG24 AF24 AF25 AL26 AJ26 AF23 AD23 AL25 AJ25 AH28 AH30 AH31 AK32 AJ31 AG31 AF28 AJ29 AK33 AG30 AG27 AB31 AC30 AD24 AF27 AE27 AC26 AB26 AE31 AE29 AC28 AB27 W27 Y28 W31 AA28 W29 V28 V29 Y26 AA29 W26 U26 DQSB0 DQSB#0 SDMB0 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 DQSB1 DQSB#1 SDMB1 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 DQSB2 DQSB#2 SDMB2 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 DQSB3 DQSB#3 SDMB3 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 DQSB4 DQSB#4 SDMB4 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 DQSB5 DQSB#5 SDMB5 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 DQSB6 DQSB#6 SDMB6 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 DQSB7 DQSB#7 SDMB7 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 8 DQSA#[0..7] DDRVCC R452 1K_1%

DDRVREFA

R124 1K_1% C138 1UF(0603) C655 0.1UF

9,10 WEB# 9,10 SCASB# 9,10 SRASB# 9,10 SBSB0 9,10 SBSB1 9,10 SBSB2 9,10 9,10 9,10 9,10 SCSB#0 SCSB#1 SCSB#2 SCSB#3

WEB# SCASB# SRASB# SBSB0 SBSB1 SBSB2 SCSB#0 SCSB#1 SCSB#2 SCSB#3

AP17 AP18 AN17 AR16 AN16 AN11 AN33 AM34 AP34 AN34

SWE_B# SCAS_B# SRAS_B# SBS_B0 SBS_B1 SBS_B2 SCS_B0# SCS_B1# SCS_B2# SCS_B3#

DDRVCC

DDR INTERFACE A

DDR INTERFACE B

8,10 SODTA0 8,10 SODTA1 8,10 SODTA2 8,10 SODTA3 8 8 8 8 DDRCLKA0 DDRCLKA#0 DDRCLKA1 DDRCLKA#1

SDQS_A2 SDQS_A2# SDM_A2 SDQ_A16 SDQ_A17 SDQ_A18 SDQ_A19 SDQ_A20 SDQ_A21 SDQ_A22 SDQ_A23 SDQS_A3 SDQS_A3# SDM_A3 SDQ_A24 SDQ_A25 SDQ_A26 SDQ_A27 SDQ_A28 SDQ_A29 SDQ_A30 SDQ_A31 SDQS_A4 SDQS_A4# SDM_A4 SDQ_A32 SDQ_A33 SDQ_A34 SDQ_A35 SDQ_A36 SDQ_A37 SDQ_A38 SDQ_A39 SDQS_A5 SDQS_A5# SDM_A5 SDQ_A40 SDQ_A41 SDQ_A42 SDQ_A43 SDQ_A44 SDQ_A45 SDQ_A46 SDQ_A47 SDQS_A6 SDQS_A6# SDM_A6 SDQ_A48 SDQ_A49 SDQ_A50 SDQ_A51 SDQ_A52 SDQ_A53 SDQ_A54 SDQ_A55 SDQS_A7 SDQS_A7# SDM_A7 SDQ_A56 SDQ_A57 SDQ_A58 SDQ_A59 SDQ_A60 SDQ_A61 SDQ_A62 SDQ_A63

R123 1K_1%

B.Schematic Diagrams

DDRVREFB

R450 1K_1%

C137 1UF(0603)

C650 0.1UF

9,10 9,10 9,10 9,10

CKEB0 CKEB1 CKEB2 CKEB3

CKEB0 CKEB1 CKEB2 CKEB3

AP10 AN10 AR9 AM9

SCKE_B0 SCKE_B1 SCKE_B2 SCKE_B3

8 8 8 8

DDRCLKA3 DDRCLKA#3 DDRCLKA4 DDRCLKA#4

9,10 9,10 9,10 9,10

SODTB0 SODTB1 SODTB2 SODTB3

SODTB0 SODTB1 SODTB2 SODTB3

AM33 AL34 AL35 AK34

SODT_B0 SODT_B1 SODT_B2 SODT_B3

Sheet 6 of 37 GMCH DDR2 2 of 3

9 9 9 9

DDRCLKB0 DDRCLKB#0 DDRCLKB1 DDRCLKB#1

DDRCLKB0 DDRCLKB#0 DDRCLKB1 DDRCLKB#1 DDRCLKB2 DDRCLKB#2

AH22 AG23 AK9 AL9 AE26 AE25

AH15 AE16 SM_XSBWN AJ12 AK12 AE7

SCLK_B0 SCLK_B0# SCLK_B1 SCLK_B1# SCLK_B2 SCLK_B2#

RSV_TP1 RSV_TP0 SM_SLEWIN0 SM_SLEWOUT0 SVREF0

DDRVREFA

9 9 9 9

DDRCLKB3 DDRCLKB#3 DDRCLKB4 DDRCLKB#4

DDRCLKB3 DDRCLKB#3 DDRCLKB4 DDRCLKB#4 DDRCLKB5 DDRCLKB#5

AL23 AK22 AJ11 AL11 AD28 AD29

SCLK_B3 SCLK_B3# SCLK_B4 SCLK_B4# SCLK_B5 SCLK_B5#

DQSA#[0..7]

9

DQSB#[0..7]

DQBS#[0..7]

AD32 AK15

RSV RSV_TP3

9,10 MAAB[0..13]

MAAB[0..13]

9

SDMB[0..7]

SDMB[0..7]

AN14 SM_YSBWN AF9 AE10 DDRVREFB AE8

RSV_TP2 SM_SLEWIN1 SM_SLEWOUT1 SVREF1

9

MDB[0..63]

MDB[0..63]

9

DQSB[0..7]

DQBS[0..7]

8,10 MAAA[0..13]

MAAA[0..13]

R453 80.6_1%

SMRCOMPP SMRCOMPN R687 40.2_1% R688 40.2_1%

AG8 AG4 AE5 AF5

SRCOMP1 SRCOMP0 SOCOMP1 SOCOMP0

8

SDMA[0..7]

SDMA[0..7]

8

MDA[0..63]

MDA[0..63]

GRANTSDALE(DDR2) DDRVCC R125 C140 0.1UF DDRVCC 7,8,9,10,30,31 80.6_1% SMRCOMPN

GRANTSDALE(DDR2)

8

DQSA[0..7]

DQSA[0..7]

DDRVCC

GMCH-2 DDR2 (71-D90T0-D05) B - 7

Schematic Diagrams

GMCH-3 PWR / GND
U7F F23 F25 F29 F30 F32 F35 F4 F5 F6 F8 G10 G11 G13 G15 G17 G19 G2 G20 G23 G26 G27 G28 G4 G7 G8 G9 H10 H13 H2 H21 H24 H25 H27 H30 H32 H34 H4 H5 H6 H9 J10 J15 J16 J17 J18 J2 J20 J23 J30 J4 J7 J8 J9 K10 K11 K14 K2 K20 K24 K26 K28 K31 K32 K35 K4 K5 K6 K9 L11 L13 L16 L17 L18 L2 L20 L21 L22 L24 L27 L30 L32 L4 L7 L8 L9 M10 M17 M2 M20 VSS_301 VSS_201 VSS_305 VSS_202 VSS_307 VSS_203 VSS_308 VSS_204 VSS_309 VSS_205 VSS_310 VSS_206 VSS_311 VSS_207 VSS_312 VSS_208 VSS_313 VSS_209 VSS_317 VSS_210 VSS_320 VSS_211 VSS_321 VSS_212 VSS_322 VSS_213 VSS_323 VSS_214 VSS_324 VSS_215 VSS_325 VSS_216 VSS_326 VSS_217 VSS_327 VSS_218 VSS_219 VSS_328 VSS_329 VSS_220 VSS_221 VSS_335 VSS_222 VSS_336 VSS_223 VSS_337 VSS_224 VSS_338 VSS_225 VSS_339 VSS_226 VSS_340 VSS_227 VSS_341 VSS_344 VSS_228 VSS_229 VSS_347 VSS_230 VSS_348 VSS_231 VSS_349 VSS_232 VSS_350 VSS_233 VSS_351 VSS_234 VSS_352 VSS_235 VSS_353 VSS_236 VSS_354 VSS_237 VSS_302 VSS_238 VSS_303 VSS_239 VSS_304 VSS_240 VSS_363 VSS_241 VSS_364 VSS_242 VSS_365 VSS_243 VSS_366 VSS_244 VSS_367 VSS_245 VSS_368 VSS_246 VSS_369 VSS_247 VSS_370 VSS_248 VSS_371 VSS_249 VSS_374 VSS_250 VSS_375 VSS_251 VSS_379 VSS_252 VSS_380 VSS_253 VSS_381 VSS_254 VSS_382 VSS_255 VSS_383 VSS_256 VSS_384 VSS_257 VSS_387 VSS_258 VSS_388 VSS_259 VSS_392 VSS_260 VSS_393 VSS_261 VSS_394 VSS_262 VSS_400 VSS_263 VSS_401 VSS_264 VSS_402 VSS_265 VSS_403 VSS_266 VSS_404 VSS_267 VSS_405 VSS_268 VSS_406 VSS_269 VSS_407 VSS_270 VSS_408 VSS_272 VSS_409 VSS_273 VSS_410 VSS_274 VSS_411 VSS_275 VSS_412 VSS_276 VSS_277 VSS_414 VSS_278 VSS VSS_279 VSS VSS_280 VSS VSS_281 VSS VSS_282 VSS VSS_283 VSS VSS_284 VSS VSS_285 VSS VSS_286 VSS VSS_287/DREFSSCLKINN VSS VSS_289 VSS VSS_290 VSS_291 N10 N2 N28 N30 N32 N4 N7 N8 N9 P2 P27 P29 P31 P32 P35 P4 P5 P6 P9 R2 R26 R27 R4 R7 R8 R9 T10 T2 T28 T30 T32 T34 T4 T5 T6 T7 U17 U19 U2 U27 U29 U31 U32 U4 U7 U8 U9 V1 V18 V2 V26 V27 V35 V4 V6 V9 W17 W19 W28 W30 W32 Y29 Y31 Y32 Y34 B28 B5 B6 B8 B9 C1 C11 C13 L15 Y27 AB30 AL22 M24 M25 M27 M29 M34 M4 M5 M6 M9 A10 A18 A26 A3 A30 A33 A5 AA1 AA10 AA2 AA26 AA27 AA3 AA4 AA5 AA6 AA7 AA8 AA9 AB28 AB32 AB35 AC27 AC29 AC31 AC32 AD11 AD13 AD16 AD19 AD22 AD26 AD27 AD34 AE12 AE14 AE15 AE17 AE18 AE20 AE21 AE23 AE24 AE28 AE30 AE32 AE4 AE6 AE9 AF1 AF10 AF12 AF15 AF18 AF21 AF26 AF29 AF30 AF31 AF32 AF35 AF4 AF6 AF8 AG12 AG13 AG15 AG16 AG18 AG19 AG21 AG22 AG25 AG28 AG29 AG5 AH1 AH11 AH14 AH17 AH20 AH23 AH26 AH29 AH32 AH34 AH5 AH6 AH8 AJ10 AJ13 +1.5VS U7E VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_14 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_26 VSS_28 VSS_29 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 AJ15 AJ16 AJ19 AJ22 AJ27 AJ30 AJ32 AJ35 AJ4 AJ9 AK1 AK11 AK14 AK17 AK20 AK23 AK25 AK26 AK28 AK30 AK4 AK6 AK7 AK8 AL10 AL13 AL16 AL19 AL32 AM29 AM31 AM4 AM6 AM7 AM8 AN1 AP8 AR13 AR17 AR21 AR25 AR3 AR30 AR6 B12 B14 B16 B10 B7 B18 B2 B24 C17 C18 C23 C3 C35 C4 D10 D11 D15 D16 D18 D23 D25 D26 D28 D3 D30 D31 D32 D4 D6 D7 D8 D9 E1 E10 E17 E18 E2 E23 E26 E29 E4 E6 E8 F10 F16 F18 F2 AC11 AB11 Y20 Y19 Y17 Y16 W20 W16 U20 U16 T20 T19 T17 T16 AA13 AA14 AA16 AA18 AA20 AA21 AA22 AA23 AA24 AB13 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB23 AB24 N13 N14 N15 N16 N18 N20 N21 P13 P14 P15 P17 P19 P21 P22 R13 R14 R15 R16 R18 R20 R22 R23 T13 T14 T15 T21 T23 T24 U13 U14 U22 U24 V13 V14 V15 V21 V23 V24 W13 W14 W22 W24 Y13 Y14 Y15 Y21 Y23 Y24 U7G VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VCCNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF VSSNCTF RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD RSVRD NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC RSVRD RSVRD AC25 AB25 AA25 AA11 Y25 Y18 Y11 W25 W11 V25 V20 V16 V11 U25 U11 T25 T18 T11 R25 R11 P25 P11 N25 AD25 N11 M11 AA15 AA17 AA19 N17 N19 P16 P18 P20 R17 R19 R21 T22 U15 U21 U23 V22 W15 W21 W23 Y22 AC12 AC13 AC14 AC15 AC16 AC17 AC18 AC19 AC20 AC21 AC22 N12 N22 N23 N24 P12 P23 P24 R12 R24 T12 U12 V12 W12 Y12 AA12 AB12 AC23 AC24 V31 V32 +1.5VS L32 1 2 HCB2012K-121T30 VCCA_MPLL 1 C520 + C116 0.1UF C119 0.22UF(0603) C567 0.1UF C571 10UF(0805) +2.5VS +1.5VS AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AC10 AC9 AC8 AC7 AC6 AC5 AC4 AC3 AC2 AC1 AB10 AB9 AB8 AB7 AB6 AB5 AB4 AB3 AB2 AB1 W18 V19 V17 U18 Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 W9 W8 W7 W6 W4 W3 W2 W1 VCCA_HPLL VCCA_MPLL VCCA_DPLLA VCCA_DPLLB VCCA_GPLL +2.5VS A17 B17 A12 B13 A14 A13 E13 D13 F13 U7H VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCC3G VCCAHPLL VCCAMPLL VCCADPLLA VCCADPLLB VCCA3GPLL VCCAHV VCCACRTDAC VCCACRTDAC VSSACRTDAC GRANTSDALE(DDR2) VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VTT1.2VS DDRVCC AR33 AR31 AR26 AR22 AR18 AR14 AR10 AP24 AP28 AP20 AP16 AP12 AN35 AM32 AM28 AM26 AM25 AM23 AM22 AM20 AM19 AM17 AM16 AM14 AM13 AM11 AM10 AK35 VTT1.2VS H22 G22 G21 F22 F21 F20 E22 E21 E20 E19 D22 D21 D20 D19 C22 C21 C20 C19 B22 B21 B20 B19 A22 A21 A20 A19 C569 0.1UF_X7R C556 0.1UF_X7R C123 0.1UF_X7R C120 0.1UF_X7R

VTT1.2VS

C121 0.1UF_X7R

C533 0.1UF_X7R

C536 0.1UF_X7R

PWR

PWR

+1.5VS

B.Schematic Diagrams

Sheet 7 of 37 GMCH PWR / GND 3 of 3

C633 0.1UF_X7R

C638 0.1UF_X7R

C644 0.1UF_X7R

C646 0.1UF_X7R

GND

VCC1_5PCIEX

GND

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

DDRVCC

C637 0.1UF

C624 0.1UF

C619 0.1UF

DDRVCC

C610 0.1UF

C608 0.1UF

C592 0.1UF

DDRVCC

C591 0.1UF

C590 0.1UF

DDRVCC +1.5VS L87 1 2 HCB2012K-121T30 VCCA_DPLLB 1 1 1

+1.5VS

1

C582 + C561 0.1UF

C132 + 220UF/4V

C139 + 220UF/4V

C135 + 220UF/2.5V

1 2

C136 + 220UF/2.5V

220UF/2.5V 2

2

2

220UF/2.5V 2

GRANTSDALE(DDR2)

GRANTSDALE(DDR2) GRANTSDALE(DDR2) VCC1_5PCIEX +1.5VS L85 1 2 R381 HCB2012K-121T30 0.51_1% C125 10UF(0805) VCCA_GPLL C124 0.1UF 2 +1.5VS L86 VCCA_HPLL 1 + C127 220UF/2.5V C551 0.1UF 1 2 HCB2012K-121T30 +1.5VS L33 1 2 HCB2012K-121T30 VCCA_DPLLA 1 +2.5VS + C130 220UF/2.5V 2 C128 0.1UF +1.5VS +1.5VS 5,11,12,30 +2.5VS 5,12,29 VTT1.2VS VTT1.2VS 2,3,4,5,12,30 DDRVCC 6,8,9,10,30,31 VCC1_5PCIEX 5 DDRVCC

B - 8 GMCH-3 PWR / GND (71-D90T0-D05)

2

Schematic Diagrams

DDR2 DIMM-A
DDRVCC DDRVCC 112 111 117 96 95 118 81 82 87 103 88 104 47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 162 150 138 40 28 161 149 112 111 117 96 95 118 81 82 87 103 88 104 47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 162 150 138 40 28 161 149 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

JDIM3 6,10 MAAA[0..13] MAAA[0..13] MAAA0 102 MAAA1 101 MAAA2 100 MAAA3 99 MAAA4 98 MAAA5 97 MAAA6 94 MAAA7 92 MAAA8 93 MAAA9 91 MAAA10 105 MAAA11 90 MAAA12 89 MAAA13 116 86 84 SBSA2 85 SBSA0 107 SBSA1 106 SDMA0 SDMA1 SDMA2 SDMA3 SDMA4 SDMA5 SDMA6 SDMA7 DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7 10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188 108 109 113 110 115 79 80 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 RAS# WE# CAS# S0# S1# CKE0 CKE1

JDIM4 MDA[0..63] 6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 83 120 50 69 163 MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63 MAAA0 102 MAAA1 101 MAAA2 100 MAAA3 99 MAAA4 98 MAAA5 97 MAAA6 94 MAAA7 92 MAAA8 93 MAAA9 91 MAAA10 105 MAAA11 90 MAAA12 89 MAAA13 116 86 84 SBSA2 85 SBSA0 107 SBSA1 106 SDMA0 SDMA1 SDMA2 SDMA3 SDMA4 SDMA5 SDMA6 SDMA7 DQSA0 DQSA1 DQSA2 DQSA3 DQSA4 DQSA5 DQSA6 DQSA7 10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188 108 109 113 110 115 79 80 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 RAS# WE# CAS# S0# S1# CKE0 CKE1

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6,10

SBSA2

6,10 6,10 6,10

SBSA2 SBSA0 SBSA1

6

6,10 SBSA0 6,10 SBSA1 SDMA[0..7]

6

DQSA[0..7]

6,10 6,10 6,10 6,10 6,10 6,10 6,10

SRASA# WEA# SCASA# SCSA#0 SCSA#1 CKEA0 CKEA1

SRASA# WEA# SCASA# SCSA#0 SCSA#1 CKEA0 CKEA1

6,10 6,10 6,10 6,10 6,10 6,10 6,10

SRASA# WEA# SCASA# SCSA#2 SCSA#3 CKEA2 CKEA3

SRASA# WEA# SCASA# SCSA#2 SCSA#3 CKEA2 CKEA3

6 6 6 6

DDRCLKA0 DDRCLKA#0 DDRCLKA1 DDRCLKA#1

DDRCLKA0 DDRCLKA#0 DDRCLKA1 DDRCLKA#1 SODTA0 SODTA1 SMBDATA SMBCLK

30 32 164 166 114 119 195 197

CK0 CK0# CK1 CK1# ODT0 ODT1 SDA SCL DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 VREF VDDSPD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6 6 6 6

DDRCLKA3 DDRCLKA#3 DDRCLKA4 DDRCLKA#4

DDRCLKA3 DDRCLKA#3 DDRCLKA4 DDRCLKA#4 SODTA2 SODTA3 SMBDATA SMBCLK

30 32 164 166 114 119 195 197

CK0 CK0# CK1 CK1# ODT0 ODT1 SDA SCL DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 VREF VDDSPD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6,10 6,10

SODTA0 SODTA1

6,10 6,10

SODTA2 SODTA3

2,9,11,19,26 SMBDATA 2,9,11,19,26 SMBCLK 6 DQSA#[0..7]

2,9,11,19,26 SMBDATA 2,9,11,19,26 SMBCLK

Trace Width 12 Mil Space 20 10 SDREFA Mil
+3VS R133 0 C142 0.1U

DQSA#0 11 DQSA#1 29 DQSA#2 49 DQSA#3 68 DQSA#4 129 DQSA#5 146 DQSA#6 167 DQSA#7 186 SDREFA 1 199

NC1 NC2 NC3 NC4 NCTEST

DDR2 SO-DIMM

VDDSPDA
C838

SA0 SA1

198 R138 200 R137

10K 10K

Trace Width 12 Mil Space 20 SDREFA Mil

DQSA#0 11 DQSA#1 29 DQSA#2 49 DQSA#3 68 DQSA#4 129 DQSA#5 146 DQSA#6 167 DQSA#7 186 1 199

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC1 NC2 NC3 NC4 NCTEST

5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 83 120 50 69 163

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

Sheet 8 of 37 DDR2 DIMM-A

B.Schematic Diagrams

DDR2 SO-DIMM_H

VDDSPDA
C839 0.1U C840

SA0 SA1

198 R145 200 R144

10K 10K

+3VS

18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39

addr =1010000b

DDRVCC DDRVCC 6,7,9,10,30,31

+3VS +3VS 2,4,9,11,12,13,14,15,18,19,20,21,23,24,26,28,30,31

18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39

10U(0805)

10U(0805)

addr =1010001b

DDR2 DIMM-A (71-D90T0-D05) B - 9

Schematic Diagrams

DDR2 DIMM-B
DDRVCC DDRVCC 112 111 117 96 95 118 81 82 87 103 88 104 47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 162 150 138 40 28 161 149 JDIM2 6,10 MAAB[0..13] MAAB[0..13] MAAB0 102 MAAB1 101 MAAB2 100 MAAB3 99 MAAB4 98 MAAB5 97 MAAB6 94 MAAB7 92 MAAB8 93 MAAB9 91 MAAB10 105 MAAB11 90 MAAB12 89 MAAB13 116 86 84 SBSB2 85 SBSB2 SBSB0 107 SBSB1 106 SDMB0 SDMB1 SDMB2 SDMB3 SDMB4 SDMB5 SDMB6 SDMB7 DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7 10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188 108 109 113 110 115 79 80 JDIM1 MDB[0..63] 6 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC1 NC2 NC3 NC4 NCTEST 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 83 120 50 69 163 MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63 MAAB0 102 MAAB1 101 MAAB2 100 MAAB3 99 MAAB4 98 MAAB5 97 MAAB6 94 MAAB7 92 MAAB8 93 MAAB9 91 MAAB10 105 MAAB11 90 MAAB12 89 MAAB13 116 86 84 SBSB2 85 SBSB0 107 SBSB1 106 SDMB0 SDMB1 SDMB2 SDMB3 SDMB4 SDMB5 SDMB6 SDMB7 DQSB0 DQSB1 DQSB2 DQSB3 DQSB4 DQSB5 DQSB6 DQSB7 10 26 52 67 130 147 170 185 13 31 51 70 131 148 169 188 108 109 113 110 115 79 80 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 RAS# WE# CAS# S0# S1# CKE0 CKE1 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 112 111 117 96 95 118 81 82 87 103 88 104 47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 162 150 138 40 28 161 149

6,10

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2 BA0 BA1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 RAS# WE# CAS# S0# S1# CKE0 CKE1

6,10 6,10 6,10

SBSB2 SBSB0 SBSB1

B.Schematic Diagrams

6

6,10 SBSB0 6,10 SBSB1 SDMB[0..7]

Sheet 9 of 37 DDR2 DIMM-B
6 DQSB[0..7]

6,10 6,10 6,10 6,10 6,10 6,10 6,10

SRASB# WEB# SCASB# SCSB#0 SCSB#1 CKEB0 CKEB1

SRASB# WEB# SCASB# SCSB#0 SCSB#1 CKEB0 CKEB1

6,10 6,10 6,10 6,10 6,10 6,10 6,10

SRASB# WEB# SCASB# SCSB#2 SCSB#3 CKEB2 CKEB3

SRASB# WEB# SCASB# SCSB#2 SCSB#3 CKEB2 CKEB3

6 6 6 6

DDRCLKB0 DDRCLKB#0 DDRCLKB1 DDRCLKB#1

DDRCLKB0 DDRCLKB#0 DDRCLKB1 DDRCLKB#1 SODTB0 SODTB1 SMBDATA SMBCLK

30 32 164 166 114 119 195 197

CK0 CK0# CK1 CK1# ODT0 ODT1 SDA SCL DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 VREF VDDSPD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6 6 6 6

DDRCLKB3 DDRCLKB#3 DDRCLKB4 DDRCLKB#4

DDRCLKB3 DDRCLKB#3 DDRCLKB4 DDRCLKB#4 SODTB2 SODTB3 SMBDATA SMBCLK

30 32 164 166 114 119 195 197

CK0 CK0# CK1 CK1# ODT0 ODT1 SDA SCL DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 VREF VDDSPD VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

6,10 6,10

SODTB0 SODTB1

6,10 6,10

SODTB2 SODTB3

2,8,11,19,26 SMBDATA 2,8,11,19,26 SMBCLK 6 DQSB#[0..7]

2,8,11,19,26 SMBDATA 2,8,11,19,26 SMBCLK

Trace Width 12 Mil Space 20 10 SDREFB Mil
+3VS R95 0 C115 0.1U

DQSB#0 11 DQSB#1 29 DQSB#2 49 DQSB#3 68 DQSB#4 129 DQSB#5 146 DQSB#6 167 DQSB#7 186 SDREFB 1 199

DDR2 SO-DIMM

VDDSPDB
C841

SA0 SA1

198 R88 200 R89

10K 10K

Trace Width 12 Mil Space 20 Mil
+3VS C842 0.1U

DQSB#0 11 DQSB#1 29 DQSB#2 49 DQSB#3 68 DQSB#4 129 DQSB#5 146 DQSB#6 167 DQSB#7 186 SDREFB 1 199

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 NC1 NC2 NC3 NC4 NCTEST

5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 83 120 50 69 163

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

DDR2 SO-DIMM_H

VDDSPDB
C843

SA0 SA1

198 R77 200 R78

10K 10K

+3VS

18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39

addr =1010010b

DDRVCC DDRVCC 6,7,8,10,30,31

+3VS +3VS 2,4,8,11,12,13,14,15,18,19,20,21,23,24,26,28,30,31

B - 10 DDR2 DIMM-B (71-D90T0-D05)

18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39

10U(0805)

10U(0805)

addr =1010011b

Schematic Diagrams

DDR2 Terminator
DDR2 TERMINATION
CHANNEL A
DDRVCC DDRVCC

CHANNEL B

DDRVREF GEN. & DECOUPLING
R139 75_1% C150 0.1UF C156 0.01UF C154 0.01UF

DDRVREF GEN. & DECOUPLING
R76 75_1% C100 0.1UF C465 0.01UF C471 0.01UF

Trace Width 12 Mil Space 20 Mil
SDREFA 8

Trace Width 12 Mil Space 20 Mil
SDREFB 9

SDREFA R134 75_1% C674 0.1UF C149 0.01UF C675 0.01UF

SDREFB R80 75_1% C480 0.1UF C473 0.01UF C101 0.01UF

DDRVCC C199 C174 C175 C145 C176 C146 C144 C198 C143 C151 C152 C153 C197 1 + C157 1 + 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF(0603) 1UF(0603) 1UF(0603) 1UF(0603) 2 470UF/4V 2 470UF/4V

DDRVTT C844 C846 C848 C850 C852 C854 C856 C858 C860 C862 C216 C201 C206 1 C200 1 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF(0603) 1UF(0603) 10UF/6.3V 10UF/6.3V 2 470UF/4V 2 470UF/4V

DDRVCC C102 C114 C113 C110 C104 C105 C99 C106 C103 C112 C108 C111 C118 1 C117 1 + + 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF(0603) 1UF(0603) 1UF(0603) 1UF(0603) 2 470UF/4V 2 470UF/4V

DDRVTT C845 C847 C849 C851 C853 C855 C857 C859 C861 C863 C84 C431 C98 1 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF(0603) 1UF(0603) 10UF/6.3V 10UF/6.3V 2 470UF/4V 2 470UF/4V

Sheet 10 of 37 DDR2 Terminator

B.Schematic Diagrams

+

C449 1

+

DDRVTT RP73 8P4RX33 1 2 3 4 RP74 8P4RX33 8 7 6 5

DDRVTT RP59 8P4RX33 8 7 6 5 RP58 8P4RX33 1 2 3 4 C88 RP61 8P4RX33 8 7 6 5 RP11 8P4RX40 1 2 3 4 C85 RP60 8P4RX33 8 7 6 5 RP89 8P4RX40 1 2 3 4

+

+

MAAA1 MAAA10 SBSA0 SCASA# C696 0.1UF

8 7 6 5

1 2 3 4

SBSA2 MAAA6 MAAA7 MAAA11 C204 0.1UF

MAAB4 MAAB2 MAAB0 MAAB12 C435 0.1UF

1 2 3 4

8 7 6 5

SBSB2 MAAB11 MAAB7 MAAB6 0.1UF

MAAA5 MAAA0 MAAA2 MAAA4 C691 0.1UF

8 7 6 5

RP26 8P4RX33 1 2 3 4

1 2 3 4

RP88 8P4RX40 8 7 6 5

SCSA#2 SCSA#3 SCSA#0 SCSA#1 C213 0.1UF

MAAB9 MAAB8 MAAB5 MAAB3 C436 0.1UF

1 2 3 4

8 7 6 5

SODTB3 SODTB2 SODTB1 SODTB0 0.1UF

MAAA9 MAAA12 MAAA8 MAAA3 C211 0.1UF

8 7 6 5

RP27 8P4RX33 1 2 3 4

1 2 3 4

RP25 8P4RX40 8 7 6 5

CKEA0 CKEA1 CKEA2 CKEA3 C864 0.1UF C87

SCASB# WEB# MAAB1 MAAB10 0.1UF

1 2 3 4

8 7 6 5

CKEB0 CKEB1 CKEB2 CKEB3 C865 0.1UF

WEA# MAAA13 SRASA# SBSA1 C866 0.1UF

8 7 6 5

RP90 8P4RX33 1 2 3 4

1 2 3 4

RP91 8P4RX40 8 7 6 5

SODTA1 SODTA0 SODTA3 SODTA2 C867 0.1UF

SBSB1 SRASB# SBSB0 MAAB13 C868 0.1UF

1 2 3 4

RP92 8P4RX33 8 7 6 5

8 7 6 5

RP93 8P4RX40 1 2 3 4

SCSB#1 SCSB#0 SCSB#3 SCSB#2 C869 0.1UF

MAAA[0..13] 6,8 SBSA[0..2] 6,8 SCSA#[0..3] 6,8 CKEA[0..3] 6,8 SODTA[0..3] 6,8 SRASA# WEA# SCASA# SRASA# WEA# SCASA# 6,8 6,8 6,8 DDRVCC DDRVCC 6,7,8,9,30,31 DDRVTT DDRVTT 30

6,9 6,9 6,9 6,9 6,9 6,9 6,9 6,9

MAAB[0..13] SBSB[0..2] SCSB#[0..3] CKEB[0..3] SODTB[0..3] SRASB# WEB# SCASB# SRASB# WEB# SCASB#

DDR2 Terminator (71-D90T0-D05) B - 11

Schematic Diagrams

ICH6-1
+3V 16,18,19,20,28 AD[0..31] AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE#0 C/BE#1 C/BE#2 C/BE#3 +3VS E2 E5 C2 F5 F3 E9 F2 D6 E6 D3 A2 D2 D5 H3 B4 J5 K2 K5 D4 L6 G3 H4 H2 H5 B3 M6 B2 K6 K3 A5 L1 K4 J6 H6 G4 G2 U11A AD_0 AD_1 AD_2 AD_3 AD_4 AD_5 AD_6 AD_7 AD_8 AD_9 AD_10 AD_11 AD_12 AD_13 AD_14 AD_15 AD_16 AD_17 AD_18 AD_19 AD_20 AD_21 AD_22 AD_23 AD_24 AD_25 AD_26 AD_27 AD_28 AD_29 AD_30 AD_31 C_BE_0# C_BE_1# C_BE_2# C_BE_3# PAR DEVSEL# PCICLK PCIRST# PLTRST# IRDY# PME# SERR# STOP# PLOCK# TRDY# PERR# FRAME# E1 C3 G6 R2 R5 A3 P6 G5 J1 C5 J2 E3 J3 C1 B6 F1 C8 E7 F6 D8 L5 B5 M5 B8 F7 E8 B7 N2 L2 M1 L3 D9 C7 C6 M3 PAR DEVSEL# PCLKICH R182 R492 IRDY# PME# SERR# STOP# PLOCK# TRDY# PERR# FRAME# PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4 PGNT#5 PGNT#6 PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5 PREQ#6 INT#A INT#B INT#C INT#D INT#E INT#F INT#G INT#H PAR 16,18,19,20,28 DEVSEL# 16,18,19,20,28 PCLKICH 2 DEVRST# DEVRST# 12 PLTRST# PLTRST# 5,13,21 IRDY# 16,18,19,20,28 PME# 16,18,19,21,23,28 SERR# 16,18,19,28 STOP# 16,18,19,20,28 TRDY# PERR# FRAME# PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4 PGNT#5 PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5 INT#A INT#B INT#C INT#D INT#E INT#F INT#G INT#H 16,18,19,20,28 16,18,19,28 16,18,19,20,28 16 18 19 28 28 20 16 18 19 28 28 20 28 28 16,18 16,19,20,28 18 19 28 20 PLTRST# C739 100P 27 WOW_CNTL# 4 CPUPWROK 2 5 ICHCLK14 ICHSYNC# +3VS 23 23 23 EXTSMI# SWI# SCI# 29 13

LPC

22 22

R538 R539 R540 GPI6 GPI7 EXTSMI# C SWI# D20C GPI12 D21 SCI# C D22 V_ADJ R148

8.2K 8.2K 8.2K

U11B GPI6 (+3VS) GPI7 (+3VS) GPI8 (+3VS) SMBALERT#/GPI11 (+3V) GPI12 (+3VS) GPI13 (+3V) STP_PCI#/GPO18(+3VS) GPIO19(+3VS) (+3VS) STP_CPU#/GPO20 GPIO21 (+3VS) GPIO23 (+3VS) GPIO24 (+3V) GPIO25 (+3V) GPIO27 (+3V) GPIO28 (+3V) CLKRUN#/GPIO32(+3VS) GPIO33 (+3VS) GPIO34 (+3VS) CPUPWRGD/GPO49 (VCORE) LAD_0/FB0 LAD_1/FB1 LAD_2/FB2 LAD_3/FB3 LFRAME# LDRQ_0# LDRQ_1#/GPI41 ACZ_BIT_CLK ACZ_RST# ACZ_SDIN_0 ACZ_SDIN_1 ACZ_SDIN_2 ACZ_SDOUT ACZ_SYNC EE_CS EE_DIN EE_DOUT EE_SHCLK LAN_CLK LAN_RSTSYNC LAN_RXD_0 LAN_RXD_1 LAN_RXD_2 LAN_TXD_0 LAN_TXD_1 LAN_TXD_2 A20GATE A20M# CPUSLP# DPRSLPVR/TP_1 DPRSLP#/TP_4 DPSLP#/TP_2 IGNNE# INIT3_3V# INIT# INTR FERR# NMI RCIN# SERIRQ SMI# STPCLK# THRMTRIP# SATA_0RXN SATA_0RXP SATA_0TXN SATA_0TXP SATA_1RXN SATA_1RXP SATA_1TXN SATA_1TXP SATA_2RXN SATA_2RXP SATA_2TXN SATA_2TXP SATA_3RXN SATA_3RXP SATA_3TXN SATA_3TXP SATA_CLKN SATA_CLKP SATARBIAS# SATARBIAS SATALED# P2 N3 N5 N4 P3 N6 P4 C10 A10 F11 F10 B10 C9 B9 D12 F13 D11 B12 F12 B11 E12 E11 C13 C12 C11 E13 AF22 AF23 AE27 AE20 AE24 AD27 AG26 AE22 AF27 AG24 AF24 AF25 AD23 AB20 AG27 AE26 AE23 AE3 AD3 AG2 AF2 AC5 AD5 AF4 AG4 AD7 AC7 AF6 AG6 AC9 AD9 AF8 AG8 AC2 AC1 AG11 AF11 AC19 AF17 AE18 AF18 AG18 Y4 W5 W4 U6 Y5 LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# LPC_DRQ# R493 8.2K R485 R162 LPC_AD0 21,23 LPC_AD1 21,23 LPC_AD2 21,23 LPC_AD3 21,23 LPC_FRAME# 21,23 LPC_DRQ# 21 +3VS 33ACZ_BITCLK 33ACZ_RST# ACZ_BITCLK 24,26,28 ACZ_RST# 24,26,28 ACZ_SDIN0 24,26 ACZ_SDIN1 28 ACZ_SDOUT 24,26,28 ACZ_SYNC 24,26,28

+5VS +5VS +1.5VS +1.5VS +5V +5V RTCVDD 12,17,22,23,27,29,31 5,7,12,30 12,13,14,15,20,21,23,28,31

21 FWH_FLASH# 12 GATE_PCIRST#

AC97

PCI BUS

PCI_E_RST#

GNT_0# GNT_1# GNT_2# GNT_3# GNT_4#_GPO48 GNT_5#_GPO17 GNT_6#_GPO16 REQ_0# REQ_1# REQ_2# REQ_3# REQ_4#_GPI40 REQ_5#_GPI1 REQ_6#GPI0 PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#_GPIO2 PIRQF#_GPIO3 PIRQG#_GPIO4 PIRQH#_GPIO5

AD19 AE19 A R1 A RB751V W6 RB751V M2 A R6 RB751V AC21 AB21 GPO20 AD22 8.2K(R) AD20 PCI_E_RST# AD21 SMBALRT# V3 FWH_FLASH# P5 R3 T3 AF19 GPO33 AF20 WOW_CNTL# AC18 CPUPWROK AG25

GPIO

R165 R163

ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2 33ACZ_SDOUT 33ACZ_SYNC

B.Schematic Diagrams

Sheet 11 of 37 ICH6-1
+3VS

RTCVDD

12

16,18,19,20,28 C/BE#[0..3]

ICHCLK14 E10 ICHSYNC# AG21 R665 0 U1 23 PWRBTN# SWI# D37C A RI# T2 ICHSUSB# R507 RB751V 0 T4 12 ICHSUSB# SUSC# R494 0 T5 15,23 SUSC# T6 SUS_ST# W3 23 SUS_ST# V6 SYS_RST# U2 4 SYS_RST# R590 0 V5 BATLOW# V2 U3 VCORE_PWRGD AF21 12,29 VCORE_PWRGD THERM# AC20 PCIE_WAKE# U5 PWROKICH AA1 5,12 PWROKICH RSMRST# Y3 12,23 RSMRST# C223 10P 2 Y1 R181 10M C222 12 23 26 RTCRST# RTCVDD ICHSPK PIDED[0..15] 10P RTCRST# R179 1 Y2

CLK14 MCH_SYNC# PWRBTN# RI# SLP_S3# SLP_S4# SLP_S5# SUS_STAT#/LPCPD# SUSCLK SYS_RESET# LAN_RST# BATLOW# TP_3 VRMPWRGD THRM# WAKE# PWROK RSMRST# RTCX1

LAN

ONLY 1 PIN INPUT
A20GATE K_A20M# CPUSLP#

A20GATE 23 K_A20M# 4 CPUSLP# 4

PM

2,4,8,9,12,13,14,15,18,19,20,21,23,24,26,28,30,31 27 27 27 27 27 27 27 27 27 27 15 15 27 27 28 28 27 27 27 27 USBN0 USBP0 USBN1 USBP1 USBN2 USBP2 USBN3 USBP3 USBN4 USBP4 USBN5 USBP5 USBN6 USBP6 USBN7 USBP7 OC#0 OC#2 OC#4 OC#6 USBN0 USBP0 USBN1 USBP1 USBN2 USBP2 USBN3 USBP3 USBN4 USBP4 USBN5 USBP5 USBN6 USBP6 USBN7 USBP7 OC#0 OC#1 OC#2 OC#3 OC#4 OC#5 OC#6 OC#7 C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15 A14 B14 C27 B27 B26 C26 C23 D23 C25 C24 USBP_0N USBP_0P USBP_1N USBP_1P USBP_2N USBP_2P USBP_3N USBP_3P USBP_4N USBP_4P USBP_5N USBP_5P USBP_6N USBP_6P USBP_7N USBP_7P OC_0# OC_1# OC_2# OC_3# OC_4#_GPI9 OC_5#_GPI10 OC_6#_GPI14 OC_7#_GPI15 DMI_0RXN DMI_0RXP DMI_0TXN DMI_0TXP DMI_1RXN DMI_1RXP DMI_1TXN DMI_1TXP DMI_2RXN DMI_2RXP DMI_2TXN DMI_2TXP DMI_3RXN DMI_3RXP DMI_3TXN DMI_3TXP DMI_ZCOMP DMI_IRCOMP T25 T24 R27 R26 V25 V24 U27 U26 Y25 Y24 W27 W26 AB24 AB23 AA27 AA26 F24 F23 AD25 AC25 H25 H24 G27 G26 K25 K24 J27 J26 M25 M24 L27 L26 P24 P23 N27 N26 DMI_TXN0 DMI_TXP0 DMI_RXN0 DMI_RXP0 DMI_TXN1 DMI_TXP1 DMI_RXN1 DMI_RXP1 DMI_TXN2 DMI_TXP2 DMI_RXN2 DMI_RXP2 DMI_TXN3 DMI_TXP3 DMI_RXN3 DMI_RXP3 R474 DMI_TXN0 DMI_TXP0 DMI_RXN0 DMI_RXP0 DMI_TXN1 DMI_TXP1 DMI_RXN1 DMI_RXP1 DMI_TXN2 DMI_TXP2 DMI_RXN2 DMI_RXP2 DMI_TXN3 DMI_TXP3 DMI_RXN3 DMI_RXP3 24.9 1% +1.5VS 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 +3VS ICHSYNC# R704 10K(R)

DMI

Layout

RTCX2 RTCRST# INTRUDER# SPKR INTVRMEN DD_0 DD_1 DD_2 DD_3 DD_4 DD_5 DD_6 DD_7 DD_8 DD_9 DD_10 DD_11 DD_12 DD_13 DD_14 DD_15 DDACK# DDREQ DIOR# DIOW# IORDY DA0 DA1 DA2 DCS1# DCS3# IDEIRQ ICH6

CPU

Y7 32.768K

IGNNE# FWH_INIT# HINIT# INTR FERR# NMI KB_RC_IN# SERIRQ CPU_SMI# STPCLK# R149 SATARXN0 SATARXP0 SATATXN0 SATATXP0 SATARXN1 SATARXP1 SATATXN1 SATATXP1 SATARXN2 SATARXP2 SATATXN2 SATATXP2 SATARXN3 SATARXP3 SATATXN3 SATATXP3

0

AA2 1M AA3 F8 INTVRMEN AA5 PIDED0 PIDED1 PIDED2 PIDED3 PIDED4 PIDED5 PIDED6 PIDED7 PIDED8 PIDED9 PIDED10 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15 AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13 AB15 AB14 AE16 AC14 AF16 AC16 AB17 AC17 AD16 AE17 AB16

IGNNE# 4 FWH_INIT# 21 HINIT# 3 INTR 4 FERR# 4 NMI 4 KB_RC_IN# 23 SERIRQ 16,21,23 CPU_SMI# 4 STPCLK# 4 THERMTRIPA# 4

PCI EXPRESS x1

DMI_CLKN DMI_CLKP HSIN_0 HSIP_0 HSON_0 HSOP_0 HSIN_1 HSIP_1 HSON_1 HSOP_1 HSIN_2 HSIP_2 HSON_2 HSOP_2 HSIN_3 HSIP_3 HSON_3 HSOP_3 ICH6

SRCCLK_ICH# SRCCLK_ICH

SRCCLK_ICH# 2 SRCCLK_ICH 2

Serial ATA

USB 2.0

+5VSREF R771 R772 0(R) 0 +3VS +5VS

IDE

+3V RP36 1 2 3 4 8P4RX8.2K OC#1 8 OC#3 7 6 OC#7 5 OC#5 R157 12 1% B22 A22

USBRBIAS USBRBIAS#

DEVICE PCMCIA 1394a/b GLAN MINI PCI MINI PCI RAID

INT INT#C/D INT#E/C INT#F/D INT#G/D INT#A/B INT#H/D

REQ/GNT PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4 PREQ#5

IDSEL AD16 AD17 AD19 AD20 AD21 AD18

SRCCLK_SATA# SRCCLK_SATA R161 R591 SATALED# R160 R155 R156 R158 SM_CLK SM_DATA SMLINK0 SMLINK1 LINK_ALT +3VS 8.2K 8.2K 8.2K 8.2K 24.9 1% 24.9 1%

SRCCLK_SATA# 2 SRCCLK_SATA 2

26 26 26 26 26 26 26 26 26 26 26

PDDACK# PDDREQ PDIOR# PDIOW# PDIORDY PDA0 PDA1 PDA2 PDCS#1 PDCS#3 IRQ14

PDDACK# PDDREQ PDIOR# PDIOW# PDIORDY PDA0 PDA1 PDA2 PDCS#1 PDCS#3 IRQ14

2 +3V +3V

USBCLK48

A27

CLK48

SATA_0GP/GPI26 SATA_1GP/GPI29 SATA_2GP/GPI30 SATA_3GP/GPI31 SMBCLK SMBDATA

+3VS

12,13,16,17,18,19,20,23,28,29,31

ACZ_SDIN2
+3VS RP43 1 2 3 4 RP39 1 2 3 4 RP42 1 2 3 4 RP40 1 2 3 4 8P4RX8.2K 8 PGNT#2 7 STOP# 6 TRDY# 5 FRAME# 8P4RX8.2K 8 7 PREQ#1 6 PLOCK# 5 IRDY# 8P4RX8.2K 8 INT#B INT#D 7 6 INT#C INT#A 5 8P4RX8.2K 8 PREQ#3 7 PGNT#3 6 5 PGNT#1 +3VS RP83 8 7 6 5 RP82 8 7 6 5 RP44 1 2 3 4 +5VSREF RP81 8 7 6 5 8P4RX8.2K PGNT#6 1 2 PREQ#2 3 PREQ#0 4 8P4RX8.2K 1 2 PGNT#4 3 PGNT#5 4 SERR# 8P4RX8.2K 8 DEVSEL# 7 PGNT#0 6 PAR 5 PERR# 8P4RX8.2K INT#G 1 2 PREQ#6 3 PREQ#5 4 PREQ#4

R484 R480

20K(R) 20K(R)

28
+3VS

ACZ_SDIN1

ACZ_SDIN1

+3VS GPI7 R151 8.2K RP20 +3VS GPO33 R150 8.2K(R) +3VS WOW_CNTL# R159 8.2K(R) +3VS 8.2K +5VSREF RP94 INT#H INT#E INT#F 1 2 3 4 8 7 6 5 8P4RX8.2K FWH_FLASH# R506 R505 8.2K 8.2K(R) +3V GPI6 GPI12 THERM# 8P4RX8.2K VCORE_PWRGD 1 KB_RC_IN# 2 A20GATE 3 4 SERIRQ 8P4RX8.2K PWROKICH R180 RP37 8 7 6 5 8.2K(R) 1 SMBALRT# 2 BATLOW# 3 SUS_ST# LINK_ALT 4 8P4RX8.2K PWRBTN# SWI# R508 R187 1 2 3 4 8 7 6 5 SMLINK0 PCIE_WAKE# SMLINK1 8 7 6 5 8P4RX8.2K RP41 EXTSMI# 8 7 SCI# RI# 6 SYS_RST# 5 8P4RX8.2K RP45 8 7 6 5 INTVRMEN 8.2K 8.2K R173 1 2 3 4 +3VS RP84 1 2 3 4 +3V R171 10K R176 4.7K G SM_DATA S Q10 2N7002 D +3V

+3VS

SM

SMLINK_0 SMLINK_1 LINKALERT#

+3V R183 10K R170 4.7K R178 4.7K SMBDATA 2,8,9,19,26 SM_CLK Q11 2N7002 D

+3VS

R175 4.7K

G S

07/28
PCI_E_RST# R769

SMBCLK

2,8,9,19,26

RTCVDD R174 390K 8.2K(R)

Enable +2.5V VR????

B - 12 ICH6-1 (71-D90T0-D05)

Schematic Diagrams

ICH6-2 PWR / GND
+5VS A D44 R487 C219 A D15 C RB751V 1K(R) 1U(0603) C870 +3VS C RB751V(R) 0.1U +3VS +1.5VS A D16 C 1N4148(R) C735 0.1U C698 +5V +3VS L37 1UH(0805) C676 10U(0805) +3V +1.5VS R689 L38 C178 C678 +1.5VS C736 C725 VTT1.2VS L107 C177 +3V C704 +3VS C707 0.1U 0.1U 0.1U 0.1U 1UH(0805) 0.1U G10 G11 AB22 AD26 AG23 A13 F14 G13 G14 AA12 AA14 AA15 AA17 AC15 AD17 AG13 AG16 AG19 A6 B1 E4 H1 H7 J7 L4 L7 M7 P1 A11 U4 V1 V7 W2 Y7 A17 B17 C16 C17 D16 E16 F15 F16 F18 G15 G16 G17 G18 AB3 R7 U7 G19 E22 E23 E24 F20 G20 C679 0.1U 0 C684 0.1U 1UH(0805) 0.1U 10U(0805) AE1 A25 VCCSATAPLL ACCUSBPLL VCCLAN1_5/VCCSUS1_5 VCCLAN1_5/VCCSUS1_5 V_CPU_IO V_CPU_IO V_CPU_IO VCCLAN3_3/VCCSUS3_3 VCCLAN3_3/VCCSUS3_3 VCCLAN3_3/VCCSUS3_3 VCCLAN3_3/VCCSUS3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCRTC VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 AG10 A24 AC27 0.1U U11C A8 AA18 AA10 F9 AB18 P7 F21 E26 E27 AF10 B24 V5REF V5REF VCC3_3/VCC2_5 VCC1_5/VCC2_5 VCC2_5 VCC2_5 V5REF_SUS VCC3_3/VCCA3GBG VSS/VCCS3GBG VSS/VSSASATABG VSS/VSSAUBG VCC3_3/VCCASATABG VCCSUS3_3/VCCAUBG VCCDMIPLL VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 AA22 AA23 AA24 AA25 AB25 AB26 AB27 F25 F26 F27 G22 G23 G24 G25 H21 H22 J21 J22 K21 K22 L21 L22 M21 M22 N21 N22 N23 N24 N25 P21 P25 P26 P27 R21 R22 T21 T22 U21 U22 V21 V22 W21 W22 Y21 Y22 AA6 AB4 AB5 AB6 AC4 AD4 AE4 AE5 AG5 AF5 AA7 AA8 AA9 AB8 AC8 AD8 AE8 AE9 AF9 AG9 AA19 AA20 AA21 L11 L12 L14 L16 L17 M11 M17 P11 P17 T11 T17 U11 U12 U14 U16 U17 G8 D24 D25 D26 D27 E20 E21 +1.5VS R129 10K(R) U10 R467 10K RESET# 1 PWROKICH PWROKICH 5,11 +3VS +3VS U11D A1 A4 A7 A9 A12 A15 A19 A21 A23 A26 B13 B15 B19 B21 B23 B25 C4 C14 C18 C20 C22 D1 D7 D10 D13 D14 D18 D20 D22 E14 E15 E18 E19 E25 F4 F17 F19 F22 G1 G7 G9 G12 G21 H23 H26 H27 J4 J23 J24 J25 K1 K7 K23 K26 K27 L13 L15 L23 L24 L25 M4 M12 M13 M14 M15 M16 M23 M26 M27 N1 N7 N11 N12 N13 N14 N15 N16 N17 P12 P13 P14 P15 P16 P22 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS ICH6 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS R4 R11 R12 R13 R14 R15 R16 R17 R23 R24 R25 T1 T7 T12 T13 T14 T15 T16 T23 T26 T27 U13 U15 U23 U24 U25 V4 V23 V26 V27 W1 W7 W23 W25 Y6 Y23 Y26 Y27 AA4 AA11 AA13 AA16 AB1 AB2 AB7 AB9 AB10 AB19 AC3 AC6 AC10 AC12 AC22 AC23 AC24 AC26 AD1 AD2 AD6 AD10 AD15 AD18 AD24 AE2 AE6 AE7 AE10 AE11 AE12 AE21 AE25 AF1 AF3 AF7 AF12 AF26 AG1 AG3 AG7 AG12 AG14 AG17 AG20 AG22 W24

+2.5VS +3VS

11,29 VCORE_PWRGD
+1.5VS R463

R126 6.8K 1%

0

3 4

MR# RST-IN VCC

R466 GND 2 100K

+5VS R462 1 56K 1% + C220 330UF 2 C681 0.1U C699 0.1U C663 10PF

5 C141 0.1U

MAX6306

+3V C731 0.1U C217 0.1U C744 0.1U R555 22K

+3V

14 1 7 C791 C717 0.1U C732 0.1U C715 1U(0603) 0.1U

2 U18A HC14

14 3 7

4 R569 U18B HC14

0 RSMRST# R556 10K

RSMRST# 11,23

Sheet 12 of 37 ICH6-2 PWR /GND

B.Schematic Diagrams

+3V C180 10U(0805) C680 0.1U C711 RSMRST# 0.1U 11 ICHSUSB# ICHSUSB# 1 3 TC7SZ08 5 2 U17 4 R570 0 SUSB# 13,16,23,31

C716

0.1U

C734

0.1U

C179 0.1U

C677 0.1U

C682 0.1U 11 DEVRST# DEVRST# C792 100P(R) 14 5 7 6 U18C HC14 14 9 7 8 U18D HC14 R557 33 PCIRST# PCIRST# 16,18,20,21,23,26,28

C729

0.1U

+3V C730 0.1U

C218 10U(0805)

C726 0.1U

C728 0.1U +3V

C710

0.1U

C706

0.1U

R512 C700 0.1U C724 0.1U C701 PCIRST# 0.1U G GATE_PCIRST# 11 S Q13 2N7002 D 4.7K PRST# 16,18,19,20,28

C712

0.1U

RTCVDD

RTCVDD C741 C740 C727 C703

0.01U 0.1U 0.1U 0.1U

+1.5VS RTCVDD RTCVDD +1.5VS +1.5VS +3V +3V +3VS +3VS 11,13,16,17,18,19,20,23,28,29,31 5,7,11,30 11 C702 0.1U

C705 0.1U

C683 0.1U

C685 0.1U VDD3 A D38 C 1 RB751V D19 C RB751V J1

RTCVDD VDD3 R526 C758 JOPEN