Text preview for : Compaq_F700.pdf part of Compaq_F700 Schematic Compaq_F700
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1
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8
PCB STACK UP
LAYER 1 : TOP LAYER 2 : SGND1
A
RUN POWER SW
PG 36,37
AC/BATT CONNECTOR BATT CHARGER
CPU VR
PG 34
LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : IN3 LAYER 7 : SGND2 LAYER 8 : BOT
PG 34
Turion64 Sempron
25W/35W
AMD Socket S1 638P
PG 38
DDRII-SODIMM1
PG 5
DDRII 667mhz
DC/DC +3VSUS +5VSUS
PG 33
ARES/ARTEMIS Block Diagram
SI - PHASE
A
DDRII-SODIMM2
PG 5
DDRII 667mhz HT Link
PG 2,3,4
Option for 17" only
Cable Docking
B
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HDMI CON Graphics TV_OUT VGA RJ-45 CIR/Pwr btn SPDIF Out Stereo MIC Headphone Jack USB Port VOL Cntr Mini PCI-E Card
(Wireless LAN/WAN) PCI Express Mini Card
PCI-E X 1
PCI-Express 16X
NVDIA NB8M-64bit
Express Card (NEW CARD)
PG 12,13,14,15,16,17
PG 18
PG 28
TV_OUT
PG 27
SIM CARD
nVIDIA MCP67 MCP67D
836PIN
CRT_OUT
CRT/S-VIDEO
B
PG 19
LVDS(2 Channel)
Panel Connector
PG 27
Integraded VGA Function
15" / 17"
PG 18
PG 31
CLOCK INTERFACE
Option for 17" only
USB2.0 Bluetooth
PG 28
SATA1
FingrPrint
PG 28
SATA - HDD
PG 26
USB2.0 I/O Ports PG 26 X3
Camera
1.3MP PG 23
Mini PCI-E Card x1 Express Card x1 Cable Docking x1
PCI BUS / 33MHz SATA0 LAN PATA (66/100/133) HD AUDIO
PG 5,6,7,8,9,10,11
C
SATA - HDD
C
PG 26
PATA- CD-ROM
PG 26
REALTEK Conexant
Two-element microphone
RICOH
RICOH R5C832 R5C833
VAULE DEFINE
TPM SLB9635
PG 28
LPC
Venice AMOM CX20549-12
PG 23
RTL8201CL (10/100) RTL8211B (10/100/Gigabit)
PG 21
A=0603,B=0805,C=1206,F=1%, OTHER IS 0402 V=Y5V,U=Y5U,R=X5R,S=X6S, X=X7R,G=COG,O=NPO
PG 23
Audio Jacks
-Phone -SPDIF -MIC PG 23 LAN RJ45
PG 20
IEEE1394 CONN Memory Card Reader
D
X-Bus
EXAMPLE 10R=10ohm(0402) 10A=10ohm(0603) 10B=10ohm(0805) 10C=10ohm(1206) 10/F=10ohm(0402 and 1%) EXAMPLE 0.1U/16V/R=0.1U/16V/X5R(0402) 0.47UA/10V/X=0.47U/10V/X7R(0603) 10UB/10V/U=10U/10V/Y5U(0805)
Keyboard Touch Pad CIR
ENE KBC
PG 29 PG 23
KB3920 Bx KB3926
PG 30,31
AUDIO Amplifier TPA0312
MDC DAA
CX20548-S
PG 20
PCI ROUTING IDSEL TABLE REQ0# / GNT0# AD21
PG 21
PG 22
PG 25
PG 24
INTERUPT INTA#,INTB# DEVICE RICOH832
D
Capacitive Sense SW PG 29 FAN
PG 31
Jack to Speaker
PG 25
MODEM RJ 11
PG 20
SPI ROM
PG 30
Size Custom NB5/RD2/HW1
PROJECT : AT1 DN: cn=dd, Quanta Computer Inc. o=dd, ou
Document Number
Digitally signed by dd
Rev C2A
BLOCK DIAGRAM
Date: Friday, December 29, 2006
1 2 3 4 5 6 7
email=dddd@yahoo. Date: 2009.11.24 17:0 +07'00'
Sheet 1 of 40
8
1
2
3
4
5
6
7
8
[6] HT_RXD#[15..0] [6] HT_RXD[15..0]
HT_RXD#[15..0] HT_RXD[15..0] U27A
[6] HT_TXD[15..0] [6] HT_TXD#[15..0]
HT_TXD[15..0] HT_TXD#[15..0]
W/S= 15 mil/20mil
C673 C671 C674 4.7UA/6.3V/R 180PA/50V/O 180P/50V/O 1.2V_HT CPUTEST2 CPUTEST3 CPUTEST6 CPUTEST7 CPUTEST8 CPUTEST10
2.5V 1 C684 2 100U/6.3V/6032
C669 C670 C668 C672
0.22U/6.3V/R 0.22UA/10V/X 4.7UA/6.3V/R 4.7UA/6.3V/R
1.2V_HT 1.2V_HT 1.2V_HT 1.2V_HT HT_RXD0 HT_RXD1 HT_RXD2 HT_RXD3 HT_RXD4 HT_RXD5 HT_RXD6 HT_RXD7 HT_RXD8 HT_RXD9 HT_RXD10 HT_RXD11 HT_RXD12 HT_RXD13 HT_RXD14 HT_RXD15 HT_RXD#0 HT_RXD#1 HT_RXD#2 HT_RXD#3 HT_RXD#4 HT_RXD#5 HT_RXD#6 HT_RXD#7 HT_RXD#8 HT_RXD#9 HT_RXD#10 HT_RXD#11 HT_RXD#12 HT_RXD#13 HT_RXD#14 HT_RXD#15
D1 D2 D3 D4 E3 E1 G3 G1 J1 L3 L1 N3 E5 F3 G5 H3 K3 L5 M3 N5 E2 F1 G2 H1 K1 L2 M1 N2 F5 F4 H5 H4 K4 M5 M4 P5
V_HT0_A1 V_HT0_A2 V_HT0_A3 V_HT0_A4 HT_RXD0 HT_RXD1 HT_RXD2 HT_RXD3 HT_RXD4 HT_RXD5 HT_RXD6 HT_RXD7 HT_RXD8 HT_RXD9 HT_RXD10 HT_RXD11 HT_RXD12 HT_RXD13 HT_RXD14 HT_RXD15 HT_RXD#0 HT_RXD#1 HT_RXD#2 HT_RXD#3 HT_RXD#4 HT_RXD#5 HT_RXD#6 HT_RXD#7 HT_RXD#8 HT_RXD#9 HT_RXD#10 HT_RXD#11 HT_RXD#12 HT_RXD#13 HT_RXD#14 HT_RXD#15
V_HT0_B1 V_HT0_B2 V_HT0_B3 V_HT0_B4 HT_TXD0 HT_TXD1 HT_TXD2 HT_TXD3 HT_TXD4 HT_TXD5 HT_TXD6 HT_TXD7 HT_TXD8 HT_TXD9 HT_TXD10 HT_TXD11 HT_TXD12 HT_TXD13 HT_TXD14 HT_TXD15 HT_TXD#0 HT_TXD#1 HT_TXD#2 HT_TXD#3 HT_TXD#4 HT_TXD#5 HT_TXD#6 HT_TXD#7 HT_TXD#8 HT_TXD#9 HT_TXD#10 HT_TXD#11 HT_TXD#12 HT_TXD#13 HT_TXD#14 HT_TXD#15
AE2 AE3 AE4 AE5 AD1 AC2 AB1 AA2 W2 V1 U2 T1 AD4 AD5 AB4 AB5 Y5 V4 V5 T4 AC1 AC3 AA1 AA3 W3 U1 U3 R1 AD3 AC5 AB3 AA5 W5 V3 U5 T3 Y1 Y4
1.2V_HT 1.2V_HT 1.2V_HT 1.2V_HT HT_TXD0 HT_TXD1 HT_TXD2 HT_TXD3 HT_TXD4 HT_TXD5 HT_TXD6 HT_TXD7 HT_TXD8 HT_TXD9 HT_TXD10 HT_TXD11 HT_TXD12 HT_TXD13 HT_TXD14 HT_TXD15 HT_TXD#0 HT_TXD#1 HT_TXD#2 HT_TXD#3 HT_TXD#4 HT_TXD#5 HT_TXD#6 HT_TXD#7 HT_TXD#8 HT_TXD#9 HT_TXD#10 HT_TXD#11 HT_TXD#12 HT_TXD#13 HT_TXD#14 HT_TXD#15
TEST PU/PL MUST FOLLOW ERRATUM 133 REVISION GUIDE FROM AMD NPT 0Fh CPU
U27E TEST2 TEST3 THERMDA THERMDC TEST6 TEST7 TEST8 TEST9 TEST10 TEST12 TEST13 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST21 TEST22 TEST23 TEST24 TEST25 TEST25# TEST26 TEST27 TEST28 TEST28# TEST29 TEST29#
C49 CPU2.5V 0.22U/6.3V/R
L74 48/6A/3216
02
A
A
DB2 MODIFY 1107 FOR AMD RECOMMEND
DB2 MODIFY 1106 FOR AMD RECOMMEND
DB2 MODIFY 1027 REMOVE TEST POINTS FOR AMD RECOMMEND
R52 R42 R39
T7 T9 T5 T3 T8 T127 T125 T124 T122
B
[6] HT_CPU_UPCLK0 [6] HT_CPU_UPCLK1
[6] HT_CPU_UPCLK#0 [6] HT_CPU_UPCLK#1 [6] HT_CPU_UPCTL0 1.2V_HT R563 [6] HT_CPU_UPCTL#0 R562
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1.8VSUS 1.8VSUS R47 R41 R556 R552 R22 R27 R20 R28 R29 R23 1K CPUTEST27 CPUTEST28 CPUTEST28# R43
AB6 Y6 CPU_THERMDA W8 CPU_THERMDC W7 AA6 C3 C4 C2 K8 CPUTEST12 AC8 AA7 CPUTEST14 C7 CPUTEST15 F7 CPUTEST16 E7 CPUTEST17 D7 300R CPUTEST18 H10 300R CPUTEST19 G9 CPUTEST20 AF7 300R CPUTEST21 AB8 CPUTEST22 AE8 CPUTEST23 AD7 CPUTEST24 AE7 510/F CPUTEST25 E9 510/F CPUTEST25# E8 300R CPUTEST26 AE6 AF8 J7 H8 FBCLKOUT C9 80.6/F FBCLKOUT# C8
VDDA_1 VDDA_2 RESET# PWROK LDTSTOP# HTREF0 HTREF1 VDD_FB VDD_FB# VDDIO_FB VDDIO_FB# CLKIN CLKIN# DBRDY DBREQ# TMS TCK TRST# TDI TDO CPU_PRESENT# PSI# VID0 VID1 VID2 VID3 VID4 VID5 SID SIC PROCHOT# THERMTRIP# RSVD_12 RSVD_13 RSVD_14 RSVD_15 RSVD_16 RSVD_17 RSVD_18 RSVD_19 RSVD_20 RSVD_21
F9 F8 B7 A7 F10 R6 P6 F6 E6 W9 Y9 A9 A8 G10 E10 AA9 AC9 AD9 AF9 AE9 AC6 A3 B5 C5 A4 A6 C6 A5 AF5 AF4 AC7 AF6 R22 H16 R23 R25 B18 R24 C1 H6 G6 AA8
CPU2.5V CPU2.5V HTCPU_RST1# HTCPU_PWROK1 HTCPU_STOP1# CPUHTREF0 CPUHTREF1 CPU_CORE_FB CPU_CORE_FB# CPU_SUS_FB CPUCLKIN CPUCLKIN# CPU_DBRDY CPU_DBRDY# CPU_TMS CPU_TCK CPU_TRST# CPU_TDI CPU_TDO CPU_PRES#
C683 C56 R580 R585 R571 R565 R564
4.7UA/6.3V/R 3300P/50V/X *300R *300R *300R 44.2/F 44.2/F
DB2 BOM MODIFY 1107
1.8VSUS 1.8VSUS 1.8VSUS
1.2V_HT CPU_CORE_FB [38] CPU_CORE_FB# [38] CPU_SUS_FB [37]
T130 T126 T15 T14 T12 T123 T128 T135 T131
ROUTE TRACES 80ohm DIFF IMPEDENCE 8/5/20 SPACING
CPU_VID0_L CPU_VID1_L CPU_VID2_L CPU_VID3_L CPU_VID4_L CPU_VID5_L CPU_SID CPU_SIC CPU_PROCHOT# CPU_THERMIP#
*300R 300R *300R *300R *300R *300R
1.8VSUS CPU_PSI# [38] 1.8VSUS
B
HT_CPU_UPCLK0 HT_CPU_UPCLK1
J3 J5
HT_RXCLK0 HT_RXCLK1
HT_TXCLK0 HT_TXCLK1
HT_CPU_DWNCLK0 HT_CPU_DWNCLK1
HT_CPU_DWNCLK0 [6] HT_CPU_DWNCLK1 [6]
1.8VSUS
HT_CPU_UPCLK#0 HT_CPU_UPCLK#1 HT_CPU_UPCTL0 HT_CPU_UPCTL1
J2 K5
HT_RXCLK#0 HT_RXCLK#1 HT_RXCTL0 HT_RXCTL1 HT_RXCTL#0 HT_RXCTL#1
HT_TXCLK#0 HT_TXCLK#1
W1 Y3 R2 T5 R3 R5
HT_CPU_DWNCLK#0 HT_CPU_DWNCLK#1
HT_CPU_DWNCLK#0 [6] HT_CPU_DWNCLK#1 [6] HT_CPU_DWNCTL0 [6]
CPU_SID CPU_SIC
49.9/F HT_CPU_UPCTL#1 49.9/F
N1 P3 P1 P4
HT_TXCTL0 HT_TXCTL1 HT_TXCTL#0 HT_TXCTL#1
HT_CPU_DWNCTL0 HT_CPU_DWNCTL1 T119 HT_CPU_DWNCTL#1 T118
R555 R554 R550
*300R *300R 300R
HT_CPU_DWNCTL#0 [6]
If AMD SI is not used SID can be left, SIC 300ohm to VSS.
B3 H19 H18 W18 D5 N20 P20 P19 N19 P22 R26
RSVD_1 RSVD_2 RSVD_3 RSVD_4 RSVD_5 RSVD_6 RSVD_7 RSVD_8 RSVD_9 RSVD_10 RSVD_11
R553 R561
300R 300R
1.8VSUS 1.8VSUS
CPUCLKIN
C692
3900P/25V/X 3900P/25V/X 169/F
CPU_CLK [6]
CPUCLKIN# C687
CPU_CLK# [6]
CPUCLKIN# R569
CPUCLKIN
KEEP TRACE RESISTOR <0.6" FROM CPU AND TRACE TO AC CAP <1.25" CPUVID1 PU REQUIRED FOR COMPATIBILITY WITH FUTURE CPU
AMD S1 SOCKET
AMD S1 SOCKET
HT_RXCTL1/HT_RXCRL#1 MUST <1.5" FROM CPU PIN
CPU THERMAL SENSOR & CONTROL
3V 3V
C
HT LINK CONTROL LEVEL SHIFTER
MUST KEEP LOW DURING S3-S5 TO MEET HT IO LINK SPEC
1.8VSUS 5 HTCPU_RST1# R62 0R 2 4 1 U26 *74LVC1G08GW HTCPU_RST1#
OVER TEMP CONTROL
PLACE CLOSE CPU
SI MODIFY 1219
MCP67_THERMIP# [6] 3 1 3 2 Q44 MMBT3904 SYS_SHDN# [30,33] D34 R557 CH500H 10K ECPWROK [10,14,30]
R55 U3
200R
6648VCC
C83
0.1U/16V/V
R57 R56 R72
2.7K 2.7K 10K
LM86_SMC LM86_SMD
10/20mils
8 7 SCLK SDA ALERT# OVERT# VCC DXP DXN GND 1 2 3 5 CPU_THERMDA C102 2200P/50V/X CPU_THERMDC
DB2 BOM MODIFY 1101
DB2 MODIFY
1.8VSUS
C
[6] HTCPU_RST# [10,14,30] ECPWROK
THERM_ALERT# 6 4
3V
5
REMOVE FOR MCP67 INTERNAL PULL-UP
ADDRESS: 98H
[6] HTCPU_PWRGD ECPWROK 2 1
3
R71
*10K
G781P8 MAX6657,G781P8,W83L771G
1
1.8VSUS HTCPU_PWROK1 R74 0R
3
[10] THERM_OVER#
For AMD Warm Reset
R63 *0R
R829 0R
2
1.8VSUS
MCP67_THERMIP#
SI MODIFY 1219
Q43 *PDTC144EU CPU_THERMIP# D50 2 Q73 MMBT3904 R830 CH500H 10KA 3V
SYS_SHDN# [30,33] ECPWROK [10,14,30]
4
HTCPU_PWROK1
MBCLK 3
[15,29,30,31,34] 3
MBDATA
[15,29,30,31,34] 1.8VSUS HTCPU_STOP1# R568 0R 2 ECPWROK
U28 *74LVC1G08GW
CPU OR THERM IC THERMTRIP TO SHUTDOWN SYS FROM MCP67
1
THERM_ALERT# D33 CH500H
3
SI MODIFY 1219
5
2
3V
2
3V
[6] HTCPU_STOP#
Q2 RHU002N06 LM86_SMC 1 1 LM86_SMC [5]
Q6 RHU002N06 LM86_SMD LM86_SMD [5]
4 1
HTCPU_STOP1#
CPU PROCHOT INPUT FROM THERMAL IC OR SODIMM SENSOR
[31] EC_PROCHOT# [5] DIMM_THEM# D31 CH500H D32 *CH500H D30 *CH500H
3V 2
U25 *74LVC1G08GW
Q45 PDTC144EU THERM_OVER# 1 3 CPU_PROCHOT#
D
3
D
MBCLK/MBDATA NEED PU TO 3VPCU
FOLLOW AMD AND NVIDIA RECOMMEND 0904
MODIFY 0809 [6] MCP67_PROCHOT#
1.2V_HT 1.8VSUS 2.5V 3V
[6,10,11] [3,4,5,6,32,36,37] [13,32,36] [5,6,7,8,9,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38]
NEED TO CONFIRM NVIDIA FOR THE USAGE CONNECTION TO SB
CPU_VID3_L CPU_VID2_L CPU_VID4_L CPU_VID5_L CPU_VID1_L CPU_VID0_L
R37 R30 R33 R34 R21 R24
0A 0A 0R 0A 0A 0R
CPU_VID3 CPU_VID2 CPU_VID4 CPU_VID5 CPU_VID1 CPU_VID0
[38] [38] [38] [38] [38] [38] NB5/RD2/HW1
PROJECT : AT1 Quanta Computer Inc.
Size Custom Document Number
CPU (HT_I/F,CTL)
Sheet
8
Rev C2A 2 of 40
Date: Friday, December 29, 2006
1 2 3 4 5 6 7
1
2
3
4
5
6
7
8
U27B M_A_DQ63 M_A_DQ62 M_A_DQ61 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_A_DQ57 M_A_DQ56 M_A_DQ55 M_A_DQ54 M_A_DQ53 M_A_DQ52 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ47 M_A_DQ46 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ39 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ35 M_A_DQ34 M_A_DQ33 M_A_DQ32 M_A_DQ31 M_A_DQ30 M_A_DQ29 M_A_DQ28 M_A_DQ27 M_A_DQ26 M_A_DQ25 M_A_DQ24 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ17 M_A_DQ16 M_A_DQ15 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ11 M_A_DQ10 M_A_DQ9 M_A_DQ8 M_A_DQ7 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ1 M_A_DQ0 M_A_A15 M_A_A14 M_A_A13 M_A_A12 M_A_A11 M_A_A10 M_A_A9 M_A_A8 M_A_A7 M_A_A6 M_A_A5 M_A_A4 M_A_A3 M_A_A2 M_A_A1 M_A_A0 AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12 K19 K20 V24 K24 L20 R19 L19 L22 L21 M19 M20 M24 M22 N22 N21 R21 MA_DATA[63] MA_DATA[62] MA_DATA[61] MA_DATA[60] MA_DATA[59] MA_DATA[58] MA_DATA[57] MA_DATA[56] MA_DATA[55] MA_DATA[54] MA_DATA[53] MA_DATA[52] MA_DATA[51] MA_DATA[50] MA_DATA[49] MA_DATA[48] MA_DATA[47] MA_DATA[46] MA_DATA[45] MA_DATA[44] MA_DATA[43] MA_DATA[42] MA_DATA[41] MA_DATA[40] MA_DATA[39] MA_DATA[38] MA_DATA[37] MA_DATA[36] MA_DATA[35] MA_DATA[34] MA_DATA[33] MA_DATA[32] MA_DATA[31] MA_DATA[30] MA_DATA[29] MA_DATA[28] MA_DATA[27] MA_DATA[26] MA_DATA[25] MA_DATA[24] MA_DATA[23] MA_DATA[22] MA_DATA[21] MA_DATA[20] MA_DATA[19] MA_DATA[18] MA_DATA[17] MA_DATA[16] MA_DATA[15] MA_DATA[14] MA_DATA[13] MA_DATA[12] MA_DATA[11] MA_DATA[10] MA_DATA[9] MA_DATA[8] MA_DATA[7] MA_DATA[6] MA_DATA[5] MA_DATA[4] MA_DATA[3] MA_DATA[2] MA_DATA[1] MA_DATA[0] MA_ADD[15] MA_ADD[14] MA_ADD[13] MA_ADD[12] MA_ADD[11] MA_ADD[10] MA_ADD[9] MA_ADD[8] MA_ADD[7] MA_ADD[6] MA_ADD[5] MA_ADD[4] MA_ADD[3] MA_ADD[2] MA_ADD[1] MA_ADD[0] AMD S1 SOCKET MA_DM[7] MA_DM[6] MA_DM[5] MA_DM[4] MA_DM[3] MA_DM[2] MA_DM[1] MA_DM[0] Y13 AB16 Y19 AC24 F24 E19 C15 E12 M_A_DQM7 M_A_DQM6 M_A_DQM5 M_A_DQM4 M_A_DQM3 M_A_DQM2 M_A_DQM1 M_A_DQM0 M_B_DQ63 M_B_DQ62 M_B_DQ61 M_B_DQ60 M_B_DQ59 M_B_DQ58 M_B_DQ57 M_B_DQ56 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ52 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ43 M_B_DQ42 M_B_DQ41 M_B_DQ40 M_B_DQ39 M_B_DQ38 M_B_DQ37 M_B_DQ36 M_B_DQ35 M_B_DQ34 M_B_DQ33 M_B_DQ32 M_B_DQ31 M_B_DQ30 M_B_DQ29 M_B_DQ28 M_B_DQ27 M_B_DQ26 M_B_DQ25 M_B_DQ24 M_B_DQ23 M_B_DQ22 M_B_DQ21 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ15 M_B_DQ14 M_B_DQ13 M_B_DQ12 M_B_DQ11 M_B_DQ10 M_B_DQ9 M_B_DQ8 M_B_DQ7 M_B_DQ6 M_B_DQ5 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ1 M_B_DQ0 M_B_A15 M_B_A14 M_B_A13 M_B_A12 M_B_A11 M_B_A10 M_B_A9 M_B_A8 M_B_A7 M_B_A6 M_B_A5 M_B_A4 M_B_A3 M_B_A2 M_B_A1 M_B_A0 AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
U27C MB_DATA[63] MB_DATA[62] MB_DATA[61] MB_DATA[60] MB_DATA[59] MB_DATA[58] MB_DATA[57] MB_DATA[56] MB_DATA[55] MB_DATA[54] MB_DATA[53] MB_DATA[52] MB_DATA[51] MB_DATA[50] MB_DATA[49] MB_DATA[48] MB_DATA[47] MB_DATA[46] MB_DATA[45] MB_DATA[44] MB_DATA[43] MB_DATA[42] MB_DATA[41] MB_DATA[40] MB_DATA[39] MB_DATA[38] MB_DATA[37] MB_DATA[36] MB_DATA[35] MB_DATA[34] MB_DATA[33] MB_DATA[32] MB_DATA[31] MB_DATA[30] MB_DATA[29] MB_DATA[28] MB_DATA[27] MB_DATA[26] MB_DATA[25] MB_DATA[24] MB_DATA[23] MB_DATA[22] MB_DATA[21] MB_DATA[20] MB_DATA[19] MB_DATA[18] MB_DATA[17] MB_DATA[16] MB_DATA[15] MB_DATA[14] MB_DATA[13] MB_DATA[12] MB_DATA[11] MB_DATA[10] MB_DATA[9] MB_DATA[8] MB_DATA[7] MB_DATA[6] MB_DATA[5] MB_DATA[4] MB_DATA[3] MB_DATA[2] MB_DATA[1] MB_DATA[0] MB_ADD[15] MB_ADD[14] MB_ADD[13] MB_ADD[12] MB_ADD[11] MB_ADD[10] MB_ADD[9] MB_ADD[8] MB_ADD[7] MB_ADD[6] MB_ADD[5] MB_ADD[4] MB_ADD[3] MB_ADD[2] MB_ADD[1] MB_ADD[0] AMD S1 SOCKET MB_DM[7] MB_DM[6] MB_DM[5] MB_DM[4] MB_DM[3] MB_DM[2] MB_DM[1] MB_DM[0] AD12 AC16 AE22 AB26 E25 A22 B16 A12 M_B_DQM7 M_B_DQM6 M_B_DQM5 M_B_DQM4 M_B_DQM3 M_B_DQM2 M_B_DQM1 M_B_DQM0
03
A
A
B
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Tolerance is +-10%
MA0_CLK[1] MA0_CLK#[1] E16 F16 M_A_CLK1 M_A_CLK1# C103 1.5P/50V/O M_A_CLK1 [5] M_A_CLK1# [5]
MA_DQS[7] MA_DQS[6] MA_DQS[5] MA_DQS[4] MA_DQS[3] MA_DQS[2] MA_DQS[1] MA_DQS[0] MA_DQS#[7] MA_DQS#[6] MA_DQS#[5] MA_DQS#[4] MA_DQS#[3] MA_DQS#[2] MA_DQS#[1] MA_DQS#[0]
W12 Y15 AB19 AD23 G22 C22 G16 G13 W13 W15 AB20 AC23 G21 C21 G15 H13
M_A_DQS7 M_A_DQS6 M_A_DQS5 M_A_DQS4 M_A_DQS3 M_A_DQS2 M_A_DQS1 M_A_DQS0 M_A_DQS#7 M_A_DQS#6 M_A_DQS#5 M_A_DQS#4 M_A_DQS#3 M_A_DQS#2 M_A_DQS#1 M_A_DQS#0
MB_DQS[7] MB_DQS[6] MB_DQS[5] MB_DQS[4] MB_DQS[3] MB_DQS[2] MB_DQS[1] MB_DQS[0] MB_DQS#[7] MB_DQS#[6] MB_DQS#[5] MB_DQS#[4] MB_DQS#[3] MB_DQS#[2] MB_DQS#[1] MB_DQS#[0]
AF12 AE16 AF21 AC25 F26 A24 D16 C12 AE12 AD16 AF22 AC26 E26 A23 C16 B12
M_B_DQS7 M_B_DQS6 M_B_DQS5 M_B_DQS4 M_B_DQS3 M_B_DQS2 M_B_DQS1 M_B_DQS0 M_B_DQS#7 M_B_DQS#6 M_B_DQS#5 M_B_DQS#4 M_B_DQS#3 M_B_DQS#2 M_B_DQS#1 M_B_DQS#0
Tolerance is +-10%
MA0_CLK[2] MA0_CLK#[2]
Y16 AA16
M_A_CLK2 M_A_CLK2#
B
C110 1.5P/50V/O
M_A_CLK2 [5] M_A_CLK2# [5]
TRACE FROM CAP TO CPU MUST BE LESS THAN 1200MILS MAX NECKDOWN TO & FROM CAPS IS 500MILS
MB0_CLK[1] MB0_CLK#[1]
A17 A18
M_B_CLK1 M_B_CLK1#
C122 1.5P/50V/O
M_B_CLK1 [5] M_B_CLK1# [5]
MB0_CLK[2] MB0_CLK#[2]
AF18 AF17
M_B_CLK2 M_B_CLK2#
C121 1.5P/50V/O
M_B_CLK2 [5] M_B_CLK2# [5]
MA_BANK[2] MA_BANK[1] MA_BANK[0]
K22 R20 T22
M_A_BA2 M_A_BA1 M_A_BA0
MB_BANK[2] MB_BANK[1] MB_BANK[0]
K26 T26 U26
M_B_BA2 M_B_BA1 M_B_BA0
TRACE FROM CAP TO CPU MUST BE LESS THAN 1200MILS MAX NECKDOWN TO & FROM CAPS IS 500MILS
MB_RAS# MB_CAS# MB_WE#
U24 V26 U22
M_B_RAS# M_B_CAS# M_B_WE#
MA_RAS# MA_CAS# MA_WE#
T20 U20 U21
M_A_RAS# M_A_CAS# M_A_WE#
C
MA0_CS#[3] MA0_CS#[2] MA0_CS#[1] MA0_CS#[0]
V19 J22 V22 T19
M_A_CS#3 M_A_CS#2 M_A_CS#1 M_A_CS#0
MA_CKE[1] MA_CKE[0]
J20 J21
M_A_CKE1 M_A_CKE0
MA0_ODT[1] MA0_ODT[0]
V20 U19
M_A_ODT1 M_A_ODT0
J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24
MB0_CS#[3] MB0_CS#[2] MB0_CS#[1] MB0_CS#[0] MB_CKE[1] MB_CKE[0] MB0_ODT[1] MB0_ODT[0] VTT_SENSE M_VREF M_ZN M_ZP
Y26 J24 W24 U23 H26 J23 W23 W26 Y10 W17 AE10 AF10
M_B_CS#3 M_B_CS#2 M_B_CS#1 M_B_CS#0 M_B_CKE1 M_B_CKE0 M_B_ODT1 M_B_ODT0 VTERM_FB M_VREF MEMZN MEMZP R581 R586 39.2/F 39.2/F C106 1000P/50V/X C120 0.1U/16V/V 1.8VSUS R78 2K/F VTERM_FB [37] 1.8VSUS
C
R80 2K/F
M_VREF : W =20MIL AND SPACE = 20MIL
M_A_DQ[0..63] M_A_A[0..15] M_A_DQM[0..7] M_A_DQS[0..7] M_A_DQS#[0..7] M_A_BA[0..2] M_A_CS#[0..3] M_A_CKE[0..1] M_A_ODT[0..1] M_A_RAS# M_A_CAS# M_A_WE# M_A_RAS# [4,5] M_A_CAS# [4,5] M_A_WE# [4,5] M_A_CKE[0..1] [4,5] M_A_ODT[0..1] [4,5] M_B_DQ[0..63] M_B_A[0..15] M_B_DQM[0..7] M_B_DQS[0..7] M_B_DQS#[0..7] M_B_BA[0..2] M_B_CS#[0..3] NB5/RD2/HW1
1 2 3 4 5 6 7 D
[5] M_A_DQ[0..63]
D
[5] M_B_DQ[0..63] [4,5] M_B_A[0..15] [5] M_B_DQM[0..7] [5] M_B_DQS[0..7] [5] M_B_DQS#[0..7] [4,5] M_B_BA[0..2] [4,5] M_B_CS#[0..3]
[4,5] M_A_A[0..15] [5] M_A_DQM[0..7] [5] M_A_DQS[0..7] [5] M_A_DQS#[0..7] [4,5] M_A_BA[0..2] [4,5] M_A_CS#[0..3]
M_B_RAS# M_B_CAS# M_B_WE# M_B_CKE[0..1] M_B_ODT[0..1]
M_B_RAS# [4,5] M_B_CAS# [4,5] M_B_WE# [4,5] M_B_CKE[0..1] [4,5] M_B_ODT[0..1] [4,5]
1.8VSUS
[2,4,5,6,32,36,37]
PROJECT : AT1 Quanta Computer Inc.
Size Custom Document Number
CPU (MEM_I/F)
Sheet
8
Rev C2A 3 of 40
Date: Friday, December 29, 2006
1
2
3
4
5
6
7
8
CPU POWER PLANE AND BY PASS CAP
CPU_CORE U27D C75 C74 C93 C77 C91 C90 C76 C53 C92 C52 C50 C51 C72 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 0.01U/16V/X 0.22U/6.3V/R 0.22U/6.3V/R 180PA/50V/O CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE CPU_CORE AC4 AD2 G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 K16 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 M16 N7 N9 N11 P8 P10 P16 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 T16 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 V16 W4 Y2 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27 VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS C233 C119 C109 C112 C408 C113 C205 C194 C261 C276 C186 C118 C139 C243 C257 C188 C137 C130 C220 C217 C920 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.01U/16V/X 0.01U/16V/X 180PA/50V/O 180PA/50V/O 180PA/50V/O 1.8VSUS AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 U27F VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N6 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23
DDR2 TERMINATION BYPASS CAP
CHANNEL A
SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM C397 C468 C509 C395 C398 C431 C508 C473 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
CHANNEL B
SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM C426 C467 C469 C429 C475 C430 C396 C458
04
0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
A
A
DB2 BOM MODIFY 1107
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
B
www.kythuatvitinh.com
DB2 MODIFY 1027 FOR AMD RECOMMEND
C81 C69 C82 C63 A10 AA10 AB10 AC10 AD10 B10 C10 D10 W10 SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R SMDDR_VTERM M_B_BA1 M_B_A4 RP9 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 2 47/4P2R 4 2 47/4P2R 4
DDRII CHANNEL B TERMINATION
DB2 BOM MODIFY 1107
M_B_ODT0 M_B_CS#0 M_B_A3 M_B_A1
RP11 RP3 RP5 RP8 RP6 RP13 RP14 RP10 RP4 RP12 RP15 RP2 RP1 RP7
C712 C73 C709 C60 C59 C84 C67 C66 C705 C79 C78 C697
0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 0.22U/6.3V/R 1000P/50V/X 1000P/50V/X 1000P/50V/X 1000P/50V/X 180PA/50V/O 180PA/50V/O 180PA/50V/O 180PA/50V/O
B
2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4
[3,5]
M_B_WE#
M_B_WE# M_B_BA0 M_B_A2 M_B_A6
[3,5]
M_B_CAS#
M_B_CAS# M_B_CS#1 M_B_BA2 M_B_CKE1 M_B_A14 M_B_A11 M_B_ODT1 M_B_RAS# M_B_A0 M_B_A10 M_B_A15 M_B_CKE0 M_B_A7 M_B_A9 M_B_A8 M_B_A5 M_B_CS#2 M_B_A12
SMDDR_VTERM
(0.9VSUS)
AMD S1 SOCKET C462 C443 C399 C814 C459 *4.7UB/10V/R *4.7UB/10V/R 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
[3,5]
M_B_RAS#
1.8VSUS 1.8VSUS 1.8VSUS
C
SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM
C454 C278 C445 C525
0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM
1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS
1.8VSUS 1.8VSUS
AMD S1 SOCKET
C
1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS
C449 C452 C400 C453 C444
0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM M_A_A0 M_A_BA1 M_A_CS#0 M_A_BA0
DDRII CHANNEL A TERMINATION
SMDDR_VTERM RP30 RP21 RP22 RP32 RP19 RP31 RP16 RP24 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 [3,5] M_A_CAS# M_A_A12 M_A_BA2 M_A_A10 M_A_A1 M_A_A4 M_A_A8 M_A_A11 M_A_A14 M_A_A6 M_A_A7 M_A_A2 M_A_A9 M_A_CAS# M_A_CS#1 RP17 RP20 RP18 RP25 RP28 RP29 RP23 1 3 1 3 1 3 1 3 1 3 1 3 1 3 SMDDR_VTERM 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 2 47/4P2R 4 SMDDR_VTERM SMDDR_VTERM SMDDR_VTERM
M_B_CS#3 M_B_A13
C316 C288 C307
0.1U/16V/V 0.1U/16V/V 0.1U/16V/V
1.8VSUS 1.8VSUS 1.8VSUS
M_B_A[0..15] M_B_CKE[0..1] M_B_ODT[0..1] M_B_BA[0..2] M_B_CS#[0..3]
M_A_A[0..15] M_A_CKE[0..1] M_A_ODT[0..1]
D
M_A_A[0..15] [3,5] M_A_CKE[0..1] [3,5] M_A_ODT[0..1] [3,5] M_A_BA[0..2] [3,5] M_A_CS#[0..3] [3,5]
[3,5]
M_A_WE#
M_A_WE# M_A_ODT1 M_A_CS#3 M_A_A13 M_A_A5 M_A_A3 M_A_ODT0 M_A_RAS# M_A_CKE0 M_A_CS#2 M_A_A15 M_A_CKE1
M_B_A[0..15] [3,5] M_B_CKE[0..1] [3,5] M_B_ODT[0..1] [3,5] M_B_BA[0..2] [3,5]
D
M_A_BA[0..2] M_A_CS#[0..3]
M_B_CS#[0..3] [3,5]
[3,5]
M_A_RAS#
PROJECT : AT1 Quanta Computer Inc.
Size Custom NB5/RD2/HW1 Document Number
SMDDR_VTERM [37] CPU_CORE [32,38] 1.8VSUS [2,3,5,6,32,36,37]
1 2
CPU (POWER,GND),DDR2_TERM
Sheet
8
Rev C2A of 40
Date: Friday, December 29, 2006
3 4 5 6 7
4
1
2
3
4
5
6
7
8
M_A_RAS# M_A_CAS# M_A_WE# M_A_CLK1 M_A_CLK1# M_A_CLK2 M_A_CLK2#
M_A_RAS# [3,4] M_A_CAS# [3,4] M_A_WE# [3,4] M_A_CLK1 [3] M_A_CLK1# [3] M_A_CLK2 [3] M_A_CLK2# [3]
M_A_BA[0..2] M_A_CS#[0..3] M_A_CKE[0..1] M_A_ODT[0..1]
M_A_BA[0..2] [3,4] M_A_CS#[0..3] [3,4] M_A_CKE[0..1] [3,4] M_A_ODT[0..1] [3,4]
M_A_DQ[0..63] M_A_A[15..0] M_A_DQM[0..7] M_A_DQS[0..7] M_A_DQS#[0..7]
M_A_DQ[0..63] [3] M_A_A[15..0] [3,4] M_A_DQM[0..7] [3] M_A_DQS[0..7] [3] M_A_DQS#[0..7] [3]
M_B_RAS# M_B_CAS# M_B_WE# M_B_CLK1 M_B_CLK1# M_B_CLK2 M_B_CLK2#
M_B_RAS# [3,4] M_B_CAS# [3,4] M_B_WE# [3,4] M_B_CLK1 [3] M_B_CLK1# [3] M_B_CLK2 [3] M_B_CLK2# [3]
M_B_BA[0..2] M_B_CS#[0..3] M_B_CKE[0..1] M_B_ODT[0..1]
M_B_BA[0..2] [3,4] M_B_CS#[0..3] [3,4] M_B_CKE[0..1] [3,4] M_B_ODT[0..1] [3,4]
M_B_DQ[0..63] M_B_A[0..15] M_B_DQM[0..7] M_B_DQS[0..7] M_B_DQS#[0..7]
M_B_DQ[0..63] [3] M_B_A[0..15] [3,4] M_B_DQM[0..7] [3] M_B_DQS[0..7] [3] M_B_DQS#[0..7] [3]
05
A
A
CKE 0,1
M_A_DQ5 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ0 M_A_DQ4 M_A_DQ6 M_A_DQ7 M_A_DQ9 M_A_DQ8 M_A_DQ10 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ15 M_A_DQ11 M_A_DQ17 M_A_DQ21 M_A_DQ18 M_A_DQ16 M_A_DQ20 M_A_DQ19 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ27 M_A_DQ30 M_A_DQ28 M_A_DQ29 M_A_DQ26 M_A_DQ31 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_BA0 M_A_BA1 M_A_BA2 M_A_CLK1 M_A_CLK1# M_A_CLK2 M_A_CLK2# 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 10 26 52 67 130 147 170 185 13 11 31 29 51 49 70 68 131 129 148 146 169 167 188 186 110 115 108 113 109 79 80 M_A_DQ32 M_A_DQ36 M_A_DQ34 M_A_DQ37 M_A_DQ33 M_A_DQ38 M_A_DQ39 M_A_DQ35 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ46 M_A_DQ44 M_A_DQ45 M_A_DQ43 M_A_DQ47 M_A_DQ55 M_A_DQ54 M_A_DQ49 M_A_DQ52 M_A_DQ48 M_A_DQ53 M_A_DQ50 M_A_DQ51 M_A_DQ57 M_A_DQ61 M_A_DQ63 M_A_DQ62 M_A_DQ56 M_A_DQ60 M_A_DQ59 M_A_DQ58 M_B_DQ1 M_B_DQ4 M_B_DQ3 M_B_DQ2 M_B_DQ0 M_B_DQ5 M_B_DQ7 M_B_DQ6 M_B_DQ9 M_B_DQ8 M_B_DQ14 M_B_DQ15 M_B_DQ12 M_B_DQ13 M_B_DQ10 M_B_DQ11 M_B_DQ17 M_B_DQ20 M_B_DQ19 M_B_DQ18 M_B_DQ16 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ30 M_B_DQ31 M_B_DQ28 M_B_DQ29 M_B_DQ27 M_B_DQ26 5 7 17 19 4 6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
CKE 2,3
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194 10 26 52 67 130 147 170 185 13 11 31 29 51 49 70 68 131 129 148 146 169 167 188 186 110 115 108 113 109 79 80 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ34 M_B_DQ32 M_B_DQ33 M_B_DQ39 M_B_DQ35 M_B_DQ44 M_B_DQ41 M_B_DQ47 M_B_DQ46 M_B_DQ40 M_B_DQ45 M_B_DQ42 M_B_DQ43 M_B_DQ55 M_B_DQ54 M_B_DQ53 M_B_DQ48 M_B_DQ51 M_B_DQ50 M_B_DQ49 M_B_DQ52 M_B_DQ57 M_B_DQ60 M_B_DQ62 M_B_DQ59 M_B_DQ61 M_B_DQ56 M_B_DQ58 M_B_DQ63 SMDDR_VREF_DIMM C526 C819 C840 C813 C815 C402 C817 C821 C822 C824 C816 2.2UA/6.3V/R 2.2UA/6.3V/R 2.2UA/6.3V/R 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1 81 82 87 88 95 96 103 104 111 112 117 118 114 119 VREF VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 ODT0 ODT1 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_59 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 202 SMDDR_VREF_DIMM C820 C818 C466 C838 C839 C836 C835 C401 C450 C823 C837 2.2UA/6.3V/R 2.2UA/6.3V/R 2.2UA/6.3V/R 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1.8VSUS 1 81 82 87 88 95 96 103 104 111 112 117 118 114 119 VREF VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 ODT0 ODT1 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_59 2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 202
PC2100 DDR2 SDRAM SO-DIMM (200P)
PC2100 DDR2 SDRAM SO-DIMM (200P)
PC2100 DDR2 SDRAM SO-DIMM (200P)
B
102 101 100 99 98 97 94 92 93 91 105 90 89 107 106 85 30 32 164 166 197 195 198 200 199
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M_A_ODT0 M_A_ODT1 M_B_ODT0 M_B_ODT1 M_A_CS#2 M_A_A15 M_A_A14 M_A_A13 M_A_CS#3 50 69 83 84 86 116 120 163 162 165 168 171 172 177 178 183 184 187 190 193 196 201 NC_1 NC_2 NC_3 NC_4/A15 NC_5/A14 NC_6/A13 NC_7 NC_8 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 M_B_CS#2 M_B_A15 M_B_A14 M_B_A13 M_B_CS#3 50 69 83 84 86 116 120 163 162 165 168 171 172 177 178 183 184 187 190 193 196 201 NC_1 NC_2 NC_3 NC_4/A15 NC_5/A14 NC_6/A13 NC_7 NC_8 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 BA0 BA1 NC/BA2 CLK0 CLK0 CLK1 CKL1 SCL SDA SA0 SA1 VDDSPD DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS0 DQS1 DQS1 DQS2 DQS2 DQS3 DQS3 DQS4 DQS4 DQS5 DQS5 DQS6 DQS6 DQS7 DQS7 CS0 CS1 RAS CAS WE CKE0 CKE1 M_A_DQM0 M_A_DQM1 M_A_DQM2 M_A_DQM3 M_A_DQM4 M_A_DQM5 M_A_DQM6 M_A_DQM7 M_A_DQS0 M_A_DQS#0 M_A_DQS1 M_A_DQS#1 M_A_DQS2 M_A_DQS#2 M_A_DQS3 M_A_DQS#3 M_A_DQS4 M_A_DQS#4 M_A_DQS5 M_A_DQS#5 M_A_DQS6 M_A_DQS#6 M_A_DQS7 M_A_DQS#7 M_A_CS#0 M_A_CS#1 M_A_RAS# M_A_CAS# M_A_WE# M_A_CKE0 M_A_CKE1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 102 101 100 99 98 97 94 92 93 91 105 90 89 107 106 85 30 32 164 166 197 195 198 200 199 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 M_B_BA0 M_B_BA1 M_B_BA2 M_B_CLK1 M_B_CLK1# M_B_CLK2 M_B_CLK2# DDR_SMBCLK DDR_SMBDTA DIM2_SA0 DIM2_SA1 3V BA0 BA1 NC/BA2 CLK0 CLK0 CLK1 CKL1 SCL SDA SA0 SA1 VDDSPD DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS0 DQS1 DQS1 DQS2 DQS2 DQS3 DQS3 DQS4 DQS4 DQS5 DQS5 DQS6 DQS6 DQS7 DQS7 CS0 CS1 RAS CAS WE CKE0 CKE1 M_B_DQM0 M_B_DQM1 M_B_DQM2 M_B_DQM3 M_B_DQM4 M_B_DQM5 M_B_DQM6 M_B_DQM7 M_B_DQS0 M_B_DQS#0 M_B_DQS1 M_B_DQS#1 M_B_DQS2 M_B_DQS#2 M_B_DQS3 M_B_DQS#3 M_B_DQS4 M_B_DQS#4 M_B_DQS5 M_B_DQS#5 M_B_DQS6 M_B_DQS#6 M_B_DQS7 M_B_DQS#7 M_B_CS#0 M_B_CS#1 M_B_RAS# M_B_CAS# M_B_WE# M_B_CKE0 M_B_CKE1 CN28B 2-1734073-1 CN26B 1565917-4
PC2100 DDR2 SDRAM SO-DIMM (200P)
B
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm1. No Vias Between the Trace of PIN to CAP.
Close DDR2 socket
C520 C483 0.1U/16V/V 2.2UA/6.3V/R 3V 3V
3V C507 C463 *2.2UA/6.3V/R 0.1U/16V/V
C
C
DDR_SMBCLK DDR_SMBDTA DIM1_SA0 DIM1_SA1 3V
SMDDR_VREF_DIMM R258 C474 C407 2K/F 0.1U/16V/V 2.2UA/6.3V/R R253 2K/F
R259 *0R 1.8VSUS C457 C472
SMDDR_VREF [37]
CN28A 2-1734073-1 R320 R321 10K 10K
HEIGHT=9.2mm
DIM1_SA0 DIM1_SA1
CN26A 1565917-4 DIM2_SA0 DIM2_SA1 R280 R266
HEIGHT=5.2mm
10K 10K 3V
SMDDR_VREF_DIMM :
0.1U/16V/V 2.2UA/6.3V/R
SMDDR_VREF_DIMM SMDDR_VREF_DIMM
TRACE WIDTH > 20 MIL PUT BYPASS CAP ON EACH DIMM
SMbus address A0
SMbus address A2 Address:92h
U34 7 6 5 LM86_SMD LM86_SMC 1 2 8 3V
DDR_SMBDTA
1 Q13 2
3 2N7002E
CGDAT_SMB [10]
DDR_SMBDTA DDR_SMBCLK
R281 R282
2.2K 2.2K
3V
3V
A0 A1 A2 SDA SCL
+VS O.S
C804
*0.1U/16V/V 3V DIMM_THEM# [2]
D
R673
*10K
DIMM_THEM#
3 DIMM_THEM# 4
D
3V
[2] [2]
LM86_SMD LM86_SMC
GND
*G751 (LM75CIMM3) DDR_SMBCLK 1 Q11 2 3 2N7002E CGCLK_SMB [10]
PROJECT : AT1 Quanta Computer Inc.
1.8VSUS 3V [2,3,4,6,32,36,37] [2,6,7,8,9,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38]
5 6
3V
Size Custom NB5/RD2/HW1
7
Document Number
DDR SO-DIMMx2 (200P)
Sheet
8
Rev C2A 5 of 40
Date: Friday, December 29, 2006
1 2 3 4
1
2
3
4
5
6
7
8
[2] HT_TXD[15..0]
U30A HT_TXD0 HT_TXD1 HT_TXD2 HT_TXD3 HT_TXD4 HT_TXD5 HT_TXD6 HT_TXD7 HT_TXD8 HT_TXD9 HT_TXD10 HT_TXD11 HT_TXD12 HT_TXD13 HT_TXD14 HT_TXD15 HT_TXD#0 HT_TXD#1 HT_TXD#2 HT_TXD#3 HT_TXD#4 HT_TXD#5 HT_TXD#6 HT_TXD#7 HT_TXD#8 HT_TXD#9 HT_TXD#10 HT_TXD#11 HT_TXD#12 HT_TXD#13 HT_TXD#14 HT_TXD#15 AF16 AH16 AJ15 AK16 AG17 AL17 AL18 AJ19 AD14 AF14 AH14 AL13 AC15 AD16 AE17 AB17 AG16 AJ16 AK15 AL16 AF17 AK17 AK18 AK19 AE14 AG14 AJ14 AK13 AD15 AE16 AD17 AC17 AJ17 AH17 AL14 AK14 HT_MCP_RXD0_P HT_MCP_RXD1_P HT_MCP_RXD2_P HT_MCP_RXD3_P HT_MCP_RXD4_P HT_MCP_RXD5_P HT_MCP_RXD6_P HT_MCP_RXD7_P HT_MCP_RXD8_P HT_MCP_RXD9_P HT_MCP_RXD10_P HT_MCP_RXD11_P HT_MCP_RXD12_P HT_MCP_RXD13_P HT_MCP_RXD14_P HT_MCP_RXD15_P HT_MCP_RXD0_N HT_MCP_RXD1_N HT_MCP_RXD2_N HT_MCP_RXD3_N HT_MCP_RXD4_N HT_MCP_RXD5_N HT_MCP_RXD6_N HT_MCP_RXD7_N HT_MCP_RXD8_N HT_MCP_RXD9_N HT_MCP_RXD10_N HT_MCP_RXD11_N HT_MCP_RXD12_N HT_MCP_RXD13_N HT_MCP_RXD14_N HT_MCP_RXD15_N
MCP67 1 OF 7
HT
A
[2] HT_TXD#[15..0]
HT_MCP_TXD0_P HT_MCP_TXD1_P HT_MCP_TXD2_P HT_MCP_TXD3_P HT_MCP_TXD4_P HT_MCP_TXD5_P HT_MCP_TXD6_P HT_MCP_TXD7_P HT_MCP_TXD8_P HT_MCP_TXD9_P HT_MCP_TXD10_P HT_MCP_TXD11_P HT_MCP_TXD12_P HT_MCP_TXD13_P HT_MCP_TXD14_P HT_MCP_TXD15_P HT_MCP_TXD0_N HT_MCP_TXD1_N HT_MCP_TXD2_N HT_MCP_TXD3_N HT_MCP_TXD4_N HT_MCP_TXD5_N HT_MCP_TXD6_N HT_MCP_TXD7_N HT_MCP_TXD8_N HT_MCP_TXD9_N HT_MCP_TXD10_N HT_MCP_TXD11_N HT_MCP_TXD12_N HT_MCP_TXD13_N HT_MCP_TXD14_N HT_MCP_TXD15_N
AK27 AK26 AK25 AL24 AK22 AK21 AH21 AL20 AG27 AF25 AH25 AE23 AD21 AF21 AC20 AE19 AJ27 AL26 AL25 AK24 AL22 AL21 AJ21 AM20 AH27 AG25 AJ25 AF23 AE21 AG21 AD20 AF19 AK23 AJ23 AG23 AH23 AK20 AJ20 AD19 AC19
HT_RXD0 HT_RXD1 HT_RXD2 HT_RXD3 HT_RXD4 HT_RXD5 HT_RXD6 HT_RXD7 HT_RXD8 HT_RXD9 HT_RXD10 HT_RXD11 HT_RXD12 HT_RXD13 HT_RXD14 HT_RXD15 HT_RXD#0 HT_RXD#1 HT_RXD#2 HT_RXD#3 HT_RXD#4 HT_RXD#5 HT_RXD#6 HT_RXD#7 HT_RXD#8 HT_RXD#9 HT_RXD#10 HT_RXD#11 HT_RXD#12 HT_RXD#13 HT_RXD#14 HT_RXD#15
HT_RXD[15..0] [2]
06
A
HT_RXD#[15..0] [2]
3V HT_CPU_REQ# R59 R69 22K
MCP67D & MCP67M DIFFERENCE TABLE
LOCATION
B
Ra Ca Rb Cb Rc Cc Re Rd Cd Rf Rg Rh
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MCP67_THERMIP# *300R
MCP67M (UMA) 124 1% 0.01UF
MCP67D (DISCRETE) NC NC
[2] [2] [2] [2]
HT_CPU_DWNCLK0 HT_CPU_DWNCLK#0 HT_CPU_DWNCLK1 HT_CPU_DWNCLK#1
HT_CPU_DWNCLK0 HT_CPU_DWNCLK#0 HT_CPU_DWNCLK1 HT_CPU_DWNCLK#1 HT_CPU_DWNCTL0 HT_CPU_DWNCTL#0
HT_MCP_RX_CLK0_P HT_MCP_RX_CLK0_N HT_MCP_RX_CLK1_P HT_MCP_RX_CLK1_N HT_MCP_RXCTL0_P HT_MCP_RXCTL0_N HT_MCP_RXCTL1_P HT_MCP_RXCTL1_N
HT_MCP_TX_CLK0_P HT_MCP_TX_CLK0_N HT_MCP_TX_CLK1_P HT_MCP_TX_CLK1_N
HT_CPU_UPCLK0 HT_CPU_UPCLK#0 HT_CPU_UPCLK1 HT_CPU_UPCLK#1 HT_CPU_UPCTL0 HT_CPU_UPCTL#0
HT_CPU_UPCLK0 [2] HT_CPU_UPCLK#0 [2] HT_CPU_UPCLK1 [2] HT_CPU_UPCLK#1 [2] HT_CPU_UPCTL0 [2] HT_CPU_UPCTL#0 [2]
MODIFY FOR NVIDIA RECOMMEND 0906 SI MODIFY 1219
[2] HT_CPU_DWNCTL0 [2] HT_CPU_DWNCTL#0
124 1% 0.01UF 1K 1% 0.01UF 22K
NC NC
AH19 AG19 AC18 AD18 AC13 AB13
HT_MCP_TXCTL0_P HT_MCP_TXCTL0_N HT_MCP_TXCTL1_P HT_MCP_TXCTL1_N
MODIFY 0904
1.8VSUS
B
NC NC NC NC NC NC NC NC
[2] MCP67_THERMIP# [2] MCP67_PROCHOT#
MCP67_THERMIP# MCP67_PROCHOT#
THERMTRIP#/GPIO_58(3V) PROCHOT#/GPIO_20(3V_S5)
CLKOUT_200MHZ_P CLKOUT_200MHZ_N
AL28 AM28 AD23 AB20 AC21 AD22
CPU_CLK CPU_CLK#
CPU_CLK [2] CPU_CLK# [2]
MCP67_THERMIP# HTCPU_STOP# HTCPU_RST# HTCPU_PWRGD MCP67_PROCHOT#
R551 R50 R48 R49 R549
*300R 300R 300R 300R 300R
1K 1% 0.1UF 10K 10K 6.2K
as close as ball within 500mils
1.2V_HT R573 R572 150R 150R
5mil/10mil
CPU_CAL_1P2V CPU_CAL_GND AM12 AL12 HT_MCP_COMP_VDD
HT_MCP_REQ# HT_MCP_STOP# HT_MCP_RST# HT_MCP_PWRGD
HT_CPU_REQ# HTCPU_STOP# HTCPU_RST# HTCPU_PWRGD CPU_SBVREF MCP67_CTERM
HTCPU_STOP# [2] HTCPU_RST# [2] HTCPU_PWRGD [2] 0A 0.1U/16V/V 2.37K/F
CPU_SBVREF HT_MCP_COMP_GND CLK200_TERM_GND
AG28 AJ28
R65 C126 R77
1.2V_HT
MODIFY 0810 as close as ball within 500mils
MODIFY 0810
FOR MCP67M UMA ONLY
R236 R227 R233
C
[13,19] [13,19] [13,19] [13,19] [13,19]
CRT_R CRT_G CRT_B HSYNC VSYNC
R117 R130 R121 R169 R178
*0R *0R *0R *0R *0R *124/F *0.01U/16V/X *0R *0R *0R *0R *0R *124/F *0.01U/16V/X
CRT_R_MCP67 CRT_G_MCP67 CRT_B_MCP67 HSYNC_R VSYNC_R RGB_DAC_RSET RGB_DAC_VREF DDC_CLK0 DDC_DATA0 TV_R_MCP67 TV_G_MCP67 TV_B_MCP67 TV_DAC_RSET TV_DAC_VREF TV_XTALIN TV_XTALOUT
B21 C21 B22 G21 H21 K21 D21 G8 H8 C23 C22 D23 E23 H22 E17 F17
RGB_DAC_RED RGB_DAC_GREEN RGB_DAC_BLUE RGB_DAC_HSYNC RGB_DAC_VSYNC RGB_DAC_RSET RGB_DAC_VREF DDC_CLK0 DDC_DATA0 TV_DAC_RED TV_DAC_GREEN TV_DAC_BLUE TV_DAC_RSET TV_DAC_VREF TV_XTALIN TV_XTALOUT
IFPA_TXC_P IFPA_TXC_N IFPA_TXD0_P IFPA_TXD0_N IFPA_TXD1_P IFPA_TXD1_N IFPA_TXD2_P IFPA_TXD2_N IFPA_TXD3_P IFPA_TXD3_N IFPB_TXC_P IFPB_TXC_N IFPB_TXD4_P IFPB_TXD4_N IFPB_TXD5_P IFPB_TXD5_N IFPB_TXD6_P IFPB_TXD6_N IFPB_TXD7_P IFPB_TXD7_N IFPAB_VPROBE IFPAB_RSET DDC_CLK2 DDC_DATA2 LCD_PANEL_PWR LCD_BKL_ON LCD_BKL_CTL
AE30 AE31 AC30 AC29 AC27 AC28 AD30 AD29 AD31 AD32 AJ31 AJ32 AE28 AE29 AF30 AF31 AG30 AG29 AH31 AH30 AB30 AB31 L21 J22 AE27 AE25 AD24 U11 T11
LA_CLK LA_CLK# LA_DATAP0 LA_DATAN0 LA_DATAP1 LA_DATAN1 LA_DATAP2 LA_DATAN2 LA_DATAP3 LA_DATAN3 LB_CLK LB_CLK# LB_DATAP0 LB_DATAN0 LB_DATAP1 LB_DATAN1 LB_DATAP2 LB_DATAN2 LB_DATAP3 LB_DATAN3
4 2 4 2 4 2 2 4
3 RP51 1 *0/4P2R 3 1 3 1 1 3 RP45 *0/4P2R RP47 *0/4P2R RP49 *0/4P2R T150 T147
TXLCLKOUT+ TXLCLKOUTTXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2-
TXLCLKOUT+ [13,18] TXLCLKOUT- [13,18] TXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2[13,18] [13,18] [13,18] [13,18] [13,18] [13,18]
*150R *150R *150R *150R *150R *150R
CRT_R_MCP67 CRT_G_MCP67 CRT_B_MCP67 TV_R_MCP67 TV_G_MCP67 TV_B_MCP67
DB2 MODIFY 1024
[13,19,31] DDCCLK [13,19,31] DDCDAT [13,19] [13,19] [13,19] S-CD S-YD S-CVBS
Ra R146 Ca C229
R634 R633 R82 R87 R83
[LVDS]
C
R198 R197 R203 C801
DACS
4 2 2 4 4 2 4 2
3 RP37 1 *0/4P2R 1 3 3 1 3 1 RP43 *0/4P2R RP39 *0/4P2R RP41 *0/4P2R T143 T145
TXUCLKOUT+ TXUCLKOUTTXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2+ TXUOUT2-
TXUCLKOUT+ [13,18] TXUCLKOUT- [13,18] TXUOUT0+ TXUOUT0TXUOUT1+ TXUOUT1TXUOUT2+ TXUOUT2[13,18] [13,18] [13,18] [13,18] [13,18] [13,18]
*18P/50V/G Y8 *27MHZ
FOR MCP67M TV-OUT
C800
DB2 MODIFY 1024
Rb R224 Cb C192
[LVDS]
*18P/50V/G
R73
Rf R84
3V
Rg
R157 R161
*10K *10K *10K *10K *6.2K *0.1U/16V/V *1K/F T139 T132
HDCP_ROM_SCLK HDCP_ROM_SDATA DDC_CLK3_R DDC_DATA3_R HPLUG_DET2_R HDMI_VPROBE HDMI_RSET HDMI_TXC_P_R HDMI_TXC_N_R
AD25 AC26 L22 K22 AL32 AK32 AK31 AL29 AM29
HDCP_ROM_SCLK HDCP_ROM_SDATA DDC_CLK3 DDC_DATA3 HPLUG_DET2 HDMI_VPROBE HDMI_RSET HDMI_TXC_P HDMI_TXC_N
IFPAB_VPROBE IFPAB_RST DDC_CLK2 DDC_DATA2 DISPON BLON BKPWM MCP67_GPIO6 MCP67_GPIO7
Cc C736 Rc R603
R159 R164 R86 R596 R75 *0R *0R *0R *0R *0R
*0.01U/16V/X *1K/F
DB2 MODIFY 1024
DB2 MODIFY 1024
Rh R574 Cd C704 Rd R575
FLAT PANEL
EDIDCLK [14,18] EDIDDATA [14,18] LCD_ON [14,18] LVDS_BLON [14,18] DPST_PWM [14,18]
DB2 MODIFY 1024
D
MODIFY 0831
D
FOR MCP67M UNUSED HDMI ONLY
T133 T137 T136 T138 T134 T140 1.2V_HT 1.8VSUS 3V
1
GPIO_6(3V_S5)/FERR/SYS_SERR/IGPU_GPIO_6* GPIO_7(3V_S5)/NFERR/SYS_PERR/IGPU_GPIO_7* HDMI_TXD0_P_R HDMI_TXD0_N_R HDMI_TXD1_P_R HDMI_TXD1_N_R HDMI_TXD2_P_R HDMI_TXD2_N_R AK29 AJ29 AM30 AL30 AK30 AJ30 HDMI_TXD0_P HDMI_TXD0_N HDMI_TXD1_P HDMI_TXD1_N HDMI_TXD2_P HDMI_TXD2_N MCP67D-A2
T32 T33
FOR MCP67M UMA ONLY
HPLUG_DET3
AE26
HPLUG_DET3
Re R88
*22K
FOR DVI IS NOT IMPLEMENTED
DB2 MODIFY 1024
Size Custom NB5/RD2/HW1
PROJECT : AT1 Quanta Computer Inc.
Document Number
[2,10,11] [2,3,4,5,32,36,37] [2,5,7,8,9,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38]
2 3
MCP67 (HT_I/F,DACS,VGA)
Sheet
8
Rev C2A 6 of 40
Date: Friday, December 29, 2006
4 5 6 7
1
2
3
4
5
6
7
8
[12] PEG_RXP[15..0]
U30B PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 F23 F24 D25 C28 C29 D29 F26 F28 H23 H25 H27 K24 K27 K28 J31 K31 G23 F25 D26 D28 C30 D30 F27 F29 H24 H26 H28 K25 K26 K29 J30 K30 R29 R30 PE0_RX0_P PE0_RX1_P PE0_RX2_P PE0_RX3_P PE0_RX4_P PE0_RX5_P PE0_RX6_P PE0_RX7_P PE0_RX8_P PE0_RX9_P PE0_RX10_P PE0_RX11_P PE0_RX12_P PE0_RX13_P PE0_RX14_P PE0_RX15_P PE0_RX0_N PE0_RX1_N PE0_RX2_N PE0_RX3_N PE0_RX4_N PE0_RX5_N PE0_RX6_N PE0_RX7_N PE0_RX8_N PE0_RX9_N PE0_RX10_N PE0_RX11_N PE0_RX12_N PE0_RX13_N PE0_RX14_N PE0_RX15_N
MCP67 2 OF 7
A
C51D SUPPORT PCI-E LANE REVERSE
PCIE
PE0_TX0_P PE0_TX1_P PE0_TX2_P PE0_TX3_P PE0_TX4_P PE0_TX5_P PE0_TX6_P PE0_TX7_P PE0_TX8_P PE0_TX9_P PE0_TX10_P PE0_TX11_P PE0_TX12_P PE0_TX13_P PE0_TX14_P PE0_TX15_P PE0_TX0_N PE0_TX1_N PE0_TX2_N PE0_TX3_N PE0_TX4_N PE0_TX5_N PE0_TX6_N PE0_TX7_N PE0_TX8_N PE0_TX9_N PE0_TX10_N PE0_TX11_N PE0_TX12_N PE0_TX13_N PE0_TX14_N PE0_TX15_N
D24 A24 B25 B26 C27 A28 A29 A30 B31 C31 D31 E31 F31 G29 H29 H32 C24 B24 C25 C26 D27 B28 B29 B30 B32 C32 D32 E30 F30 G30 H30 H31 U31 U30 U29 U28
C_PEG_TXP0 C_PEG_TXP1 C_PEG_TXP2 C_PEG_TXP3 C_PEG_TXP4 C_PEG_TXP5 C_PEG_TXP6 C_PEG_TXP7 C_PEG_TXP8 C_PEG_TXP9 C_PEG_TXP10 C_PEG_TXP11 C_PEG_TXP12 C_PEG_TXP13 C_PEG_TXP14 C_PEG_TXP15 C_PEG_TXN0 C_PEG_TXN1 C_PEG_TXN2 C_PEG_TXN3 C_PEG_TXN4 C_PEG_TXN5 C_PEG_TXN6 C_PEG_TXN7 C_PEG_TXN8 C_PEG_TXN9 C_PEG_TXN10 C_PEG_TXN11 C_PEG_TXN12 C_PEG_TXN13 C_PEG_TXN14 C_PEG_TXN15
C789 C774 C791 C776 C793 C778 C795 C780 C797 C782 C784 C771 C767 C760 C755 C753 C790 C775 C792 C777 C794 C779 C796 C781 C798 C783 C785 C770 C764 C757 C754 C751
0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V R640 R636 R108 R138 C171 C175 R647 R645 C180 C182 R643 R641 C912 C913 R801 R802
PEG_TXP_C0 PEG_TXP_C1 PEG_TXP_C2 PEG_TXP_C3 PEG_TXP_C4 PEG_TXP_C5 PEG_TXP_C6 PEG_TXP_C7 PEG_TXP_C8 PEG_TXP_C9 PEG_TXP_C10 PEG_TXP_C11 PEG_TXP_C12 PEG_TXP_C13 PEG_TXP_C14 PEG_TXP_C15 PEG_TXN_C0 PEG_TXN_C1 PEG_TXN_C2 PEG_TXN_C3 PEG_TXN_C4 PEG_TXN_C5 PEG_TXN_C6 PEG_TXN_C7 PEG_TXN_C8 PEG_TXN_C9 PEG_TXN_C10 PEG_TXN_C11 PEG_TXN_C12 PEG_TXN_C13 PEG_TXN_C14 PEG_TXN_C15
PEG_TXP_C[15..0] [12]
07
MCP67D & MCP67M DIFFERENCE TABLE
A
FOR USED NB8X ONLY IF NOT USED, LEAVE NC
LOCATION
MCP67M (UMA) NC NC NC
MCP67M (DISCRETE) 0R 22R 22R
MCP67D (DISCRETE) 0R 22R 22R
Ra Rb Rc
PEG_TXN_C[15..0] [12]
[12] PEG_RXN[15..0]
NET NAME PE0_PRSNTX16
MCP67D (DISCRETE) LOW
MCP67M (GPU) NC
B
IF NOT USED NB8X, LEAVE NC
[G7xM/NB8X]
DB2 MODIFY
[NEW CARD]
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[12] CLK_PCIE_VGA [12] CLK_PCIE_VGA#
Rb R649 Rc R648
22R 22R
PE0_REFCLK_P PE0_REFCLK_N
PE0_REFCLK_P PE0_REFCLK_N
PE0_PRSNTX1#/DDC_CLK1 PE0_PRSNTX4#/DDC_DATA1 PE0_PRSNTX8#/EXP_EN PE0_PRSNTX16#
PE0_PRSNTX1 PE0_PRSNTX4 PE0_PRSNTX8 PE0_PRSNTX16
Ra R135
0R *10K *10K *10K *10K
3V
PE0_PRSNTX1# PE0_PRSNTX4# PE0_PRSNTX8# Internal Pull-up
B
[28] PCIE_RXP0 [28] PCIE_RXN0 [28] CLK_NEW_OE# [28] CPPE# [27] [27] PCIE_RXP1 PCIE_RXN1
PCIE_RXP0 PCIE_RXN0 CLK_NEW_OE# CPPE# PCIE_RXP1 PCIE_RXN1 CLK_MINI_OE# PCIE_RXP2 PCIE_RXN2
L29 L30 W27 W28
PE1_RX_P PE1_RX_N PEA_CLKREQ# PEA_PRSNT# PE2_RX_P PE2_RX_N PEB_CLKREQ# PEB_PRSNT#
PE1_TX_P PE1_TX_N PE1_REFCLK_P PE1_REFCLK_N PE2_TX_P PE2_TX_N PE2_REFCLK_P PE2_REFCLK_N PE3_TX_P PE3_TX_N PE3_REFCLK_P PE3_REFCLK_N PE4_TX_P PE4_TX_N PE4_REFCLK_P PE4_REFCLK_N
M28 M29 T32 T31 M24 M25 T29 T30 M22 M23 T27 T28 M30 M31 T25 T26 P29 P28 T23 T24 P24 P25 P23 R23
PCIE_TXP0_C PCIE_TXN0_C CLK_PCIE_NEW_C_R CLK_PCIE_NEW_C#_R PCIE_TXP1_C PCIE_TXN1_C CLK_PCIE_MINI_R CLK_PCIE_MINI#_R PCIE_TXP2_C PCIE_TXN2_C CLK_PCIE_MINI2_R CLK_PCIE_MINI2#_R
0.1U/16V/V 0.1U/16V/V 22R 22R
PCIE_TXP0 [28] PCIE_TXN0 [28] CLK_PCIE_NEW_C [28] CLK_PCIE_NEW_C# [28] PCIE_TXP1 [27] PCIE_TXN1 [27] CLK_PCIE_MINI [27] CLK_PCIE_MINI# [27] PCIE_TXP2 [27] PCIE_TXN2 [27] CLK_PCIE_MINI2 [27] CLK_PCIE_MINI2# [27]
[NEW CARD]
[MINI CARD] [MINI CARD]
[27] CLK_MINI_OE# [27] [27] PCIE_RXP2 PCIE_RXN2
M26 M27 U26 U27 N23 N22 U25 U24 N30 N31 R22 U23 P31 P30 T22 V31 P26 P27 U22 V30
0.1U/16V/V 0.1U/16V/V 22R 22R *0.1U/16V/V *0.1U/16V/V *22R *22R
[MINI CARD] [MINI CARD]
DB2 MODIFY
[27] CLK_MINI2_OE#
CLK_MINI2_OE#
PE3_RX_P PE3_RX_N PEC_CLKREQ# PEC_PRSNT# PE4_RX_P PE4_RX_N PED_CLKREQ#/GPIO_16(3V) PED_PRSNT# PE5_RX_P PE5_RX_N PEE_CLKREQ#/GPIO_17(3V) PEE_PRSNT# PE6_RX_P PE6_RX_N PEF_CLKREQ#/GPIO_18(3V) PEF_PRSNT#
C
DB2 MODIFY
PE5_TX_P PE5_TX_N PE5_REFCLK_P PE5_REFCLK_N PE6_TX_P PE6_TX_N PE6_REFCLK_P PE6_REFCLK_N PE_RST# PE_RST1# PE_CLK_COMP
DB2 MODIFY 1025 Ra,Rb IF NOT USED : LEAVE NC (INTERNAL PU)
R811 CLK_MINI2_OE# *10K *10K *10K 10K *10K *10K 3V
C
Rb R812
R813
W30 W29 V24
PCIE_RST# PE_COMP R118 2.37K/F
DB2 MODIFY
PCIE_RST# [12,27,28] CLK_MINI_OE# CLK_NEW_OE# CPPE#
Ra R98
R109 R107
3V 3V
MCP67D-A2
CLOCK BYPASS
C747 C746 C750 C748 C744 C742
D
*10P/50V/G *10P/50V/G *10P/50V/G *10P/50V/G *10P/50V/G *10P/50V/G
CLK_PCIE_NEW_C CLK_PCIE_NEW_C# CLK_PCIE_VGA CLK_PCIE_VGA# CLK_PCIE_MINI CLK_PCIE_MINI#
D
PROJECT : AT1 Quanta Computer Inc.
3V [2,5,6,8,9,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38] NB5/RD2/HW1
1 2 3 4 5 6 7
Size Custom
Document Number
MCP67 (PCI-E_I/F)
Sheet
8
Rev C2A 7 of 40
Date: Friday, December 29, 2006
1
2
3
4
5
6
7
8
08
PCI/LPC PULL-UP
A
[21]
AD[0..31]
AD[0..31] U30D AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 D10 B10 C10 L12 K11 J11 D11 C11 J12 H12 G12 F12 E12 D12 C12 B12 G14 E14 D14 J15 C14 D15 K15 C15 L16 G16 J16 E16 H16 D16 F16 A16 K12 K13 F14 K16 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_FRAME# MCP67 PCI_IRDY# 3 OF 7 PCI_TRDY# PCI_STOP# PCI_DEVSEL# PCI_PAR PCI_PERR#/GPIO_43(3V)/RS232_DCD# PCI_SERR# PCI_PME#/GPIO_30(3V_S5) PCI_REQ0# PCI_REQ1# PCI_REQ2#/GPIO_40(3V)/RS232_DSR# PCI_REQ3#/GPIO_38(3V)/RS232_CTS# PCI_REQ4#/GPIO_52(3V)/RS232_SIN# PCI_GNT0# PCI_GNT1# PCI_GNT2#/GPIO_41(3V)/RS232_DTR# PCI_GNT3#/GPIO_39(3V)/RS232_RTS# PCI_GNT4#/GPIO_53(3V)/RS232_SOUT# PCI_INTW# PCI_INTX# PCI_INTY# PCI_INTZ# J14 H14 K14 B13 L13 B14 J13 C13 C16 E10 G10 J10 M11 E8 F10 H10 K10 L10 F8 L17 J17 B16 K17 C9 B9 B8 A8 C8 D8 L9 K8 K9 J9 FRAME# IRDY# TRDY# STOP# DEVSEL# PAR PERR# SERR# PCI_PME# REQ0# REQ1# MCP67_WWAN_ON# BTLED REQ4# GNT0# GNT1# NB_LCDBK NB_BEEPEN GNT4# FRAME# IRDY# TRDY# STOP# DEVSEL# PAR PERR# SERR# PCI_PME# [21] [21] [21] [21] [21] [21] [21] [21,30] [21] SERR# PERR# STOP# DEVSEL# 3V 6 7 8 9 10 8.2K/10P8R RP34 RP33 5 4 3 2 1 INTC# INTB# INTD# LAD2 3V
A
PCI
REQ0# [21] T86 MCP67_WWAN_ON# [27] BTLED [29] T116 GNT0# [21] T91 LCD_BK [18] AMPBEEP_EN [25] T79 INTA# INTB# T110 T115 [21] [21]
[R5C832]
3V
TRDY# IRDY# FRAME# LAD1
6 7 8 9 10 8.2K/10P8R RP35
5 4 3 2 1
PR_NC BTLED LAD0 CLKRUN#
3V T114
B
[21] C/BE0# [21] C/BE1# [21] C/BE2# [21] C/BE3# [21,28,30,31] CLKRUN#
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[R5C832]
R199 R790 0R 0R INTA# INTB# INTC# INTD# LAD3 LDRQ#0 REQ0# INTA#
[R5C832]
3V
6 7 8 9 10
5 4 3 2 1
MCP67_WWAN_ON# REQ4# REQ1# LDRQ#1
3V
8.2K/10P8R
C/BE0# C/BE1# C/BE2# C/BE3#
PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4
PCI_CLK_5C832_R PCI_CLK_MINI_R PCI_CLK_KB3920_R PCI_CLK_TPM_R PCI_CLK4
R221
22R
PCI_CLK_5C832 [21] T190 T87 PCI_CLK_TPM [28]
[R5C832]
B
SERIRQ
R220
10K
3V
R660 R213
*22R 22R
PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#
SI MODIFY
[TPM _SLB9635]
PCI_CLKIN
PCI_CLKIN
REMOVE FOR INTERNAL PULL-UP
PCI_PME# R672 *8.2K
3V
R360
*8.2K
CLKRUN# D5
PCI_CLKRUN#/GPIO_42(3V)
PCI_RESET3# PCI_RESET2# PCI_RESET1# PCI_RESET0#
PCIRST3# PCIRST2# PCIRST_R# IDERST_R#
3V_S5
R218 R216
33R 33R
T68 T59 PCIRST# IDERST#
[21,23] [26]
[R5C832] [IDE _CD-ROM]
DB2 MODIFY FOR NVIDIA 1026
[27,28,30,31] LAD0 [27,28,30,31] LAD1 [27,28,30,31] LAD2 [27,28,30,31] LAD3 [27,28,30,31] LFRAME# LFRAME1# T189 T187 [21,28,30,31] SERIRQ
C
R665 R664 R662 R663 R669
22R 22R 22R 22R 22R
LAD0_R LAD1_R LAD2_R LAD3_R LFRAME1# LDRQ#0 LDRQ#1 SERIRQ LPC_RST1#
A4 B4 C4 A3 D7 B6 C6 D6 C7
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
LPC
LPC_PWRDWN#/GPIO_54(3V)/EXT_NMI# LPC_CLK0 LPC_CLK1 B3 B5 C5 LPC_PD# LPC_CLK_DEBUG_R LPC_CLK_KB3920_R R668 R667 22R 22R LPC_PD# [28] LPC_CLK_DEBUG [27] LPC_CLK_KB3920 [30,31]
[9]
LPC_FRAME# LPC_DRQ0#/GPIO_50(3V) LPC_DRQ1#/GPIO_19(3V)/FANRPM1 LPC_SERIRQ LPC_RESET#
[WLAN] [KB3920]
CLOCK BYPASS
DB2 MODIFY FOR EMI
C802 22P/50V/O LPC_CLK_DEBUG 22P/50V/O LPC_CLK_KB3920 22P/50V/O PCI_CLK_5C832 22P/50V/O PCI_CLK_TPM
C
[28,30,31] LPC_RST#
R729
33R
R153 3V R143
10K *10K
MCP67_TCK MCP67_TDI
T9 U9
JTAG_TCK JTAG_TDI
JTAG
JTAG_TDO JTAG_TMS JTAG_TRST#
T8 T7 U8 P11
MCP67_TDO MCP67_TMS MCP67_TRST# TESTMODE_EN R144 R122 R152 *10K 10K 1K 3V
T27
C803 C289 C851
P10
PKG_TEST MCP67D-A2
TEST_MODE_EN
C246
*10P/50V/G
PCI_CLKIN
D
D
PROJECT : AT1 Quanta Computer Inc.
3V 3V_S5 [2,5,6,7,9,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38] [9,10,11,20,28,30,32,33,37] NB5/RD2/HW1
1 2 3 4 5 6 7
Size Custom
Document Number
MCP67 (PCI,LPC,JTAG)
Sheet
8
Rev C2A 8 of 40
Date: Friday, December 29, 2006
5
4
3
2
1
U30E LAN_TX0_R LAN_TX1_R LAN_TX2_R LAN_TX3_R LAN_TXCLK_R LAN_TXCTL_R LAN_RX0_R LAN_RX1_R LAN_RX2_R LAN_RX3_R LAN_RXCLK_R LAN_RXCTL_R J19 K19 L19 L18 H19 K18 B20 C20 E19 F19 G19 J20 RGMII_TXD0/MII_TXD0 RGMII/MII_MDC RGMII_TXD1/MII_TXD1 RGMII/MII_MDIO RGMII_TXD2/MII_TXD2 MII_RXER/GPIO_36(3V_S5) RGMII_TXD3/MII_TXD3 MII_COL/MI2C_DATA RGMII_TXCLK/MII_TXCLK MII_CRS/MI2C_CLK RGMII_TXCTL/MII_TXEN RGMII/MII_PWRDWN#/GPIO_37(3V_S5) RGMII/MII_INTR/GPIO35(3V_S5) RGMII_RXD0/MII_RXD0 RGMII_RXD1/MII_RXD1 RGMII_RXD2/MII_RXD2 BUF_25MHZ MII_RESET# RGMII_RXD3/MII_RXD3 RGMII_RXC/MII_RXCLK RGMII_RXCTL/MII_RXDV MII_VREF
10/100 - GIAG LAN STUFF OPTION
MCP67 4 OF 7
K20 L20 C19 J18 D19 D17 B18 G17 C18 H20 LAN_RXER LAN_CRS_R MII_PWRDN LAN_INT MDCLK [20] MDIO [20] LAN_RXER [20] LAN_COL [20] R209 R215 MII_25MHZ_R MIIRST# R177 R810 R217 R214 C270 *4.7K *10K 22R *1.47K/F 1.47K/F 1.47K/F 0.1U/16V/V HDA_SDOUT HDA_SYNC HDA_RESET# C256 C255 C258 LAN_INT [20] [20] [20] [20] [20] LAN_TX0 LAN_TX1 LAN_TX2 LAN_TX3 LAN_TX0 LAN_TX1 LAN_TX2 LAN_TX3 LAN_TXCTL LAN_CRS R212 R168 C211 *10P/50V/G *10P/50V/G *10P/50V/G R661 R481 R472 R495 R498 R487 R670
Ra Rb Rc Rd Re Rh
0R 0R
22R 22R 22R 22R 22R *0R
LAN_TX0_R LAN_TX1_R LAN_TX2_R LAN_TX3_R LAN_TXCTL_R LAN_CRS_R
09
MODIFY 0824
10/100 GIGA Ra Rb Rc Rd Re Rf Rg Rh 0R 0R 0R 0R 0R NC NC 0R 22R 22R 22R 22R 22R 0R 0R NC
D
[20] LAN_TXCLK [20] LAN_RX0 [20] LAN_RX1 [20] LAN_RX2 [20] LAN_RX3 [20] LAN_RXCLK [20] LAN_RXCTL
R492 R501 R484 R473 R499 R478 R485 R815 R208 R196 C295 R222 R658 R210 R655
22R 0R 0R 0R 0R 22R 0R *49.9/F 49.9/F 49.9/F
[20] LAN_TXCTL MII_25MHZ [20] MIIRST# [20] 3V_S5 +3.3V_RMGT [20] LAN_CRS
D
LAN
RGMII_VREF
Rf Rg
LAN_RXER LAN_COL
DB2 MODIFY 1031
3V_S5 +3.3V_RMGT
MII_COMP_3P3V B17 MII_COMP_GND C17
MII_COMP_3P3V MII_COMP_GND
Route wide same as resister
D3 C3 B1 C1 C2 U4 U5 V3 V2 MCP67_GPIO51 MCP67_GPIO46 HDA_SDOUT_R
DB2 MODIFY 1024
*10P/50V/G MII_25MHZ *4.7K MIIRST#
[23] HDA_BITCLK [23] HDA_SDIN0 [27] RF_OFF# [28] BT_OFF#
10P/50V/G HDA_BCLK 22R 0R *10K *10K HDA_SDIN0_R RF_OFF# BT_OFF#
D2 B2 A2 D1 U3 U2 U6 U7
HDA_BITCLK
HDA_DOCK_EN#/GPIO_51(3V_S5) HDA HDA_DOCK_RST#/GPIO46(3V_S5)
T84 T85 R204
HDA_SDATA_IN0/GPIO_22(3V_S5) HDA_SDATA_OUT/GPIO_45(3V) HDA_SDATA_IN1/GPIO_23(3V_S5)/MGPIO_0 HDA_SYNC/GPIO_44(3V) HDA_SDATA_IN2/GPIO_24(3V_S5)/MGPIO_2 HDA_RESET# USB0_P USB0_N USB2_P USB2_N USB4_P USB4_N USB6_P USB6_N USB1_P USB1_N USB3_P USB3_N USB5_P USB5_N USB7_P USB7_N
22R 22R 22R
HDA_SDOUT [23] HDA_SYNC [23] HDA_RESET# [23]
HDA_SYNC_R R207 HDA_RESET#_R R206
MODIFY 0823
USB0- 1 USB0+ 3 USB1- 1 USB1+ 3 USB2+ 1 USB2- 3 USB3+ 1 USB3- 3 USB4+ 1 USB4- 3 2 RN7 4 15K/4P2R 2 RN6 4 15K/4P2R 2 RN14 4 15K/4P2R 2 RN12 4 15K/4P2R 2 RN11 4 15K/4P2R
USB PULL-DOWN
USB5- 1 USB5+ 3 USB6- 1 USB6+ 3 USB7+ 1 USB7- 3 USB8+ 1 USB8- 3 USB9+ 1 USB9- 3 2 RN5 4 15K/4P2R 2 RN10 4 15K/4P2R 2 RN4 4 15K/4P2R 2 RN3 4 15K/4P2R 2 RN1 4 15K/4P2R USB10+ 1 USB10- 3 USB11+ 1 USB11- 3 USB12+ 1 USB12- 3 2 RN2 4 *15K/4P2R 2 RN9 4 *15K/4P2R 2 RN8 4 *15K/4P2R
[USB CONN]
[Bluetooth module] [Port Dockung]
C
[PCI-E MINI Card] [FINGER PRINT]
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[26] [26] [28] [28] [31] [31] [27] [27] [28] [28] USB0+ USB0USB2+ USB2USB4+ USB4USB6+ USB6USB8+ USB8-
USB
USB1+ USB1USB3+ USB3USB5+ USB5USB7+ USB7-
[26] [26] [28] [28] [26] [26] [28] [28]
[USB CONN] [CAMERA]
W4 W3 W7 W8
W5 W6 Y2 Y3
[USB CONN] [New Card]
AA3 AA2 AA7 AA6
USB8_P USB8_N
USB9_P USB9_N
AA5 AA4 AB3 AB2 T2 T3 T4 T5 T6
USB9+ USB9-
DB2 MODIFY 1024 MCP67D,MCP67M: USB10,USB11USB12 NC
C
USB10+ USB10USB12+ USB12-
USB10_P USB10_N USB12_P USB12_N
USB11_P USB11_N
USB11+ USB11-
3V_S5
MCP67 STRAPPING
HDA_RESET# (LAN) 0 MII 1 RGMII (DEFAULT)
HDA_SDOUT_R , LFRAM1# (BIOS) 00 LPC (DEFAULT) 01 PCI BIOS 10 SPI BIOS 11 RESERVED (SPI)
AC3 AC4
MODIFY 0824
R742 R205 R191 R195 R659 R666 R170 R166 R211 R201 R650 R175 R167 R171
MCP67D : 1.1K/F MCP67M :1.3K/F
R644
1.1K/F
USB_RBIAS_GND
T1
10mil,within 2000mil
SATA_TXP0 SATA_TXN0 SATA_TXP2 SATA_TXN2 T24 T23 T20 T16 SATA_TXP1 SATA_TXN1 SATA_TXP3 SATA_TXN3 AE4 AE5 AD1 AD2 AG4 AG3 AG7 AG8 AL1 AL2 AJ1 AJ2 R70 2.49K/F SATA_THRM AJ4
USB_RBIAS_GND
USB_OC0#/GPIO_25(3V_S5) USB_OC1#/GPIO_26(3V_S5) USB_OC2#/GPIO_27(3V_S5) USB_OC3#/GPIO_28(3V_S5)/MGPIO_1 USB_OC4#/GPIO_29(3V_S5)/MGPIO_3
USBOC#0 USBOC#1 USBOC#2 USBOC#3 USBOC#4
USBOC#0 USBOC#1 USBOC#2 USBOC#3 USBOC#4
8 6 4 2 R642
7 5 RN13 3 10K/8P4R 1 10K
3V_S5
10K *10K *8.2K 8.2K *8.2K 8.2K *10K 10K *10K 10K *10K *10K *10K *10K
HDA_RESET#_R
3V 3V 3V
HDA_SDOUT_R
[26] SATA_TXP0 [26] SATA_TXN0
SATA_A0_TX_P SATA_A0_TX_N SATA_A1_TX_P SATA_A1_TX_N SATA_B0_TX_P SATA_B0_TX_N SATA_B1_TX_P SATA_B1_TX_N SATA_C0_TX_P SATA_C0_TX_N SATA_C1_TX_P SATA_C1_TX_N SATA_TERMP
SATA
SATA_A0_RX_P SATA_A0_RX_N SATA_A1_RX_P SATA_A1_RX_N SATA_B0_RX_P SATA_B0_RX_N SATA_B1_RX_P SATA_B1_RX_N SATA_C0_RX_P SATA_C0_RX_N SATA_C1_RX_P SATA_C1_RX_N SATA_LED#/GPIO_57(3V)
AG6 AG5 AE3 AE2 AH2 AH3 AF3 AF2 AL3 AK3 AK2 AK1 D4
SATA_RXP0 SATA_RXN0 SATA_RXP2 SATA_RXN2 SATA_RXP1 SATA_RXN1 SATA_RXP3 SATA_RXN3 T19 T17 T141 T144
SATA_RXP0 [26] SATA_RXN0 [26] SATA_RXP2 [26] SATA_RXN2 [26]
LFRAME1# [8] MCP_SPKR [10,25]
FOR 17" ONLY [26] SATA_TXN2 MODIFY 0816
[26]
SATA_TXP2
FOR 17" ONLY MODIFY 0816
MCP_SPKR (Boot MODE) 0 USER TABLE (DEFAULT) 1 SAFE TABLE HDA_SYNC_R (SIO CLOCK) 0 14.318MHz (DEFAULT) 1 24MHz SPI_DO , SPI_CLK (SPI CLOCK) 00 31MHz 01 42MHz 10 25MHz 11 1MHz
3V
HDA_SYNC_R
3V_S5 3V_S5
MCP_SPI_DO [10]
B
B
MCP_SPI_CLK [10]
SATA_LED#
R202
10K
SATA_LED# [29] 3V
RTC
R703 1K 3VPCU RTC_3V D44 C846 [26] [26] [26] [26] [26] [26] [26] [26]
20MIL VCCRTC
CH500H 0.1U/16V/V 4.7UB/10V/R 1U/6.3V/R RTCRST# D43 VCCRTC_1 CH500H R706 1K VCCRTC_2 C849 1U/6.3V/R R160 1MA SM_INTRUDER# [10]
[26] [26]
PDD[0..15] PDA[0..2]
PDD[0..15] PDA[0..2]
R311
10K
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15 CLK_32KX1
AF10 AL9 AK8 AK7 AK6 AJ6 AL5 AL4 AJ5 AK5 AL6 AJ7 AJ8 AL8 AK9 AG10
IDE_DATA_P0 IDE_DATA_P1 IDE_DATA_P2 IDE_DATA_P3 IDE_DATA_P4 IDE_DATA_P5 IDE_DATA_P6 IDE_DATA_P7 IDE_DATA_P8 IDE_DATA_P9 IDE_DATA_P10 IDE_DATA_P11 IDE_DATA_P12 IDE_DATA_P13 IDE_DATA_P14 IDE_DATA_P15
PATA
IDE_ADDR_P0 IDE_ADDR_P1 IDE_ADDR_P2
AG12 AE12 AH12 AJ12 AK12 AJ11 AJ10 AH10 AK11 AL10 AK10 AF12 AM4 AK4
PDA0 PDA1 PDA2 PDCS1# PDCS3# PDDACK# PDIOW# IRQ14 PDDREQ PDIOR#_R PDIORDY CABLE_DET_P IDE_COMP_3V IDE_COMP_3V_GND VCCRTC PDCS1# PDCS3# PDDACK# PDIOW# IRQ14 PDDREQ PDIOR# PDIORDY 3V
DB2 BOM MODIFY 1106
R705 49.9KA/F 1 G2
IDE_CS1_P# IDE_CS3_P# IDE_DACK_P# IDE_IOW_P# IDE_INTR_P IDE_DREQ_P IDE_IOR_P# IDE_RDY_P CABLE_DET_P/GPIO_63(3V) IDE_COMP_3P3V IDE_COMP_GND
DB2 BOM MODIFY 1109
C845 C850
2 *ST_ PAD1
R64 R76 R577 R579
33R 15K 121/F 121/F
20MIL
20MIL
BATTERY HOLDER TYPE
NEAR MCP67 20mil(5mA) CNa CNb USED BATTERY 2P CONNECTOR USED BATTERY HOLDER
A
C758
22P/50V/O 2 1
DB2 MODIFY CNb
CN39 060003FA002XX01NL
CN32 *CWY020-B0G1Z
CNa
1 2
1 2
A
DB2 MODIFY 1107 FOR RTC ISSUE
C759 22P/50V/O 3 4
Y6 32.768KHZ CLK_32KX2
H2 H1
XTALIN_RTC XTALOUT_RTC MCP67D-A2
RTC
+3.3V_VBAT RTC_RST#
N2 M5
VCCRTC RTCRST#
C181
0.1U/16V/V
+3.3V_RMGT [10,11] 3V [2,5,6,7,8,10,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38] 3V_S5 [8,10,11,20,28,30,32,33,37] 3VPCU [14,18,28,29,30,31,33,34,35]
4 3 2
PROJECT : AT1 Quanta Computer Inc.
Size Custom NB5/RD2/HW1 Document Number
MCP67 (LAN,HDA,USB,ATA,RTC)
Sheet 9 of 40
1
Rev C2A
Date: Friday, December 29, 2006
5
1
2
3
4
5
6
7
8
U30F [2,14,30] ECPWROK [30,31] RSMRST# T10 L4 PWRGD PWRGD_SB
MCP67 5 OF 7
PWRGOOD SMBUS
CPUVDD_EN MCPVDD_EN/HTVDD_EN MEM_VLD CPU_VLD MCP_VLD/HT_VLD SMB_CLK1/MSMB_CLK SMB_DATA1/MSMB_DATA
M2 N3 M8 M3 P7 E2 F2 F3
HTVDD_EN HT_VLD
VCORE_ON [38] MEM_HWPG [37] CPU_HWPG [38]
CORE POWER CIRCIUT FOR SLEEP MODE MCP67M SUPPORT ONLY
Ra R38
0B
10
A
MODIFY 0823
A
[27] [27]
PCLK_SMB PDAT_SMB
E3 G3
SMB_CLK0 SMB_DATA0
SMB_ALERT#/GPIO_64(3V_S5)
SMB_ALERT#
MODIFY 0823
CGCLK_SMB [5] CGDAT_SMB [5] 1.2V_S5
3
1 Q3 *AO3416
+1.2V_RMGT
Qa
[30,31] GATEA20 [30,31] RCIN# C174 R155 1U/6.3V/R PWRBTN# 33R RSTBTN#
K7 K6
A20GATE/GPIO_55(3V)
CPU LEGACY
SPKR INTRUDER#
K4 L3 R148 R156 R151 R646 *22K 0R 100R *22R
MCP_SPKR [9,25] SM_INTRUDER# [9]
KBRDRSTIN#/GPIO_56(3V)
MCP67M & MCP67D DIFFERENCE TABLE
MCP67M UMA MCP67D DISCRETE STUFF STUFF
SLP_RMGT# 5VPCU 3V_S5
[30] DNBSWON# [27,28] PCIE_WAKE# [30] KBSMI#
H17 P4 T46 MCP67_LID# P5
SLP_S5# PE_WAKE#/GPIO_21(3V_S5) EXT_SMI#/GPIO_32(3V_S5) LID# SUS_CLK/GPIO_34(3V_S5) SLP_RMGT#
R4 P2 P3
SUSCR# SUS_CLK_R SLP_RMGT#
SUSC#
[30,31]
DB2 BOM MODIFY (32.768KHz)
*10P/50V/G
Ra Rb Rc
NC NC STUFF NC
SUSC#
R46 *10K 2
3
R10 P9
PWRBTN# RSTBTN#
PMU
SLP_S3#
R3
SUSBR#
SUSB#
[30,31]
Rc
2
SUS_CLK [28] SUS_CLK C749
MODIFY 0905
[18,28,29,30,31] LID_EC#
B
[27] WWAN_OFF#
T61 [9] MCP_SPI_DO T182 [9] MCP_SPI_CLK T180
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P8 RI#/GPIO33(3V_S5) THERM#/GPIO_59(3V) K5 THERM_OVER# [2] 2 1
MODIFY LID# FOR NVIDIA NOT AVAILABLE 0905
D5 1 *SW1010CPT
SIO_PME# RI#
M6
SIO_PME#/GPIO_31(3V_S5)/SPI_CS2
LLB#
N10
PM_BATLOW#
MODIFY 0824
Rd Re
NC NC NC NC NC
R35 *0R
3
NC
Rd
R44 0B
Rb
Q5 *AO3409
Qb
STUFF STUFF STUFF STUFF
SLP_RMGT#
2 MCP67_GPIO1 BOARDID0 BOARDID1 BOARDID2
Qa
Re
DB2 MODIFY FOR NVIDIA RECOMMEND
P6 N11 R11 M9 M10
GPIO_1(3V_S5)/PWRDN_OK/SPI_CS1 GPIO_2(3V_S5)/NMI/PS2_CLK0 GPIO_3(3V_S5)/SMI#/PS2_DATA0 GPIO_4(3V_S5)/SCI/INTR/PS2_CLK1 GPIO_5(3V_S5)/INIT#/PS2_DATA1
FANCTL1/GPIO_62(3V) FANCTL0/GPIO_61(3V) FANRPM0/GPIO_60(3V)
F4 F5 F6
T82
R239 R229
*0R *0R
VCORE1.2ID1 VCORE1.2ID0
Qc
1
GPIO
MCP67_GPIO62 SW_MCP_VID1 SW_MCP_VID0
Qb
R31 *22K
Q4 *2N7002E
Qc
+3.3V_RMGT
SI MODIFY FOR NVIDIA RECOMMEND 1220
B
MCP67_GPIO8
MCP67_GPIO10
M7 J2 K2 K3 M4 H4 H3
SPI_DI/GPIO_8(3V_S5) SPI_DO/GPIO_9(3V_S5) SPI_CS0/GPIO_10(3V_S5) SPI_CLK/GPIO_11(3V_S5)
THERM_SID1/GPIO_47(3V_S5)/PWR_LED# THERM_SIC/GPIO_48(3V_S5) THERM_SID0/GPIO_49(3V_S5)
AD12 AC14 AB14 H7 H6 H5
MCP67_GPIO47 MCP67_SIC MCP67_SID
T13 T22 T21 T69
MCP_VID2/GPIO_15(3V) MCP_VID1/GPIO_14(3V) MCP_VID0/GPIO_13(3V)
MCP67_GPIO15 VCORE1.2ID1_R VCORE1.2ID0_R
SI MODIFY 1220 FOR MCP67M ONLY, IF MCP67D NC
*0R *0R
PMU PULL-UP
R238 R228
VCORE1.2ID1 [35] VCORE1.2ID0 [35]
ECPWROK RSTBTN# PCIE_WAKE# RI#
R147 R162 R671 R240 R237 R145
*10K 10KA 10K 10K *10K *10K
3V_S5
MCP67_GPIO12 XTAL1 Y7 25MHZ XTAL2 2
GPIO_12(3V)/SUS_STAT/ACCLMTR_EXT_TRIG# XTALIN XTALOUT MCP67D-A2 [30,31] EC_SCI# EC_SCI# R185 0R BUF_SIO_CLK CLKOUT_25MHZ J3 AK28 SIO_CLK T183
MCP67_GPIO1 PM_BATLOW#
1
C769
18P/50V/G
MODIFY 0824
NODIFY FOR LID#,LLB# NOT AVAILABLE IN MCP67 0905 REMOVE FOR INTERNAL PU
KBSMI# DNBSWON# SIO_PME# R150 R149 R179 *4.7K *10K *10K
MODIFY 0824
C765 18P/50V/G
CLOCK
C
SKU
(BOARD ID)
AT1A
(DISCRETE)
AT1A
(UMA)
AT1B
(UMA ONLY)
AT2A
(DISCRETE)
AT2A
(UMA)
Board ID : DIFINE
0/1 RESERVE / RESERVE
0/1 UMA / DISCRETE
0/1 AT1 / AT2
CPU LEGACY PULL-UP
REMOVE FOR INTERNAL PULL-UP
GATEA20 RCIN# R180 R172 *10K *10K
C
3V
Board ID ID0 STUFF ID1 STUFF ID2 STUFF
010 Rd1 Ru2 Rd3
X00 Rd1 Rd2
X00 Rd1 Rd2
111 Ru1 Ru2 Ru3
X01 Ru1 Rd2
R181 R727 R728
SYS BOARD ID
Rd1 Rd2 Rd3
*10K *10K *10K BOARDID0 BOARDID1 BOARDID2 R182 R743 R744
DB2 MODIFY Ru1 Ru2 Ru3
SMB/I2C PULL-UP
10K 10K 10K 3V
PCLK_SMB PDAT_SMB SMB_ALERT# CGCLK_SMB CGDAT_SMB CGCLK_SMB CGDAT_SMB
R194 R745 R656 R694 R692 R187 R654
2.7K 2.7K 2.7K *2.7K *2.7K 2.7K 2.7K
3V_S5
3V
MODIFY FOR NVIDIA RECOMMEND 0906
+12V_ALW 3V
D
R693 C841
1M
HTVDD_EN1_15V 3 3
R696
10K
HT_VLD 3
0.1U/16V/V
1 2 5 6
HyperTransport Link 1.2 V_HT Power Valid
MODIFY 0906
1.2V +1.2V_RMGT [11] 1.2V_S5 [11,32,35] 1.2V_HT [2,6,11] 1.2V [11,12,13,15,36] +3.3V_RMGT [9,11] 3V [2,5,6,7,8,9,11,12,13,14,15,18,19,21,22,23,26,27,28,29,30,31,32,33,36,38] 3V_S5 [8,9,11,20,28,30,32,33,37] 5VPCU [23,33,34,35,36,37,38] +12V_ALW [18,32,33]
Q7 AO6402
R691 5VPCU 1.2V_HT R695 R697 C842 10K 10K 1U/6.3V/R HT_VLD_5V# 3 2 2 1 Q55 2N7002E Q56 MMBT3904 1 5VPCU 3 10K HTVDD_EN 2 Q54 2N7002E
1.2V_HT
1.2V_HT 1.2V_HT 10UB/6.3V/R C71
HT_VLD_RC
4
D
2 Q53 2N7002E 1
PROJECT : AT1 Quanta Computer Inc.
Size Custom NB5/RD2/HW1 Document Number
DB2 MODIFY FOR TIMMING
1
HyperTransport Power 1.2V_HT
5 6 7
MCP67 (PG,SMB,PMU,GPIO,CLK)
Sheet
8
Rev C2A of 40
Date: Friday, December 29, 2006
1 2 3 4
10
1
2
3
4
5
6
7
8
MCP67 POWER PLANE/GND & BYPASS
4717mA
1.2V_VCORE + C688 2 C61 C694 C689 C43 C62 C40 C717 C693 C150 C708 C156 C151 C39 C686 C711 C164 C161 C38 C42 C714 C170 C719 C157 C720 C152 C169 C41 C724 L19 C153 C159 R139 1 47U/6032 22UB/6.3V/R 22UB/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 4.7UA/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 1U/6.3V/R 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 30A/1A 0.1U/16V/V 1U/6.3V/R *0A 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE 1.2V_VCORE AA22 V19 W20 Y20 Y19 V17 AB21 AA23 Y30 U17 U18 Y31 W17 Y18 U16 AA24 V18 AA25 AA26 AB22 W18 AB23 AA27 AA28 AA29 W19 AA30 AA31 V20 Y15 Y17 Y16 L9 U30C +1.2V1 +1.2V10 +1.2V11 +1.2V12 +1.2V13 +1.2V14 +1.2V15 +1.2V16 +1.2V17 +1.2V18 +1.2V19 +1.2V2 +1.2V20 +1.2V21 +1.2V22 +1.2V23 +1.2V24 +1.2V25 +1.2V26 +1.2V27 +1.2V28 +1.2V29 +1.2V3 +1.2V4 +1.2V5 +1.2V6 +1.2V7 +1.2V8 +1.2V9 31B/4.5A 0.1U/16V/V 0.1U/16V/V 0.1U/16V/V 1U/6.3V/R 4.7UA/6.3V/R 22UB/6.3V/R 22UB/6.3V/R 22UB/6.3V/R
1533mA
MCP67 6 OF 7
+1.2V_PEA1 +1.2V_PEA2 +1.2V_PEA3 +1.2V_PEA4 +1.2V_PEA5 +1.2V_PEA6 +1.2V_PEA7 +1.2V_PEA8 Y22 Y23 Y27 Y29 Y25 W22 W23 Y24 V23 W25 W24 V22 W26 AE8 AE7 AE9 AE6 AB11 AB10 AD10 AC10 AE10 1.2V_PEA 1.2V_PEA 1.2V_PEA 1.2V_PEA 1.2V_PEA 1.2V_PEA 1.2V_PEA 1.2V_PEA C158 C163 C162 C165 C730 C132 C726 C111
1.2V
DB2 BOM MODIFY 1106 FOR LEAD-FREE
U30G
11
MCP67 7 OF 7
WUSB_PCLK WUSB_DATA_EN WUSB_DATA7 WUSB_DATA6 WUSB_DATA5 WUSB_DATA4 WUSB_DATA3 WUSB_DATA2 WUSB_DATA1 WUSB_DATA0 GND60 GND61 GND62 GND63 GND64 GND65 GND66 GND67 GND68 GND69 GND7 GND70 GND71 GND72 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND8 GND80 GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND9 GND90 GND91 GND92 GND93 GND