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Ordering number: EN 4599A
Thick Film Hybrid IC
STK401-070
AF Power Amplifier (Split Power Supply)
(40W+40W min, THD = 0.4%)
Overview Package Dimensions
The STK401-070 is a thick-film audio power amplifier IC unit: mm
belonging to a series in which all devices are pin compati-
ble. This allows a single PCB design to be used to con- 4134
struct amplifiers of various output capacity simply by [STK401-070]
changing hybrid ICs. Also, this series is part of a new,
larger series that comprises mutually similar devices with
the same pin compatibility. This makes possible the devel-
opment of a 2-channel amplifier from a 3-channel ampli-
fier using the same PCB. In addition, this new series
features 6/3 drive in order to support the low impedance
of modern speakers.
Features
· Pin compatible
STK400-000 series (3-channel/single package)
STK401-000 series (2-channel/single package)
· Output load impedance RL = 6/3 supported
· New pin configuration
Pin configuration has been grouped into individual
blocks of inputs, outputs and supply lines, minimizing
the adverse effects of pattern layout on operating char-
acteristics.
· Few external components
In comparison with existing series, external bootstrap
resistors and capacitors can be eliminated.
SANYO Electric Co., Ltd. Semiconductor Business Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
60697HA(ID) / 30795TH(ID) No. 4599--1/9
STK401-070
Specifications
Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage VCC max ±44 V
Thermal resistance j-c Per power transistor 1.7 °C/W
Junction temperature Tj 150 °C
Operating substrate temperature Tc 125 °C
Storage temperature Tstg -30 to +125 °C
VCC = ±30V, RL = 6,
Available time for load short-circuit ts 1 s
f = 50Hz, PO = 40W
Operating Characteristics at Ta = 25°C, RL = 6 (noninductive load), Rg = 600, VG = 40dB
Parameter Symbol Conditions min typ max Unit
Quiescent current ICCO VCC = ±36V 20 60 100 mA
VCC = ±30V, f = 20Hz to
PO(1) 40 45 W
20kHz, THD = 0.4%
Output power
VCC = ±24V, f = 1kHz,
PO(2) 40 45 W
THD = 1.0%, RL = 3
VCC = ±30V, f = 20Hz to
THD(1) 0.4 %
20kHz, PO = 1.0W
Total harmonic distortion
VCC = ±30V, f = 1kHz,
THD(2) 0.01 %
PO = 5.0W
Frequency response fL, fH VCC = ±30V, PO = 1.0W, + dB
0 20 to 50k Hz
VCC = ±30V, f = 1kHz,
Input impedance ri 55 k
PO = 1.0W
Output noise voltage VNO VCC = ±36V, Rg = 10k 1.2 mVrms
Neutral voltage VN VCC = ±36V -70 0 +70 mV
Notes.
All tests are measured using a constant-voltage supply unless otherwise specified.
Available time for load short-circuit and output noise voltage are measured using the transformer supply specified below.
The output noise voltage is the peak value of an average-reading meter with an rms value scale (VTVM). A regulated AC supply (50Hz)
should be used to eliminate the effects of AC primary line flicker noise.
Specified Transformer Supply (MG-200 or Equivalent)
No. 4599--2/9
STK401-070
Equivalent Circuit
Sample PCB Layout for 2-Channel or 3-Channel Amplifiers
Copper (Cu) foil surface
Pin 6 of STK400-000 series devices corresponds to pin 1 of STK401-000 series devices.
No. 4599--3/9
STK401-070
Sample Application Circuit
External Component Description
Input coupling capacitors.
For DC blocking. Since capacitor reactance becomes larger at lower frequencies, the output noise can be adversely affected by signal source
C1, C11 resistance-dependent 1/f noise. In this case, a lower reactance value should be chosen. In order to remove pop noise at power-on, larger
values of capacitance should be chosen for C1 and C11, which determine the input time constant, and smaller values for C3 and C13 in the
NF circuit.
Input filter capacitors.
C2, C12
These, together with R1 and R11, form filters to reduce high-frequency noise.
NF capacitors.
These determine the low-side cut-off frequency.
C3, C13 f L = -----------------------------------------------------------------
× C (C ) × R (R )
Large values should be chosen for C3 and C13 to maintain voltage gain at low frequencies. However, because this would tend to increase the
shock noise at power-on, values larger than absolutely necessary should be avoided.
Oscillation prevention capacitors.
C5, C15
Mylar capacitors are recommended for their excellent thermal and frequency characteristics.
Oscillation prevention capacitors.
C6, C7 These should be inserted as close as possible to the IC supply pins to reduce supply impedance and hence provide stable IC operation.
Electrolytic capacitors are recommended.
Decoupling capacitors.
C8, C9 These, together with R8 and R9, form time constant circuits that remove shock noise and ripple voltage from the supply, preventing any noise
being coupled to the inputs.
R1, R11 Input filter resistors.
Input bias resistors.
R2, R12
These are used to bias the input pins at zero potential. The input impedance is largely determined by this resistance.
Voltage-gain VG setting resistors.
R3, R13
VG = 40dB is recommended using R3, R13 = 560, and R4, R14 = 56k. Gain adjustments are best made using R3 and R13. If gain
R4, R14
adjustments are made using R4 and R14, then set R2, R12 = R4, R14 to maintain VN balance stability.
R5, R15 Oscillation prevention resistors.
Oscillation prevention resistors.
The power dissipated in these resistors is dependent on the frequency, as given below.
R6, R16 V CC /
P = --------------------------------------------------------------------------- × R ( R )
/ f × C ( C ) + R ( R )
where f is the output signal frequency upper limit.
Ripple filter resistors.
PO max, ripple rejection and supply power-on shock noise are all affected by this resistance. These resistors should be chosen taking into
R8, R9
consideration both the function they perform as predriver transistor limiting resistors during load short circuits and the peak current that flows
through them when charging C8 and C9.
Oscillation prevention coils.
L1, L2
These correct the phase difference caused by capacitive loads and increase stability against oscillation.
No. 4599--4/9
STK401-070
Series Configuration
3-channel 2-channel Supply voltage [V]1
Rated Rated THD [%]
amplifier type amplifier type
output output f = 20Hz to 20kHz VCC max1 VCC max2 VCC1 VCC2
Nos. Nos.
STK400-010 10W × 3 STK401-010 10W × 2 ± 26 ± 17 ± 14
STK400-020 15W × 3 STK401-020 15W × 2 ± 29 ± 20 ± 16
STK400-030 20W × 3 STK401-030 20W × 2 ± 34 ± 23 ± 19
STK400-040 25W × 3 STK401-040 25W × 2 ± 36 ± 25 ± 21
STK400-050 30W × 3 STK401-050 30W × 2 ± 39 ± 26 ± 22
STK400-060 35W × 3 STK401-060 35W × 2 ± 41 ± 28 ± 23
STK400-070 40W × 3 STK401-070 40W × 2 ± 44 ± 30 ± 24
0.4
STK400-080 45W × 3 STK401-080 45W × 2 ± 45 ± 31 ±25
STK400-090 50W × 3 STK401-090 50W × 2 ±47 ±32 ±26
STK400-100 60W × 3 STK401-100 60W × 2 ±51 ±35 ±27
STK400-110 70W × 3 STK401-110 70W × 2 ±56.0 ±38
STK401-120 80W × 2 ±61.0 ±42
STK401-130 100W × 2 ±65.0 ±45
STK401-140 120W × 2 ±74.0 ±51
1. VCC max1 (RL = 6), VCC max2 (RL = 3 to 6), VCC1 (RL = 6), VCC2 (RL = 3)
Sample Designs using a Common PCB
No. 4599--5/9
STK401-070
External Circuit Diagram
Heatsink Design Considerations
The heatsink thermal resistance, c-a, required to dissipate The heatsink thermal resistance can be determined from
the STK401-070 device total power dissipation, Pd, is (1) and (2) once the following parameters have been
determined as follows: defined.
Condition 1: IC substrate temperature not to exceed · Supply voltage
125°C. · Load resistance
· Guaranteed maximum ambient temperature
Pd × c-a + Ta < 125°C ........................................ (1)
The total device power dissipation when STK401-070
where Ta is the guaranteed maximum ambient tempera- VCC = ±30V and RL = 6, for a continuous sine wave sig-
ture. nal, is a maximum of 61W, as shown in Figure 1.
Condition 2: Power transistor junction temperature, Tj, not When estimating the power dissipation for an actual audio
to exceed 150°C. signal input, the rule of thumb is to select Pd correspond-
Pd × c-a + Pd/N × j-c + Ta < 150°C ................. (2) ing to 1/10 PO max (within safe limits) for a continuous
sine wave input. For example, from Figure 1,
where N is the number of power transistors and j-c is the
power transistor thermal resistance per transistor. Note Pd = 37W (for 1/10 PO max = 4W)
that the power dissipated per transistor is the total, Pd, The STK401-070 has 4 power transistors, and the thermal
divided evenly among the N power transistors. resistance per transistor, j-c, is 1.7°C/W. If the guaran-
Expressions (1) and (2) can be rewritten making c-a the teed maximum ambient temperature, Ta, is 50°C, then the
subject. required heatsink thermal resistance, c-a, is:
c-a < (125 - Ta)/Pd ............................................. (1) From expression (1): c-a < (125 - 50)/37
< 2.02
c-a < (150 - Ta)/Pd - j-c/N .............................. (2)
From expression (2): c-a < (150 - 50)/37 - 1.7/4
The heatsink required must have a thermal resistance that < 2.27
simultaneously satisfies both expressions.
Therefore, to satisfy both expressions, the required heat-
sink must have a thermal resistance less than 2.02°C/W.
No. 4599--6/9
STK401-070
Similarly, when STK401-070 VCC = ±24V and RL = 3, Therefore, to satisfy both expressions, the required heat-
from Figure 2: sink must have a thermal resistance less than 1.66°C/W.
Pd = 45W (for 1/10 PO max = 4W) This heatsink design example is based on a constant-volt-
age supply, and should be verified within your specific set
From expression (1): c-a < (125 - 50)/45
environment.
< 1.66
From expression (2): c-a < (150 - 50)/45 - 1.7/4
< 1.79
Figure 1. Pd -- PO Figure 2. Pd -- PO
THD -- PO THD -- PO
PO -- Vin PO -- f
No. 4599--7/9
STK401-070
PO -- VCC VG -- f
VG -- f ICCO, VN -- Tc
ICCO, VN -- VCC
No. 4599--8/9
STK401-070
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear
power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury,
death or property loss.
s Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their
officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated
with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO.,
LTD., its affiliates, subsidiaries and distributors or any of their officers and employees, jointly or severally.
s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO
believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of
intellectual property rights or other rights of third parties.
This catalog provides information as of June, 1997. Specifications and information herein are subject to change without notice.
No. 4599--9/9