Text preview for : msc_06.pdf part of Panasonic SA-XR10 Schematic
Back to : SA-XR10.rar | Home
SCHEMATIC DIAGRAM-6 C DSP CIRCUIT
:POSITIVE VOLTAGE LINE
:FM/ AM SIGNAL LINE
O P A B
C D E
F G N M
H I
J K
L
Q R S T U V
W X
C1140 6.3V47
N O J L M K
H
I
F C
P B O
N
I H G F E D C
R1093 33
C1085 10P
R1092 33
R1149 100
C1147 6.3V47
C1142 0.1
C1138 0.1
4.7V 4.7V 2.5V 2.5V 0V 2.5V 2.5V
2.5V 2.5V 2.5V 2.5V
3.3V
0V 0V 4.9V 4.9V
3.3V 2.5V 0V 0V 1.2V 0.9V
1.3V
C1008 6.3V100
C1013 0.1
R1011 3.3K
A C 2.5V R1134 100K R1152 100 0V 2.5V 1.3V 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108
R1094 R1098
BO8 BO7 BO6 BO5 BO4 BI8 BI7 BI6 GND BI5 BI4 BO3 BO2 GND VccINT GND BO1 BO0 BI3 BI2 GND VccINT VccIO BI1 BI0 L/ R CKO DOUT RESERVED BCKO RESERVED D7 D6 D5 D4 D3 D2
R1010 3.3K
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 33 33
2.5V 2.5V 2.5V 2.5V 2.5V 2.5V
6 5 4 3 2 1 44 43 42 41 40 SCDIN EMOE EMWR XMT958 DGND1 VD1 MCLK SCLK LRCLK AU DATA0 AU DATA1
C1001 220P Q R S T
R1150 100
0V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V
C1020 6.3V100
C1024 0.1
CS SCD OUT INTREQ EXTMEM SDATA N1 VD3 DGND3 SCLK N1 LRCLK N1 CMP DAT CMP CLK
C1023 33P
R1018 33
U V W X
C1018 470P
C1017 R1016
50V2.2 10K
C1019 R1019 0.01 33K
7 8 9 10 11 12 13 14 15 16 17
SCCLK DATA7 DATA6 DATA5 DATA4 VD2 DGND2 DATA3 DATA2 DATA1 DATA0
AU DATA2 DC DD FM RESET 2.5V AGND P-P VA 0.2 s. 0.5V/DIV. FILT1 IC1002 FILT2 C2HBZJ000003 AC3/ DTS/ AAC CLK SEL DECODER CLK IN CMP REQ
39 38 37 36 35 34 33 32 31 30 29
0V 2.5V 2.5V 2.5V 2.5V 1.2V 1.9V 0V 1.2V 1.2V
R1017 R1020
4.7K 4.7K
B e L1002 2.2 H f g h R1136 33 2V 0V 5V R1118 100 1.5V
1.2V 1.1V 2.5V
R1135 33
18 19 20 21 22 23 24 25 26 27 28 R1151 100 2.5V 2.5V 2.5V 2.5V 0.9V 2.5V 1.3V 1.2V 0.9V 1.3V
L1001 2.2 H C1007 6.3V100 C1014 0.1 C1004 6.3V100 C1005 0.1 C1006 6.3V100 C1016 0.1 C1034 0.1 C1011 0.1 R1014 3.3K R1099 33 R1137 33 R1013 R1012 3.3K 4.7K i
R1117 100
3.1V 1.6V 1.2V 4.4V
M D E G
K L
J A 33 33
109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 2.5V 4.9V 1.4V 1.4V 1.1V 1.1V 1.7V 3.3V 1.7V 1.6V 2.7V 1.6V 3.3V 1.6V 1.2V 1.6V 1.5V 1.5V 2.5V 0V
R1148
R1147
100K
L/ R CKI1 DOUTO1 L R CKO1 RESERVED BCKO1 GND VccIO RESERVED SEL2 MCKIO1 MCKIO2 MCKO1 MCKO2 MCKO3 VccINT GND MCKI XOE XRESET BCKI GND VccINT RESERVED RESERVED L/ R CKI ADIN0 GND ADIN1 ADIN2 RESERVED DIR RESERVED RESERVED XOE CK VccIO
VccIO RESERVED SEL MOD VccIO GND BCKO2 RESERVED SELFF RESERVED RESERVED RESERVED CK1 GND CK2 SEL3 RESERVED #TCK RESERVED RESERVED CK3 CK4 GND VccIO RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED #TDO GND BCKI1 ADI1 SEL1
IC1104 C1ZBZ0002133
PLD
D1 D0 Q7 GND Q6 Q5 Q4 Q3 Q2 Q1 GND Q0 VccIO A15 A14 A13 #TMS A12 A11 GND A10 A9 A8 GND A7 A6 A5 A4 A3 A2 A1 A0 #TDI GND CK RESERVED
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
2.5V 2.5V
B A
0V 2.5V 0V
2.5V 1.7V 1.3V 1.6V 0.9V 0V
2.5V 2.5V 2.5V 2.7V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.5V 2.7V 2.5V
A O N M L K J I H G F E D C B
R1009 R1008 R1007 R1006 R1005 R1004 R1003 R1002
10K 10K 10K 10K 10K 10K 10K 10K
R1138 33
R1146 33
R1130 100K
R1143
R1142 33
R1145 R1144 R1132 R1131 R1133
R1141
R1140 R1139
R1129
L1012 2.2 H j 3.3V C1137 0.1 C1135 0.1 C1141 6.3V100
2.5V
T
P
I
G R Q F B
H C
A S
E D
q m
n
L1013 2.2 H p
R1116 100
SA-XR10(PP) DSP CIRCUIT DIAGRAM
25
26
27
28
29
30
31
32
33
34
35
R1115 100
33
33 33 33 33 33
33
33 33
36
C1146 6.3V100
C1139 0.1
C1133 0.1
C1136 0.1
C1143 0.1
2.5V