Text preview for : KDL-26_32_37_40P3000, KDL-26_32_37_40P300H Ch. SE2.pdf part of SONY KDL-26_32_37_40P3000, KDL-26_32_37_40P300H Service Manual LCD TV, Power DS1 or GS2, GS3, GS4
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HISTORY
Model Name : KDL-26/32/37/40P3000 & KDL-26/32/37/40P300H SERVICE MANUAL
Click on Page Number to display detail of changes.
Date
2007.10 2007.11
Part Number
9-927-574-01 9-927-574-02
Description of Revisions
Original Manual. Amendments to the exploded views (P74-77) and addition of full size schematic diagrams (Full).
Version 1.0
2.0
2007.12 2008.03
9-927-574-03 9-927-574-04
Amendments to the OTRUM rear cover removal (P4) and auto tuning procedure (P17). Addition of part number for IR guide light (P76/77) 3.0 4.0
SE2
RM-ED009
SERVICE MANUAL
MODEL
COMMANDER DEST
SE2 CHASSIS
MODEL
COMMANDER DEST
KDL-26P3000 KDL-32P3000 KDL-37P3000 KDL-40P3000 KDL-26P300H KDL-32P300H KDL-37P300H KDL-40P300H
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
RM-ED009
AEP
KDL-26P3000 KDL-32P3000 KDL-37P3000 KDL-40P3000 KDL-26P300H KDL-32P300H KDL-37P300H KDL-40P300H
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
RM-ED009
UK
KDL-26P3000 / KDL-32P3000 / KDL-37P3000 / KDL-40P3000 KDL-26P300H / KDL-32P300H / KDL-37P300H / KDL-40P300H
RM-ED009
FLAT PANEL COLOR TV
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SE2
RM-ED009
TABLE OF CONTENTS
Section Title Page 3 3 5 6 8 Section Title Page 19 20 20 21 46 50 55 60 65 65 66 66 67 68 69 70 72 1. GENERAL ................................................................... Caution ................................................................ Specifications ...................................................... Connectors .......................................................... Self Diagnosis ..................................................... 2. DISASSEMBLY 2-1. Rear Cover Removal ........................................... 2-2. Stand Removal (26 & 32 inches) ........................ 2-3. Stand Removal (37 & 40 inches) ........................ 2-4. Loudspeaker Removal ........................................ 2-5. B1 Board Removal .............................................. 2-6. DS1 Board Removal (40 inches) ........................ 2-7. GS2 Board Removal (26 & 32 inches) ............... 2-8. GS3 (37 inches) or GS4 (40 inches) Board Removal ................................................... 2-9. H1PS Board Removal ........................................ 2-10. H3PS Board Removal ........................................ 2-11. LCD Panel Removal ........................................... 3. CIRCUIT ADJUSTMENTS 3-1. Electrical Adjustments ....................................... 3-2. TT Mode ............................................................ 3-3. TT OSD Labels .................................................. 4. DIAGRAMS 4-1. Block Diagram .................................................... 4-2. Circuit Board Location ........................................ 4-3. Schematic Diagrams and Printed Wiring Boards ................................................................. B1 Board Schematic Diagram ............................. DS1 Board Schematic Diagram (40 inches) ....... GS2 Board Schematic Diagram (26 & 32 inches) ................................................. GS3 Board Schematic Diagram (37 inches) ....... GS4 Board Schematic Diagram (40 inches) ....... H1PS Board Schematic Diagram ....................... H3PS Board Schematic Diagram ....................... B1 Printed Wiring Board .................................... H1PS Printed Wiring Board ............................... H3PS Printed Wiring Board ............................... DS1 Printed Wiring Board ................................. GS2 Printed Wiring Board ................................. GS3 Printed Wiring Board ................................. GS4 Printed Wiring Board ................................. 5. EXPLODED VIEWS 5-1. Chassis (26 & 32 inches) .................................... 5-2. Chassis (37 & 40 inches) .................................... 5-3. Rear Cover, Stand & Bezel (26 & 32 inches) ..... 5-4. Rear Cover, Stand & Bezel (37 & 40 inches) ..... 6. ELECTRICAL PARTS LIST ..................................
9 9 10 10 11 11 12 12 13 13 14
15 17 18
74 75 76 77 78
WARNING !! AN ISOLATION TRANSFORMER SHOULD BE USED DURING ANY SERVICE WORK TO AVOID POSSIBLE SHOCK HAZARD DUE TO LIVE CHASSIS, THE CHASSIS OF THIS RECEIVER IS DIRECTLY CONNECTED TO THE POWER LINE.
SAFETY-RELATED COMPONENT WARNING !! COMPONENTS IDENTIFIED BY SHADING AND MARKED ON THE SCHEMATIC DIAGRAMS, EXPLODED VIEWS AND IN THE PARTS LIST ARE CRITICAL FOR SAFE OPERATION. REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR IN SUPPLEMENTS PUBLISHED BY SONY.
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RM-ED009
SECTION 1 GENERAL CAUTION
Lead Free Soldered Boards
example 1
The circuit boards used in these models have been processed using Lead Free Solder. The boards are identified by the LF logo located close to the board designation e.g. F1, H1 etc [ see examples ]. The servicing of these boards requires special precautions to be taken as outlined below.
example 2
Lead Free Solder material must be used to comply with environmental requirements of new solder joints. Lead Free Solder is available under the following part numbers :
Partnumber 7-640-005-19 7-640-005-20 7-640-005-21 7-640-005-22 7-640-005-23 7-640-005-24 7-640-005-25 7-640-005-26
Diameter 0.3mm 0.4mm 0.5mm 0.6mm 0.8mm 1.0mm 1.2mm 1.6mm
Remarks 0.25Kg 0.50Kg 0.50Kg 0.25Kg 1.00Kg 1.00Kg 1.00Kg 1.00Kg
Due to the higher melting point of Lead Free Solder the soldering iron tip temperature needs to be set to 370 degrees centigrade. This requires soldering equipment capable of accurate temperature control coupled with a good heat recovery characteristics. For more information on the use of Lead Free Solder, please refer to http://www.sony-training.com
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SE2
RM-ED009
CAUTION
Rear Cover Removal For OTRUM Models 1). When removing the rear cover for OTRUM models firstly remove the LCD panel from the stand assembly and carefully place the unit in a horizontal position. 2). Remove the OTRUM control module the rear cover.
3). Remove the tape and cable (OTRUMmodule to the clock) from the rear cover.
4). Remove the clock unit (40" does not have this module).
Rear Cover Removal For All SE2 Models 1). When removing the rear cover it is important to ensure that the top button plate is fixed to the front cabinet and not removed with the rear cover. This is to avoid breaking the cable connected to the switch button board. It is also important to remember that whilst removing the rear cover it is kept parallel to the LCD plane.
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RM-ED009
SPECIFICATIONS
ITEM MODEL Television System Analogue: B/G/H, D/K, I, L E Digital: DVB-T Stereo System Channel Coverage Analogue: VHF : E2-E12 UHF : E21-E69 CATV : S1-S20 HYPER : S21-S41 D/K: R1-R12, R21-R69 L: F2-F10, B-Q, F21-F69 I: UHF B21-B69 Digital: VHF/UHF Color System Analogue: PAL, SECAM NTSC 3.58/4.43 (VIDEO ONLY) Digital: MPEG-2 MP@ML Analogue: PAL, SECAM NTSC 3.58/4.43 (VIDEO ONLY) Digital: MPEG-2 MP@ML
GERMAN/NICAM Stereo
Analogue: I U Digital: DVB-T NICAM Stereo
Analogue: I: UHF B21-B69 Digital: VHF/UHF
Projected Picture Size
LCD(Liquid Crystal Display) Panel Approx 26 inches (KDL-26XXXXX) Approx 32 inches (KDL-32XXXXX) Approx 37 inches (KDL-37XXXXX) Approx 40 inches (KDL-40XXXXX)
Sound Output Right and Left speaker Sub-woofer General Specifications Power Requirements Power Consumption/ Standby 220 - 240V Approx 90W/0.7W or less (26 inches) Approx 130W/0.7W or less (32 inches) Approx 150W/0.6W or less (37 inches) Approx 165W/0.6W or less (40 inches) Approx 657x500x214mm (26 inches with stand) Approx 657x453x121mm (26 inches without stand) Approx 790x577x214mm (32 inches with stand) Approx 790x530x119mm (32 inches without stand) Approx 906x658x265mm (37 inches with stand) Approx 906x611x126mm (37 inches without stand) Approx 982x690x265mm (40 inches with stand) Approx 982x643x124mm (40 inches without stand) Approx 12.0kg (26 inches with stand) Approx 10.0kg (26 inches without stand) Approx 15.0kg (32 inches with stand) Approx 13.0kg (32 inches without stand) Approx 21.0kg (37 inches with stand) Approx 18.0kg (37 inches without stand) Approx 23.5kg (40 inches with stand) Approx 20.0kg (40 inches without stand) RM-ED009 Remote Commander (1) IEC designated R06 battery (2) Support belt (1) and screws (2) Intergrated digital Tuner, High Picture Quality, Bravia Engine, BBE ViVA, 2 HDMI inputs, PC input. 2 x 10W (RMS)
Input/Output Terminals [REAR] Inputs for Audio and Video signals. Inputs for RGB. Outputs of TV Video and Audio signals.
1: 21-pin Euro connector (CENELEC standard)
Dimensions Inputs for Audio and Video signals. Inputs for RGB. Outputs of Video and Audio signals (Selectable). SmartLink interface.
2: 21-pin Euro connector (CENELEC standard)
Weight
Phono Jacks
Output Connectors variable for Audio Signals.
Supplied Accessories
HDMI Inputs HDMI Connectors PC Input 15 Pin D Sub Connector CAM Slot Conditional Access Module Input/Output Terminals [SIDE] Headphone jack Stereo mini jack Audio input Phono jacks Video input Phono jack S Video input 4 pin mini DIN Design and specifications
Other Features
Remote control system : Infrared control 3V dc 2 batteries IEC designation R06 (size AA)
Power requirements
are subject to change without notice.
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SE2
RM-ED009
CONNECTORS
21 Pin Connector (SCART)
Pin No 1 1 2 Signal Audio output B (right) Audio input B (right) Audio output A (left) Ground (audio) Ground (blue) Audio input A (left) Blue input Function select (AV control) Ground (green) AVlink Green Open Ground (red) Ground (blanking) _ 15 _ _ Red input (S signal Chroma input) Blanking input (Ys signal) Ground (video output) Ground (video input) Video output Video input 20 1V +/- 3dB, 75ohms, positive sync 0.3V (-3+10dB) 1V +/- 3dB, 75ohms, positive sync 0.3V (-3+10dB) 1V +/- 3dB, 75ohms, positive sync 0.3V (-3+10dB) 0.7 +/- 3dB, 75 ohms, positive 0.3 +/- 3dB, 75 ohms, positive High state (1-3V) Low state (0-0.4V) Input impedence : 75 ohms Green signal : 0.7 +/- 3dB, 75 ohms, positive Standard level : 0.5V rms Output impedence : More than 10kohm* 0.7 +/- 3dB, 75 ohms positive High state (9.5-12V) : Part mode Low state (0-2V) : TV mode Input impedence : More than 10K ohms Input capacitance : Less than 2nF Signal level Standard level : 0.5V rms Output impedence : Less than 1kohm* Standard level : 0.5V rms Output impedence : More than 10kohm* Standard level : 0.5V rms Output impedence : Less than 1kohm*
2 3
21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 3 2 1 4
4 5 6 7 8
9 10 11 12 13 14
- -
16 17 18 19
- 21
Video input Y (S signal) Common ground (plug, shield)
Connected
Not Connected (open)
* at 20Hz - 20kHz
UK PLUG WARNING
WARNING (UK Models only)
The flexible mains lead is supplied connected to a B.S. 1363 fused plug having a fuse of the correct rating for the set. Should the fuse need to be replaced, use a fuse of the same rating approved by ASTA to BS 1362, ie one that carries the ASA mark. T
IF THE PLUG SUPPLIED WITH THIS APPLIANCE IS NOT SUITABLE FOR THE OUTLET SOCKETS IN YOUR HOME, IT SHOULD BE CUT OFF AND AN APPROPRIATE PLUG FITTED. THE PLUG SEVERED FROM THE MAINS LEAD MUST BE DESTROYED AS A PLUG WITH BARED WIRES IS DANGEROUS IF ENGAGED IN A LIVE SOCKET.
How to replace the fuse. Open the fuse compartment with a screwdriver blade and replace the fuse.
FUSE
When an alternative type of plug is used, it should be fitted with the correct rating fuse, otherwise the circuit should be protected by the same rating fuse at the distribution board. -6-
SE2
RM-ED009
HDMI Connector
Pin No 1 2 3 4 5 6 7 8 9 10 Signal Assignment TMDS Data2+ TMDS Data2 Shield TMDS Data2TMDS Data1+ TMDS Data1 Shield TMDS Data1TMDS Data0+ TMDS Data0 Shield TMDS Data0TMDS Clock+ Pin No 11 12 13 14 15 16 17 18 19 Signal Assignment TMDS Clock Shield TMDS ClockCEC Reserved (N.C. on device) SCL SDA DDC/CEC Ground +5V Power Hot Plug Detect
15 Pin D Sub Connector (PC)
Pin No 1
1
Signal Assignment Red Out Green Out Blue Out Unused Ground Red Return Green Return (Ground) Blue Return (Ground)
Pin No 9 10 11 12 13 14 15
Signal Assignment +5V DC Sync Return (Ground) Monitor ID0 in Display DCC Serial Data Horizontal Sync Vertical Sync DCC Serial Clock
2 3 4 5 6 7 8
Rear Connection Panel
Side Connection Panel
S Video socket pin configuration
S-Video socket
Pin No 1 2 3
Signal Ground Ground Y (S signal) input
Signal Level 1V+/- 3dB 75ohm, positive Sync. 0.3V -3 +10dB 0.3V+/- 3dB 75ohm, positive Sync.
4
C (S signal) input
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SE2
RM-ED009
SE2 SELF DIAGNOSTIC SOFTWARE
The identification of errors within the SE2 chassis is triggered in one of two ways :- 1: Busy or 2: Device failure to respond to IIC. In the event of one of these situations arising the software will first try to release the bus if busy (Failure to do so will report with a continuous flashing LED) and then communicate with each device in turn to establish if a device is faulty. If a device is found to be faulty the relevant device number will be displayed through the LED (Series of flashes which must be counted).
LED Error Code
Number of LED Flashes 02 03 04 05 06 07 08 09 10 13
Error Description Balancer error. Power supply protection error. Inverter error. NVM error. IIC error. HDMI error. Digital error. Tuner Error Sound processor Real time clock error
Checked In normal mode. In normal mode. In normal mode. In initialisation state. In normal mode. In initialisation state. In normal mode. In initialisation state. In initialisation state. In initialisation state.
Action Goes into standby. Goes into standby. Goes into standby. Adds error to error menu. Adds error to error menu. Adds error to error menu. Adds error to error menu. Adds error to error menu. Adds error to error menu. Adds error to error menu.
Error Descriptions
Error Description Balancer error. Power supply protection error. Panel error. NVM error. IIC error. HDMI error. Digital error. Tuner Error Sound processor Real time clock error Meaning/Related Fault Balancer error/PANEL_DET (PMUX2.0) to low level, between 2.48V and 0.83V. 5V, 3.3V or 1.8V failure/POWER_DET (P3_6) to high level. Inverter failure/PANEL_DET (PMUX2.0) to low level, less than 0.83V. EEPROM cannot be read or written. IIC bus cannot be correctly initialised. HDCP cannot be set-up correctly. Digital CPU does not respond by DPI communication (Only for digital models). IF circuit or PLL circuit does not respond to IIC commands. MSP3410G IC does not respond to IIC commands. RTC IC does not respond to IIC commands (Only for digital models).
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SE2
RM-ED009
SECTION 2 DISASSEMBLY
2-1. REAR COVER REMOVAL
7
6
2-2. STAND REMOVAL (26 & 32 inches)
Three Screws
9
SE2
RM-ED009
2-3. STAND REMOVAL (37 & 40 inches)
2-4. LOUDSPEAKER REMOVAL
Two Screws
Loudspeaker
10
SE2
RM-ED009
2-5. B1 BOARD REMOVAL
Six Screws
B1 Board
2-6. DS1 BOARD REMOVAL (40 inches)
Four Screws
DS1 Board 2
11
SE2
RM-ED009
2-7. GS2 BOARD REMOVAL (26 & 32 inches)
Four Screws
GS2 Board
2-8. GS3/GS4 BOARD REMOVAL (37/40 inches)
Six Screws
GS3/GS4 Board 2
12
SE2
RM-ED009
2-9. H1PS BOARD REMOVAL
Two Screws
H1PS Board
2-10. H3PS BOARD REMOVAL
One Screw
H3PS Board
13
SE2
RM-ED009
2-11. LCD PANEL REMOVAL
Two Screws
Two Screws 2
3 One Screw
LCD Panel 5
One Screw 4
6
14
SE2
RM-ED009
SECTION 3 CIRCUIT ADJUSTMENTS
3-1. Electrical Adjustments
Service adjustments to this model can be performed using the supplied remote commander RM-ED009. How to enter into the Service Mode 1. 2. Turn on the power to the TV set and enter into the stand-by mode. Press the following sequence of buttons on the remote commander.
+
BACKLIGHT BACKLIGHT U BACKLIGHT BL SETUDEN BL BOTTOM ECO MODE APL MAX DIMMER MIN APL FACTOR OSD CONTR MIN DIMMER APL MIN (0, 255) (0, 10) (0, 255) (0, 255) (0, 1) (0, 255) (-128, +127) (0, 255) (0, 255) (0, 255) (0, 255) 235 10 38 92 1 140 -32 0 40 186 103
i+
(ON SCREEN DISPLAY)
5
(DIGIT 5)
+
(VOLUME +)
TV I/
(TV)
`TT--' will appear in the upper right corner of the screen. Other status information will also be displayed (See 3-3 page 18). 3. Press `MENU' on the remote commander to obtain the following menu on the screen.
BACKLIGHT HDMI SOUND IF ADJUST PANEL TEMP ERROR MENU SE2 v0.10 FACTORY DATA: 11111111 SERIAL NUMBER: 4294967295 WORKING TIME: 0:22
HDMI VAI2 VAI3 Vper MSB Vper ISB Hper MSB HS Width MSB STM LSB Ri (MSB) Ri (LSB) Aksv_0 Aksv_1 Aksv_2 Aksv_3 Aksv_4 An_0 An_1 An_2 An_3 An_4 An_5 An_6 An_7 Pj Ainfo Flags (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) 0 0 3 31 0 0 176 218 101 0 0 0 0 0 0 0 0 0 0 0 0 0 202 0 6
4. 5. 6.
Move to the corresponding adjustment item using the up or down arrow buttons on the Remote Commander. Press the right arrow button to enter into the required menu item. Press the `Menu' button on the Remote Commander to quit the Service Mode when all adjustments have been completed.
Note : · After carrying out the service adjustments, to prevent the customer accessing the `Service Menu' switch the TV set OFF and then ON again.
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SE2
RM-ED009
SOUND Lineout offset M-N M-D M-S S-M D-M N-M Effect Mode BBE Mode BBE Vol main BBE Vol res B1 B2 B3 B4 B5 Loudness MB_STR MB_LIM MB_HMC MB_LP MB_HP SUBW_FREQ NICAM C AD NICAM Error Stereo Status (-80, +40) (0, 511) (-128, -1) (+0, +127) (+0, +127) (-128, -1) (0, 1023) (+0, +2) (-0, +127) (+0, +255) (+0, +7) (-96, +96) (-96, +96) (-96, +96) (-96, +96) (-96, +96) (+0, +68) (+0, -127) (-32, +0) (+0, +127) (+5, +30) (+3, +30) (+5, +40) (0, 2047) (-128, +127) 0000000110 +8 192 -20 +20 +10 -10 496 +1 +0 +3 +0 +8 +2 -12 -12 +6 +23 +0 +0 +0 +5 +3 +5 2047 +0
PANEL TEMP TEMPERATURE (0, 125) 33
00000
ERROR MENU E02: BALANCER E03: DC Fail E04: INVERTER E05: NVM E06: IIC E07: HDMI E08: DIGITAL E09: TUNER E10: SP E13: RTC
IF ADJUST Automute Audio Gain L Gating Coincidence AFT window AFT Status AGC TOP 0 0 0 0 1 0111 (-16, +15) +0
(0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255) (0, 255)
0 0 0 0 0 0 0 0 0 0
WORKING TIME HOURS MINUTES
(0, 65535) (0, 59)
0 0
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RM-ED009
3-2. TT MODE
TT mode is available by setting the TV for operation in Service Mode [ As shown on Page 15 ] , OSD `TT' appears. The functions described below are available by selecting the two numbers. To release the `Test mode 2', press 00, 10, 20 ... twice or switch the TV set into Stand-by mode. In `TT Menu' mode, it is possible to remove the Menu from the screen by pressing the Speaker Off button once. Pressing the Speaker OFF button a second time will cause the Menu to reappear. The function is kept even when the menu is not displayed on screen !!.
00 03 04 05 06 07 08 09 14 19 27 31 32 33 34 35 37 38 39 41 43 44 45 46 48 49 51 52 53 54 55 56 57 58
'TT' mode off Set volume to 35% Set volume to 50% Set volume to 65% Set volume to 80% Ageing mode on Shipping Condition WB adj initial conditions Teletext centered Factory toggle mode (on/off) CBA mode toggle (ON/OFF) ECS mode toggle (ON/OFF) Set BCN channels preset Connect/Disconnect EDID write o general I2C bus HDMI log enable/disable Hotel mode toggle PC Monitor mode toggle OTRUM mode Enable Digital Test Re-initialise NVM Select Dual Sound "A" Select Dual Sound "B" Select Dual Sound "Mono" Select Dual Sound "Stereo" Set NVM as non-virgin Set NVM as virgin Hybrid/ALPS tuner selection Temperature sensor enable/disable Digital/Analog model Watchdog toggle Audio delay toggle Set Bravia Model enable/disable MSP Auto Carrier Mute function enable/disable Chip select toggle
59 61 62 63 64 65 66 67 68 71 72 73 74 75 76 77 78 79 81 82 83 84 85 86 87 88 89 91 92 94 96 97 98 99
Visual I2C toggle Set 15" 4:3 XGA settings Set 20" 4:3 VGA settings Set 20" WXGA settings Set 23" WXGA settings Set 26" WXGA settings Set 32" WXGA settings Set 37" WXGA settings Set 40" WXGA settings Auto AGC AM from baseband (AFRIC dem) or fromRF (MSP dem) HDMI number of inputs (0 to 2) DDC enable Set centred balance Set volume to max Set volume to min Set balance full left Set balance full right Digital BER display Digital Service menu Digital colour bar output from DENC TS CI path through Digital tuner power down (Only 1 power cycle,default is no power down) Switch between two digital SW banks Local keys test Digital shipping conditions (Clear tune database) LED test OAD enable/disable toggle TS CI path through with Reed Solomon off Spread spectrum toggle Digital debug output enable/disable Digital 656 output enable/disable Digital auto reset function enable/disable Display error and working time menu
Note : OTRUM Models TT Command and Auto Tuning If auto tuning of an OTRUM model is required it is necessary to use the following procedure. 1). Go in to the Service Menu (See page 15) and confirm the TV set is in normal mode (TT38). 2). Go in to the menu and tuning options and re-tune the set, or use the auto-start menu. 3). Go in to the Service Menu (See page 15) and confirm the TV set is in OTRUM mode (TT38).
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RM-ED009
3-3. TT OSD Labels
(1)
2 6
"
D
(5)
(2)
T T -
-
(3)
E C S D D C (13)
(4)
C B A 2 T
(8)
B S C
(20)
N o r m H V
(10)
(6)
(7)
E W
(9)
(21)
C D
(11)
M K
(12)
L X
(22)
(14)
(15)
(16)
(17)
(18)
(19)
(23)
H
(24)
Key: 1. Panel size configuration. Changed by TT61...TT68. 2. D/A: D is shown when Digital mode is enabled; A is shown when Analogue mode is enabled. Changed by TT53. 3. TT-- command prompt. 4. ECS/---: ECS enabled/disabled (TT31). 5. CBA/--: CBA is shown when the TV set is in CBA mode (This mode is available from Factory mode TT19). Changed by TT27. 6. Norm/Fact: Normal or Factory mode. Changed by TT19. 7. DDC/---: DDC enabled/disabled. Changed by TT74. 8. 0/1/2: 0 or 2 HDMI inputs toggle. Changed by TT73. 9. E/-: E is shown when EDID WP is enabled; - is shown otherwise. Changed by TT33. 10. M/HO/-: M is shown when PC monitor mode is enabled changed by TT37; H is shown when Hotel mode is enabled changed by TT35; O is shown when OTRUM is enabled changed by TT38; - is shown otherwise. 11. C/-: C (Default value) is shown when MSP Auto Carrier Mute function is enabled; - is shown otherwise. Changed by TT57. 12. M/A: M (Default value) is shown when AM sound is demodulated in MSP; A is shown when AFRIC demodulator is used. Changed by TT72. 13. N/A: Previously used to indicate Clk enabled. 14. T/-: T is shown when digital test is enabled; - is shown otherwise. Changed by TT39. 15. W/-: W is shown when watchdog is enabled; - is shown otherwise. Changed by TT54. 16. C/-: C is shown when chip select is enabled; - is shown instead. This mode is only available in factory mode. Changed by TT58. 17. V/-: V is shown when visual I2C is enabled; - is shown otherwise. Changed by TT59. 18. D/-: D is shown when audio delay is enabled; - is shown otherwise. Changed by TT55. 19. K/-: K is shown when spread spectrum is enabled; - is shown otherwise. Changed by TT94. 20. B/-: B is shown for BRAVIA models; -is shown otherwise. This mode is only available in factory mode. Changed by TT56. 21. S/-: S is shown if temperature sensor is enabled; - is shown otherwise. Changed by TT52. 22. L/-: L is shown when HDMI is enabled; - is shown otherwise. Changed by TT34. 23. X/-: X is shown when teletext is centered (Default value); - is shown otherwise. Changed by TT14. 24. H/A: H is shown when Hybrid tuner is selected; A is shown if ALPS tuner is selected. Changed by TT51.
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RM-ED009
4-1. BLOCK DIAGRAM
H3PS SIRCS, LED
H1PS SWITCH-BUTTONS
PCMCIA
B U F F E R S
NAND
DDR
VIDEO PROCESSOR
T-CON
JIG MS VIDEO PROCESSOR COFDM Decoder
HDMI1 HDMI decoder HDMI2
AUDIO OUT DS1 BALANCER Video Audio side in (only for 40" panel)
P A N N E L
AUDIO HDMI IF IC
HP AMPLIFIER SCART1 SCART2 COMP AUDIO PC PC
HP INVERTER
TUNER
B1 SIGNAL BOARD
RF
SPEAKERS AMPLIFIER
GS2, GS3, GS4
POWER SUPPLY BOARD
SPEAKERS
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RM-ED009
4-2. CIRCUIT BOARD LOCATION 5-2. CIRCUIT BOARD LOCATION
H1PS
Reference Information
RESISTOR RN RC : METAL FILM : SOLID : NON FLAMMABLE CARBON : NON FLAMMABLE FUSIBLE : NON FLAMMABLE METAL OXIDE : NON FLAMMABLE CEMENT : NON FLAMMABLE WIREWOUND : ADJUSTMENT RESISTOR COIL CAPACITOR LF-8L TA PS PP PT MPS MPP ALB ALT ALR : MICRO INDUCTOR : TANTALUM : STYROL : POLYPROPYLENE : MYLAR : METALIZED POLYESTER : METALIZED POLYPROPYLENE : BIPOLAR : HIGH TEMPERATURE : HIGH RIPPLE
C
C
FPRD
N VM H GS2/GS3/GS4 A
CVM Board
B1
FUSE RS RB RW
J S1 Board A2
DS1
A1
D1
A Board
H3PS
D2 A
D
4-3. SCHEMATIC DIAGRAMS AND DIAGRAMS AND 5-3. SCHEMATIC PRINTED WIRING BOARDS PRINTED WIRING BOARDS
Note :
· · · All capacitors are in µF unless otherwise noted. pF : µµF 50WV or less are not indicated except for electrolytic types. Indication of resistance, which does not have one for rating electrical power, is as follows. Pitch : 5mm Electrical power rating : 1/4W · · Chip resistors are 1/10W All resistors are in ohms. k = 1000 ohms, M = 1000,000 ohms : nonflammable resistor. : fusible resistor. : internal component. : panel designation or adjustment for repair. All variable and adjustable resistors have characteristic curve B, unless otherwise noted. All voltages are in Volts. Readings are taken with a 10Mohm digital mutimeter. Readings are taken with a color bar input signal. Voltage variations may be noted due to normal production tolerences. : B + bus. : B - bus. : RF signal path. : earth - ground. : earth - chassis.
Note : The components identified by shading
and marked are critical for safety. Replace only with the part numbers specified in the parts list.
· · · · · · · · ·
Note : Les composants identifiés par une trame et
par une marque sont d'une importance critique pour la sécurité. Ne les remplacer que par des pièces de numéro spécifié. specified.
Note : The components identified by mark contain confidential information. Strictly follow the instructions whenever the components are repaired and/or replaced.
· · · · ·
Note: Schematic diagrams are for reference only. Please refer to the electrical parts list for the correct value and part number of components.
- 20 -
1
5
9 7 3
8
6
4
2
E8 E9 E10 E11 E12 E13 E8 E9 E10 E11 E12 E13
12
E6 E7 E14 E15 E16 H5 H17 J5 J17 K5 K17 L5 L17 M5 N5 P5 P17 R5 T5 U7 U8 U9 U10 U14 U15 U16 E6 E7 E14 E15 E16 H5 H17 J 5 J17 K5 K17 L5 L17 M5 N5 P5 P17 R5 T5 U7 U8 U9 U10 U14 U15 U16
11 10
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
0.1 0.1 0.1 0.1 0.1 C7100 XX C7105 C7101 4.7 C7109 C7108 C7110 0.1 C7104
GND_1
A
B1.SE2
FB7100 0uH
FE_+1V5
C7107
C7106
0.1
B
VDD2 VDD2 VDD2 VDD2 VDD2 VDD2
FB7102
C7121 C7120 XX XX XX
VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1 VDD1
THIS CAPACITOR TO BE PLACED UNDERNEATH BGA
R17R17
0uH
3.3V_MAIN
C7117
B1
C7119
C
XX GND_1
1A/13
VDD3_USB USBCLKI / PPORT105
R20R20 R21R21 P21P21
JL7100
D
SIGN15015 SIGN15007
USB_DP1 USB_DN1
T20T20 T21T21
FE_USB_DP FE_USB_DN
USB_DP0 USB_DN0
E
R7101 10k
R7100 10k
U18U18
GND_1
R7102 R7103
XX XX
FE_USB_PON FE_NUSB_OVR
USB_PPON1 / PPORT109 U19U19 USB_OCI1 / PPORT108 U20U20 USB_PPON0 / PPORT107 U21U21 USB_OCI0 / PPORT106
F
AA3 AA3 Y4 Y4 W4 W4 W3 W3 V5 V5 Y3 Y3 AA2 AA2
FE_MS_DAT[0]
FE_MS_BS
G
MSDATA3 / PPORT127 MSDATA2 / PPORT126 MSDATA1 / PPORT132 MSDIO/DATA0 / PPORT131 MSDIR / PPORT128 MSBS / PPORT130 MSCLK / PPORT129
FE_MS_CLK
V15V15
100
R7104
JL7102 JL7103 XX R7105 SIGN14963 SIGN14971 JL7104 JL7105
FE_TXD0B FE_RXD0B
H
TXD0B / CAP/COMP0 / PPORT110 AA1 AA1 RXD0B / CAP/COMP3 / PPORT137 W15W15 CTS0B / CAP/COMP1 / PPORT111 Y15Y15 RTS0B / CAP/COMP2 / PPORT112
AA5 AA5
100
R7106
FE_TXD1B FE_RXD1B FE_M_SYNC R7107 R7108 R7109 R7110 47 47 47
- 21 -
I
TXD1B AA6 AA6 RXD1B B5 B5 RTS1B_B / STP0_STRT / PPORT10 C5 C5 CTS1B_B / STP0_ERRB / PPORT11 M19 M19 DCD1B / PPORT55 L20L20 RI1B / PPORT54
W19W19
47
3.3V_MAIN
TP7100 CI2_VS1B
VDO_VHSB / TXD2B / PPORT14 VDO_VVSB / RXD2B / PPORT13
AA19AA19
TP7101 CI2_RSTB
N18N18
TP7102 CI2_IREQB
TXD3B / PPORT53 RXD3B / PPORT52
L21L21
J
TP7103 nCI2_TSEN
Y8 Y8 AA8 AA8
1
100 RB7100
2
TP7104
FB7104
0uH
SDA_EMMA
SDA1 SCL1
TP7105
3 4
FB7105 TP7106
Y7 Y7
5 6
0uH
SCL_EMMA
FB7106
AA7 AA7
7 8
0uH
SDA_DIGITAL
K
SDA0 SCL0
TP7107
FB7107
0uH
SCL_DIGITAL
XX
4.7k
4.7k
XX
R7114
R7113
R7112
R7111
P19P19 R18R18 N20N20
FE_FTV_CONFIG2 FE_FTV_CONFIG0 FE_FTV_CONFIG1
SCKINOUT / PPORT46 SDIN / PPORT44 SDOUT / PPORT45
3.3V_MAIN
L
V18V18
SIGN14994
TP7112 FE_MS_INS
SIGN14979
IR_IN_1 / PPORT47 P18P18 IR_IN_0 / PPORT51 W18W18 IR_OUT / PPORT48
TP7115 CI2_CD1B
M
T19T19
RB7101 10k
TV_DEM_SEL
SMRST0 / PPORT39 T18T18 CMDVCC0 / RI0B / PPORT40 N21N21 OFF0 / DCD0B / PPORT41 P20P20 SMCLK0 / DTR0B / PPORT42 R19R19 SMDAT0 / DSR0B / PPORT43
3.3V_MAIN
N
V9 V9 W7 W7 Y6 Y6 V8 V8
FE_NCI1_OVR R7115 R7116 R7117 47 47
JL7106
FE_NCI_EN XX FE_CI1_PWR_EN FE_ABCK,FE_ADO,FE_ALRCK,FE_AMCK
AO1_DAT / PPORT125 AO1_LRCK / PPORT123 AO1_BCK / PPORT124 AO1_MCK / PPORT122
W6 W6 Y5 Y5 AA4 AA4 W5 W5
R7118 R7119 R7120 R7122
47 47 47 47
SIGN14984
FE_ADO FE_ALRCK FE_ABCK FE_AMCK JL7107
O
AO0_DAT AO0_LRCK AO0_BCK AO0_MCK ATX
V6 V6
P
D20D20
R7126
47
FE_USB_PON
FE_NDEMOD_RESET
FE_NDEMOD_RESET
JL7108 R7127 47
IC7100
TP7119
JL7109 JL7110
DIG_OSD_STATUS
Q
TP7120 FE_JIG_MODE
JL711
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1A/13 ~
PAR / PPORT56 F19F19 FRAMEB / PPORT57 F18F18 IRDYB / PPORT58 E21E21 TRDYB / PPORT59 E19E19 STOPB / PPORT60 H21H21 IDSEL / PPORT61 E20E20 DEVSELB / PPORT62 M18 M18 REQB0 / PPORT63 N19N19 GNTB0 / PPORT64 E18E18 PERRB / PPORT65
_ AO0_MCK
W5 W5 SIGN14984
R7122 JL7107
47
FE_AMCK
ATX
V6 V6
P
D20D20 R7126 FE_NDEMOD_RESET 47
FE_USB_PON FE_NDEMOD_RESET
JL7108 R7127 47
IC7100
TP7119
DIG_OSD_STATUS
JL7109 JL7110
Q
TP7120
PAR / PPORT56 F19F19 FRAMEB / PPORT57 F18F18 IRDYB / PPORT58 E21E21 TRDYB / PPORT59 E19E19 STOPB / PPORT60 H21H21 IDSEL / PPORT61 E20E20 DEVSELB / PPORT62 M18 M18 REQB0 / PPORT63 N19N19 GNTB0 / PPORT64 E18E18 PERRB / PPORT65
FE_JIG_MODE
JL7111
R
B17B17
TP7121 TP7122 TP7123
C17C17 D17D17
VDOE_VCK_IN / AD1 / PPORT70 VDOE_VVSB_IN / AD2 / PPORT71 VDOE_VHSB_IN / AD3 / PPORT72
D21D21
TP7124 TP7125
M20 M20 K21K21
S
VDOE_VCK / SERRB / PPORT66 VDOE_VVSB_OUT / INTAB / PPORT67 VDOE_VHSB_OUT / PCICLK / PPORT68
TP7126
VDOE_FLD / AD0 / PPORT69
C18C18
A17A17
FE_NUSB_OVR
T
VDOE_A7 / AD11 / PPORT80 B21B21 VDOE_A6 / AD10 / PPORT79 A21A21 VDOE_A5 / AD9 / PPORT78 B20B20 VDOE_A4 / AD8 / PPORT77 A20A20 VDOE_A3 / AD7 / PPORT76 A19A19 VDOE_A2 / AD6 / PPORT75 B18B18 VDOE_A1 / AD5 / PPORT74 A18A18 VDOE_A0 / AD4 / PPORT73
G20G20
U V
VDOE_R7 / AD19 / PPORT88 G19G19 VDOE_R6 / AD18 / PPORT87 G18G18 VDOE_R5 / AD17 / PPORT86 F21F21 VDOE_R4 / AD16 / PPORT85 D18D18 VDOE_R3 / AD15 / PPORT84 C21C21 VDOE_R2 / AD14 / PPORT83 C20C20 VDOE_R1 / AD13 / PPORT82 C19C19 VDOE_R0 / AD12 / PPORT81
K18K18
W
RESERVED FOR HI_RES GRAPHICS
VDOE_G7 / AD27 / PPORT96 J21 J21 VDOE_G6 / AD26 / PPORT95 J20 J20 VDOE_G5 / AD25 / PPORT94 J19 J19 VDOE_G4 / AD24 / PPORT93 H20H20 VDOE_G3 / AD23 / PPORT92 H19H19 VDOE_G2 / AD22 / PPORT91 H18H18 VDOE_G1 / AD21 / PPORT90 G21G21 VDOE_G0 / AD20 / PPORT89
J18 J18
X
- 22 3 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13 3 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13
Y
VDOE_B7 / CBE3 / PPORT104 F20F20 VDOE_B6 / CBE2 / PPORT103 D19D19 VDOE_B5 / CBE1 / PPORT102 B19B19 VDOE_B4 / CBE0 / PPORT101 L19L19 VDOE_B3 / AD31 / PPORT100 L18L18 VDOE_B2 / AD30 / PPORT99 K20K20 VDOE_B1 / AD29 / PPORT98 K19K19 VDOE_B0 / AD28 / PPORT97
FB7108
V21V21 V20V20 W21W21 W20W20 Y21Y21 Y20Y20 AA21AA21 AA20AA20 V19V19
B1
VDO[7] 0uH FB7109 FB7110 FB7111 FB7112 FB7113 FB7114 FB7115 R7133 0 FB7116 0uH 0uH 0uH 0uH 0uH 0uH 0uH 0uH VDO[6] VDO[5] VDO[4]
1B/13
Z
VDO[3] VDO[2] VDO[1] VDO[0] VDCLK VDCLK,VDO[0-7]
VDO0_D7 / PPORT23 VDO0_D6 / PPORT22 VDO0_D5 / PPORT21 VDO0_D4 / PPORT20 VDO0_D3 / PPORT19 VDO0_D2 / PPORT18 VDO0_D1 / PPORT17 VDO0_D0 / PPORT16 VDO0_VCK / PPORT15 VDO0_FLD / PPORT12
Y19Y19
TP7127 CI2_CD2B JL7119 JL7120
V11V11 V12V12 W12W12 AA12AA12 AA13AA13 Y12Y12
AA
NOTE SYMBOL IS WRONG
SIGN14954
TP7128 C7131 XX
R7138 200
GND_1
C7130 XX
R7137 200
C7129 XX
R7136 200
JL7121 JL7122
BB
Y VAR U VAG V VAB VAY VAC VACVBS
FE_CVBS
W13W13
R7143 200
R7142 200
R7141 200
VREF1 VREF0
GND_1
Y11Y11
C7134 XX
C7133 XX
C7132 10p
CC
Y13Y13
0uH FB7117
RSET1 RSET0
W11W11
FE_+1V5
R7144 330
V14V14 W14W14 Y14Y14 AA14AA14
C7137 0.1
R7147 0 R7148 470 R7149 XX
C7136 0.1
R7145 680
AVDDV AVDDV AVDDV AVDDV
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
C7135 4.7
XX R7146
GND_1
DD
L7100 10uH
10 0.1 C7142 C7143 C7145 C7144 0.1 0.1
3.3V_MAIN
GND_1
NMI/EDINT
TEST / GND
THIS CAPACITOR TO BE PLACED UNDERNEATH BGA
EE
JTCK JTDI JTDO JTMS JTRST
NOTE RESISTORS R7153..R7158 ARE 0.5% TOLERANCE
AGNDV AGNDV AGNDV AGNDV
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
U11 U12 U13 V13 U11 U12 U13 V13
W10 W10
V10
AA10 Y9 W9 W8 AA9 V10 AA10Y9 W9 W8 AA9
FE_NMI_EDINT
FE_JTCK
FE_JTMS
FE_JTDO
FE_JTDI
FE_JTRST
FE_JTCK,FE_JTDI,FE_JTDO,FE_JTMS,FE_JTRST,FE_NMI_EDINT
FF
1
5
9
8
6
4
2
7
3
12
11
10
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1B/13 ~
22
FE_+2V5 FE_+2V5_DDR
21
20
19
18
17
16
15
14
13
12
11
A
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA FB7101 0uH
C7103 XX
C7102 4.7
C7116 0.1 C7114 0.1 C7113 0.1 C7112 0.1
C7115 0.1 C7111 0.1
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
B
3.3V_MAIN
GND_1
E5 E17 F5 F17 G5 G17 T17 U5 U6 U17 E5 E17 F5 F17 G5 G17 T17 U5 U6 U17
E8 E9 E10 E11 E12 E13 E8 E9 E10 E11 E12 E13
E6 E7 E E6 E7 E
VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3 VDD3
VDD2 VDD2 VDD2 VDD2 VDD2 VDD2
VDD1 VDD1 VDD1
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
10
C7127 0.1
C7125
C7124
C7123
C7122
C7126 0.1
C7118
FB7103 0uH
0.1 0.1 0.1 0.1
C
GND_1
FE_DQ[0-15] FE_DQ[15]
A16 A16 B16 A15 B15 A14 B14 A13 B13 D13 C13 D14 C14 D13 C13 D14 C14 B16 A15 B15 A14 B14 A13 B13
FE_DQ[14] FE_DQ[13] FE_DQ[12] FE_DQ[11] FE_DQ[10] FE_DQ[9] FE_DQ[8] FE_DQ[7] FE_DQ[6] FE_DQ[5] FE_DQ[4] FE_DQ[3] FE_DQ[2] FE_DQ[1] FE_DQ[0] FE_DADD[0-12] JL7101 SIGN15011 FE_DADD[12] FE_DADD[11] FE_DADD[10] FE_DADD[9] FE_DADD[8] FE_DADD[7] FE_DADD[6] FE_DADD[5] FE_DADD[4] FE_DADD[3] FE_DADD[2]
D12 A9 B9 D8 A8 B8 A7 B7 A6 B6 D6 C6 D12 A9 B9 D8 A8 B8 A7 B7 A6 B6 D6 C6
D E
D15 C15 D16 C16 D15 C15 D16 C16
DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
B1
F
1C/13
G H
_DVREF,FE_DWEB
FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE
FE_DADD[1] FE_DADD[0]
D7 C7
D7 C7
DADD13 DADD12 DADD11 DADD10 DADD9 DADD8 DADD7 DADD6 DADD5 DADD4 DADD3 DADD2 DADD1 DADD0
FE_DBA1 FE_DBA0 FE_DQM1
C8 D9 A11 C8 D9 A11
- 23 I J K L M N O P Q
FE_DQS1 FE_DQM0 FE_DQS0 FE_DCSB FE_DRASB FE_DCASB
DIFFERENTIAL PAIR OF CLOCK SIGNALS
A12 C11 C12 C9 D10 C10
A12 C11 C12 C9 D10 C10
FE_DWEB FE_DCKE
D11 B10
D11 B10
DBA1 DBA0 UDQM UDQS LDQM LDQS DCSB DRASB DCASB DWEB DCKE
FE_DCLK FE_DCLKB
A10 B11 A10 B11
DCLK DCLKB
FE_DVREF C7128 0.1
THIS CAPACITOR TO BE PLACED UNDERNEATH BGA B12 B12
DVREF
TP7108 TP7109 TP7110 TP7111 TP7113 TP7114 TP7116 TP7117 TP7118
GND_1
Y17 Y17 W17 W17 V17 V17 AA17 AA17 AA16 AA16 Y16 Y16 W16 W16 V16 V16 AA15 AA15
FE_M_CKOUT,FE_M_DATA[0-7],FE_M_VAL
FE_M_DATA[7] FE_M_DATA[6] FE_M_DATA[5] FE_M_DATA[4] FE_M_DATA[3] FE_M_DATA[2] FE_M_DATA[1]
VDI_D7 / PPORT121 VDI_D6 / PPORT120 VDI_D5 / PPORT119 VDI_D4 / PPORT118 VDI_D3 / PPORT117 VDI_D2 / PPORT116 VDI_D1 / PPORT115 VDI_D0 / PPORT114 VDI_VCK / PPORT113
A1 B2 A2 B3 A3 C4 B4
A1 B2 A2 B3 A3 C4 B4
FE_M_DATA[0] FE_M_VAL
FE_M_CKOUT
A4 A5 D5
A4 A5 D5
STP0_DAT7 / PPORT8 STP0_DAT6 / PPORT7 / CTS1B STP0_DAT5 / PPORT6 / RTS1B STP0_DAT4 / PPORT5 STP0_DAT3 / PPORT4 STP0_DAT2 / PPORT3 STP0_DAT1 / PPORT2 STP0_DAT0 / PPORT1 STP0_EN / PPORT9 STP0_CLK / PPORT0
R7121 FE_REGB FE_IOWRB FE_IORDB FE_CI1_RSTB R7123 R7124 R7125 47 47 47 47 FE_CI1_INPACKB FE_CI1_VS1B FE_CI1_IREQB FE_CI1_CD1B FE_CI1_CD2B R7128 10k
3.3V_MAIN B1
F4 N4 P2 G2 R2 G1 K3 V1 C1 Y1 P3
F4 N4 P2 G2 R2 G1 K3 V1 C1 Y1 P3 B1
IC7100
REGB / PPORT34 IOWRB / PPORT31 IORDB / PPORT30 INPACKB / PPORT33 GPIO_VS1B / PPORT28 GPIO_RESET / PPORT32 GPIO_IREQB / PPORT24 GPIO_CD1B / PPORT26 GPIO_CD2B / PPORT35 PCE1B(CE2B_2) / PPORT36 PCE0B(CE2B_1) / PPORT27 IOSI16B / PPORT25
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL FE_CI_TSSYNC FE_CI_TSVAL FE CI TSCLK
E4 F2 E4 F2
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1C/13 ~
STP1_STRT / PPORT38 STP1_EN / PPORT37
FE_IOWRB FE_IORDB FE_CI1_RSTB FE_CI1_INPACKB FE_CI1_VS1B
G1 G1 K3 V1 C1 Y1 P3 B1 R2 R2
R7123
N4 N4 P2 G2 P2 G2
47 47 47
R7124 R7125
P
FE_CI1_IREQB FE_CI1_CD1B FE_CI1_CD2B R7128 10k
Y1 P3 3.3V_MAIN B1 C1 V1 K3
IC7100
Q
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL FE_CI_TSSYNC
E4 E4 F2 H1 F2 H1
IOWRB / PPORT31 IORDB / PPORT30 INPACKB / PPORT33 GPIO_VS1B / PPORT28 GPIO_RESET / PPORT32 GPIO_IREQB / PPORT24 GPIO_CD1B / PPORT26 GPIO_CD2B / PPORT35 PCE1B(CE2B_2) / PPORT36 PCE0B(CE2B_1) / PPORT27 IOSI16B / PPORT25
FE_CI_TSVAL FE_CI_TSCLK FE_CI_TSD[0-7] FE_CI_TSD[7]
R1 R1 R3 T1 T3 U1 D1 D2 C3 R3 T1 T3 U1 D1 D2 C3
STP1_STRT / PPORT38 STP1_EN / PPORT37 STP1_CLK / PPORT29
R
FE_CI_TSD[6] FE_CI_TSD[5] FE_CI_TSD[4] FE_CI_TSD[3] FE_CI_TSD[2] FE_CI_TSD[1] FE_CI_TSD[0] FE_RDATA[0-7] FE_RDATA[7]
U2 U2 R4 V2 W2 V4 C2 D4 E2 V4 C2 D4 E2 R4 V2 W2
S
FE_RDATA[6]
RDATA15 / STP1_DAT7 / BOOT_NAND_SEL1 RDATA14 / STP1_DAT6 / BOOT_NAND_SEL0 RDATA13 / STP1_DAT5 / BOOTSEL1 RDATA12 / STP1_DAT4 / BOOTSEL0 RDATA11 / STP1_DAT3 / MINIBOOT RDATA10 / STP1_DAT2 / BWSEL RDATA9 / STP1_DAT1 / ROMBEND RDATA8 / STP1_DAT0 / MCLKSEL2
T
FE_RDATA[5] FE_RDATA[4] FE_RDATA[3] FE_RDATA[2] FE_RDATA[1] FE_RDATA[0] FE_RADD[19-25]
RDATA7 / MCLKSEL1 RDATA6 / MCLKSEL0 RDATA5 / VRCLKSEL1 RDATA4 / VRCLKSEL0 RDATA3 RDATA2 / MRGMODE1 RDATA1 / MRGMODE0 RDATA0 / ENDIAN
U
FE_RADD[25] FE_RADD[24] FE_RADD[23] FE_RADD[22] FE_RADD[21] FE_RADD[20] FE_RADD[19] JL7112 JL7113 JL7114 FE_RADD[0-11] JL7115 SIGN14969 SIGN14974 SIGN14981 SIGN14985 JL7116 JL7117 JL7118 FE_RADD[11] FE_RADD[10] FE_RADD[9] FE_RADD[8] FE_RADD[7] FE_RADD[6] FE_RADD[5] FE_RADD[4] FE_RADD[3] FE_RADD[2] FE_RADD[1] FE_RADD[0]
J1 G3 J4 K4 L2 M2 N2 L4 M4 J3 H3
J1 G3 J4 K4 L2 M2 N2 L4 M4 J3 H3
B1
V W X
RADD25 / HSD7 / EJTAG_MODE RADD24 / HSD6 / DINT_EN RADD23 / HSD5 / DSYSELB RADD22 / HSD4 / PCI_MODE RADD21 / HSD3 / PCI_SIZE1 RADD20 / HSD2 / PCI_SIZE0 RADD19 / HSD1 / NAND_CS RADD18 / HSD0 RADD17 / PKTSTRT RADD16 / HSDE RADD15 / HSDCLK
SIGN14987 SIGN14989 SIGN14991
M1 N1 K1 N3 T2 M3 L3 H4 G4 J2 H2 F1 E3 E1 D3 M1 N1 K1 N3 T2 M3 L3 H4 G4 J2 H2 F1 E3 E1 D3
1D/13 MAIN MICRO CONTROLLER, HDMI/AV SIDE/PC INPUT, AUDIO PROCESSOR, SCARTS
- 24 Y Z AA BB CC DD EE FF 22 21 20
RADD14 RADD13 RADD12 RADD11 RADD10 RADD9 RADD8 RADD7 RADD6 RADD5 RADD4 RADD3 RADD2 RADD1 RADD0
V3
V3
FE_FCSB0 FE_FWEB FE_FOEB FE_NAND_CLE FE_NAND_ALE FE_NAND_RBB R7130 R7131 R7132 R7134 47 47 47 47
R7129
47
K2 L1 P1
K2 L1 P1
FCSB1 FCSB0 FWEB FOEB
T4 W1 U3 U4 T4 W1 U3 U4
NSEB NRBB NCLE NALE
XX R7135
SIGN15013
AA18 AA18
3.3V_MAIN
XX R7139
SIGN15017
Y18
Y18
CI2_CE2B FE_CI1_CE1B FE_CI1_WAITB
TP7129SIGN14976 R7140 47
Y2 P4 F3
Y2 P4 F3
GCSB3 / PPORT50 GCSB2 / PPORT49 GCSB1 GCSB0 GRDYB
FE_NMASTER_RESET TP7130 FE_PWMOUT FE_CLK27M
FE_+1V5 SIGN14950
AA11 AA11 Y10 Y10
RSTSWB RSTOUT
V7 V7
PWMOUT
M21 M21
CLK27IN
FB7118 0uH
N17 N17
C7138 4.7
C7141 0.1
C7140 0.1
C7139 0.1
AVDDP
THIS CAPACITOR TO BE PLACED UNDERNEATH BGA
GND_1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
AGNDP
M17 M17
GND_1
J 9 J10 J11 J12 J13 K9 K10 K11 K12 K13 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N J9 J10 J11 J12 J13 K9 K10 K11 K12 K13 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N
11
19
18
17
16
15
14
13
12
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 1D/13 ~
A B
C D F
E
G
H
I J L
K
M
B1.-SE2
1
3.3V_MAIN
FB7200 0uH C7200 0.1
GND_1
C7201 1 C7202 C7203 0.1
GND_1
0.1
2
IC7200 GND_1
48 1
NC NC
NOTE PIN 6 IS NOT GND ON SAMSUNG NAND FLASH, ONLY TOSHIBA
47 2
FE_DQ[0-15]
NC NC
46
3.3V_MAIN
B1
3
2A/13
NC NC
NC NC
3
FE_DQ[0]
1
68 RB7205
2
R7200 470
TP7210 FE_RDATA[7] FE_DQ[1]
3 5 6
R7205
TP7211 FE_RDATA[6] FE_DQ[3]
7 8
FE_DQ[2]
FE_NAND_RBB
RB IO/6
TP7200 FE_RDATA[5] FE_RDATA[4] FE_DQ[4]
1
42 7
XX
NC IO/7
TP7212 TP7213 FE_DQ[5]
3 2
4
TP7209 FE_DQ[6]
5
39
FE_FOEB
FOE IO/5
40
TP7201
41 8
68 RB7206
NC NC
FE_DQ[7]
7
LEAVE N.C. SO NOT USED
NC LOCKPRE
37
VCC VCC
5
FE_DQS0 R7217 6
36 13
R7203 10k
GND_1
VSS VSS
35
GND_1
NC NC
NC NC
GND_1
FE_NAND_CLE
CLE NC
FE_DWEB TP7214 FE_RDATA[3] FE_RDATA[2] FE_RDATA[1] FE_RDATA[0] FE_DADD[10] FE_DADD[0] TP7215 TP7216 TP7217 FE_DCASB FE_DRASB
6
FE_NAND_ALE
ALE IO/4
31
TP7204
32 17
FE_FWEB
WE IO/3
30
7
TP7205
18
5
3
1
TP7203
33 16
FE_DQM0
100 RB7207
TP7206
19
FE_DCSB FE_DBA0 FE_DBA1
3 1
100 RB7208
WP
29
I/O2 I/O1
28
NC NC
27
7
21
NC
26
NC NC
25
FE_DADD[1] FE_DADD[2] FE_DADD[3]
8
FE_RDATA[0-7]
NAND FLASH
24
NC
NC
7
5
NC
3
1
7
NC
5
RB7209 100
8
6
4
FE_FCSB0
CE NC
10
TP7202
9 38
4
NC IO/8
43
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 2A/13 ~
FE_DADD[0-12] _DVREF,FE_DWEB FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DC R7209 10k R7210 XX JL7204 JL7208 JL7205 JL7209 R7211 XX R7212 XX JL7206 JL7210
3.3V_MAIN
3.3V_MAIN
45
FE_CI_TSD[0-7]
3.3V_MAIN
9
1k RB7200
FE_CI_TSD[7] FE_CI_TSD[6] FE_CI_TSD[5] FE_CI_TSD[4]
FE_CI_TSD[3]
10
10
12 14 13 11
16
FE_CI_TSD[0] MCLKSEL2
15
9
MINIBOOT
8
7
BOOTSEL0
5
6
BOOTSEL1
4
3
BOOT_NAND_SEL_0
2
1
BOOT_NAND_SEL_1
11
ROMBEND BWSEL FE_CI_TSD[2]
FE_CI_TSD[1]
RDATA[0] = 1 = ENDIAN = Big Endian RDATA[2:1] = 10 = MRGMODE1-0 = Full merge & All bytes RDATA[3] = -- = RESERVED RDATA[5:4] = 10 = VRCLKSEL1-0 = 187MHz RDATA[8:6] = 101 = MCLKSEL2-0 = 166MHz RDATA[9] = 1 = ROMBEND = Big Endian RDATA[10] = 1 = BWSEL = 8bit RDATA[11] = 1 = MINIBOOT = use miniboot RDATA[13:12] = 11 = BOOTSEL1-0 = Nand, then Memory Stick RDATA[15:14] = 00 = BOOT_NAND_SEL1-0 = <256mbit RADD[25] = 1 = EJTAG_MODE = EJTAG RADD[24] = 0 = DINT_EN = disable RADD[23] = 1 = DSYSELB = main only RADD[22] = 1 = PCIMODE = host RADD[21:20] = 00 = PCI_SIZE1-0 = 32Mbyte RADD[19] = 0 = NANDCS = CS0
BOARD VERSION RESISTORS - MOUNT ON SIDE-B WITH JL'S ON SIDE-B
JL7202
JL7203
JL7207 JL7211
C
FE_RDATA[7]
1
RB7202 1k MCLKSEL0
3 5
6 2
MCLKSEL1
4
FE_RDATA[6]
R7213 10k R7214 XX R7215 XX
3.3V_MAIN
GND_1
12
FE_RDATA[5] VRCLKSEL1
7
8
FE_RDATA[4] VRCLKSEL0
10 9
FE_RDATA[3] RESERVED
11 12
FE_RDATA[2] MRGMODE1
13 14
FE_RDATA[1] MRGMODE0
15 16
27MHZ
R7216 XX BOARD VERSION RESISTORS - MOUNT ON SIDE-A
FE_RDATA[0] ENDIAN
GND_1
13
PLACE R7201 & R7202 ADJACENT
R7201 XX R7206 470
FE_RADD[25] EJTAG_MODE DINT_EN NANDCS
TP7207
R7207 470
TP7208 TO FORCE "BOOT FROM MEMORY STICK", CONNECT (SHORT) TP7207 TO TP7208, OR CONNECT (SHORT) JL7200 TO JL7201
R7202 1k R7204 1k R7208 4.7k
14
FE_RADD[19]
FE_RADD[24]
3.3V_MAIN
15
FE_RADD[22] FE_RADD[21] FE_RADD[20] FE_RADD[19-25]
FE_RADD[23]
DSYSELB PCIMODE PCI_SIZE1 PCI_SIZE0
RB7204 1k
1
2
GND_1
STRAP PINS
PLEASE PLACE COMPONENTS IN THIS BOX IN SAME AREA ON PWB
3
4
3.3V_MAIN
S/W
FE_FTV_CONFIG2
5
6
TP7218 TP7219 FE_FTV_CONFIG1 TP7220
7
8
R7220 XX
R7222 XX
R7224 10k
FTV_CO
GND_1
FE_FTV_CONFIG0
R7221 10k
R7223 10k
R7225 XX
FTV_CO
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
GND_1
FTV_CO
16
A
B
C
D
E
F
G
H
I
J
K
L
M
- 25 -
4 44 5 6 11 12 14 34 15 20 22 23
K L O P Q R S T U V W
M N
1
FE_+2V5_DDR
PLACE THESE CAPACITORS CLOSE TO IC PINS. C7224 4.7
C7214 C7215 C7216 100p 100p 100p 100p C7213 100p C7217
C7225 100
C7218 C7219 0.1 0.1
C7220 0.1 C7221 0.1
C7222 C7223 0.1 0.1
GND_1
2
IC7201
66 1
VDD VSS DQ15 DQ0
FE_DQ[0] 5V_MAIN FB7202 0uH C7227 0.1 0.01 C7231
64 3
68 RB7205
2
68 RB7212 FE_DQ[15]
2
1
FE_DQ[1]
63 4
2
1
VDDQ VSSQ
3
FE_DQ[14] FE_DQ[13] FE_DQ[12] 0.1 C7226
3
4
3
FE_DQ[2]
62 5
5
6
5
FE_DQ[3]
GND_1
61 6
7
8
7
DQ3 DQ4 DQ11
DQ12
FE_DQ[4]
1 2 1
68 RB7206
2
8
68 RB7213 FE_DQ[11]
8
VSSQ
60
VDDQ
6
DQ2
DQ13
4
DQ1
DQ14
VDDQ
VSSQ
4
FE_DQ[5]
57 10
FE_DQ[10] FE_DQ[9] FE_DQ[8] R7235 1k R7234 220
FE_CVBS JL7221 L7200 15uH
3
4
3
FE_DQ[6]
56 11
5
6
5
6
DQ6 DQ9
4
DQ5
DQ10
VIDEO AMPS/BUFFERS
C7230 XX
Q7200
FE_DQ[7]
55 12
7
8
7
GND_1
DQ7 DQ8
53 14
8
VSSQ VDDQ
54
NC NC
52
JL7216 JL7217 JL7218 JL7219 JL7220
VDDQ VSSQ
FE_DQS0 R7217
16 51
68
LDQS UDQS TP7223 TP7224 TP7225 TP7226 TP7227
27p C7228 JL7223 68p C7229
50 17
R7228
68
FE_DQS1
5
NC NC
FE_DVREF
VDD VREF
48
1
FE_DWEB
3
2
LDM UDM CLK CLK CKE NC WE CAS RAS CS
R7229 R7230 R7232 100 RB7210
FE_DADD[0-12]
100 100 100 FE_DADD[12]
2
KEY R7244 3.3k 3.3V_STBY
FE_DCLKB FE_DCLK FE_DCKE
RF_DIGITAL
FE_DQM0 R7231 100
20 47 21 46
100 RB7207
19
NC VSS
FE_DQM1
FE_DCASB
22 45
6
FE_DRASB
23 44
FE_DCSB
25 42
100 RB7208
24 43
1
FE_DBA0
41 26
2
1
NC A12
FE_DADD[11] FE_DADD[9] FE_DADD[8] FE_DADD[7] FE_DADD[6] FE_DADD[5] FE_DADD[4]
10 1
3
4
3
FE_DBA1
40 27
5
6
5
6
BS1 A9
39
4
BS0 A11
FE_DADD[10]
28
7
8
7
FE_DADD[0]
29 38
1
2
1
2
A0
37
A7
8
A10 A8
JL7222
7
D7200
100 R7237
FE_DADD[1]
30
3
4
3
FE_DADD[2]
31 36
4
A1
A6
5
6
5
FE_DADD[3]
32 35
7
8
7
8
A3
32KOUT VDD
9
A4
34
6
A2
A5
IC7203
VDD
2
VSS
GND_1
RB7209 100
GND_1
C7232 1p
3 8
RB7211 100
SCL OSCIN SDA OSCOUT 1 3
7
C7235 47 0.1 C7234
8
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 2B/13 ~
R7246 220
65
7 59 58 9 13 15 49 18
5
7
8
6
4
INTRC INTRB
6
FE_DVREF
DVREF,FE_DWEB DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE
100 R7241
5
100 R7238 VSS INTRA X7201
SCL SDA
2
4
100 0.5%
R7218
9
C7233 1p 0.22F C7236
PLACE THESE CLOSE TO PIN 49 OF IC
100 0.5%
ORS - MOUNT ON DE-B
R7219 C7208 C7211
DDR SDRAM
10
RESET_N 3.3V_MAIN
0.1
JL7204 JL7208
GND_1
JL7205 JL7209
GND_1
LAYOUT NOTE:JL7206 JL7210
3.3V_MAIN
3.3V_MAIN XX R7236
REMOVE GND PLANE AROUND AND UNDERNEATH IC7202 AND X7200 INCLUDING TRACKS FROM XTAL TO IC.
FB7201 0uH C7204 0.1
R7227 1k
4.7
Q7203 RT1N141M-TP-1
JL7207 JL7211 C7205 0.001 TP7222 FE_CLK27M R7233 47
C7237 XX
Q7204 RT1P431M-TP-1
R7245 XX
11
C7209 4.7 C7210 0.1
GND_1
C7206 XX X7200
8 7 6 5
12
IC7202
27MHZ CLOCK
GND VIN NC X1
1 2 3 4
R7242 1005 5% CHIP 1/16W 10k
R7243 CHIP 1/16W 1005 10k 5%
PD
X2
VDD
CLK
Q7201 2SK2036(TE85L)
13
ORS - MOUNT ON
GND_1
C7207 XX R7226 10k C7212 0.1
GND_1
GND_1
TP7221
SDA
S
SDA_EMMA
FE_PWMOUT
R7239 XX
14
Q7202 2SK2036(TE85L)
SCL SCL_EMMA
3.3V_MAIN
S/W OPTION SELECT RESISTORS
R7222 XX R7224 10k
8 9
R7220 XX
OPTION #1 FTV_CONFIG2 0 0 0
OPTION #2 OPTION #3
R7240 XX
15
0 0 0
0 0 0
0 R7221 10k R7223 10k R7225 XX
FTV_CONFIG1 FTV_CONFIG0
B1
N O P Q R S
2B/13
16
GND_1
K L
M
T
U
V
W
- 26 -
33
4
S
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
1
B1.-SE2
2
FE_NCI_EN FE_CI1_CE1B FE_FOEB FE_IORDB FE_D_IOWRB FE_FWEB FE_CI1_RSTB FE_REGB R7305 100
3.3V_MAIN
FE_CI1_CE1B
FE_FOEB
EMMA2LR
FE_IORDB FE_IOWRB
3
FE_FWEB FE_CI1_RSTB FE_REGB R7307 XX C7303 1000p
FB7301 0uH
R7308 100
4
14 13 12 11 10 9 8
B1
5
1A
1Y
2A
2Y
3A
1
2
3
4
5
6
3Y
3A/13
7
R7309 10k
R7302 10k
R7303 10k
R7304 10k
3.3V_MAIN
C7304 0.1
GND
3.3V_MAIN
IC7303
TS from
6A
6Y
5A
5Y
4A
VCC
4Y
FE_IOWRB_FWEB
R7306 220
C7305 1000p FE_CI1_INPACKB
C7312 XX C7306 0.1
FE_CI1_INPACKB
6
EMMA2LR
FE_CI1_IREQB FE_CI1_WAITB
FE_CI1_IREQB FE_CI1_WAITB
IC7304
20 1
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FB7303 0uH
19
FE_CI1_RSTB FE_CAM_TSOD[3] FE_CAM_TSOD[4]
2 3 4
18
FE_CI_TSD[3] FE_CI_TSD[4]
17
7
5
EMMA2LR
16
FE_RADD[0-11]
FE_CAM_TSOD[5] FE_CAM_TSOD[6] FE_CAM_TSOD[7]
3.3V_MAIN
15
6 7 8
FE_CI_TSD[5] FE_CI_TSD[6] FE_CI_TSD[7] R7312 47
14 13
FE_CI1_CE1B
12
9
C7302 0.1
FB7302 0uH
11
10
8
IC7302
1 2 3 5
C7307 0.1
A B
VCC
4
GND
Y
FE_BUF_DIR
1
IC7305
20
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FB7304 0uH
19
9
POWER
GND_1
FE_M_CKOUT,FE_M_SYNC,FE_M_VAL
EMMA2LR
FE_RADD[8] FE_FOEB
2 3
FE_CAM_ADD
R7313 47
18
FE_M_DATA[0-7]
FE_RADD[9] FE_IORDB
17
4 5
FE_CAM_ADD R7314 47 FE_CAM_ADD[ R7315 47 FE_CAM_ADD[
16
TS to CAM
10
FE_RADD[11] FE_D_IOWRB FE_RADD[10]
15
6 7 8 9 10
14 13 12 11
C7308 0.1
11
IC7306
20 1
OE1 A0 A1 A2 A3 A4 A5 A6 VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5
FB7305 0uH
19
FE_CAM1_IREQB FE_M_DATA[3] FE_FWEB
2 3 4
18
FE_CAM_TSID[3] R7316 47 FE_CAM_TSID[2] FE_CAM_TSID[1] FE_CAM_TSID[0]
17
12
FE_M_DATA[2] FE_M_DATA[1] FE_M_DATA[0] FE_M_SYNC
16
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 3A/13 ~
- 27 -
5 6 7 8
15 14 13
P
Q
R
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
EE
FF
1
2
B1
3B/13
3
4
3.3V_MAIN
TS from CAM TS to CAM
C7312 XX
5
R7323 10k
R7324 10k
R7325 10k
179376921
A1 B1
6
GND GND D3 CD1# D4 MDO3 D5 MDO4 D6 MDO5 D7 MDO6 CE1# MDO7 A10 CE2# OE# VS1# A11 IORD# A9 IOWR# A8 MISTRT A13
303 H
FE_CAM_DAT[3]
A2 B2
FE_CI1_CD1B
R7320 R7321 R7322
100 100 100
FE_CAM1_RSTB FE_CI_TSD[3] FE_CI_TSD[4]
EMMA2LR
FE_CI1_CD2B FE_CI1_VS1B
FE_CAM_DAT[4]
A3
FE_CAM_TSOD[3]
B3
FE_CAM_DAT[5]
A4
7
FE_CAM_TSOD[4]
B4
FE_CI_TSD[5] FE_CI_TSD[6] FE_CI_TSD[7] R7312 47 FE_CAM1_CE1B FE_CAM1_CE1B
FE_CAM_DAT[6]
A5
FE_CAM_TSOD[5]
B5
FE_CAM_DAT[7]
A6
FE_CAM_TSOD[6]
B6 A7
FE_CAM_TSOD[7]
B7
8
FE_CAM_ADD[10]
A8
R7332 1k
B8 A9
FE_CAM_OEB
304 H
B9
FE_CAM_ADD[11]
A10
FE_CAM_IORDB
B10
9
FE_CAM_ADD[8]
R7313 47
FE_CAM_ADD[9]
A11
FE_CAM_IOWRB
B11
FE_CAM_ADD[9] R7314 47 FE_CAM_ADD[11] R7315 47 FE_CAM_ADD[10]
FE_CAM_OEB
FE_CAM_ADD[8]
A12
FE_CAM_TSISYNC
B12
FE_CAM_IORDB FE_CAM_TSID[0]
A13 B13
FE_CAM_IOWRB FE_CAM_WEB
A14
FE_CAM_TSID[1]
B14 A15
A14 MDI1 WE# MDI2 IREQ# MDI3 VCC VCC VPP1 VPP2 MIVAL MDI4 MCLKI MDI5 A12 MDI6
FE_CAM_TSID[2]
B15
FE_CAM1_IREQB FE_CAM_TSID[3]
R7328 10k
A16 B16 A17
PCMCIA DVB-CI CONNECTOR
MDI0
10
11
305 H
B17 A18 B18
FE_CI1_IREQB FE_CAM_TSID[3] R7316 47 FE_CAM_TSID[2] FE_CAM_TSID[1] FE_CAM_TSID[0] FE CAM ADD[7] FE_CAM_WEB
FE_CAM_TSIVAL
A19
FE_CAM_TSID[4]
B19
FE_CAM_TSICLK
A20
FE_CAM_TSID[5]
B20 A21
12
FE_CAM_TSID[6]
B21
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 3B/13 ~
- 28 -
C7308 0.1
11
IC7306
20 1
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FB7305 0uH
19
FE_CAM1_IREQB FE_M_DATA[3] FE_FWEB
2 3 4
18
FE_CAM_TSID[3] R7316 47 FE_CAM_TSID[2] FE_CAM_TSID[1] FE_CAM_TSID[0] FE_CAM_TSISYNC
17
12
FE_M_DATA[2] FE_M_DATA[1] FE_M_DATA[0] FE_M_SYNC
16
5 6 7 8 9 10
15 14 13 12 11
13
C7309 0.1
IC7307
20 1
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FB7306 0uH
19
FE_CAM_TSOCLK
2
14
FE_M_DATA[7]
FE_M_CKOUT
R7317
47
FE_CI_TSCLK FE_CAM_TSID[7]
18
3 4 5
17
R7318
47
FE_CAM_TSICLK
16
FE_M_DATA[6] FE_M_DATA[5] FE_M_DATA[4]
15
6 7 8
FE_CAM_TSID[6] FE_CAM_TSID[5] FE_CAM_TSID[4] FE_CAM_TSIVAL
14 13
15
TS to EMMA
EMMA2LR
FE_M_VAL
12
9 10
11
FE_CI_TSD[0-7]
C7310 0.1
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL
IC7308 FB7307 0uH
20 19
16
3.3V_MAIN
1
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND
VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FE_RADD[7]
FB7300 0uH
2
FE_RADD[6] FE_RADD[5]
C7300 0.1
FE_CAM_AD FE_CAM_AD FE_CAM_AD FE_CAM_AD FE_CAM_AD FE_CAM_AD FE_CAM_AD FE_CAM_AD
18
3 4
17
FE_RADD[4] FE_RADD[3]
16
5 6
15
17
R7300 10k
1
IC7300
5
FE_RADD[2] FE_RADD[1]
14
7 8
13
FE_IOWRB FE_FWEB
EMMA2LR
A B
VCC
FE_RADD[0]
12
9
2 3
11
10
4
GND
Y
FE_IOWRB_FWEB
18
FE_CI1_CE1B C7301 0.1 R7301 XX
EMMA2LR
C7311 0.1
IC7309
FE_RDATA[0-7] FE_BUF_DIR FE_RDATA[7]
1 2
DIR A0 A1 A2 A3 A4 A5 A6 A7
IC7301
VCC OE B0 B1 B2 B3 B4 B5 B6 B7
FB7308 0uH
20 19
1
OE1 A0 A1 A2 A3 A4 A5 A6 A7 GND
VCC OE2 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
FE_CAM1_WAITB FE_CAM1_INPACKB FE_CAM_DAT[7] FE_CAM_DAT[6] FE_CAM_DAT[5] FE_CAM_DAT[4] FE_CAM_DAT[3] FE_CAM_DAT[2] FE_CAM_DAT[1] FE_CAM_DAT[0] GND_1 FE_REGB FE_CAM_TSOVAL FE_CAM_TSOSYNC FE_CAM_TSOD[0] FE_CAM_TSOD[1] FE_CAM_TSOD[2]
20 19
2 3
R7319 47
R7310 47 R7311 47
18
19
FE_RDATA[6] FE_RDATA[5] FE_RDATA[4] FE_RDATA[3] FE_RDATA[2] FE_RDATA[1]
18
3 4 5 6 7 8
17
4
17 16 15 14 13
16
5 6 7 8 9
15
FE_CI_TSVAL FE_CI_TSSYNC FE_CI_TSD[0] FE_CI_TSD[1] FE_CI_TSD[2]
14 13 12
20
FE_RDATA[0]
12
9 10
11
10
11
GND
B1
21
3C/13
GND_1
DATA to/from CAM
22
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 3C/13 ~
- 29 -
A15
FE_CAM_TSID[2]
B15
WE# MDI2 IREQ# MDI3 VCC VCC VPP1 VPP2 MIVAL MDI4 MCLKI MDI5 A12 MDI6 A7 MDI7 A6 MCLKO A5 RESET A4 WAIT# A3 INPACK# A2 REG# A1 MOVAL A0 MOSTRT D0 MDO0 D1 MDO1 D2 MDO2 IOIS16# CD2# GND GND CN7300
FE_CAM1_IREQB FE_CAM_TSID[3]
R7328 10k
A16 B16 A17
PCMCIA DVB-CI CONNE
11
305 H
B17 A18 B18
FE_CI1_IREQB FE_CAM_TSID[3] R7316 47 FE_CAM_TSID[2] FE_CAM_TSID[1] FE_CAM_TSID[0] FE_CAM_TSISYNC FE_CAM_ADD[7] FE_CAM_WEB
FE_CAM_TSIVAL
A19
FE_CAM_TSID[4]
B19
FE_CAM_TSICLK
A20
FE_CAM_TSID[5]
B20 A21
12
FE_CAM_TSID[6]
B21 A22
FE_CAM_TSID[7]
B22
FE_CAM_ADD[6]
A23
FE_CAM_TSOCLK FE_CAM_ADD[5]
R7333 47
B23 A24
13
FE_CAM1_RSTB
B24
306 H
FE_CAM_ADD[4] FE_CAM1_WAITB FE_CAM_ADD[3]
A26 R7329 10k A25 B25
R7317
47
FE_CI_TSCLK FE_CAM_TSID[7]
FE_CAM1_INPACKB FE_CAM_ADD[2] FE_CAM_REGB
R7330 10k
B26 A27 B27
14
R7318
47
FE_CAM_TSICLK
FE_CAM_ADD[1]
A28
FE_CAM_TSID[6] FE_CAM_TSID[5] FE_CAM_TSID[4] FE_CAM_TSIVAL FE_CAM_DAT[0] FE_CAM_ADD[0]
FE_CAM_TSOVAL
B28 A29
FE_CAM_TSOSYNC
B29 A30
15
FE_CAM_TSOD[0]
B30
FE_CAM_DAT[1]
A31
FE_CAM_TSOD[1]
B31
FE_CAM_DAT[2]
A32
FE_CAM_TSOD[2]
B32
307 H
A33 B33 A34
16
FE_CAM_ADD[7] FE_CAM_ADD[6] FE_CAM_ADD[5]
B34
JL7300
FE_CAM_ADD[4] FE_CAM_ADD[3] FE_CAM_ADD[2] FE_CAM_ADD[1] FE_CAM_ADD[0]
3.3V_MAIN 5V_MAIN
JL7301
R7331 1k
17
FB7309 0uH
5V SWITCH
C7315 0.1
18
C7314 4.7
R7327 10k
308 H
1
IC7310
8
EN FLAG GND NC OUT IN OUT NC
FE_CI1_PWR_EN
EMMA2LR
7
2
FE_NCI1_OVR R7319 47
R7310 47 R7311 47
FE_CI1_WAITB FE_CI1_INPACKB FE_CAM_REGB FE_CI_TSVAL FE_CI_TSSYNC R7326 10k
6
3 4
19
5
C7313 0.1
FE_CI_TSD[0] FE_CI_TSD[1] FE_CI_TSD[2]
GND_1
20
CTRL to/from CAM
B1
3D/13
ADDR to CAM
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
21
22
P
Q
R
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
EE
FF
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 3D/13 ~
- 30 -
FIX2
RM-ED010
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
1
B1.-SE2
2
C3406 XX
VOUT
8.5V_MAIN
3
XX C3403
VIN
IC3401 XX
ANALOGUE AUDIO
CONTROL
NOISE
GND
R3407 XX
1
XX C3409 C3410 XX 5V_MAIN JL3401
XX C3404
4
FB3400 XX
EMMA2LR
FE_ABCK,FE_ADO,FE_ALRCK,FE_AMCK
XX C3405
001:H2 IC3400
5
FE_AMCK FE_ABCK FE_ADO FE_ALRCK
JL3404
R3422 18k
XX R3424
MCLK BiCK SDTI LRCK RSTN
DZF DEM VDD VSS VCOM
XX R3406
C3400 0.1
10 C3401 C3402 10
FE_NMASTER_RESET
6
GND_1
C3407 4.7
R3410 220
100p C3414
R3401 10k
SMUTE AOUTL ACKS AOUTR DIF0 DIF1
R3409 100k
R3408 100k
C3408 4.7
R3403 XX
R3411 220
4 10 C3417
3
2
1
7
R3402 XX
R3404 10k
C3413 XX C3412 XX 100p C3415
0.1 C3419
1k R3413
R3418 10k
GND_1
R3415 39k
JL3405
GND_1
R3419 18k
IC3402
6
8
RESET SIGNAL GENERATION
9
RESET_N
JL3400 R3405 100 100p C3411 JL3402 FE_NMASTER_RESET
B1
4/13
10
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
11
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 4/13 ~
- 31 -
R3425 XX
5
2
3 4
16 1 2 3 4 5 7 8 15 14 13 12 11 10 9
AUDIO DAC & AMP
C3420 0.1
FB3402 0uH
R3428 0
8.5V_MAIN
10 C3421
C3424 0.1
AMPLIFIER GAIN = 2.0
R3416 18k
R3421 15k
JL3408
R3426 100
DIGITAL_RF_L C3422 1
FB3401 0uH
R3414 39k
10k R3417
1k R3412
5
6
7
8
JL3409
DIGITAL_RF_R
R3420 15k
R3423 18k
R3427 100
C3423 1
FIX2
RM-ED010
A
B1.-SE2
1
B
C
D
E
F
G
H
I
J
K
L
M
N
O
MOUNT ALL THESE CONNECTORS IN THE "FE" AREA
3.3V_MAIN
I2C_TV
D7500 D7502
3.3V_MAIN
*** MOUNT ***
2
R7505 390 R7500 100 SCL_EMMA Q7500 R7501 100 SDA_EMMA Q7502 R7510 390
C7501 XX
JL7501
10k RB7500
10k
10k R7515
2
4
6
8
10
12
14
16
CN7500
+3V3D GND RST NC TXD0B_MAIN RXD0B_MAIN 1 2 SIGN15457 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1
3
5
7
9
11
13
15
3
TP7500
JL7503 JL7504 JL7505 JL7506 JL7507 SIGN15453 JL7508
R7513
FIT FOR JTAG
FE_TXD0B FE_RXD0B FE_TXD1B FE_RXD1B
AVC/EMMA COMMS JIG PORT AVC DEBUG
GND_1
TXD1B_MAIN RXD1B_MAIN TXD3B_MAIN RXD3B_MAIN
4
I2C_DVBC/COFDM
5
D7501
3.3V_MAIN
JIG_MAIN +3V3D GND JTCK JTDO
FE_JIG_MODE
JL7509 JL7510 JL7511 JL7512 JL7513 JL7514
R7514 XX
FE_JTCK FE_JTDO FE_JTMS FE_JTRST FE_JTDI FE_NMI_EDINT
D7503
JTMS JTRST
R7506 390 R7502 100 SCL_DIGITAL R7503 100 SDA_DIGITAL Q7501
R7511 390
JTDI EDINT NMI Q9733
20
6
181871421 JL7500
FIT FOR EJTAG
FE_JTCK,FE_JTDI,FE_JTDO,FE_JTMS,FE_JTRST,FE_NMI_EDINT
Q7503
GND_1
DEBUG UARTS & EJTAG
7
GND_1
*** MOUNT ***
DIFFERENTIAL PAIR SIGNALS
3.3V_MAIN
FE_USB_DN FE_USB_DP
R7512 4.7k
8
3.3V_MAIN
10k R7508
R7509 10k
JL7531 JL7527
182020911
1 2 GND PMSBS +3V3D PMSDIO
CN7501
R7504 XX
GND_1
FE_MS_CLK
FE_MS_CLK FE_MS_INS FE_MS_DAT[0] FE_MS_BS
JL7523 JL7524 JL7525 JL7526
100 RB7501
JL7528
3 4
9
FE_USB_PON FE_NUSB_OVR R7507 XX
FE_MS_INS FE_MS_DAT[0] FE_MS_BS
B1
5/13
JL7529
5 6 PMSINS
JL7530 GND_1
7 8 PMSSCLK +3V3D GND
10
SERVICE (MEMORY STICK) CONNECTOR
COMPONENTS MARKED AS XX REFER TO PARTS LIST, WILL ONLY BE LISTED IF FITTED
9
XX C7502
10
JL7532
GND_1
11
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 5/13 ~
- 32 -
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
B1.-SE2
1
GND
GND
GND
GND
GND
GND
GND
GND
GND 24 P4_2 P4_1
DCC
VCC
VCC
TC+
TD+
TB+
TA+
TC-
TD-
TB-
TA-
NC
NC
2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
0 R4136
1608
CHIP
1608
XX R4156
3.3V_STBY
0 R4161 CHIP 1608 HOT_PLUG_DET2 P4_3
3 2
CHIP 0 R4167
AVLINK1
3
3.3V_STBY 1 10k R4027 2
CAT24C32WI-GT3 IC4003
8 E0 E1 E2 NSS VCC WC SCL SDA
C4016 47 6.3V
R4103 10k
C4017 0.1 16V 1005 JL4002 SIGN16248 JL4003
XX L4000
XX L4001
XX L4002
XX L4004
XX R4153
3.3V_STBY
XX L4005
4
R4005 2.2k XX R4038
SDA R4070 0 CHIP
Q4006 RT1N441C-TP-1
+3.3LVDS +1.8LVDS +3.3LVDS
5
D4003
R4028 10k R4039 XX AVLINK2
1005
16V 0.1 C4058 R4132 0.5% RN-CP 1/16W 6.8k
1005
1005
16V 0.1 C4047
1005
Q4005
3.3V_STBY 3.3V_STBY
R4130 0.5% RN-CP 1/16W 68k
XX R4150
R4151 XX
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 1
VS14
VSUP1.8DIG
DBO9
DBO7
DBO6
DBO4
DBO3
DBO1
DBO0
GND1.8DIG
DYO2
VSUP3.3LVDS
VSUP3.3LVDS
VSUP1.8LVDS
VSUP3.3LVDS
VSUP3.3LVDS
LVDSA_0P
LVDSA_1P
LVDS-2N
LVDSA_2P
LVDSA_3P
GND3.3LVDS
GND3.3LVDS
GND1.8LVDS
GND3.3LVDS
GND3.3LVDS
LVDSA_1N
LVDSA_3N
LVDSA_ON
5% CHIP 1/16W 1k R4279
FB4009 XX 157 R4099 100 1/16W CHIP 5% R4100 0 CHIP 162 16V 0.1 C4024 JL4006 165 P1_3 P1_2 P1_1 P1_0 163 164 P1_4 158 159 160 161 ADHD RCON P1_7 P1_6 P1_5
LVDSA_CLKN
LVDSA_CLKP
LVDSA_4N
LVDSA_4P
PORT_CS
R4064 0 CHIP PE_DATA_OUT
PE_E0 AGC_DEFEAT R4085 100 1/16W CHIP 5% R4086 100 1/16W CHIP +3.3DAC 5%
XX C4013
HS
7
KEY
0.5% RN-CP 1/10W 1k R4078
GND3.3DAC VSUP3.3DAC
R4000 0 CHIP INT_HDMI PE_RESET
3.3V_STBY R4080 100 1/16W CHIP 5%
8
3.3V_STBY
M_DIMMER
JL4001 5% CHIP 1/16W 10k R4280
R4079 100 1/16W CHIP 5% R4081 100 1/16W CHIP 5% +3.3FE R4087 100 1/16W CHIP 5% 16V 0.1 C4025 C4035 0 . 1
166 1005 +1.8FE 167
16V 0 . 1 168 C4045 169 170 171
VSUP1.8FE VSUP3.3FE V IN 22 V IN 21(CVBS) V IN 20(Y) V IN 19 V IN 18 H SYNC/FB V IN 17 B IN V IN 16 G IN V IN 15 R IN/C V IN 13 B IN V IN 12 G IN V IN 11 R IN V IN 9 V IN 8 V IN 7 VSUP1.8FE GNDA V IN 6 V IN 5 V IN 3 V IN 2 V IN 1 VSUP3.3VO VOUT3 VOUT2 VOUT1 GND3.3IO3 VSUP3.3IO3 656I0
EDID_SEL1
3.3V_STBY PC_BLUE PC_GREEN PC_RED FB_SCART1
C4034 0 . 1 172 173
3.3V_STBY
9
5% CHIP 1/16W 47k R4035
C4036 0 . 1
174 1005 1005 177 1005 178 1005 1005 1005 180 181 R4108 0 182 183 184 185 186 187 179 R4107 175 0 CHIP 176
C4037 0 . 1 16V BLUE_SCART1/Y_FRONT C4031 0 . 1 16V
GREEN_SCART1/C_FRONT RED_SCART1 C4038 0 . 1 16V C4033 0 . 1 16V C4132 XX C4133 XX C4039 0 . 1 16V C4032 0 . 1 16V C4040 0 . 1 BLUE_SCART2 FB_SCART2 GREEN_SCART2 +1.8FE XX C4021 PC_DET RED_SCART2 CVBS_SCART2 1005 16V 0.1 C4026
Q4001 DTA114EUA-T106
10
R4013 100 1/16W CHIP 5% 5% CHIP 1/16W 10k R4002 R4001 XX
S
5% RN-CP C4008 1/10W 0 . 0 2 2 4.7M 50V R4046 B 2012
C4130 XX PC_V PR_HD
PB_HD Y_HD
C4131 XX
Q4003 2SK2036(TE85L)
D4019 XX
3.3V_STBY 5% CHIP 1/16W 10k R4049
IC4005 IC VCT-7973P
C4041 0.1
POWER_ON
11
Q4000 ISA1235AC1TP-1EF
5% CHIP 1/16W 10k R4004 R4009 100 1/16W CHIP 5%
R4008 10k 1/16W CHIP 5%
C4042 0.1 C4029 0.1
D4002 MA111-TX
5% CHIP 1/16W 47k R4033
2012 B 16V 1 C4006 S
CVBS_SCART1 XX C4022 RF_ANALOG R4060 0 CHIP XX C4015 +3.3VO 1005 16V 0.1 C4027 1005 16V 0.1 C4028 XX C4023 RF_DIGITAL
Q4004 2SK2036(TE85L)
CVBS_SELEC
C4012 XX
188 JL4008 189 JL4009 C4043 0 . 16V 1 190 1005 JL4010 C4030 0.1 191 C4044 0.1 192 16V JL4007 1005 193 194 195 196 197 198
12
VDCLK,VDO[0-7]
CVBS_LAST_RF
+3.3IO VDO[0]
XX
R4023
~ B1 Board Schematic Diagram [ Main Microcontroller, HDMI/AV Side/PC Input, Audio Processor, Scarts ] Page 6A/13 ~
- 33 -
P
6
VSUP3.3LVDS
DYO1
REXT
5% CHIP 1/16W 100 R4160 5% CHIP 1/16W 5% 100 CHIP R4165 1/16W PC_DET 100 R4166
AV_LINK
C4051 0.1 16V
C4053 0.1 16V 1005
1005
C4067 0.1 16V
C4070 0.1 16V
+1.8DIG
C4078 0.1 16V JL4011 HOT_PLUG_DET1 1005
4
4
3
4
3
4
3
4
3
S
Q4002
R4069 0 CHIP
SCL JL4004 NVM_WP
1
25
1
2
3
4
5
6
7
8
9
NC
6A/13
TCLK+
TCLK-
B1
1
2
1
2
1
2
1
2
7 6
3 4
5
P
Q
R
S
T
U
V
W
X
Y
Z
AA
BB
CC
DD
EE
FF
1
PANEL_VCC
CN4000 30P WHT
TCLK+
TCLK-
GND
GND
GND
GND
GND
B1
C4090 XX
6B/13
JL4016 C4113 100p 50V CH 1005
VCC
VCC
VCC
VCC
VCC
TC+
TD+
TD-
NC
NC
NC
NC
NC
2
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
L4007 0uH
C4091 XX KEY
1608
0 R4161 CHIP 1608
XX R4169 XX R4171
XX R4175
XX R4156
CHIP 0 R4167
XX R4180
JL4012
XX R4153
1005 X7R 50V 470p C4084 XX L4005
16V 47 C4087
C4092 1000p 50V B 1608 C4093 0.01 25V X7R 1005
PZU5.6B2 D4014
AC_ON/OFF R4236 XX AC_ON/OFF_NEG R4237 0 CHIP KEY2 C4114 100p 50V CH 1005
R4256 0 CHIP JL1060
Q4014 RT1N441C-TP-1
3.3V_STBY
R4257 0 CHIP
CN4001 13P WHT 1 2 3 GND KEY KEY2 GND STBY3.3V REC_LED STBY_LED TIMER_LED GREEN_LED PIC_OFF_LED BL_IN 3.3V_MAIN SIRCS
3
XX L4002
XX L4004
PZU5.6B2 D4015
C4111 6.3V 22 JL4017 R4253 0 CHIP
D4008 MA111-TX
3 2 1
CEC_OUT
CEC_IN
AVLINK2
HOT_PLUG_DET2
AVLINK1
+3.3IO
RXD
TXD
+3.3LVDS
+1.8DIG
SIRCS
5% CHIP 1/16W 100 R4160 5% CHIP 1/16W 5% 100 CHIP R4165 1/16W PC_DET 100 R4166 PD_HDMI R4168 100 1/16W CHIP R4170 5% 100 1/16W CHIP 5%
067 1 V 05
C4070 0.1 16V 1005
C4078 0.1 16V JL4011 HOT_PLUG_DET1 1005 XX R4150
R4151 XX
XX R4174
R4176 XX
XX R4183
XX D4013
XX R4247
32 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
P4_3
P4_2
P4_1
P4_0
P2_7
P2_6
VSUP3.3IO1
VSUP1.8DIG
GND3.3IO1
OSDG0
OSDG1
OSDG2
GND1.8DIG
VSUP3.3LVDS
OSDG3
OSDR0
OSDR1
OSDR2
OSDR3
DYO2
DYO1
LVDSA_3P
GND3.3LVDS
LVDSA_3N
LVDSA_CLKN
LVDSA_CLKP
LVDSA_4N
LVDSA_4P
R7,HS,VS
3.3V_STBY
AVD3 S1 S0
82 81 80 79 78 77 76 75
20.25MHz X4000
IC4005 IC VCT-7973P
XTALOUT XTALIN VSUP3.3COM GND3.3COM VSUP3.3DRI GND3.3DRI DBI0 DBI1 DBI2 DBI3 DBI4 DBI5 DBI6 DBI7 DGI0 DGI1 DGI2
R4201 XX R4202 XX R4203 XX
R4207 100 1/16W CHIP 5% R4216 0 CHIP
0 S4001 R4223
CHIP
6,DG7,DR0,DR1,DR2,DR3,DR4,DR5,DR6,D
XX C4109
1 4 REC_LED STBY_LED TIMER_LED GREEN_LED PIC_OFF_LED C4083 0.1 16V 1005 5% CHIP 1/16W 100 470 R4181R4188 XX R4184 5% CHIP 1/16W 470 R4189 OSDB0 OSDB1 OSDB2 OSDB3 OSDHCS0 OSDHCS1 OSDFSW OSDCLK VSUP3.3IO1 GND3.3IO1 VD6 FFSW P2_5 P2_4 P2_3 P2-2 P2_1 P2_0 VSUP3.3FL GND3.3FL SDA SCL 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 R4206 100 1/16W CHIP 5% R4211 100 1/16W CHIP 5% R4199 XX R4200 XX R4209 100 16V 0.1 C4094 R4208 100 PE_E2 R4210 100 1/16W CHIP 5% R4212 100 PE_A2 PE_A1 PE_A0 1005 16V 0.1 C4096 +3.3FL R4193 XX R4194 XX R4195 100 1/16W CHIP 5% R4196 100 1/16W R4197 CHIP XX 5% R4198 XX 1005 R4214 4.7k 1/16W CHIP 5% GREEN_LED R4240 10k 1/16W CHIP 5% 1005 AC_ON/OFF JL4062 STBY_SW POWER_DET AC_ON/OFF_NEG R4239 XX +3.3IO R4213 100 1/16W CHIP 5% R4241 100 1/16W CHIP 5% C4101 15p 50V CH 1608 SCL 5% CHIP 1/16W 10k R4232 1608 B 16V 0.22 C4105 R4217 0 CHIP C4102 15p 50V CH 1608 1005 16V 0.1 C4098 +3.3